CN105119599A - Broadband low-stepping high-speed frequency synthesizer based on DDS (Direct Digital Synthesizer) and PLL (Phase Locked Loop) - Google Patents
Broadband low-stepping high-speed frequency synthesizer based on DDS (Direct Digital Synthesizer) and PLL (Phase Locked Loop) Download PDFInfo
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Abstract
The invention discloses a broadband low-stepping high-speed frequency synthesizer based on a DDS (Direct Digital Synthesizer) and a PLL (Phase Locked Loop). The frequency synthesizer comprises a DDS circuit, a PLL circuit, an up-conversion and signal amplification circuit and a time sequence control circuit, wherein the signal output end of the PLL circuit is connected with the signal input end of the upper-conversion and signal amplification circuit; the signal input end of the up-conversion and signal amplification circuit is connected with the signal output end of the DDS circuit; and the signal output end of the time sequence control circuit is connected with the signal input ends of the PLL circuit and the DDS circuit. According to the broadband low-stepping high-speed frequency synthesizer, L-band and KU-band local oscillations are generated through the PLL circuit in a large bandwidth and combined with a DDS frequency respectively, and frequency switching is realized through a high-speed switch combination method. An output frequency is on a KU band; frequency hopping of 10MHz stepping can be finished rapidly when an output bandwidth is 12-14GHz; and the overall frequency switching time is up to 2 microseconds. The broadband low-stepping high-speed frequency synthesizer has the characteristics of simple structure, high stability, high accuracy, easiness in implementation and the like.
Description
Technical field
The invention belongs to radar communication technical field, particularly a kind of broadband low stepping fast frequency synthesizer based on DDS and PLL composition.
Background technology
Frequency synthesis is divided into direct modeling frequency synthesis, Phase locking frequency synthesis and direct digital synthesizers three kinds.Along with the development of Radar Technology and the communication technology, requirements at the higher level are proposed to the frequency stability of frequency synthesizer, spectral purity, frequency range and frequency agility speed.Existing frequency synthesizer is at output frequency during higher or broader bandwidth, and output signal second-rate, meanwhile, the complex structure of existing frequency synthesizer, stability is bad, therefore urgently improves.
Summary of the invention
The present invention is in order to overcome above-mentioned the deficiencies in the prior art, provide a kind of broadband low stepping fast frequency synthesizer based on DDS and PLL composition, the present invention has the advantage of simple, the reasonable in design and good stability of structure, fast frequency synthesizer in the present invention is at output frequency during higher or broader bandwidth, the quality of output signal is all better, and can realize fast frequency-hopped.
For achieving the above object, present invention employs following technical measures:
Based on a broadband low stepping fast frequency synthesizer for DDS and PLL composition, this frequency synthesizer comprises DDS circuit, PLL circuit, up-conversion and signal amplification circuit, sequential control circuit; The signal output part of described PLL circuit is connected with the signal input part of signal amplification circuit with described up-conversion, described up-conversion is connected with described DDS circuit signal output with the signal input part of signal amplification circuit, and the signal output part of described sequential control circuit is connected with the signal input part of described PLL circuit, DDS circuit.
The present invention can also be realized further by following technical measures.
Preferably, described PLL circuit comprises that KU wave band PLL circuit, 4 selects 1PIN switch, L-band PLL circuit, 5 selects 1PIN switch; Described up-conversion and signal amplification circuit comprise L-band frequency mixer, KU wave band frequency mixer, filter amplifier, 2 select 1 switch filter;
The output of described KU wave band PLL circuit exports the input that 4 road KU wave band local oscillation signals to 4 select 1PIN switch, and described 4 select the signal output part of 1PIN switch to be connected with the signal input part of described KU wave band frequency mixer; The output of described L-band PLL circuit exports the input that 5 road L-band local oscillation signals to 5 select 1PIN switch, described 5 select the signal output part of 1PIN switch to be connected with the signal input part of described L-band frequency mixer, the signal output part of described L-band frequency mixer is connected with the signal input part of described filter amplifier, the signal output part of described filter amplifier is connected with the signal input part of described KU wave band frequency mixer, and the signal to 2 of described KU wave band frequency mixer output 12 ~ 14GHz selects the input of 1 switch filter;
The signal output part of described sequential control circuit is connected with the signal input part of described KU wave band PLL circuit, L-band PLL circuit respectively, and the signal output part of described sequential control circuit also selects 1PIN switch, 5 to select the control end of 1PIN switch to be connected respectively with 4; The signal output part of described DDS circuit is connected with the signal input part of described L-band frequency mixer.
Preferably, described KU wave band PLL circuit is made up of phase demodulation unit, loop filter, four voltage controlled oscillators, microstrip filters; The described output of phase demodulation unit is connected with the input of loop filter, the output of loop filter is connected with the input of four voltage controlled oscillators respectively, the respective output of four voltage controlled oscillators selects the input of 1PIN switch to be connected with 4 on the one hand, be connected with the input of microstrip filter on the other hand, the output of microstrip filter is connected with the input of phase demodulation unit; The signal output part of described sequential control circuit is connected with the input of phase demodulation unit.
Preferably, described phase demodulation unit comprises frequency divider in reference divider, phase discriminator, ring; The input clock of the input termination 100MHz of described reference divider, the signal output part of described reference divider is connected with the signal input part of described phase discriminator, the signal output part of described phase discriminator is connected with the signal input part of described loop filter, the signal output part of described microstrip filter is connected with the signal input part of frequency divider in described ring, and in described ring, the signal output part of frequency divider is connected with the signal input part of described phase discriminator; The signal output part of described sequential control circuit is connected with the input of described phase discriminator;
The signal input part of described L-band PLL circuit connects the input clock of 100MHz.
Preferably, described DDS circuit comprises DDS generation circuit, frequency multiplication filter circuit, described DDS produces circuit and comprises the first impedance transformer, DDS chip, the second impedance transformer, described frequency multiplication filter circuit comprises match circuit, coupling frequency multiplier circuit, 4 selects 1 switch filter group, the signal input part of described first impedance transformer connects the signal of 1000MHz, described first impedance transformer signal output part is connected with the signal input part of described DDS chip, described DDS chip signal input is connected with the signal output part of described second impedance transformer, described second impedance transformer exports the input of signal to match circuit of 50 ~ 75.5MHz, the signal output part of described match circuit is connected with the signal input part of described coupling frequency multiplier circuit, the signal to 4 of described coupling frequency multiplier circuit output 200 ~ 300MHz selects the input of 1 switch filter group, described 4 select 1 switch filter group to export the input of DDS signal to L-band frequency mixer of 200 ~ 300MHz, the signal output part of described sequential control circuit is connected with the input of described DDS chip.
Preferably, described sequential control circuit model is the fpga chip of the EP1C6T144I7 of the cyclone series that altera corp of the U.S. produces.
Preferably, described L-band frequency mixer model is the HMC220MS8 chip that HITTITE company of the U.S. produces, described KU wave band frequency mixer model is the HMC441LM1 chip that HITTITE company of the U.S. produces, described voltage controlled oscillator model is the HMC588LP5 chip that HITTITE company of the U.S. produces, and described DDS chip model is the AD9858BCPZ chip that AnalogDevices company of the U.S. produces.
Preferably, in described phase demodulation unit, phase discriminator model is the ADF4107 that AnalogDevices company of the U.S. produces, and described L-band PLL circuit chip model is the ADF4350BCPZ that AnalogDevices company of the U.S. produces; The signal output part of described sequential control circuit is connected with the input of described ADF4350BCPZ.
Preferably, described loop filter is made up of OP27GS operational amplifier, the IN-pin contact resistance R12 of described OP27GS, one end of resistance R13, the other end ground connection of described resistance R12, one end of the IN+ pin contact resistance R11 of described OP27GS, one end of electric capacity C12, REFIN, the other end ground connection of described electric capacity C12, the other end of described resistance R11 connects one end of electric capacity C13, the other end ground connection of described electric capacity C13, the VCC-pin ground connection of described OP27GS, the VCC+ pin of described OP27GS connects one end of electric capacity C14, one end of electric capacity C15, + 12V power supply, described electric capacity C14, the other end ground connection of electric capacity C15, the other end of the OUT pin contact resistance R13 of described OP27GS, one end of resistance R14, the other end of described resistance R14 connects one end of electric capacity C16, RFOUT, the other end ground connection of described electric capacity C16, the VIO of described OP27GS, NC pin is unsettled.
Beneficial effect of the present invention is:
1), the present invention is made up of DDS circuit, PLL circuit, up-conversion and signal amplification circuit, sequential control circuit.The present invention, by reducing the output frequency of DDS circuit, re-uses frequency multiplier circuit to improve the quality of output signal; In wider bandwidth, the present invention produces L-band by PLL circuit and KU wave band two kinds of local oscillators combine with DDS frequency respectively, then the method combined by speed-sensitive switch realizes frequency error factor, output frequency of the present invention is at KU wave band, output bandwidth can complete the frequency hopping of 10MHz stepping fast when 12 ~ 14GHz, and makes reach 2us the switching time of whole frequency; The present invention has the features such as structure is simple, good stability, precision are high, easy realization.
2) the KU wave band local oscillator generating portion, in the present invention adopts separate type device, the model of described phase discriminator is that AnalogDevices company of the U.S. produces ADF4107, this integrated chip multiple vitals of phase-locked loop frequency synthesizer, only need simple peripheral circuit, the frequency synthesizer of a complete low noise, low-power consumption, high stability can be formed.
In a design process of whole Phase locking frequency synthesis, the design of loop filter seems particularly important, loop filter directly can have influence on the quality and locking time that whole signal produces, and the optimization of loop bandwidth to contribute to when not sacrificing noiseproof feature continuously and healthily and frequency modulation exactly.In loop bandwidth, phase discriminator controls voltage controlled oscillator (VCO) track reference frequency, and the phase noise with reference to oscillator is mapped on VCO.This process is subject to the domination of phase discriminator noise floor, because phase discriminator noise floor is usually high than the phase noise of reference oscillator.Because in ADF4107, the noise floor of phase discriminator is lower, the output of this signal generating circuit is made to have outstanding Low phase noise characteristic.
3) the L-band local oscillator generating portion, in the present invention adopts integrated device, described L-band PLL circuit chip model is the ADF4350BCPZ chip that AD company of the U.S. produces, this chip internal is integrated with VCO, without the need to building other peripheral circuit again, very convenient when being used in L-band.
4), for up-conversion and signal amplification circuit, the signal of 2GHz bandwidth, when broader bandwidth, to be cut into the signal of 1GHz bandwidth, thus improves the quality of output signal by the present invention by carrying out switch filtering after mixing.
Accompanying drawing explanation
Fig. 1 is PLL circuit of the present invention and up-conversion schematic diagram;
Fig. 2 is DDS signal section circuit theory diagrams of the present invention;
Fig. 3 is loop filter schematic diagram of the present invention;
Fig. 4 is time stimulatiom figure of the present invention.
10-KU wave band PLL circuit, 20-L-band PLL circuit
30-up-conversion and signal amplification circuit 40-DDS produce circuit
50-frequency multiplication filter circuit
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, be clearly and completely described the technical scheme in the embodiment of the present invention, obviously, described embodiment is only the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
Based on a broadband low stepping fast frequency synthesizer for DDS and PLL composition, comprise DDS circuit, PLL circuit, up-conversion and signal amplification circuit 30, sequential control circuit; The signal output part of described PLL circuit is connected with the signal input part of described up-conversion with signal amplification circuit 30, described up-conversion is connected with described DDS circuit signal output with the signal input part of signal amplification circuit 30, and the signal output part of described sequential control circuit is connected with the signal input part of described PLL circuit, DDS circuit.
As shown in Figure 1, whole synthesizer adopts the external reference clock of 100MHz.
As shown in Figure 1, described PLL circuit comprises that KU wave band PLL circuit 10,4 selects 1PIN switch, L-band PLL circuit 20,5 selects 1PIN switch, KU wave band PLL circuit 10 have employed second order active loop filtering, and L-band PLL circuit 20 have employed the mode of passive second-order loop filtering; Described up-conversion and signal amplification circuit 30 comprise L-band frequency mixer, KU wave band frequency mixer, filter amplifier, 2 select 1 switch filter; It is 2GHz that described up-conversion and signal amplification circuit 30 design broadband, by carrying out switch filtering after mixing 2GHz bandwidth signal is cut into the signal of 1GHz bandwidth.
As shown in Figure 1, described KU wave band PLL circuit 10 is made up of phase demodulation unit, loop filter, 4 voltage controlled oscillators, microstrip filters, described phase demodulation unit is made up of frequency divider in reference divider, phase discriminator, ring, the input clock of the input termination 100MHz of described reference divider, the signal output part of described reference divider is connected with the signal input part of described phase discriminator, the signal output part of described phase discriminator is connected with the signal input part of described loop filter, the output of loop filter is connected with the input of 4 voltage controlled oscillators respectively, the respective output of 4 voltage controlled oscillators selects the input of 1PIN switch to be connected respectively by 4 SMA radio frequency cables and 4 on the one hand, then be connected with the input of microstrip filter on the other hand, the output of microstrip filter is connected with the signal input part of frequency divider in described ring, in described ring, the signal output part of frequency divider is connected with the signal input part of described phase discriminator.
KU wave band PLL circuit 10 operationally, the KU wave band local oscillation signal of 4 road different frequencies of 4 voltage controlled oscillator outputs delivers to by 4 SMA radio frequency cables the input that 4 select 1PIN switch, then 4 selects 1PIN switch to select 1 road KU wave band local oscillation signal to be exported the input delivering to KU wave band frequency mixer by radio frequency cable.
The signal input part of described L-band PLL circuit 20 connects the input clock of 100MHz, the signal output part of L-band PLL circuit 20 exports the input that 5 road L-band local oscillation signals to 5 select 1PIN switch, described 5 select the signal output part of 1PIN switch to be connected with the signal input part of described L-band frequency mixer, the signal output part of described L-band frequency mixer is connected with the signal input part of described filter amplifier, the signal output part of described filter amplifier is connected with the signal input part of described KU wave band frequency mixer, the signal to 2 of described KU wave band frequency mixer output 12GHz-14GHz selects the input of 1 switch filter.
The signal output part of described sequential control circuit is connected with the signal input part of the phase discriminator in described KU wave band PLL circuit 10 and L-band PLL circuit 20, and sequential control circuit produces for controlling frequency division of the frequency needed for phase discriminator and L-band PLL circuit 20 chip than the numerical value deposited; Meanwhile, sequential control circuit also creates 4 and selects 1PIN switch and 5 to select TTL control level needed for 1PIN switch.
As shown in Figure 2, described DDS circuit comprises DDS generation circuit 40, frequency multiplication filter circuit 50, described DDS produces circuit 40 and comprises the first impedance transformer, DDS chip, the second impedance transformer, described frequency multiplication filter circuit 50 comprises match circuit, coupling frequency multiplier circuit, 4 selects 1 switch filter group, the signal input part of described first impedance transformer connects the signal of 1000MHz, described first impedance transformer signal output part is connected with the signal input part of described DDS chip, described DDS chip signal input is connected with the signal output part of described second impedance transformer, described second impedance transformer exports the input of signal to match circuit of 50-75.5MHz, described match circuit signal output part is connected with the signal input part of described coupling frequency multiplier circuit, the signal to 4 of described coupling frequency multiplier circuit output 200-300MHz selects the input of 1 switch filter group, described 4 select 1 switch filter group to export the input of DDS signal to L-band frequency mixer of 200-300MHz, signal output part and the described DDS of described sequential control circuit produce circuit 40 input and are connected.
As shown in Figure 1, 2, described sequential control circuit FPGA model is the EP1C6T144I7 of the cyclone series that altera corp of the U.S. produces, and described DDS chip model is the AD9858BCPZ chip that AnalogDevices company of the U.S. produces.
The present invention fully takes into account the spuious impact of DDS circuit when designing, the present invention is by creating the low frequency signal (namely achieving low frequency to export) of 50 ~ 75MHz to DDS circuit input 1GHz reference frequency signal, then by the method for frequency multiplication filtering, output is risen to 200 ~ 300MHz, frequency hopping stepping 10MHz; Then by 4 select 1 switch filter group be input to mixing amplify IF input terminal and local oscillator carry out mixing.
As shown in Figure 1, phase discriminator model in described phase demodulation unit is the ADF4107 that AnalogDevices company of the U.S. produces, described ADF4107 is that programmable A/R counter and dual-modulus prescaler (P/P+1) complete main frequency dividing ratio M (M=BP+A) jointly, dual-modulus prescaler (P/P+1) is also programmable, and the value of P has several modes: 8/9,16/17,32/33,64/65.Described L-band PLL circuit 20 chip model is the ADF4350BCPZ that AnalogDevices company of the U.S. produces, described L-band frequency mixer model is the HMC220MS8 chip that HITTITE company of the U.S. produces, described KU wave band frequency mixer model is the HMC441LM1 chip that HITTITE company of the U.S. produces, and described voltage controlled oscillator model is the HMC588LP5 chip that HITTITE company of the U.S. produces.
As shown in Figure 3, described loop filter is made up of OP27GS operational amplifier, the IN-pin contact resistance R12 of described OP27GS, one end of resistance R13, the other end ground connection of described resistance R12, one end of the IN+ pin contact resistance R11 of described OP27GS, one end of electric capacity C12, REFIN, the other end ground connection of described electric capacity C12, the other end of described resistance R11 connects one end of electric capacity C13, the other end ground connection of described electric capacity C13, the VCC-pin ground connection of described OP27GS, the VCC+ pin of described OP27GS connects one end of electric capacity C14, one end of electric capacity C15, + 12V power supply, described electric capacity C14, the other end ground connection of electric capacity C15, the other end of the OUT pin contact resistance R13 of described OP27GS, one end of resistance R14, the other end of described resistance R14 connects one end of electric capacity C16, RFOUT, the other end ground connection of described electric capacity C16, the VIO of described OP27GS, NC pin is unsettled.
As shown in Figure 4, FPGA works when CP rising edge clock signal triggers, and changes the operating state of ADF4107 chip by exporting CLK, LE, DATA signal, controls output frequency.
Claims (9)
1., based on a broadband low stepping fast frequency synthesizer for DDS and PLL composition, it is characterized in that: this frequency synthesizer comprises DDS circuit, PLL circuit, up-conversion and signal amplification circuit (30), sequential control circuit; The signal output part of described PLL circuit is connected with the signal input part of described up-conversion with signal amplification circuit (30), described up-conversion is connected with described DDS circuit signal output with the signal input part of signal amplification circuit (30), and the signal output part of described sequential control circuit is connected with the signal input part of described PLL circuit, DDS circuit respectively.
2. a kind of broadband low stepping fast frequency synthesizer based on DDS and PLL composition as claimed in claim 1, is characterized in that: described PLL circuit comprises that KU wave band PLL circuit (10), 4 selects 1PIN switch, L-band PLL circuit (20), 5 selects 1PIN switch; Described up-conversion and signal amplification circuit (30) comprise L-band frequency mixer, KU wave band frequency mixer, filter amplifier, 2 select 1 switch filter;
The output of described KU wave band PLL circuit (10) exports the input that 4 road KU wave band local oscillation signals to 4 select 1PIN switch, and described 4 select the signal output part of 1PIN switch to be connected with the signal input part of described KU wave band frequency mixer; The output of described L-band PLL circuit (20) exports the input that 5 road L-band local oscillation signals to 5 select 1PIN switch, described 5 select the signal output part of 1PIN switch to be connected with the signal input part of described L-band frequency mixer, the signal output part of described L-band frequency mixer is connected with the signal input part of described filter amplifier, the signal output part of described filter amplifier is connected with the signal input part of described KU wave band frequency mixer, and the signal to 2 of described KU wave band frequency mixer output 12 ~ 14GHz selects the input of 1 switch filter;
The signal output part of described sequential control circuit is connected with the signal input part of described KU wave band PLL circuit (10), L-band PLL circuit (20) respectively, and the signal output part of described sequential control circuit also selects 1PIN switch, 5 to select the control end of 1PIN switch to be connected respectively with 4; The signal output part of described DDS circuit is connected with the signal input part of described L-band frequency mixer.
3. as claimed in claim 2 a kind of based on DDS and PLL composition broadband low stepping fast frequency synthesizer, it is characterized in that: described KU wave band PLL circuit (10) is made up of phase demodulation unit, loop filter, four voltage controlled oscillators, microstrip filters; The described output of phase demodulation unit is connected with the input of loop filter, the output of loop filter is connected with the input of four voltage controlled oscillators respectively, the respective output of four voltage controlled oscillators selects the input of 1PIN switch to be connected with 4 on the one hand, be connected with the input of microstrip filter on the other hand, the output of microstrip filter is connected with the input of phase demodulation unit; The signal output part of described sequential control circuit is connected with the input of phase demodulation unit.
4. as claimed in claim 3 a kind of based on DDS and PLL composition broadband low stepping fast frequency synthesizer, it is characterized in that: described phase demodulation unit comprises frequency divider in reference divider, phase discriminator, ring; The input clock of the input termination 100MHz of described reference divider, the signal output part of described reference divider is connected with the signal input part of described phase discriminator, the signal output part of described phase discriminator is connected with the signal input part of described loop filter, the signal output part of described microstrip filter is connected with the signal input part of frequency divider in described ring, and in described ring, the signal output part of frequency divider is connected with the signal input part of described phase discriminator; The signal output part of described sequential control circuit is connected with the input of described phase discriminator;
The signal input part of described L-band PLL circuit (20) connects the input clock of 100MHz.
5. a kind of broadband low stepping fast frequency synthesizer based on DDS and PLL composition as described in any one of claim 2 ~ 4, is characterized in that: described DDS circuit comprises DDS and produces circuit (40), frequency multiplication filter circuit (50), described DDS produces circuit (40) and comprises the first impedance transformer, DDS chip, the second impedance transformer, described frequency multiplication filter circuit (50) comprises match circuit, coupling frequency multiplier circuit, 4 selects 1 switch filter group, the signal input part of described first impedance transformer connects the signal of 1000MHz, described first impedance transformer signal output part is connected with the signal input part of described DDS chip, described DDS chip signal input is connected with the signal output part of described second impedance transformer, described second impedance transformer exports the input of signal to match circuit of 50 ~ 75.5MHz, the signal output part of described match circuit is connected with the signal input part of described coupling frequency multiplier circuit, the signal to 4 of described coupling frequency multiplier circuit output 200 ~ 300MHz selects the input of 1 switch filter group, described 4 select 1 switch filter group to export the input of DDS signal to L-band frequency mixer of 200 ~ 300MHz, the signal output part of described sequential control circuit is connected with the input of described DDS chip.
6. a kind of broadband low stepping fast frequency synthesizer based on DDS and PLL composition as claimed in claim 1, is characterized in that: described sequential control circuit model is the fpga chip of EP1C6T144I7 of the cyclone series that altera corp of the U.S. produces.
7. as claimed in claim 5 a kind of based on DDS and PLL composition broadband low stepping fast frequency synthesizer, it is characterized in that: described L-band frequency mixer model is the HMC220MS8 chip that HITTITE company of the U.S. produces, described KU wave band frequency mixer model is the HMC441LM1 chip that HITTITE company of the U.S. produces, described voltage controlled oscillator model is the HMC588LP5 chip that HITTITE company of the U.S. produces, and described DDS chip model is the AD9858BCPZ chip that AnalogDevices company of the U.S. produces.
8. as claimed in claim 3 a kind of based on DDS and PLL composition broadband low stepping fast frequency synthesizer, it is characterized in that: the phase discriminator model in described phase demodulation unit is the ADF4107 that AnalogDevices company of the U.S. produces, the chip model of described L-band PLL circuit (20) is the ADF4350BCPZ that AnalogDevices company of the U.S. produces; The signal output part of described sequential control circuit is connected with the input of described ADF4350BCPZ.
9. as claimed in claim 2 a kind of based on DDS and PLL composition broadband low stepping fast frequency synthesizer, it is characterized in that: described loop filter is made up of OP27GS operational amplifier, the IN-pin contact resistance R12 of described OP27GS, one end of resistance R13, the other end ground connection of described resistance R12, one end of the IN+ pin contact resistance R11 of described OP27GS, one end of electric capacity C12, REFIN, the other end ground connection of described electric capacity C12, the other end of described resistance R11 connects one end of electric capacity C13, the other end ground connection of described electric capacity C13, the VCC-pin ground connection of described OP27GS, the VCC+ pin of described OP27GS connects one end of electric capacity C14, one end of electric capacity C15, + 12V power supply, described electric capacity C14, the other end ground connection of electric capacity C15, the other end of the OUT pin contact resistance R13 of described OP27GS, one end of resistance R14, the other end of described resistance R14 connects one end of electric capacity C16, RFOUT, the other end ground connection of described electric capacity C16, the VIO of described OP27GS, NC pin is unsettled.
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| CN106452434A (en) * | 2016-11-24 | 2017-02-22 | 安徽四创电子股份有限公司 | Synthesis system for low-noise low-power-consumption dot frequency source |
| CN106452434B (en) * | 2016-11-24 | 2023-07-11 | 安徽四创电子股份有限公司 | Synthesis system of low-noise low-power consumption point frequency source |
| CN107968651A (en) * | 2017-11-20 | 2018-04-27 | 北京中创锐科信息技术有限公司 | Broadband signal generator |
| CN107968651B (en) * | 2017-11-20 | 2021-12-17 | 成都中创锐科信息技术有限公司 | Broadband signal generator |
| CN112019214A (en) * | 2020-07-07 | 2020-12-01 | 杭州芯影科技有限公司 | Signal source system suitable for millimeter wave security inspection |
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