CN105098882B - input current distribution method and device - Google Patents
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Abstract
The disclosure discloses a kind of input current distribution method and device, belongs to charging design field.The input current distribution method includes：Calculate the first input current that the first charging management chip needs when exporting the first output current, and the second input current that the second charging management chip needs when exporting the second output current；Obtain the first input current and the second input current of total input current for obtaining minimum；The first input current corresponding with minimum total input current is defined as to the input current of the first charging management chip, the second input current corresponding with minimum total input current is defined as to the input current of the second charging management chip.The problem of total charge efficiency of these charging management chips does not reach optimal charge efficiency can be caused by solving the mean allocation input current method of salary distribution；Distributed according to the efficiency current of charging management chip, allow the efficiency of each charging management chip to reach the effect of optimum state as far as possible.
Description
Technical Field
The present disclosure relates to the field of charging design, and in particular, to an input current distribution method and apparatus.
Background
In order to improve the charging efficiency and shorten the charging time, many manufacturers propose a concept of parallel charging, that is, at least two charging management chips connected in parallel are used to charge the battery at the same time.
In parallel charging, a common input current distribution manner is to evenly distribute the input current of each charging management chip, for example, when the total charging current is 1A, the input currents of two charging management chips charged in parallel are both set to be 0.5A; for another example, when the total charging current is 1A, the input currents of the four charge management chips charged in parallel are all set to 0.25A. Due to the different performances of different charge management chips, the average distribution of the input current distribution mode may result in that the overall charging efficiency of the charge management chips does not reach the optimal charging efficiency.
Disclosure of Invention
The disclosure provides an input current distribution method and device. The technical scheme is as follows:
according to a first aspect of the embodiments of the present disclosure, there is provided an input current distribution method applied in a charging circuit including a first charging management chip and a second charging management chip that are charged in parallel, the method including:
determining a first output current corresponding to the first charging management chip and a second output current corresponding to the second charging management chip according to a preset mode, wherein the sum of the first output current and the second output current is a preset total output current, and the preset total output current is used for charging a battery in the charging circuit;
calculating a first input current required by the first charging management chip when outputting the first output current and a second input current required by the second charging management chip when outputting the second output current;
calculating the sum of the first input current and the second input current to obtain a total input current;
acquiring a first input current and a second input current for obtaining the minimum total input current;
determining the first input current corresponding to the minimum total input current as the input current of the first charge management chip, and determining the second input current corresponding to the minimum total input current as the input current of the second charge management chip.
Optionally, the calculating a first input current required by the first charge management chip when outputting the first output current and a second input current required by the second charge management chip when outputting the second output current includes:
calculating the first input current according to a first calculation formula;
calculating the second input current according to a second calculation formula;
wherein the first calculation formula is: vin1, Iin1, P1, Vout1, Iout1, where Vin1, Iin1, Vout1, and Iout1 are a first input voltage, a first input current, a first output voltage, and a first output current of the first charge management chip, respectively, and P1 is an efficiency of the first charge management chip in outputting the first output current and the first output voltage;
the second calculation formula is: vin2, Iin2, P2, Vout2, Iout2, wherein Vin2, Iin2, Vout2, and Iout2 are a second input voltage, a second input current, a second output voltage, and a second output current of the second charge management chip, respectively, P2 is an efficiency of the second charge management chip when outputting the second output current and the second output voltage, and Vin1 is Vin2, Vout1 is Vout 2.
Optionally, the method further includes:
after the preset first output voltage and the determined first output current are obtained, inquiring efficiency corresponding to the first output voltage and the first output current according to a preset first corresponding relation, wherein the first corresponding relation is the first output voltage, the first output current and the efficiency of the first charging management chip when the first output voltage and the first output current are output;
after the predetermined second output voltage and the determined second output current are obtained, inquiring efficiency corresponding to the second output voltage and the second output current according to a predetermined second corresponding relationship, where the second corresponding relationship is the second output voltage, the second output current, and efficiency of the second charging management chip when the second output voltage and the second output current are output.
Optionally, the method further includes:
acquiring the first corresponding relation and the second corresponding relation which are prestored; or,
acquiring the first corresponding relation corresponding to the first model from a server according to the first model of the first charging management chip; and acquiring the second corresponding relation corresponding to the second model from the server according to the second model of the second charging management chip.
Optionally, setting an initial value I1 of the first output current to 0, setting an initial value I2 of the second output current to a total output current, and determining a first output current corresponding to the first charge management chip and a second output current corresponding to the second charge management chip according to a predetermined manner includes:
sequentially taking values of the first output current and the first output current, taking the value of the first output current as I1+ I Δ I and taking the value of the second output current as I2-I Δ I for the ith value until the nth value is taken;
when the nth value is obtained, the first output current is smaller than the total output current, and when the nth +1 th value is obtained, the first output current is larger than or equal to the total output current, I and n are natural numbers larger than 0, and delta I is a value larger than 0 and smaller than the total output current.
According to a second aspect of the embodiments of the present disclosure, there is provided an input current distribution apparatus applied to a charging circuit including a first charging management chip and a second charging management chip that are charged in parallel, the apparatus including:
a first determining module configured to determine, according to a predetermined manner, a first output current corresponding to the first charging management chip and a second output current corresponding to the second charging management chip, where a sum of the first output current and the second output current is a predetermined total output current, and the predetermined total output current is used for charging a battery in the charging circuit;
a first calculation module configured to calculate a first input current required by the first charge management chip when outputting the first output current determined by the first determination module, and a second input current required by the second charge management chip when outputting the second output current determined by the first determination module;
the second calculation module is configured to calculate the sum of the first input current and the second input current determined by the first calculation module to obtain a total input current;
an obtaining module configured to obtain a first input current and a second input current for obtaining the minimum total input current;
a second determination module configured to determine the first input current corresponding to the minimum total input current as the input current of the first charge management chip and the second input current corresponding to the minimum total input current as the input current of the second charge management chip.
Optionally, the first computing module includes:
a first calculation submodule configured to calculate the first input current according to a first calculation formula;
a first calculation submodule configured to calculate the second input current according to a second calculation formula;
wherein the first calculation formula is: vin1, Iin1, P1, Vout1, Iout1, where Vin1, Iin1, Vout1, and Iout1 are a first input voltage, a first input current, a first output voltage, and a first output current of the first charge management chip, respectively, and P1 is an efficiency of the first charge management chip in outputting the first output current and the first output voltage;
the second calculation formula is: vin2, Iin2, P2, Vout2, Iout2, wherein Vin2, Iin2, Vout2, and Iout2 are a second input voltage, a second input current, a second output voltage, and a second output current of the second charge management chip, respectively, P2 is an efficiency of the second charge management chip when outputting the second output current and the second output voltage, and Vin1 is Vin2, Vout1 is Vout 2.
Optionally, the apparatus further comprises:
a first query module, configured to query, according to a predetermined first corresponding relationship, efficiencies corresponding to the first output voltage and the first output current after learning the predetermined first output voltage and the determined first output current, where the first corresponding relationship is the first output voltage, the first output current, and the efficiency of the first charge management chip when outputting the first output voltage and the first output current;
the second query module is configured to query, after the predetermined second output voltage and the determined second output current are known, efficiencies corresponding to the second output voltage and the second output current according to a predetermined second corresponding relationship, where the second corresponding relationship is the second output voltage, the second output current, and the efficiency of the second charge management chip when the second output voltage and the second output current are output.
Optionally, the apparatus further comprises:
a first obtaining sub-module configured to obtain the first corresponding relationship and the second corresponding relationship which are pre-stored; or,
a second obtaining sub-module configured to obtain, from a server, the first corresponding relationship corresponding to a first model of the first charging management chip; and acquiring the second corresponding relation corresponding to the second model from the server according to the second model of the second charging management chip.
Optionally, setting the initial value I1 of the first output current to 0, and setting the initial value I2 of the second output current to total output current includes:
the first determining module is used for sequentially taking values of the first output current and the first output current, taking the value of the first output current as I1+ I Δ I for the ith value, and taking the value of the second output current as I2-I Δ I until the nth value;
when the nth value is obtained, the first output current is smaller than the total output current, and when the nth +1 th value is obtained, the first output current is larger than or equal to the total output current, I and n are natural numbers larger than 0, and delta I is a value larger than 0 and smaller than the total output current.
According to a third aspect of the embodiments of the present disclosure, there is provided an input current distribution apparatus applied to a charging circuit including a first charging management chip and a second charging management chip that are charged in parallel, the apparatus including:
a processor;
a memory for storing the processor-executable instructions;
wherein the processor is configured to:
determining a first output current corresponding to the first charging management chip and a second output current corresponding to the second charging management chip according to a preset mode, wherein the sum of the first output current and the second output current is a preset total output current, and the preset total output current is used for charging a battery in the charging circuit;
calculating a first input current required by the first charging management chip when outputting the first output current and a second input current required by the second charging management chip when outputting the second output current;
calculating the sum of the first input current and the second input current to obtain a total input current;
acquiring a first input current and a second input current for obtaining the minimum total input current;
determining the first input current corresponding to the minimum total input current as the input current of the first charge management chip, and determining the second input current corresponding to the minimum total input current as the input current of the second charge management chip.
The technical scheme provided by the embodiment of the disclosure can have the following beneficial effects:
the input current is calculated by determining the output current of each charging management chip, and the input current of each charging management chip is distributed through the minimum total input current, and because the performances of different charging management chips are different, the corresponding input currents are also different, so that the problem that the total charging efficiency of the charging management chips cannot reach the optimal charging efficiency due to the fact that the average distribution of the input current distribution mode is solved; according to the efficiency current distribution of the charging management chips, the efficiency of each charging management chip can reach the effect of the optimal state as much as possible.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and together with the description, serve to explain the principles of the disclosure.
Fig. 1 is a schematic diagram of a charging circuit according to an input current distribution method shown in accordance with some exemplary embodiments;
FIG. 2A is a flow chart illustrating a method of input current distribution according to an exemplary embodiment;
FIG. 2B is a flow chart illustrating a method of input current sharing in accordance with another exemplary embodiment;
FIG. 2C is a flow diagram illustrating calculation of input currents required by two charge management chips in outputting a specified output current in accordance with an exemplary embodiment;
FIG. 2D is a diagram illustrating efficiencies of charge management chips for different output currents at the same output voltage, according to an example embodiment;
FIG. 2E is a line graph illustrating efficiencies of charge management chips for different output currents at the same output voltage, according to an example embodiment;
FIG. 3 is a block diagram illustrating an input current distribution apparatus in accordance with an exemplary embodiment;
FIG. 4 is a block diagram illustrating an input current distribution apparatus in accordance with another exemplary embodiment;
fig. 5 is a block diagram illustrating a mobile device according to an example embodiment.
Detailed Description
Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the exemplary embodiments below are not intended to represent all implementations consistent with the present disclosure. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present disclosure, as detailed in the appended claims.
Fig. 1 is a schematic diagram of a charging circuit according to an input current distribution method shown in some exemplary embodiments, and as shown in fig. 1, the implementation environment may include a processor 10, a first charge management chip 11, a second charge management chip 12, and a battery 13.
The processor 10 is connected to a first charge management chip 11 and a second charge management chip 12, respectively.
The first charge management chip 11 and the second charge management chip 12 are connected in parallel and are respectively connected to the battery 13 to charge the battery 13, and the first charge management chip 11 and the second charge management chip 12 may be the same or different.
The first charge management chip 11 and the second charge management chip 12 have the same input voltage.
Fig. 2A is a flowchart illustrating an input current distribution method according to an exemplary embodiment, and as shown in fig. 2A, the current distribution method may be applied to the charging circuit shown in fig. 1, and preferably, the current distribution method may be applied to the processor 10 in the charging circuit shown in fig. 1, and includes the following steps.
In step 201, a first output current corresponding to the first charge management chip and a second output current corresponding to the second charge management chip are determined according to a predetermined manner, and the sum of the first output current and the second output current is a predetermined total output current used for charging the battery in the charging circuit.
In step 202, a first input current required by the first charge management chip when outputting the first output current and a second input current required by the second charge management chip when outputting the second output current are calculated.
In step 203, the sum of the first input current and the second input current is calculated to obtain the total input current.
In step 204, a first input current and a second input current for obtaining a minimum total input current are obtained.
In step 205, a first input current corresponding to the minimum total input current is determined as the input current of the first charge management chip, and a second input current corresponding to the minimum total input current is determined as the input current of the second charge management chip.
In summary, in the input current allocation method provided in the embodiment of the present disclosure, the input current is calculated by determining the output current of each charging management chip, and the input current of each charging management chip is allocated by the minimum total input current, because different charging management chips have different performances and corresponding input currents are also different, the problem that the average allocation of the input current allocation manner may cause the total charging efficiency of the charging management chips to be less than the optimal charging efficiency is solved; according to the efficiency current distribution of the charging management chips, the efficiency of each charging management chip can reach the effect of the optimal state as much as possible.
Fig. 2B is a flowchart illustrating an input current distribution method according to another exemplary embodiment, and as shown in fig. 2B, the current distribution method may be applied to the charging circuit shown in fig. 1, and preferably, the current distribution method may be applied to the processor 10 in the charging circuit shown in fig. 1, and includes the following steps.
In step 301, after the predetermined first output voltage and the determined first output current are obtained, efficiencies corresponding to the first output voltage and the first output current are queried according to the predetermined first corresponding relationship.
In step 302, after the predetermined second output voltage and the determined second output current are known, efficiencies corresponding to the second output voltage and the second output current are queried according to the predetermined second corresponding relationship.
In practical applications, the total current input to the battery (i.e., the total output current of the first charge management chip and the second charge management chip) is usually fixed, such as 2A, and the voltage input to the battery (i.e., the output voltage of the first charge management chip and the second charge management chip) is also fixed, such as 3.6V.
In order to adjust the effect when charging the battery, the total input current of the charge management chip that charges the battery can be reduced as much as possible while ensuring that the total current input to the battery and the voltage input to the battery are fixed.
The first correspondence stated herein includes the first output voltage, the first output current, and the efficiency of the first charge management chip in outputting the first output voltage and the first output current.
Similarly, the second correspondence relationship mentioned herein may include the second output voltage, the second output current, and the efficiency of the second charge management chip when outputting the second output voltage and the second output current.
In practical applications, for different charging management chips, a chip manufacturer may provide efficiencies of the charging management chip when outputting different currents and different voltages, that is, the first corresponding relationship or the second corresponding relationship.
The method for acquiring the first corresponding relation and the second corresponding relation by the processor in the charging circuit includes the following two methods:
in the first mode, a first corresponding relation and a second corresponding relation which are prestored are obtained.
The output voltage, the output current and the efficiency of the charging management chip under the output voltage and the output current corresponding to each charging management chip model can be recorded in the processor.
In a second mode, according to the first model of the first charging management chip, acquiring a first corresponding relation corresponding to the first model from the server; and acquiring a second corresponding relation corresponding to the second model from the server according to the second model of the second charging management chip.
When the mobile device is in a networking state, the processor can query the corresponding relation stored in the server and corresponding to the model according to the acquired model of the charging management chip.
In practical implementation, the first corresponding relationship and the second corresponding relationship may have various forms, for example, the first corresponding relationship may be a set of corresponding relationships in a table provided by a chip manufacturer, where each set of corresponding relationships in the table includes the first output voltage, the first output current, and the efficiency of the first charge management chip in outputting the first output voltage and the first output current.
The processor or the memory can pre-store the model of each charging management chip provided by a chip manufacturer and the corresponding relation corresponding to each signal, and the processor can acquire the corresponding relation corresponding to the model according to the model of the charging management chip and search the efficiency of the output current and the output voltage under the condition of determining the output current and the output voltage.
In step 303, a first output current corresponding to the first charge management chip and a second output current corresponding to the second charge management chip are determined according to a predetermined manner, and the sum of the first output current and the second output current is a predetermined total output current used for charging the battery in the charging circuit.
In one possible implementation, still referring to fig. 2B, step 303 further includes:
sequentially taking values of the first output current and the first output current, taking the value of the first output current as I1+ I Δ I and taking the value of the second output current as I2-I Δ I for the ith value until the nth value is taken;
and when the value is taken for the nth time, the first output current is less than the total output current, and when the value is taken for the (n + 1) th time, the first output current is greater than or equal to the total output current, I and n are natural numbers greater than 0, and delta I is a value greater than 0 and less than the total output current.
For example, when the sum of the output currents of the first charge management chip and the second charge management chip is 2A, the predetermined value of the first output current of the first charge management chip is set to 0, the predetermined value of the second output current of the second charge management chip is also set to 2, and the output current variation value is Δ I. And when the value is taken for the second time, the first output current value of the first charging management chip is 0+2 delta I, and the output current value of the second charging management chip is 2-2 delta I.
And by analogy, when the ith value is taken, the first output current value of the first charging management chip is 0+ I Δ I, and the output current value of the second charging management chip is 2-I Δ I, wherein I Δ I is less than 1. Generally, Δ I may be 0.1A or a multiple of 0.1A, and it is obvious that the smaller the Δ I is, the smaller the minimum total input current obtained finally will be, that is, the better the efficiency of the charge management chip is. A
For example, when Δ I ═ 0.7A:
the first value i is 1, and the output current of the first charge management chip is: i1+ I Δ I is 0+1 Δ 0.7 is 0.7A, 0.7A <2A, the processor continues to take the value, I + 1;
the second time value i equals 2, and the output current of the first charge management chip is: i1+ I Δ I is 0+2 Δ 0.7 is 1.4A, 1.4A <2A, the processor continues to take the value, I + 1;
the third time value i equals 3, and the output current of the first charge management chip is: i1+ I Δ I ═ 0+3 ═ 0.7 ═ 2.1A, 2.1>2A, the processor stops taking values, and n ═ I-1 ═ 2.
Correspondingly, in the value taking process, the value of the output current of the first charging management chip is greater than the total output current, and then the value of the output current of the second charging management chip is inevitably less than 0, which is obviously unreasonable, so that the value taking process can be performed by taking the first charging current as a reference item, and the value taking process can also be performed by taking the second charging current as a reference item, and then the step 303 can also include:
sequentially taking values of the second output current and the second output current, taking the value of the second output current as I2-I Δ I and taking the value of the first output current as I1+ I Δ I for the ith value until the nth value is taken;
and when the value is taken for the nth time, the second output current is greater than 0, and when the value is taken for the (n + 1) th time, the second output current is less than or equal to 0, I and n are natural numbers greater than 0, and delta I is a value greater than 0 and less than the total output current.
The total input current is calculated once each time a set of first and second output currents is obtained. See specifically steps 304 through 305.
In step 304, a first input current required by the first charge management chip when outputting the first output current and a second input current required by the second charge management chip when outputting the second output current are calculated.
In one possible implementation, step 304 in fig. 2B may be further replaced with steps 304a to 304B. Referring to fig. 2C, a flowchart illustrating a method for calculating input currents required by two charge management chips when outputting a specific output current according to an exemplary embodiment is shown, where the method for distributing input currents includes the following steps, as shown in fig. 2C.
In step 304a, a first input current is calculated according to a first calculation formula, wherein the first calculation formula is as follows: vin1, Iin1, P1, Vout1, Iout1, Vin1, Iin1, Vout1, and Iout1 are the first input voltage, the first input current, the first output voltage, and the first output current of the first charge management chip, respectively, and P1 is the efficiency of the first charge management chip in outputting the first output current and the first output voltage.
In step 304b, a second input current is calculated according to a second calculation formula, wherein the second calculation formula is as follows: vin2 + Iin2 + P2-Vout 2-Iout 2, Vin2, Iin2, Vout2, and Iout2 are the second input voltage, the second input current, the second output voltage, and the second output current of the second charge management chip, respectively, P2 is the efficiency of the second charge management chip in outputting the second output current and the second output voltage, and Vin 1-Vin 2, Vout 1-Vout 2.
For example, taking the first output voltage Vout1 and the second output voltage Vout2 both require 3.6V, the first input voltage Vin1 and the second input voltage Vin2 both require 5V, and the sum of the output currents is 2A as an example, when the output currents are divided equally, the first output current Iout1 and the second output current Iout2 are both 1A, please refer to fig. 2D, which is a schematic diagram of the efficiencies corresponding to different output currents of the charging management chip under the same output voltage according to an exemplary embodiment, as shown in fig. 2D, when the output voltages of the first charging management chip and the second charging management chip are 3.6V, the corresponding efficiencies of the first charging management chip and the second charging management chip under the output current of 1A are found by using a table, P1 is 91%, P2 is 86%, and it can be found from the first calculation formula 58vin 25 Iin 1P 1 — Vout 1:
iin1 ═ (Vout1 × Iout1)/(Vin1 × P1) ═ 0.7912a (3.6V × 1A)/(5V × 91%); from the second calculation formula Vin2, Iin2, P2, Vout2, Iout2, it can be known that:
Iin2＝(Vout2*Iout2)/(Vin2*P2)＝(3.6V*1A)/(5V*86％)＝0.8372A；
that is, the input current of the first charge management chip is 0.7912A, and the input current of the second charge management chip is 0.8372A.
For another example, still taking the first output voltage Vout1 and the second output voltage Vout2 both requiring 3.6V, the first input voltage Vin1 and the second input voltage Vin2 both requiring 5V, and the sum of the output currents being 2A as an example, assuming that the first output current is (Iout1+ Δ I), the second output current (Iout2- Δ I), when Δ I is 0.1A, the efficiencies corresponding to the first output current 1.1A and the second output current 0.9A are found to be P1 ═ 92%, P2 ═ 85%, and the first calculation formula Vin1 × 1 ═ P1 ═ Vout1 × 1 can indicate that:
iin1 ═ (Vout1 ═ Iout1+ Δ I))/(Vin1 ═ P1) ((3.6V × 1.1A)/(5V × 92%) ═ 0.8609 a; from the second calculation formula Vin2, Iin2, P2, Vout2, Iout2, it can be known that:
Iin2＝(Vout2*(Iout2-ΔI))/(Vin2*P2)＝(3.6V*0.9A)/(5V*85％)＝0.7624A；
that is, the input current of the first charge management chip is 0.8609A, and the input current of the second charge management chip is 0.7624A.
When the first output current Iout1 and the second output current Iout2 are valued next time, the current first output current is continuously increased by Δ I, and the current second output current is decreased by Δ I.
Referring to fig. 2E, which is a broken line diagram of efficiencies corresponding to different output currents with the same output voltage of the charge management chip according to an exemplary embodiment, and also a broken line diagram corresponding to fig. 2D, as shown in fig. 2E, with the first output voltage Vout1 and the second output voltage Vout2 both requiring 3.6V, the first input voltage Vin1 and the second input voltage Vin2 both requiring 5V, and setting f (I, V) as the input current, where I is the output current and V is the output voltage, when the output current of the first charge management chip is 1.1A, the efficiency is the highest, it can be seen that f1(I, V) is an increasing function when 0.9< Iout1 ≦ 1.1, when 1.1 ≦ Iout 7 <1.2, f1(I, V) is a decreasing function, and the broken line diagram of the second charge management chip is a once increasing function, i. 2(I, V) is greater in the interval 2 where I is greater than 0.9 and 1.2, the total input current f1(I, V) + f2(I, V) is calculated in two intervals, the first interval being between 0.9 and 1.1 and the second interval being between 1.1 and 1.2.
It should be noted that fig. 2E is a schematic diagram, and in practical applications, the display form of f (I, V) is not limited to a straight line trend or a polygonal line trend, and may also be a regular or irregular trend such as a curve, which is not limited in this embodiment.
In step 305, the sum of the first input current and the second input current is calculated to obtain a total input current.
In step 306, a first input current and a second input current for obtaining a minimum total input current are obtained.
Still referring to fig. 2D, when the average currents are all 1A, P1 ═ 91%, P2 ═ 86%, then Iin1 ═ 0.7912a, Iin2 ═ 0.8372a, and total input current I1 ═ Iin1+ Iin2 ═ 1.6284A; when Iout1 is 1.1A and Iout2 is 0.9A, P1 is 92% and P2 is 85%, then Iin1A is 0.8609, Iin2 is 0.7624A, and total input current I2 is Iin1+ Iin2 is 1.6233 a.
The second scheme of splitting the current is more efficient than the first overall since the smaller the input current, the higher the efficiency when outputting the same total current and voltage, I1> I2 from both results.
If Iout1 is adjusted to be 1.2A and Iout2 is adjusted to be 0.8A, P1 is 91% and P2 is 84%. The total input current I3 ═ Iin1+ Iin2 ═ 0.9495+0.6857 ═ 1.6352a, as can be seen from I3> I1> I2, the models of the respective charge management chips are different, and the total input current obtained by regulating the respective output currents according to a certain rule does not exhibit an increasing or decreasing change, or may not exhibit a linear change. All the distributions of the total output current (i.e. the various combinations of the first output current and the second output current when the total output current is fixed) are taken into account to determine the corresponding combination with the smallest total input current.
In step 307, a first input current corresponding to the minimum total input current is determined as the input current of the first charge management chip, and a second input current corresponding to the minimum total input current is determined as the input current of the second charge management chip.
Since each total input current is obtained by summing the first input current and the second input current, the first input current and the second input current when the minimum total input current is obtained by calculation can be determined, the determined first input current is used as the input current of the first charge management chip, and the determined second input current is used as the input current of the first charge management chip, so as to charge the battery.
In summary, in the input current allocation method provided in the embodiment of the present disclosure, the input current is calculated by determining the output current of each charging management chip, and the input current of each charging management chip is allocated by the minimum total input current, because different charging management chips have different performances and corresponding input currents are also different, the problem that the average allocation of the input current allocation manner may cause the total charging efficiency of the charging management chips to be less than the optimal charging efficiency is solved; according to the efficiency current distribution of the charging management chips, the efficiency of each charging management chip can reach the effect of the optimal state as much as possible.
In addition, after the preset output voltage is obtained and the output current is determined, the efficiency corresponding to the output voltage and the output current is inquired according to the preset corresponding relation, so that the input current formula of each charging management chip is determined, and the input currents corresponding to different output currents of each charging management chip under the same output voltage are calculated.
The following are embodiments of the disclosed apparatus that may be used to perform embodiments of the disclosed methods. For details not disclosed in the embodiments of the apparatus of the present disclosure, refer to the embodiments of the method of the present disclosure.
Fig. 3 is a block diagram illustrating an input current distribution device according to an exemplary embodiment, as shown in fig. 3, applied to the charging circuit shown in fig. 1, the input current distribution device including, but not limited to: a first determination module 401, a first calculation module 402, a second calculation module 403, an acquisition module 404, and a second determination module 405.
A first determining module 401 configured to determine, according to a predetermined manner, a first output current corresponding to the first charge management chip and a second output current corresponding to the second charge management chip, where a sum of the first output current and the second output current is a predetermined total output current, and the predetermined total output current is used for charging a battery in the charging circuit;
a first calculating module 402, configured to calculate a first input current required by the first charging management chip when outputting the first output current determined by the first determining module 401, and a second input current required by the second charging management chip when outputting the second output current determined by the first determining module 401;
a second calculation module 403 configured to calculate a sum of the first input current and the second input current calculated by the first calculation module 402, resulting in a total input current;
an obtaining module 404 configured to obtain a first input current and a second input current for obtaining a minimum total input current;
a second determining module 405 configured to determine a first input current corresponding to a minimum total input current as an input current of the first charge management chip and a second input current corresponding to the minimum total input current as an input current of the second charge management chip.
In a possible implementation manner, please refer to fig. 4, which is a block diagram of an input current distribution apparatus according to another exemplary embodiment, as shown in fig. 4, the input current distribution apparatus may further include: a first acquisition module 406 and a second acquisition module 407.
A first obtaining module 406 configured to obtain a first corresponding relationship and a second corresponding relationship which are pre-stored; or,
a second obtaining module 407 configured to obtain, according to the first model of the first charging management chip, a first corresponding relationship corresponding to the first model from the server; and acquiring a second corresponding relation corresponding to the second model from the server according to the second model of the second charging management chip.
In one possible implementation, still referring to fig. 4, the first determining module 401 may be further configured to set the initial value I1 of the first output current to 0 and the initial value I2 of the second output current to the total output current:
sequentially taking values of the first output current and the first output current, taking the value of the first output current as I1+ I Δ I and taking the value of the second output current as I2-I Δ I for the ith value until the nth value is taken;
and when the value is taken for the nth time, the first output current is less than the total output current, and when the value is taken for the (n + 1) th time, the first output current is greater than or equal to the total output current, I and n are natural numbers greater than 0, and delta I is a value greater than 0 and less than the total output current.
In one possible implementation, still referring to fig. 4, the first calculating module 402 may further include: a first computation submodule 402a, a second computation submodule 402 b.
A first calculation submodule 402a configured to calculate a first input current according to a first calculation formula;
a second calculation submodule 402b configured to calculate a second input current according to a second calculation formula;
wherein the first calculation formula is: vin1, Iin1, P1, Vout1, Iout1, Vin1, Iin1, Vout1, and Iout1 are the first input voltage, the first input current, the first output voltage, and the first output current of the first charge management chip, respectively, and P1 is the efficiency of the first charge management chip in outputting the first output current and the first output voltage;
the second calculation formula is: vin2 + Iin2 + P2-Vout 2-Iout 2, Vin2, Iin2, Vout2, and Iout2 are the second input voltage, the second input current, the second output voltage, and the second output current of the second charge management chip, respectively, P2 is the efficiency of the second charge management chip in outputting the second output current and the second output voltage, and Vin 1-Vin 2, Vout 1-Vout 2.
In one possible implementation, still referring to fig. 4, the input current distribution apparatus may further include: a first query module 408 and a second query module 409.
A first query module 408 configured to query, after obtaining a predetermined first output voltage and a determined first output current, efficiencies corresponding to the first output voltage and the first output current according to a predetermined first corresponding relationship, where the first corresponding relationship is the first output voltage, the first output current, and the efficiency of the first charge management chip when outputting the first output voltage and the first output current;
the second query module 409 is configured to query, after the predetermined second output voltage and the determined second output current are known, efficiencies corresponding to the second output voltage and the second output current according to a predetermined second corresponding relationship, where the second corresponding relationship is the second output voltage, the second output current, and the efficiency of the second charge management chip when the second output voltage and the second output current are output.
In summary, the input current distribution device provided in the present disclosure calculates the input current by determining the output current of each charging management chip, and distributes the input current of each charging management chip by the minimum total input current, and because different charging management chips have different performances and corresponding input currents are also different, the problem that the total charging efficiency of the charging management chips cannot reach the optimal charging efficiency due to the average distribution of the input current distribution manner is solved; according to the efficiency current distribution of the charging management chips, the efficiency of each charging management chip can reach the effect of the optimal state as much as possible.
In addition, after the preset output voltage is obtained and the output current is determined, the efficiency corresponding to the output voltage and the output current is inquired according to the preset corresponding relation, so that the input current formula of each charging management chip is determined, and the input currents corresponding to different output currents of each charging management chip under the same output voltage are calculated.
With regard to the apparatus in the above-described embodiment, the specific manner in which each module performs the operation has been described in detail in the embodiment related to the method, and will not be elaborated here.
An exemplary embodiment of the present disclosure provides an input current distribution apparatus capable of implementing an input current distribution method provided by the present disclosure, the input current distribution apparatus including: a processor, a memory for storing processor-executable instructions;
wherein the processor is configured to:
determining a first output current corresponding to the first charging management chip and a second output current corresponding to the second charging management chip according to a preset mode, wherein the sum of the first output current and the second output current is a preset total output current, and the preset total output current is used for charging a battery in the charging circuit;
calculating a first input current required by the first charging management chip when outputting a first output current and a second input current required by the second charging management chip when outputting a second output current;
calculating the sum of the first input current and the second input current to obtain a total input current;
acquiring a first input current and a second input current for obtaining a minimum total input current;
a first input current corresponding to the minimum total input current is determined as an input current of the first charge management chip, and a second input current corresponding to the minimum total input current is determined as an input current of the second charge management chip.
Fig. 5 is a block diagram illustrating a mobile device in accordance with an example embodiment. For example, the mobile device 500 may be a mobile phone, a computer, a digital broadcast terminal, a messaging device, a game console, a tablet device, a medical device, an exercise device, a personal digital assistant, and so forth.
Referring to fig. 5, the apparatus 500 may include one or more of the following components: processing component 502, memory 504, power component 506, multimedia component 508, audio component 510, input/output (I/O) interface 512, sensor component 514, and communication component 516.
The processing component 502 generally controls overall operation of the device 500, such as operations associated with display, telephone calls, data communications, camera operations, and recording operations. The processing component 502 may include one or more processors 518 to execute instructions to perform all or a portion of the steps of the methods described above. Further, the processing component 502 can include one or more modules that facilitate interaction between the processing component 502 and other components. For example, the processing component 502 can include a multimedia module to facilitate interaction between the multimedia component 508 and the processing component 502.
The memory 504 is configured to store various types of data to support operations at the apparatus 500. Examples of such data include instructions for any application or method operating on device 500, contact data, phonebook data, messages, pictures, videos, and so forth. The memory 504 may be implemented by any type or combination of volatile or non-volatile memory devices such as Static Random Access Memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic or optical disks.
The power supply component 506 provides power to the various components of the device 500. The power components 506 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power for the apparatus 500.
The multimedia component 508 includes a screen that provides an output interface between the device 500 and the user. In some embodiments, the screen may include a Liquid Crystal Display (LCD) and a Touch Panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive an input signal from a user. The touch panel includes one or more touch sensors to sense touch, slide, and gestures on the touch panel. The touch sensor may not only sense the boundary of a touch or slide action, but also detect the duration and pressure associated with the touch or slide operation. In some embodiments, the multimedia component 508 includes a front facing camera and/or a rear facing camera. The front camera and/or the rear camera may receive external multimedia data when the device 500 is in an operating mode, such as a shooting mode or a video mode. Each front camera and rear camera may be a fixed optical lens system or have a focal length and optical zoom capability.
The audio component 510 is configured to output and/or input audio signals. For example, audio component 510 includes a Microphone (MIC) configured to receive external audio signals when apparatus 500 is in an operating mode, such as a call mode, a recording mode, and a voice recognition mode. The received audio signals may further be stored in the memory 504 or transmitted via the communication component 516. In some embodiments, audio component 510 further includes a speaker for outputting audio signals.
The I/O interface 512 provides an interface between the processing component 502 and peripheral interface modules, which may be keyboards, click wheels, buttons, etc. These buttons may include, but are not limited to: a home button, a volume button, a start button, and a lock button.
The sensor assembly 514 includes one or more sensors for providing various aspects of status assessment for the device 500. For example, the sensor assembly 514 may detect an open/closed state of the apparatus 500, the relative positioning of the components, such as a display and keypad of the apparatus 500, the sensor assembly 514 may also detect a change in position of the apparatus 500 or a component of the apparatus 500, the presence or absence of user contact with the apparatus 500, orientation or acceleration/deceleration of the apparatus 500, and a change in temperature of the apparatus 500. The sensor assembly 514 may include a proximity sensor configured to detect the presence of a nearby object without any physical contact. The sensor assembly 514 may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly 514 may also include an acceleration sensor, a gyroscope sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.
The communication component 516 is configured to facilitate communication between the apparatus 500 and other devices in a wired or wireless manner. The device 500 may access a wireless network based on a communication standard, such as Wi-Fi, 2G, or 3G, or a combination thereof. In an exemplary embodiment, the communication component 516 receives a broadcast signal or broadcast related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component 516 further includes a Near Field Communication (NFC) module to facilitate short-range communications. For example, the NFC module may be implemented based on Radio Frequency Identification (RFID) technology, infrared data association (IrDA) technology, Ultra Wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.
In an exemplary embodiment, the apparatus 500 may be implemented by one or more Application Specific Integrated Circuits (ASICs), Digital Signal Processors (DSPs), Digital Signal Processing Devices (DSPDs), Programmable Logic Devices (PLDs), Field Programmable Gate Arrays (FPGAs), controllers, micro-controllers, microprocessors or other electronic components for performing the above-described input current distribution method.
In an exemplary embodiment, a non-transitory computer-readable storage medium comprising instructions, such as the memory 504 comprising instructions, executable by the processor 518 of the apparatus 500 to perform the input current distribution method described above is also provided. For example, the non-transitory computer readable storage medium may be a ROM, a Random Access Memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, and the like.
In the present disclosure, the mobile device 500 includes the input current distribution means described above, for example, the input current distribution means may be disposed in the processing component 502 or the processor 518, and the input current distribution means may adjust the charging current of at least two power management chips that charge the power component 506.
Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This application is intended to cover any variations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.
It will be understood that the present disclosure is not limited to the precise arrangements described above and shown in the drawings and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.
Claims (9)
1. An input current distribution method is applied to a charging circuit comprising a first charging management chip and a second charging management chip which are charged in parallel, and the method comprises the following steps:
determining a first output current corresponding to the first charging management chip and a second output current corresponding to the second charging management chip according to a preset mode, wherein the sum of the first output current and the second output current is a preset total output current, and the preset total output current is used for charging a battery in the charging circuit;
calculating a first input current required by the first charging management chip when outputting the first output current and a second input current required by the second charging management chip when outputting the second output current;
calculating the sum of the first input current and the second input current to obtain a total input current;
acquiring a first input current and a second input current for obtaining the minimum total input current;
determining the first input current corresponding to the minimum total input current as the input current of the first charge management chip, and determining the second input current corresponding to the minimum total input current as the input current of the second charge management chip;
wherein setting an initial value I1 of the first output current to 0 and an initial value I2 of the second output current to a total output current, the determining a first output current corresponding to the first charge management chip and a second output current corresponding to the second charge management chip in a predetermined manner, comprises:
sequentially taking values of the first output current and the first output current, taking the value of the first output current as I1+ I Δ I and taking the value of the second output current as I2-I Δ I for the ith value until the nth value is taken;
when the nth value is obtained, the first output current is smaller than the total output current, and when the nth +1 th value is obtained, the first output current is larger than or equal to the total output current, I and n are natural numbers larger than 0, and delta I is a value larger than 0 and smaller than the total output current.
2. The method of claim 1, wherein calculating a first input current required by the first charge management chip when outputting the first output current and a second input current required by the second charge management chip when outputting the second output current comprises:
calculating the first input current according to a first calculation formula;
calculating the second input current according to a second calculation formula;
wherein the first calculation formula is: vin1, Iin1, P1, Vout1, Iout1, where Vin1, Iin1, Vout1, and Iout1 are a first input voltage, a first input current, a first output voltage, and a first output current of the first charge management chip, respectively, and P1 is an efficiency of the first charge management chip in outputting the first output current and the first output voltage;
the second calculation formula is: vin2, Iin2, P2, Vout2, Iout2, wherein Vin2, Iin2, Vout2, and Iout2 are a second input voltage, a second input current, a second output voltage, and a second output current of the second charge management chip, respectively, P2 is an efficiency of the second charge management chip when outputting the second output current and the second output voltage, and Vin1 is Vin2, Vout1 is Vout 2.
3. The method of claim 2, further comprising:
after the preset first output voltage and the determined first output current are obtained, inquiring efficiency corresponding to the first output voltage and the first output current according to a preset first corresponding relation, wherein the first corresponding relation is the first output voltage, the first output current and the efficiency of the first charging management chip when the first output voltage and the first output current are output;
after the predetermined second output voltage and the determined second output current are obtained, inquiring efficiency corresponding to the second output voltage and the second output current according to a predetermined second corresponding relationship, where the second corresponding relationship is the second output voltage, the second output current, and efficiency of the second charging management chip when the second output voltage and the second output current are output.
4. The method of claim 3, further comprising:
acquiring the first corresponding relation and the second corresponding relation which are prestored; or,
acquiring the first corresponding relation corresponding to the first model from a server according to the first model of the first charging management chip; and acquiring the second corresponding relation corresponding to the second model from the server according to the second model of the second charging management chip.
5. An input current distribution device, applied to a charging circuit including a first charging management chip and a second charging management chip that are charged in parallel, the device comprising:
a first determining module configured to determine, according to a predetermined manner, a first output current corresponding to the first charging management chip and a second output current corresponding to the second charging management chip, where a sum of the first output current and the second output current is a predetermined total output current, and the predetermined total output current is used for charging a battery in the charging circuit;
a first calculation module configured to calculate a first input current required by the first charge management chip when outputting the first output current determined by the first determination module, and a second input current required by the second charge management chip when outputting the second output current determined by the first determination module;
the second calculation module is configured to calculate the sum of the first input current and the second input current determined by the first calculation module to obtain a total input current;
an obtaining module configured to obtain a first input current and a second input current for obtaining the minimum total input current;
a second determination module configured to determine the first input current corresponding to the minimum total input current as the input current of the first charge management chip and the second input current corresponding to the minimum total input current as the input current of the second charge management chip;
wherein an initial value I1 of the first output current is set to 0 and an initial value I2 of the second output current is set to a total output current, the apparatus further comprising:
the first determining module is used for sequentially taking values of the first output current and the first output current, taking the value of the first output current as I1+ I Δ I for the ith value, and taking the value of the second output current as I2-I Δ I until the nth value;
when the nth value is obtained, the first output current is smaller than the total output current, and when the nth +1 th value is obtained, the first output current is larger than or equal to the total output current, I and n are natural numbers larger than 0, and delta I is a value larger than 0 and smaller than the total output current.
6. The apparatus of claim 5, wherein the first computing module comprises:
a first calculation submodule configured to calculate the first input current according to a first calculation formula;
a first calculation submodule configured to calculate the second input current according to a second calculation formula;
wherein the first calculation formula is: vin1, Iin1, P1, Vout1, Iout1, where Vin1, Iin1, Vout1, and Iout1 are a first input voltage, a first input current, a first output voltage, and a first output current of the first charge management chip, respectively, and P1 is an efficiency of the first charge management chip in outputting the first output current and the first output voltage;
the second calculation formula is: vin2, Iin2, P2, Vout2, Iout2, wherein Vin2, Iin2, Vout2, and Iout2 are a second input voltage, a second input current, a second output voltage, and a second output current of the second charge management chip, respectively, P2 is an efficiency of the second charge management chip when outputting the second output current and the second output voltage, and Vin1 is Vin2, Vout1 is Vout 2.
7. The apparatus of claim 6, further comprising:
a first query module, configured to query, according to a predetermined first corresponding relationship, efficiencies corresponding to the first output voltage and the first output current after learning the predetermined first output voltage and the determined first output current, where the first corresponding relationship is the first output voltage, the first output current, and the efficiency of the first charge management chip when outputting the first output voltage and the first output current;
the second query module is configured to query, after the predetermined second output voltage and the determined second output current are known, efficiencies corresponding to the second output voltage and the second output current according to a predetermined second corresponding relationship, where the second corresponding relationship is the second output voltage, the second output current, and the efficiency of the second charge management chip when the second output voltage and the second output current are output.
8. The apparatus of claim 7, further comprising:
a first obtaining sub-module configured to obtain the first corresponding relationship and the second corresponding relationship which are pre-stored; or,
a second obtaining sub-module configured to obtain, from a server, the first corresponding relationship corresponding to a first model of the first charging management chip; and acquiring the second corresponding relation corresponding to the second model from the server according to the second model of the second charging management chip.
9. An input current distribution device, applied to a charging circuit including a first charging management chip and a second charging management chip that are charged in parallel, the device comprising:
a processor;
a memory for storing the processor-executable instructions;
wherein the processor is configured to:
determining a first output current corresponding to the first charging management chip and a second output current corresponding to the second charging management chip according to a preset mode, wherein the sum of the first output current and the second output current is a preset total output current, and the preset total output current is used for charging a battery in the charging circuit;
calculating a first input current required by the first charging management chip when outputting the first output current and a second input current required by the second charging management chip when outputting the second output current;
calculating the sum of the first input current and the second input current to obtain a total input current;
acquiring a first input current and a second input current for obtaining the minimum total input current;
determining the first input current corresponding to the minimum total input current as the input current of the first charge management chip, and determining the second input current corresponding to the minimum total input current as the input current of the second charge management chip;
wherein setting an initial value I1 of the first output current to 0 and an initial value I2 of the second output current to a total output current, the determining a first output current corresponding to the first charge management chip and a second output current corresponding to the second charge management chip in a predetermined manner, comprises:
sequentially taking values of the first output current and the first output current, taking the value of the first output current as I1+ I Δ I and taking the value of the second output current as I2-I Δ I for the ith value until the nth value is taken;
when the nth value is obtained, the first output current is smaller than the total output current, and when the nth +1 th value is obtained, the first output current is larger than or equal to the total output current, I and n are natural numbers larger than 0, and delta I is a value larger than 0 and smaller than the total output current.
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