CN105097032B - Memory storage apparatus, memorizer control circuit unit and power supply method - Google Patents
Memory storage apparatus, memorizer control circuit unit and power supply method Download PDFInfo
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- CN105097032B CN105097032B CN201410325028.2A CN201410325028A CN105097032B CN 105097032 B CN105097032 B CN 105097032B CN 201410325028 A CN201410325028 A CN 201410325028A CN 105097032 B CN105097032 B CN 105097032B
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Abstract
The present invention provides a kind of memory storage apparatus, memorizer control circuit unit and power supply method.This power supply method includes: to provide the host interface circuit of the first supply voltage to memory storage apparatus；The memory management circuitry of one second source voltage to memory storage apparatus is provided；Third power supply voltage is provided to the memory interface circuit of memory storage apparatus, wherein the reference voltage end of memory interface circuit is electrically connected to the power input of memory management circuitry.Whereby, the problem of memory storage apparatus is overheated because of voltage conversion can be improved.
Description
Technical field
The invention relates to a kind of memory storage apparatus, and in particular to a kind of memory storage apparatus, deposit
Memory control circuit unit and power supply method.
Background technique
Digital camera, mobile phone and MP3 player are very rapid in growth over the years, so that consumer is to storage
The demand of media also rapidly increases.Since reproducible nonvolatile memorizer module (for example, flash memory) has data
It is non-volatile, power saving, small in size, and without characteristics such as mechanical structures, so loaded on above-mentioned illustrated various in being very suitable to
In portable multimedia device.
Power supply in memory storage apparatus is mainly from alternating current or battery.It can be first from the power supply of alternating current or battery
After the processing such as the decompression of decompression/rectification circuit and/or rectification, the electronic component that is available in memory storage apparatus or
Circuit.However, may generate a large amount of heat when adjustment amplitude of the decompression/rectification circuit for voltage is larger, make memory
The temperature of storage device rises.
Summary of the invention
The present invention provides a kind of memory storage apparatus, memorizer control circuit unit and power supply method, can improve
Previous memory storage apparatus is easy the problem of overheating because of voltage conversion.
One example of the present invention embodiment provides a kind of memory storage apparatus comprising connecting interface unit can be made carbon copies
Formula non-volatile memory module and memorizer control circuit unit.Connecting interface unit is electrically connected to host system.
Reproducible nonvolatile memorizer module includes multiple entity erased cells.Memorizer control circuit unit is electrically connected to company
Connection interface unit and reproducible nonvolatile memorizer module, and including host interface circuit, memory management circuitry, deposit
Memory interface circuit and power supply module.Host interface circuit is electrically connected to host system.Memory interface circuit
It is electrically connected to reproducible nonvolatile memorizer module.Power supply module be electrically connected to host interface circuit,
Memory management circuitry and memory interface circuit.Wherein power supply module is to provide the first supply voltage to host interface
The power input of circuit.Power supply module is also to provide the power input of second source voltage to memory management circuitry
End.Power supply module is also to provide the power input of third power supply voltage to memory interface circuit.Wherein memory
The reference voltage end of interface circuit is electrically connected to the power input of memory management circuitry, and the first supply voltage,
Two supply voltages and the voltage value of third power supply voltage are differing from each other.
In one example of the present invention embodiment, it is non-volatile that the power supply module is also electrically connected to duplicative
Property memory module.Power supply module is also to provide third power supply voltage to reproducible nonvolatile memorizer module
Power input, and the reference voltage end of reproducible nonvolatile memorizer module is electrically connected to memory management circuitry
Power input.
In one example of the present invention embodiment, the power supply module includes the first power output end, the second electricity
Source output terminal and third power output end.First power output end is electrically connected to the power input of host interface circuit, the
Two power output ends are electrically connected to the power input of memory management circuitry, and third power output end is electrically connected to
The power input of memory interface circuit.
In one example of the present invention embodiment, it is non-easily that the third power output end is also electrically connected to duplicative
The power input of the property lost memory module.
In one example of the present invention embodiment, the power supply module further includes power supply circuit, the first electricity
Voltage conversion circuit, second voltage conversion circuit and tertiary voltage conversion circuit.Power supply circuit is to provide primary power electricity
Pressure.First voltage conversion circuit is electrically connected between power supply circuit and the first power output end, and to convert just
Beginning supply voltage is the first supply voltage.Second voltage conversion circuit is electrically connected at power supply circuit and second source exports
Between end, and to convert primary power voltage as second source voltage.Tertiary voltage conversion circuit is electrically connected at power supply
Between supply circuit and third power output end, and to convert primary power voltage as third power supply voltage.
In one example of the present invention embodiment, the power supply module further includes power supply circuit, the first electricity
Voltage conversion circuit, second voltage conversion circuit, tertiary voltage conversion circuit and the 4th voltage conversion circuit.Power supply circuit is used
To provide a primary power voltage, wherein the voltage value of primary power voltage and the voltage value of third power supply voltage are identical.First
Voltage conversion circuit is electrically connected between power supply circuit and the first power output end, and to convert primary power electricity
Pressure is the first supply voltage.Second voltage conversion circuit is electrically connected between power supply circuit and second source output end,
And to convert primary power voltage as second source voltage.Tertiary voltage conversion circuit is electrically connected to power supply supply electricity
Road, and to convert primary power voltage as the 4th supply voltage.4th voltage conversion circuit is electrically connected at tertiary voltage
Between conversion circuit and the power input of memory management circuitry, and the 4th supply voltage is converted to second source
Voltage.Wherein the reference voltage end of memory interface circuit is to be electrically connected to memory management via the 4th voltage conversion circuit
The power input of circuit.
In one example of the present invention embodiment, the 4th voltage conversion circuit is a reduction voltage circuit.
In one example of the present invention embodiment, the power supply module further includes power supply circuit, the first electricity
Voltage conversion circuit, second voltage conversion circuit and reduction voltage circuit.Power supply circuit is to provide primary power voltage, wherein just
The voltage value of beginning supply voltage and the voltage value of third power supply voltage are identical.First voltage conversion circuit is electrically connected at power supply confession
It answers between circuit and the first power output end, and to convert primary power voltage as the first supply voltage.Second voltage turns
It changes circuit to be electrically connected between power supply circuit and second source output end, and to convert primary power voltage as
Two supply voltages.Reduction voltage circuit is electrically connected at the reference voltage end of memory interface circuit and the power supply of memory management circuitry
Between input terminal.
In one example of the present invention embodiment, the reference voltage end of the memory management circuitry, which is electrically connected to, to be connect
Ground terminal.There is the first potential difference, the electricity of memory interface circuit between the power input and ground terminal of memory interface circuit
There is the second potential difference, and the first potential difference is greater than second between source input terminal and the reference voltage end of memory interface circuit
Potential difference.
One example of the present invention embodiment provides a kind of memorizer control circuit unit, and it is non-easily to be used to control duplicative
The property lost memory module, wherein reproducible nonvolatile memorizer module includes multiple entity erased cells.Memory control
Circuit unit includes host interface circuit, memory management circuitry, memory interface circuit and power supply module.Host interface
Circuit is electrically connected to host system.Memory interface circuit is electrically connected to type nonvolatile
Module.Power supply module is electrically connected to host interface circuit, memory management circuitry and memory interface circuit.It is wherein electric
Source supply module is to provide the power input of the first supply voltage to host interface circuit.Power supply module is also to mention
For the power input of second source voltage to memory management circuitry.Power supply module is also to provide third power supply voltage
To the power input of memory interface circuit.Wherein the reference voltage end of memory interface circuit is electrically connected to memory pipe
The power input of circuit is managed, and the voltage value of the first supply voltage, second source voltage and third power supply voltage is each other not
It is identical.
One example of the present invention embodiment provides a kind of power supply method, and it is suitable for memory storage apparatus, storages
Device storage device includes reproducible nonvolatile memorizer module, and reproducible nonvolatile memorizer module includes multiple realities
Body erased cell.Power supply method includes: to provide the host interface circuit of the first supply voltage to memory storage apparatus
Power input；There is provided second source voltage to memory storage apparatus memory management circuitry power input；It provides
Third power supply voltage to memory storage apparatus memory interface circuit power input.Wherein memory interface circuit
Reference voltage end is electrically connected to the power input of memory management circuitry, and the first supply voltage, second source voltage
And the voltage value of third power supply voltage is differing from each other.
In one example of the present invention embodiment, the power supply method further include: provide third power supply voltage extremely
The power input of reproducible nonvolatile memorizer module, and the reference electricity of reproducible nonvolatile memorizer module
Pressure side is electrically connected to the power input of memory management circuitry.
Based on above-mentioned, memory storage apparatus, memorizer control circuit unit and power supply method provided by the invention,
By the way that the output electric current of memory interface circuit is directed into memory management circuitry, memory interface circuit and storage can be maintained
Device manages the normal operating of circuit, can also improve previous memory storage apparatus and be easy the problem of overheating because of voltage conversion.
To make the foregoing features and advantages of the present invention clearer and more comprehensible, special embodiment below, and it is detailed to cooperate attached drawing to make
Carefully it is described as follows.
Detailed description of the invention
Fig. 1 is the signal of host system and memory storage apparatus shown by an exemplary embodiment according to the present invention
Figure；
Fig. 2 is the schematic diagram of host system and input/output device shown by an exemplary embodiment according to the present invention；
Fig. 3 is the signal of host system and memory storage apparatus shown by an exemplary embodiment according to the present invention
Figure；
Fig. 4 is the schematic block diagram for showing memory storage apparatus shown in FIG. 1；
Fig. 5 is the schematic block diagram of memorizer control circuit unit shown by an exemplary embodiment according to the present invention；
Fig. 6 is the schematic diagram of power system shown by an exemplary embodiment according to the present invention；
Fig. 7 is the summary of reproducible nonvolatile memorizer module shown by an exemplary embodiment according to the present invention
Block diagram；
Fig. 8 is the schematic diagram of power system shown by another exemplary embodiment according to the present invention；
Fig. 9 is the schematic diagram of power system shown by another exemplary embodiment according to the present invention；
Figure 10 is the flow chart of power supply method shown by an exemplary embodiment according to the present invention.
Description of symbols:
1000: host system；
1100: computer；
1102: microprocessor；
1104: random access memory；
1106: input/output device；
1108: system bus；
1110: data transmission interface；
1202: mouse；
1204: keyboard；
1206: display；
1208: printer；
1212:U disk；
1214: memory card；
1216: solid state hard disk；
1310: digital camera；
1312:SD card；
1314:MMC card；
1316: memory stick；
1318:CF card；
1320: embedded storage device；
100: memory storage apparatus；
102: connecting interface unit；
104: memorizer control circuit unit；
106: reproducible nonvolatile memorizer module；
410 (0)~410 (N): entity erased cell；
202: memory management circuitry；
204: host interface；
206: memory interface；
208: buffer storage；
210: error checking and correction and correcting circuit；
212: electric power management circuit；
214: power supply module；
60,80,90: power system；
61: host interface circuit；
62: memory management circuitry；
63: memory interface circuit；
602,604,606,802,804,806,854: power output end；
612,622,632,652,852: power input；
614,624,634,654: referring to ground terminal；
642,842: power supply circuit；
644,646,648,844,846,848,850: voltage conversion circuit；
V0, V1, V2, V3, V1 ', V2 ', V3 ', V4: supply voltage；
VG: ground voltage；
65: reproducible nonvolatile memorizer module；
2202: memory cell array；
2204: character line control circuit；
2206: bit line control circuit；
2208: row decoder；
2210: data input/output buffer；
2212: control circuit；
S1002, S1004, S1006: each step of the power supply method of one example of the present invention embodiment.
Specific embodiment
Multiple exemplary embodiments set forth below illustrate the present invention, however the present invention be not limited only to illustrated by multiple examples
Embodiment.Combination appropriate is also still allowed between exemplary embodiment again.In this case specification full text (including claims)
Used " electric connection " or " coupling " word can refer to any direct or indirect connection means.For example, if being retouched in text
It states first device and is electrically connected at second device, then should be construed as the first device can be directly connected to second dress
It sets or the first device can be coupled indirectly to the second device by other devices or certain connection means.In addition,
" signal " word can refer to an at least electric current, voltage, charge, temperature, data or any other one or more signal.
In general, memory storage apparatus (also referred to as, storage system) includes duplicative non-volatile memories
Device module and controller (also referred to as, control circuit).Being commonly stored device storage device is used together with host system, so that host
System can write data into memory storage apparatus or read from memory storage apparatus data.
Fig. 1 is the signal of host system and memory storage apparatus shown by an exemplary embodiment according to the present invention
Figure.Fig. 2 is the schematic diagram of host system and input/output device shown by an exemplary embodiment according to the present invention.Fig. 3 is
The schematic diagram of host system and memory storage apparatus shown by an exemplary embodiment according to the present invention.
Fig. 1 is please referred to, host system 1000 generally comprises computer 1100 and input/output (input/output, abbreviation I/
O) device 1106.Computer 1100 includes microprocessor 1102, random access memory (random access memory, abbreviation
RAM) 1104, system bus 1108 and data transmission interface 1110.Input/output device 1106 include as Fig. 2 mouse 1202,
Keyboard 1204, display 1206 and printer 1208.It will be appreciated that the unrestricted input/output device of device shown in Fig. 2
1106, input/output device 1106 can further include other devices.
In an exemplary embodiment, memory storage apparatus 100 is by data transmission interface 1110 and host system
1000 other elements are electrically connected.Pass through microprocessor 1102, random access memory 1104 and input/output device 1106
Operation can write data into memory storage apparatus 100 or read data from memory storage apparatus 100.For example, depositing
Reservoir storage device 100 can be USB flash disk 1212 as shown in Figure 2, memory card 1214 or solid state hard disk (Solid State
Drive, abbreviation SSD) 1216 equal type nonvolatile storage devices.
In general, host system 1000 is that can substantially cooperate appointing with storing data with memory storage apparatus 100
Meaning system.Although host system 1000 is explained with computer system, however, in another example in this exemplary embodiment
In embodiment, host system 1000 can be digital camera, video camera, communication device, audio player or video player etc.
System.For example, type nonvolatile storage device is then when host system is digital camera (video camera) 1310
For SD card 1312, mmc card 1314 used in it, memory stick (memory stick, abbreviation MS) 1316, CF card 1318 or insertion
Formula storage device 1320 (as shown in Figure 3).Embedded storage device 1320 include embedded multi-media card (Embedded MMC,
Abbreviation eMMC).It is noted that embedded multi-media card is directly electrically connected on the substrate of host system.
Fig. 4 is the schematic block diagram for showing memory storage apparatus shown in FIG. 1.
Referring to figure 4., memory storage apparatus 100 includes connecting interface unit 102, memorizer control circuit unit 104
With reproducible nonvolatile memorizer module 106.
In this exemplary embodiment, connecting interface unit 102 is compatible with Serial Advanced Technology Attachment (Serial
Advanced Technology Attachment, abbreviation SATA) standard.However, it is necessary to be appreciated that, the present invention is not limited to
This, connecting interface unit 102 is also possible to meet parallel advanced technology annex (Parallel Advanced Technology
Attachment, abbreviation PATA) standard, Institute of Electrical and Electric Engineers (Institute of Electrical and
Electronic Engineers, abbreviation IEEE) 1394 standards, high-speed peripheral component connecting interface (Peripheral
Component Interconnect Express, abbreviation PCI Express) standard, universal serial bus (Universal
Serial Bus, abbreviation USB) standard, a ultrahigh speed generation (Ultra High Speed-I, abbreviation UHS-I) interface standard, superelevation
Fast two generations (Ultra High Speed-II, abbreviation UHS-II) interface standard, safe digital (Secure Digital, abbreviation
SD) interface standard, memory stick (Memory Stick, abbreviation MS) interface standard, multimedia storage card (Multi Media
Card, abbreviation MMC) interface standard, compact flash (Compact Flash, abbreviation CF) interface standard, integrated form driving electronics connect
Mouth (Integrated Device Electronics, abbreviation IDE) standard or other suitable standards.In this exemplary embodiment
In, connecting interface unit can be encapsulated in a chip with memorizer control circuit unit, or is laid in one and is included memory control
Outside the chip of circuit unit processed.
Memorizer control circuit unit 104 is to run in the form of hardware or the multiple logic gates or control of form of firmware implementation
System instruction, and data are carried out in reproducible nonvolatile memorizer module 106 according to the instruction of host system 1000
The operation such as be written, read and erase.
Reproducible nonvolatile memorizer module 106 is electrically connected to memorizer control circuit unit 104, and uses
The data being written with host system 1000.Reproducible nonvolatile memorizer module 106 has entity erased cell
410 (0)~410 (N).For example, entity erased cell 410 (0)~410 (N) can belong to the same memory crystal grain (die) or
Belong to different memory crystal grains.Each entity erased cell is respectively provided with multiple entity program units, and belongs to same
The entity program unit of a entity erased cell can be written independently and simultaneously be erased.For example, each entity is erased
Unit is made of 128 entity program units.However, it is necessary to be appreciated that, the invention is not limited thereto, and each entity is smeared
Except unit be can be by 64 entity program units, 256 entity program units or any other a entity program unit
It is formed.
More specifically, each entity erased cell includes a plurality of character line and a plurality of bit line, each character line
A storage unit is configured with each bit line infall.Each storage unit can store one or more bits.Same
In one entity erased cell, all storage units can be erased together.In this exemplary embodiment, entity erased cell is
The minimum unit erased.That is, each entity erased cell contains the storage unit of minimal amount being erased together.For example,
Entity erased cell is physical blocks.On the other hand, the storage unit on the same character line can form one or more entity journeys
Sequence unit.If each storage unit can store 2 or more bits, the entity program unit on the same character line
It can be classified as lower entity program unit and upper entity program unit.In general, the write-in of lower entity program unit
Speed can be greater than the writing speed of upper entity program unit.In this exemplary embodiment, entity program unit is sequencing
Minimum unit.That is, entity program unit is the minimum unit that data are written.For example, entity program unit is physical page
Face or entity fan (sector).If entity program unit is physical page, each entity program unit is usually wrapped
Include data bit area and redundancy ratio special zone.Data bit area includes multiple entities fan, to store the data of user, and redundancy
Data (for example, error correcting code) of the bit area to storage system.In this exemplary embodiment, each data bit area includes 32
A entity fan, and the size of entity fan is 512 bit groups (byte, abbreviation B).However, in other exemplary embodiments, number
According to also may include that 8,16 or the more or fewer entities of number are fanned in bit area, the present invention is not intended to limit the size of entity fan
And number.
In this exemplary embodiment, reproducible nonvolatile memorizer module 106 is multi-level cell memory (Multi
Level Cell, abbreviation MLC) NAND type flash memory module, i.e. at least two bit can be stored in a storage unit.So
And the invention is not limited thereto, reproducible nonvolatile memorizer module 106 can also be single-order storage unit (Single
Level Cell, abbreviation SLC) NAND type flash memory module, multi-level cell memory (Trinary Level Cell, abbreviation
TLC) NAND type flash memory module, other flash memory modules or other memory modules with the same characteristics.
Fig. 5 is the schematic block diagram of memorizer control circuit unit shown by an exemplary embodiment according to the present invention.
Referring to figure 5., memorizer control circuit unit 104 includes memory management circuitry 202, host interface 204 and deposits
Memory interface 206.
Integrated operation of the memory management circuitry 202 to control memorizer control circuit unit 104.Specifically, it deposits
Reservoir, which manages circuit 202, has multiple control instructions, and when memory storage apparatus 100 operates, these control instruction meetings
It is run the operation such as to carry out the write-in of data, read and erase.When illustrating the operation of memory management circuitry 202 below, etc.
It is same as illustrating the operation of memorizer control circuit unit 104, below and repeat no more.
In this exemplary embodiment, the control instruction of memory management circuitry 202 is to carry out implementation with form of firmware.For example,
Memory management circuitry 202 has microprocessor unit (not shown) and read-only memory (not shown), and these controls refer to
Order is programmed in so far read-only memory.When memory storage apparatus 100 operates, these control instructions can be by microprocessor
Unit is run the operation such as to carry out the write-in of data, read and erase.
In another exemplary embodiment, the control instruction of memory management circuitry 202 can also be stored in the form of procedure code
The specific region of reproducible nonvolatile memorizer module 106 is (for example, be exclusively used in storage system data in memory module
System area) in.In addition, memory management circuitry 202 have microprocessor unit (not shown), read-only memory (not shown) and
Random access memory (not shown).In particular, this read-only memory has boot code (boot code), and work as memory
When control circuit unit 104 is enabled, microprocessor unit can first run this boot code, and will to be stored in duplicative non-volatile
Control instruction in property memory module 106 is loaded into the random access memory of memory management circuitry 202.Later, micro-
Processor unit such as can run these control instructions to carry out the write-in of data, read and erase at the operation.
In addition, the control instruction of memory management circuitry 202 can also be come in another exemplary embodiment with an example, in hardware
Implementation.For example, memory management circuitry 202 includes microcontroller, memory management unit, memory writing unit, memory
Reading unit, memory erased cell and data processing unit.Memory management unit, memory writing unit, memory are read
Unit, memory erased cell and data processing unit is taken to be electrically connected to microcontroller.Wherein, memory management unit is used
To manage the entity erased cell of reproducible nonvolatile memorizer module 106；Memory writing unit is to can make carbon copies
Formula non-volatile memory module 106 assigns write instruction to write data into reproducible nonvolatile memorizer module
In 106；Memory reading unit is to assign reading instruction to reproducible nonvolatile memorizer module 106 with from can make carbon copies
Data are read in formula non-volatile memory module 106；Memory erased cell is to type nonvolatile
Module 106 assigns instruction of erasing so that data to be erased from reproducible nonvolatile memorizer module 106；And data processing list
Member is intended to be written data to reproducible nonvolatile memorizer module 106 and deposits from duplicative is non-volatile to handle
The data read in memory modules 106.
Host interface 204 is electrically connected to memory management circuitry 202 and to receive and identification host system
1000 instructions and data transmitted.That is, instruction and data that host system 1000 is transmitted can pass through host interface
204 are sent to memory management circuitry 202.In this exemplary embodiment, host interface 204 is compatible with SATA standard.So
And, it should be understood that the invention is not limited thereto, host interface 204 be also possible to be compatible with PATA standard, IEEE1394 standard,
PCI Express standard, USB standard, SD standard, UHS-I standard, UHS-II standard, MS standard, MMC standard, eMMC standard,
UFS standard, CF standard, IDE standard or other suitable data transmission standards.
Memory interface 206 is electrically connected to memory management circuitry 202 and non-volatile to access duplicative
Property memory module 106.That is, the data for being intended to be written to reproducible nonvolatile memorizer module 106 can be via depositing
Memory interface 206 is converted to the 106 receptible format of institute of reproducible nonvolatile memorizer module.
In an exemplary embodiment, memorizer control circuit unit 104 further include buffer storage 208, error checking and correction with
Correcting circuit 210, electric power management circuit 212 and power supply module 214.
Buffer storage 208 is electrically connected to memory management circuitry 202 and is configured to temporarily store from host system
1000 data and instruction or the data from reproducible nonvolatile memorizer module 106.
Error checking and correction and correcting circuit 210 are electrically connected to memory management circuitry 202 and to run mistake school
It tests and correction program is to ensure the correctness of data.Specifically, when memory management circuitry 202 connects from host system 1000
When receiving write instruction, error checking and correction can generate corresponding error correcting code with correcting circuit 210 for the data of this corresponding write instruction
(error correcting code, abbreviation ECC code), and memory management circuitry 202 can be by this corresponding write instruction
Data be written with corresponding error correcting code into reproducible nonvolatile memorizer module 106.Later, when memory management electricity
Road 202 can read the corresponding error correcting code of this data when reading data from reproducible nonvolatile memorizer module 106 simultaneously,
And error checking and correction and correcting circuit 210 can be according to this error correcting codes to read data run error checking and correction and correction program.
Electric power management circuit 212 is electrically connected to memory management circuitry 202 and to control memory storage dress
Set 100 power supply.In this exemplary embodiment, electric power management circuit 212 can be used to control power supply circuit 211.Another
In exemplary embodiment, electric power management circuit 212 also be can be set in power supply module 214.
Power supply module 214 is electrically connected to memory management circuitry 202, host interface 204, memory interface
206, buffer storage 208, error checking and correction and correcting circuit 210, electric power management circuit 212 and duplicative non-volatile memories
Any required just operable electronic component or the circuit of powering in the memory storage apparatus 100 such as device module 106.Power supply supplies mould
Block 214 is responsible for supplying power to these electronic components or circuit.It should be specified, Fig. 5 is used only to the expression memory of outline
Electrical connection in storage device 100 between main circuit/element, each main circuit/interelement can concatenate on demand/
And other electronic components are connect, the present invention is without restriction.
Memory management circuitry 202 is core (core) circuit of memorizer control circuit unit 104.Implement in this example
In example, when 100 normal operating of memory storage apparatus, the operation voltage of memory management circuitry 202 is 1.1 volts
(Volt), and the operation voltage of host interface 204, memory interface 206 and reproducible nonvolatile memorizer module 106 then
It is 3.3 volts.That is, in this exemplary embodiment, when 100 normal operating of memory storage apparatus, memory management
Potential difference between the power input of circuit 202 and the reference voltage end of memory management circuitry 202 is 1.1 volts, host
Potential difference between the power input of interface 204 and the reference voltage end of host interface 204 is 3.3 volts, memory interface
Potential difference between 206 power input and the reference voltage end of memory interface 206 is 3.3 volts, and duplicative
The power input of non-volatile memory module 106 and the reference voltage end of reproducible nonvolatile memorizer module 106
Between potential difference be 3.3 volts.However, in another exemplary embodiment, each of memory storage apparatus 100 electronics
The operation voltage of element or circuit can be adjusted or be standardized depending on the demand in practice, and the present invention is without restriction.
In general, the operation of each of memory storage apparatus or arbitrary electronic system electronic component or circuit
Voltage all may be different, thus the supply voltage from alternating current or battery can first pass through voltage-regulating circuit (e.g. boosting/
Decompression/rectification circuit) step-up/down and/or the processing such as rectification after, be available to these electronic components or circuit.Wherein, one
A voltage-regulating circuit can provide the supply voltage with a kind of voltage value.Operate the identical multiple electronic components of voltage or circuit
Would generally be electrically connected at by way of in parallel (parallel connection) the same voltage-regulating circuit with it is one or more
Between a earth element.For example, in parallel by operate voltage be all 3.3 volts host interface, memory interface and
Reproducible nonvolatile memorizer module is electrically connected between the same voltage-regulating circuit and one or more earth elements,
Wherein this voltage-regulating circuit can be responsible for exporting after supply voltage to be reduced to 3.3 volts to host interface, memory interface
And reproducible nonvolatile memorizer module.In addition, operation voltage be 1.1 volts memory management circuitry then usually individually
Or another voltage-regulating circuit and one or more earth elements are electrically connected at other electronic components or circuit in parallel
Between, wherein this voltage-regulating circuit is responsible for exporting after supply voltage to be reduced to 1.1 volts to memory management circuitry.By
This, can promote the service efficiency of each voltage-regulating circuit, and can reduce circuit area.
However, above-mentioned electric connection mode is but likely to result in the voltage adjustment electricity for being electrically connected to memory management circuitry
Road generates a large amount of heat when supply voltage to be down to the operation voltage of memory management circuitry (for example, 1.1 volts).Especially
It is, for linear (linear) voltage-regulating circuit for distributing the voltage of decline in the form of heat, above-mentioned electric connection
Mode may allow memorizer control circuit unit 104 or memory storage apparatus 100 to overheat, cause soft and hardware damage or
Lead to the reduction of power supply effective rate of utilization.
Exemplary embodiment of the invention is by being electrically connected to memory pipe for the reference voltage end of memory interface circuit
The power input for managing circuit, can effectively improve the above problem.
Fig. 6 is the schematic diagram of power system shown by an exemplary embodiment according to the present invention.
Fig. 6 is please referred to, in this exemplary embodiment, power system 60 includes host interface circuit 61, memory pipe
Manage circuit 62, memory interface circuit 63 and power supply module 214.
Host interface circuit 61 can be the partial circuit in host interface 204 or host interface 204.Memory
Management circuit 62 can be the partial circuit in memory management circuitry 202 or memory management circuitry 202.Memory
Interface circuit 63 can be the partial circuit in memory interface 206 or memory interface 206.
In this exemplary embodiment, power supply module 214 includes power output end 602, power output end 604 and power supply
Output end 606.In this exemplary embodiment, power output end 602 is also referred to as the first power output end, power output end 604
Referred to as second source output end, and power output end 606 is also referred to as third power output end.Power output end 602 electrically connects
It is connected to the power input 612 of host interface circuit 61, power output end 604 is electrically connected to the electricity of memory management circuitry 62
Source input terminal 622, and power output end 606 is electrically connected to the power input 632 of memory interface circuit 63.Power supply supplies
Power supply needed for answering module 214 to provide operation respectively by power input 612, power input 622 and power input 632
To host interface circuit 61, memory management circuitry 62 and memory interface circuit 63.
The reference voltage end 614 of host interface circuit 61 and the reference voltage end 624 of memory management circuitry 62 electrically connect
It is connected to the end ground connection (grounding).Here, ground terminal is to provide ground voltage VG (for example, 0 volt), therefore, ground terminal,
Reference voltage end 614 and the ground voltage VG having the same of reference voltage end 624.In particular, in this exemplary embodiment, storage
The reference voltage end 634 of device interface circuit 63 is not electrically connected to ground terminal, and is electrically connected to memory management circuitry
62 power input 622.Therefore, reference voltage end 634 do not have ground voltage VG, but with memory management circuitry 62
The voltage value having the same of power input 622.
In this exemplary embodiment, power supply module 214 further includes power supply circuit 642, voltage conversion circuit
644, voltage conversion circuit 646 and voltage conversion circuit 648.In this exemplary embodiment, voltage conversion circuit 644 also referred to as the
One voltage conversion circuit, voltage conversion circuit 646 is also referred to as second voltage conversion circuit, and voltage conversion circuit 648 is also referred to as
For tertiary voltage conversion circuit.
Power supply circuit 642 is to provide primary power voltage V0.For example, primary power voltage V0It can be power supply confession
Circuit 642 is answered to convert the power supply from alternating current or battery and obtain.In this exemplary embodiment, primary power voltage V0It is 5 volts
Spy, but not limited to this.
Voltage conversion circuit 644 is electrically connected between power supply circuit 642 and power output end 602, and to
By primary power voltage V0Be converted to supply voltage V1.In this exemplary embodiment, supply voltage V1It is 3.3 volts, but is not limited to
This.
Voltage conversion circuit 646 is electrically connected between power supply circuit 642 and power output end 604, and to
By primary power voltage V0Be converted to supply voltage V2.In this exemplary embodiment, supply voltage V2It is 1.1 volts, but is not limited to
This.
Voltage conversion circuit 648 is electrically connected between power supply circuit 642 and power output end 606, and to
By primary power voltage V0Be converted to supply voltage V3.In this exemplary embodiment, supply voltage V3It is 4.4 volts, but is not limited to
This.
In this exemplary embodiment, power supply circuit 642, voltage conversion circuit 644, voltage conversion circuit 646 and electricity
Voltage conversion circuit 648 can distinctly include one or more rectification circuits, one or more reduction voltage circuits and/or one or more boosting electricity
Road, and it is without being limited thereto.In addition, in an exemplary embodiment, voltage conversion circuit 644, voltage conversion circuit 646 and voltage conversion
Circuit 648 can also distinctly be considered as a linear voltage regulator (linear regulator).
Primary power voltage V0, supply voltage V1, supply voltage V2, supply voltage V3Voltage value it is different each other.Example
Such as, in this exemplary embodiment, primary power voltage V0Voltage value be greater than supply voltage V3Voltage value, supply voltage V3's
Voltage value is greater than supply voltage V1Voltage value, and supply voltage V1Voltage value be greater than supply voltage V2Voltage value.Especially
It is, in an exemplary embodiment, supply voltage V3Voltage value can be equal to supply voltage V1Voltage value and supply voltage V2Electricity
The summation of pressure value.However, in another exemplary embodiment, primary power voltage V0, supply voltage V1, supply voltage V2And power supply
Voltage V3Voltage value between size relation can also adjust on demand, and be not limited to above-mentioned.
In this exemplary embodiment, power supply module 214 is to provide supply voltage V1To host interface circuit 61
Power input 612 provides supply voltage V2To the power input 622 of memory management circuitry 62, and provide power supply electricity
Press V3To the power input 632 of memory interface circuit 63, with maintain host interface circuit 61, memory management circuitry 62 and
The normal operating of memory interface circuit 63.That is, in 214 normal operating of power supply module, power output end 602
Voltage value with power input 612 can be supply voltage V1Voltage value, power output end 604 and power input 622
Voltage value can be supply voltage V2Voltage value, and the voltage value of power output end 606 and power input 632 can be power supply
Voltage V3Voltage value.In addition, in this exemplary embodiment, supply voltage V1Also referred to as the first supply voltage, supply voltage V2?
Referred to as second source voltage, and supply voltage V3Also referred to as third power supply voltage.
In this exemplary embodiment, the potential difference between power input 612 and reference voltage end 614 is (for example, V1?
VG) it is equal to supply voltage V1Voltage value (for example, 3.3 volts), therefore supply voltage V1It is the operation electricity of host interface circuit 61
Pressure；Potential difference between power input 622 and reference voltage end 624 is (for example, V2- VG) it is equal to supply voltage V2Voltage value
(for example, 1.1 volts), therefore supply voltage V2It is the operation voltage of memory management circuitry 62；And power input 632 and ginseng
The potential difference between voltage end 634 is examined (for example, V3- V2) it is not equal to supply voltage V3Voltage value (for example, 4.4 volts), because
This supply voltage V3It is not the operation voltage of memory interface circuit 63.In other words, the operation voltage of memory interface circuit 63
It is the potential difference between power input 632 and reference voltage end 634 (for example, V3- V2=4.4-1.1=3.3 volts).Or
Person has one first potential difference (for example, V from the point of view of another angle between power input 632 and ground terminal3- VG), power supply
Have one second potential difference (for example, V between input terminal 632 and reference voltage end 6343- V2), and the first potential difference is greater than the
Two potential differences.
In particular, the output electric current of memory interface circuit 63 can be via reference voltage end in this exemplary embodiment
634 are directed into the power input 622 of memory management circuitry 62, to reduce the magnitude of current for flowing through voltage conversion circuit 646, and
And reduce the heat that voltage conversion circuit 646 or memory storage apparatus 100 issue.
In an exemplary embodiment, power system 60 further includes reproducible nonvolatile memorizer module 65.It can
Manifolding formula non-volatile memory module 65 can be reproducible nonvolatile memorizer module 106 or duplicative is non-
Partial circuit in volatile 106.
Fig. 7 is the summary of reproducible nonvolatile memorizer module shown by an exemplary embodiment according to the present invention
Block diagram.
Fig. 7 is please referred to, reproducible nonvolatile memorizer module 65 includes memory cell array 2202, character line traffic control
Circuit 2204, bit line control circuit 2206,2208, data input/output buffer row decoder (column decoder)
2210 with control circuit 2212.
Memory cell array 2202 includes entity erased cell 410 (0)~410 (N) in Fig. 4.Memory cell array
Storage unit in 2202 is to be configured on the crosspoint of a plurality of character line and a plurality of bit line in array fashion.When from storage
When device control circuit unit 104 receives write instruction or reads instruction, control circuit 2212 can control character line control circuit
2204, bit line control circuit 2206, row decoder 2208, data input/output buffer 2210 store to write data to
Cell array 2202 reads data from memory cell array 2202.In addition, character line control circuit 2204 is applied to control
Give to the voltage of character line, bit line control circuit 2206 to control the voltage bestowed to bit line, row decoder 2208 according to
According to the decoding column address in instruction to select corresponding bit line, and data input/output buffer 2210 is configured to temporarily store number
According to.In addition, reproducible nonvolatile memorizer module 65 can also include more or fewer electronic components or circuit, this hair
It is bright without restriction.
Referring once again to Fig. 6, in an exemplary embodiment of Fig. 6, power output end 606 is also electrically connected to duplicative
The power input 652 of non-volatile memory module 65, and the reference electricity of reproducible nonvolatile memorizer module 65
Pressure side 654 is electrically connected to the power input 622 of memory management circuitry 62.Power supply module 214 can provide power supply
Voltage V3To the power input 652 of reproducible nonvolatile memorizer module 65, to maintain duplicative is non-volatile to deposit
The normal operating of each electronic component or circuit in memory modules 65.Similar to memory interface circuit 63, power input 652
Potential difference between reference voltage end 654 is (for example, V3- V2) it is not equal to the voltage value of supply voltage V3 (for example, 4.4 volts
It is special), therefore supply voltage V3It is not the operation voltage of reproducible nonvolatile memorizer module 65.In other words, duplicative
The operation voltage of non-volatile memory module 65 is the potential difference (example between power input 652 and reference voltage end 654
Such as, V3- V2=4.4-1.1=3.3 volts).Alternatively, having between power input 652 and ground terminal from the point of view of another angle
There is above-mentioned first potential difference (for example, V3- VG), there is above-mentioned second electricity between power input 652 and reference voltage end 654
Potential difference is (for example, V3- V2), and the first potential difference is greater than the second potential difference.
In particular, in this exemplary embodiment, memory interface circuit 63 and reproducible nonvolatile memorizer module
65 output electric current can be directed into memory management circuitry 62 by reference to voltage end 634 and reference voltage end 654 respectively
Power input 622 flows through the magnitude of current of voltage conversion circuit 646 with further reduction, and reduces voltage conversion circuit
646 or memory storage apparatus 100 issue heat.
Fig. 8 is the schematic diagram of power system shown by another exemplary embodiment according to the present invention.
Fig. 8 is please referred to, in this exemplary embodiment, power system 80 includes host interface circuit 61, memory pipe
Manage circuit 62, memory interface circuit 63 and power supply module 214.Host interface circuit 61, is deposited at memory management circuitry 62
The same or similar host interface circuit 61 in Fig. 6, memory management circuitry 62, memory connect memory interface circuit 63 respectively
Mouth circuit 63, therefore not in this to go forth.
In this exemplary embodiment, power supply module 214 includes power output end 802, power output end 804 and power supply
Output end 806.In this exemplary embodiment, power output end 802 is also referred to as the first power output end, power output end 804
Referred to as second source output end, and power output end 806 is also referred to as third power output end.Power output end 802 electrically connects
It is connected to the power input 612 of host interface circuit 61, power output end 804 is electrically connected to the electricity of memory management circuitry 62
Source input terminal 622, and power output end 806 is electrically connected to the power input 632 of memory interface circuit 63.Power supply supplies
Power supply needed for answering module 214 to provide operation respectively by power input 612, power input 622 and power input 632
To host interface circuit 61, memory management circuitry 62 and memory interface circuit 63.
Similar to the exemplary embodiment of Fig. 6, the reference voltage end 614 and memory management circuitry 62 of host interface circuit 61
Reference voltage end 624 be electrically connected to ground terminal.Here, ground terminal is to provide ground voltage VG (for example, 0 volt).This
Outside, in this exemplary embodiment, the reference voltage end 634 of memory interface circuit 63 is not electrically connected to ground terminal, but
Indirectly it is electrically connected to the power input 622 of memory management circuitry 62.Therefore, reference voltage end 634 does not have ground connection
Voltage VG, and the voltage value of the voltage value of reference voltage end 634 and the power input 622 of memory management circuitry 62 not phase
Together.For example, the voltage value of reference voltage end 634 is higher than the voltage value of power input 622 in this exemplary embodiment.
In this exemplary embodiment, power supply module 214 further includes power supply circuit 842, voltage conversion circuit
844, voltage conversion circuit 846, voltage conversion circuit 848 and voltage conversion circuit 850.In this exemplary embodiment, voltage turns
It changes circuit 844 and is also referred to as first voltage conversion circuit, voltage conversion circuit 846 is also referred to as second voltage conversion circuit, voltage turns
It changes circuit 848 and is also referred to as tertiary voltage conversion circuit, and voltage conversion circuit 850 is also referred to as the 4th voltage conversion circuit.
Power supply circuit 842 is to provide primary power voltage V0.For example, primary power voltage V0It can be power supply confession
Circuit 842 is answered to convert the power supply from alternating current or battery and obtain.In this exemplary embodiment, primary power voltage V0It is 5 volts
Spy, but not limited to this.
Voltage conversion circuit 844 is electrically connected between power supply circuit 842 and power output end 802, and to
By primary power voltage V0Be converted to supply voltage V1'.In this exemplary embodiment, supply voltage V1' it is 3.3 volts, but it is unlimited
In this.
Voltage conversion circuit 846 is electrically connected between power supply circuit 842 and power output end 804, and to
By primary power voltage V0Be converted to supply voltage V2'.In this exemplary embodiment, supply voltage V2' it is 1.1 volts, but it is unlimited
In this.
Voltage conversion circuit 848 is electrically connected to power supply circuit 842, and to by primary power voltage V0Conversion
For supply voltage V4.In this exemplary embodiment, supply voltage V4It is 1.8 volts, but not limited to this.
Voltage conversion circuit 850 is electrically connected at the power input of voltage conversion circuit 848 Yu memory management circuitry 62
Between end 622, and to by supply voltage V4Be converted to supply voltage V2'.More specifically, the electricity of voltage conversion circuit 850
Source input terminal 852 is electrically connected to the reference voltage end 634 of voltage conversion circuit 848 Yu memory interface circuit 63, and electricity
The power output end 854 of voltage conversion circuit 850 is electrically connected to the power input 622 of memory management circuitry 62.
In this exemplary embodiment, power supply circuit 842, voltage conversion circuit 844, voltage conversion circuit 846, voltage
Conversion circuit 848 and voltage conversion circuit 850 can distinctly include one or more rectification circuits, one or more reduction voltage circuits and/
Or one or more booster circuits, and it is without being limited thereto.For example, voltage conversion circuit 850 is a decompression in this exemplary embodiment
Circuit.As shown in figure 8, this reduction voltage circuit may include one or more diodes (diode).In addition, in an exemplary embodiment,
Voltage conversion circuit 844, voltage conversion circuit 846 and voltage conversion circuit 848 can also distinctly be considered as a linear voltage stabilization
Device (linear regulator).
Primary power voltage V0, supply voltage V1', supply voltage V2', supply voltage V4Voltage value it is different each other.
For example, in this exemplary embodiment, primary power voltage V0Voltage value be greater than supply voltage V1' voltage value, supply voltage
V1' voltage value be greater than supply voltage V4Voltage value, and supply voltage V4Voltage value be greater than supply voltage V2' voltage
Value.However, in another exemplary embodiment, primary power voltage V0, supply voltage V1', supply voltage V2', supply voltage V4's
Size relation between voltage value can also adjust on demand, and be not limited to above-mentioned.
In this exemplary embodiment, power supply module 214 is to provide supply voltage V1' to host interface circuit 61
Power input 612 provides supply voltage V2' to the power input 622 of memory management circuitry 62, and power supply electricity is provided
Press V3' to the power input 632 of memory interface circuit 63, to maintain host interface circuit 61, memory management circuitry 62
And the normal operating of memory interface circuit 63.Wherein, supply voltage V3' voltage value and supply voltage V0Voltage value it is identical
Or it is almost the same.That is, in 214 normal operating of power supply module, power output end 802 and power input
612 voltage value can be supply voltage V1' voltage value, the voltage value of power output end 804 and power input 622 can be electricity
Source voltage V2' voltage value, and the voltage value of power output end 806 and power input 632 can be supply voltage V3' electricity
Pressure value.In addition, in this exemplary embodiment, supply voltage V1' it is also referred to as the first supply voltage, supply voltage V2' it is also referred to as second
Supply voltage, supply voltage V3' it is also referred to as third power supply voltage, and supply voltage V4Also referred to as the 4th supply voltage.
Similar to the exemplary embodiment of Fig. 6, in this exemplary embodiment, have between power input 632 and ground terminal
One first potential difference is (for example, V3'-VG), there is one second potential difference between power input 632 and reference voltage end 634
(for example, V3'-V4), and the first potential difference is greater than the second potential difference.In particular, in this exemplary embodiment, memory interface
The output electric current of circuit 63 can be directed into the power input 622 of memory management circuitry 62 via voltage conversion circuit 850,
To reduce the magnitude of current for flowing through voltage conversion circuit 846 Yu voltage conversion circuit 848, and reduce memory storage apparatus 100
The heat of sending.
In another exemplary embodiment of Fig. 8, power system 80 further includes above-mentioned duplicative non-volatile memories
Device module 65.As shown in figure 8, power output end 806 is also electrically connected to the electricity of reproducible nonvolatile memorizer module 65
Source input terminal 652, and the reference voltage end 654 of reproducible nonvolatile memorizer module 65 is via voltage conversion circuit
850 and be indirectly electrically connected to the power input 622 of memory management circuitry 62.For example, reference voltage end 654 is electrically
It is connected to the power input 652 of voltage conversion circuit 850.Whereby, power supply module 214 can provide supply voltage V3' extremely
The power input 652 of reproducible nonvolatile memorizer module 65, to maintain reproducible nonvolatile memorizer module
The normal operating of each electronic component or circuit in 65.
Similar to memory interface circuit 63, in this exemplary embodiment, have between power input 652 and ground terminal
Above-mentioned first potential difference is (for example, V3'-VG), there is above-mentioned second current potential between power input 652 and reference voltage end 654
Difference is (for example, V3'-V4), and the first potential difference is greater than the second potential difference.In particular, memory connects in this exemplary embodiment
Mouth circuit 63 and the output electric current of reproducible nonvolatile memorizer module 65 can be directed into via voltage conversion circuit 850
The power input 622 of memory management circuitry 62 flows through voltage conversion circuit 846 and voltage conversion electricity with further reduction
The magnitude of current on road 848, and reduce the heat of the sending of memory storage apparatus 100.
Fig. 9 is the schematic diagram of power system shown by another exemplary embodiment according to the present invention.
Please refer to Fig. 9, the power system 80 of the exemplary embodiment of power system 90 and Fig. 8 the difference is that,
Power system 90 does not have the voltage conversion circuit 848 of power system 80.As shown in figure 9, voltage conversion circuit 850
Be electrically connected at memory interface circuit 63 reference voltage end 634 and memory management circuitry 62 power input 622 it
Between.More specifically, the power input 852 of voltage conversion circuit 850 can be electrically connected to the ginseng of memory interface circuit 63
Examine the reference voltage end 654 of voltage end 634 and/or reproducible nonvolatile memorizer module 65, and voltage conversion circuit 850
Power output end 854 be then electrically connected to the power input 622 of memory management circuitry 62.
It is noted that power system 60,80 and 90 mainly describes power consumption in memory storage apparatus 100
The power supply conducting path between biggish each electronic component or circuit is measured, and partial capacitor and/or resistance etc. and improvement are electric
The related electronic component of gas characteristic or circuit are then omitted.However, in another exemplary embodiment, any electronic component or circuit
It can be injected towards in power system 60,80 and 90, the present invention is without restriction.
Figure 10 is the flow chart of power supply method shown by an exemplary embodiment according to the present invention.
Figure 10 is please referred to, in step S1002, provides the host interface electricity of the first supply voltage to memory storage apparatus
The power input on road.
In step S1004, provide second source voltage to memory storage apparatus memory management circuitry power supply
Input terminal.
In step S1006, provide third power supply voltage to memory storage apparatus memory interface circuit power supply
Input terminal.Wherein the reference voltage end of memory interface circuit is electrically connected to the power input of memory management circuitry, and
And the voltage value of first supply voltage, second source voltage and third power supply voltage is differing from each other.
However, each step has been described in detail as above in Figure 10, just do not repeating herein.It is worth noting that, each in Figure 10
Step can be implemented as multiple procedure codes or circuit, and the present invention is simultaneously not subject to the limits.The method of Figure 10 can arrange in pairs or groups above each model
Example embodiment uses, and also can be used alone, the present invention is simultaneously not subject to the limits.In addition, in Figure 10 each step can run simultaneously or
It sequentially runs, and the operation order of each step can also be adjusted.
In conclusion the memory storage apparatus of one example of the present invention embodiment, memorizer control circuit unit and electricity
The output electric current of memory interface circuit is directed into storage by the reference voltage end of memory interface circuit by source Supply Method
Device manages circuit, can maintain the biggish electricity of the power consumption such as host interface circuit, memory management circuitry and memory interface circuit
The normal operating of subcomponent or circuit can also improve previous memory storage apparatus and be easy the problem of overheating because of voltage conversion.
Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention., rather than its limitations；To the greatest extent
Pipe present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that: its according to
So be possible to modify the technical solutions described in the foregoing embodiments, or to some or all of the technical features into
Row equivalent replacement；And these are modified or replaceed, various embodiments of the present invention technology that it does not separate the essence of the corresponding technical solution
The range of scheme.
Claims (22)
1. a kind of storage device, to storing data characterized by comprising
Connecting interface unit, is electrically connected to host system；
Reproducible nonvolatile memorizer module, including multiple entity erased cells；And
Memorizer control circuit unit is electrically connected to the connecting interface unit and the type nonvolatile mould
Block, and include:
Host interface circuit is electrically connected to the host system；
Memory management circuitry；
Memory interface circuit is electrically connected to the reproducible nonvolatile memorizer module；And
Power supply module is electrically connected to the host interface circuit, the memory management circuitry and the memory interface circuit,
Wherein the power supply module is to provide the power input of the first supply voltage to the host interface circuit,
The power supply module also to provide the power input of second source voltage to the memory management circuitry,
The power supply module also to provide the power input of third power supply voltage to the memory interface circuit,
Wherein the reference voltage end of the memory interface circuit is electrically connected to the power input of the memory management circuitry,
And the voltage value of first supply voltage, the second source voltage and the third power supply voltage is differing from each other.
2. storage device according to claim 1, which is characterized in that the power supply module is also electrically connected to this and can answer
Formula non-volatile memory module is write,
The power supply module is also to provide the electricity of the third power supply voltage to the reproducible nonvolatile memorizer module
Source input terminal, and the reference voltage end of the reproducible nonvolatile memorizer module is electrically connected to memory management electricity
The power input on road.
3. storage device according to claim 1, which is characterized in that the power supply module is exported including the first power supply
End, second source output end and third power output end,
First power output end is electrically connected to the power input of the host interface circuit, the second source output end electricity
Property is connected to the power input of the memory management circuitry, and the third power output end is electrically connected to the memory
The power input of interface circuit.
4. storage device according to claim 3, which is characterized in that the third power output end is also electrically connected to this can
The power input of manifolding formula non-volatile memory module.
5. storage device according to claim 3, which is characterized in that the power supply module further include:
Power supply circuit, to provide primary power voltage；
First voltage conversion circuit is electrically connected between the power supply circuit and first power output end, and to
Converting the primary power voltage is first supply voltage；
Second voltage conversion circuit is electrically connected between the power supply circuit and the second source output end, and to
Converting the primary power voltage is the second source voltage；And
Tertiary voltage conversion circuit is electrically connected between the power supply circuit and the third power output end, and to
Converting the primary power voltage is the third power supply voltage.
6. storage device according to claim 3, which is characterized in that the power supply module further include:
Power supply circuit, to provide primary power voltage, the wherein voltage value of the primary power voltage and the third power supply
The voltage value of voltage is identical；
First voltage conversion circuit is electrically connected between the power supply circuit and first power output end, and to
Converting the primary power voltage is first supply voltage；
Second voltage conversion circuit is electrically connected between the power supply circuit and the second source output end, and to
Converting the primary power voltage is the second source voltage；
Tertiary voltage conversion circuit is electrically connected to the power supply circuit, and to convert the primary power voltage as
Four supply voltages；And
4th voltage conversion circuit, is electrically connected at the tertiary voltage conversion circuit and the power supply of the memory management circuitry is defeated
Enter between end, and the 4th supply voltage is converted to the second source voltage,
Wherein the reference voltage end of the memory interface circuit is to be electrically connected to this via the 4th voltage conversion circuit to deposit
The power input of reservoir management circuit.
7. storage device according to claim 6, which is characterized in that the 4th voltage conversion circuit is reduction voltage circuit.
8. storage device according to claim 3, which is characterized in that the power supply module further include:
Power supply circuit, to provide primary power voltage, the wherein voltage value of the primary power voltage and the third power supply
The voltage value of voltage is identical；
First voltage conversion circuit is electrically connected between the power supply circuit and first power output end, and to
Converting the primary power voltage is first supply voltage；
Second voltage conversion circuit is electrically connected between the power supply circuit and the second source output end, and to
Converting the primary power voltage is the second source voltage；And
Reduction voltage circuit is electrically connected at the reference voltage end of the memory interface circuit and the electricity of the memory management circuitry
Between the input terminal of source.
9. storage device according to claim 1, which is characterized in that the reference voltage end of the memory management circuitry is electrical
Ground terminal is connected to,
There is the first potential difference, memory interface electricity between the power input and the ground terminal of the memory interface circuit
Between the power input on road and the reference voltage end of the memory interface circuit have the second potential difference, and this first
Potential difference is greater than second potential difference.
10. a kind of memorizer control circuit unit, for controlling reproducible nonvolatile memorizer module, which is characterized in that
The reproducible nonvolatile memorizer module includes multiple entity erased cells, which includes:
Host interface circuit is electrically connected to host system；
Memory management circuitry；
Memory interface circuit is electrically connected to the reproducible nonvolatile memorizer module；And
Power supply module is electrically connected to the host interface circuit, the memory management circuitry and the memory interface circuit,
Wherein the power supply module is to provide the power input of the first supply voltage to the host interface circuit,
The power supply module also to provide the power input of second source voltage to the memory management circuitry,
The power supply module also to provide the power input of third power supply voltage to the memory interface circuit,
Wherein the reference voltage end of the memory interface circuit is electrically connected to the power input of the memory management circuitry,
And the voltage value of first supply voltage, the second source voltage and the third power supply voltage is differing from each other.
11. memorizer control circuit unit according to claim 10, which is characterized in that the power supply module is also electrical
It is connected to the reproducible nonvolatile memorizer module,
The power supply module is also to provide the electricity of the third power supply voltage to the reproducible nonvolatile memorizer module
Source input terminal, and the reference voltage end of the reproducible nonvolatile memorizer module is electrically connected to memory management electricity
The power input on road.
12. memorizer control circuit unit according to claim 10, which is characterized in that the power supply module includes the
One power output end, second source output end and third power output end,
First power output end is electrically connected to the power input of the host interface circuit, the second source output end electricity
Property is connected to the power input of the memory management circuitry, and the third power output end is electrically connected to the memory
The power input of interface circuit.
13. memorizer control circuit unit according to claim 12, which is characterized in that the third power output end is also electric
Property is connected to the power input of the reproducible nonvolatile memorizer module.
14. memorizer control circuit unit according to claim 12, which is characterized in that the power supply module also wraps
It includes:
Power supply circuit, to provide primary power voltage；
First voltage conversion circuit is electrically connected between the power supply circuit and first power output end, and to
Converting the primary power voltage is first supply voltage；
Second voltage conversion circuit is electrically connected between the power supply circuit and the second source output end, and to
Converting the primary power voltage is the second source voltage；And
Tertiary voltage conversion circuit is electrically connected between the power supply circuit and the third power output end, and to
Converting the primary power voltage is the third power supply voltage.
15. memorizer control circuit unit according to claim 12, which is characterized in that the power supply module also wraps
It includes:
Power supply circuit, to provide primary power voltage, the wherein voltage value of the primary power voltage and the third power supply
The voltage value of voltage is identical；
First voltage conversion circuit is electrically connected between the power supply circuit and first power output end, and to
Converting the primary power voltage is first supply voltage；
Second voltage conversion circuit is electrically connected between the power supply circuit and the second source output end, and to
Converting the primary power voltage is the second source voltage；
Tertiary voltage conversion circuit is electrically connected to the power supply circuit, and to convert the primary power voltage as
Four supply voltages；And
4th voltage conversion circuit, is electrically connected at the tertiary voltage conversion circuit and the power supply of the memory management circuitry is defeated
Enter between end, and the 4th supply voltage is converted to the second source voltage,
Wherein the reference voltage end of the memory interface circuit is to be electrically connected to this via the 4th voltage conversion circuit to deposit
The power input of reservoir management circuit.
16. memorizer control circuit unit according to claim 15, which is characterized in that the 4th voltage conversion circuit is
Reduction voltage circuit.
17. memorizer control circuit unit according to claim 12, which is characterized in that the power supply module also wraps
It includes:
Power supply circuit, to provide primary power voltage, the wherein voltage value of the primary power voltage and the third power supply
The voltage value of voltage is identical；
First voltage conversion circuit is electrically connected between the power supply circuit and first power output end, and to
Converting the primary power voltage is first supply voltage；
Second voltage conversion circuit is electrically connected between the power supply circuit and the second source output end, and to
Converting the primary power voltage is the second source voltage；And
Reduction voltage circuit is electrically connected at the reference voltage end of the memory interface circuit and the electricity of the memory management circuitry
Between the input terminal of source.
18. memorizer control circuit unit according to claim 10, which is characterized in that the ginseng of the memory management circuitry
It examines voltage end and is electrically connected to ground terminal,
There is the first potential difference, memory interface electricity between the power input and the ground terminal of the memory interface circuit
Between the power input on road and the reference voltage end of the memory interface circuit have the second potential difference, and this first
Potential difference is greater than second potential difference.
19. a kind of power supply method is suitable for a storage device, to storing data, which is characterized in that the storage device
Including reproducible nonvolatile memorizer module, which includes that multiple entities are erased list
Member, the power supply method include:
There is provided the first supply voltage to the storage device host interface circuit power input；
There is provided second source voltage to the storage device memory management circuitry power input；
There is provided third power supply voltage to the storage device memory interface circuit power input,
Wherein the reference voltage end of the memory interface circuit is electrically connected to the power input of the memory management circuitry,
And the voltage value of first supply voltage, the second source voltage and the third power supply voltage is differing from each other.
20. power supply method according to claim 19, which is characterized in that further include:
The power input of the third power supply voltage to the reproducible nonvolatile memorizer module is provided, and this can make carbon copies
The reference voltage end of formula non-volatile memory module is electrically connected to the power input of the memory management circuitry.
21. power supply method according to claim 19, which is characterized in that this of the memory interface circuit is with reference to electricity
Pressure side is the power input that the memory management circuitry is electrically connected to via voltage conversion circuit.
22. power supply method according to claim 19, which is characterized in that the reference voltage of the memory management circuitry
End is electrically connected to ground terminal,
There is the first potential difference, memory interface electricity between the power input and the ground terminal of the memory interface circuit
Between the power input on road and the reference voltage end of the memory interface circuit have the second potential difference, and this first
Potential difference is greater than second potential difference.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410325028.2A CN105097032B (en) | 2014-05-15 | 2014-07-09 | Memory storage apparatus, memorizer control circuit unit and power supply method |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410205521 | 2014-05-15 | ||
| CN2014102055210 | 2014-05-15 | ||
| CN201410325028.2A CN105097032B (en) | 2014-05-15 | 2014-07-09 | Memory storage apparatus, memorizer control circuit unit and power supply method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105097032A CN105097032A (en) | 2015-11-25 |
| CN105097032B true CN105097032B (en) | 2019-03-19 |
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| US8711631B1 (en) * | 2012-12-07 | 2014-04-29 | Avalanche Technology, Inc. | Management of memory array with magnetic random access memory (MRAM) |
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| US8711631B1 (en) * | 2012-12-07 | 2014-04-29 | Avalanche Technology, Inc. | Management of memory array with magnetic random access memory (MRAM) |
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