CN105096908B - For producing the circuit and related methods of horizontal synchronizing signal in display device - Google Patents
For producing the circuit and related methods of horizontal synchronizing signal in display device Download PDFInfo
- Publication number
- CN105096908B CN105096908B CN201410197972.4A CN201410197972A CN105096908B CN 105096908 B CN105096908 B CN 105096908B CN 201410197972 A CN201410197972 A CN 201410197972A CN 105096908 B CN105096908 B CN 105096908B
- Authority
- CN
- China
- Prior art keywords
- signal
- digital controlled
- comparator
- horizontal synchronization
- synchronization pulse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Abstract
The invention discloses a kind of circuit and method for being used for producing a horizontal synchronizing signal in a display device, the circuit includes：One first comparator, to compare a luminance signal of the aberration terminal from the display device and one first reference signal, with signal after generation one relatively；One control circuit, to produce one first digital controlled signal according to the relatively rear signal；One first digital analog converter, to produce first reference signal according to one first digital controlled signal；One second digital analog converter, produces one second reference signal, wherein second digital controlled signal is determined according to first digital controlled signal to one second digital controlled signal according to caused by the control circuit；And one second comparator, to compare the luminance signal and second reference signal, to produce the horizontal synchronizing signal.The present invention has relatively low chip area and power consumption and faster speed.
Description
Technical field
The present invention relates to display device, more particularly to it is a kind of be used for producing in display device the circuit of horizontal synchronizing signal and
Relevant method.
Background technology
In general display device, when received image is by aberration terminal (Component Video
Connector, that is, Y/Pb/Pr interfaces) transmission come in when, it may be desirable in addition produce horizontal synchronization from luminance signal (Y)
Signal (horizontal synchronous signal), uses for follow-up.
Please refer to Fig.1, Fig. 1 show the schematic diagram of luminance signal Y and the horizontal synchronizing signal Hsync to be produced.Such as
Shown in Fig. 1, luminance signal Y mainly contains horizontal synchronization pulse, leading edge (front porch) section, trailing edge (back
Porch) the online display data (active video data) of nth bar on section and screen, in general, meeting in display
Judge whether luminance signal Y is less than a reference voltage using a comparator, to judge whether just to receive horizontal synchronization pulse,
And horizontal synchronizing signal Hsync is produced according to this.
However, please referring to Fig.2, Fig. 2 show the waveform diagram of the horizontal synchronization pulse in luminance signal Y.Due to bright
Spending signal Y can be unstable during transmission, therefore the maximum voltage value Vmax of the horizontal synchronization pulse illustrated and minimum electricity
Pressure value Vmin may change, and therefore, comparator is used for producing reference voltage used in horizontal synchronizing signal Hsync
Vref has to change with the variation of the maximum voltage value Vmax and minimum amount of voltage that Vmin of horizontal synchronization pulse.It is existing
Digital signal can be converted to through an analog-to-digital conversion circuit by luminance signal Y in technology and then obtain horizontal synchronization by having
The maximum voltage value Vmax and minimum amount of voltage that Vmin of pulse, determine reference voltage Vref used in comparator again afterwards,
However, this mode can significantly consume chip area and power consumption.
The content of the invention
Therefore, it is an object of the present invention to provide a kind of circuit for being used for producing horizontal synchronizing signal in display device
And its method, it need not particularly be produced with relatively low chip area and power consumption using to analog-to-digital conversion circuit
Horizontal synchronizing signal, to solve the problems, such as in known technology.
According to one embodiment of the invention, a kind of circuit for being used for producing a horizontal synchronizing signal in a display device includes
One first comparator, a control circuit, one first digital analog converter, one second digital analog converter and one second ratio
Compared with device, the wherein first comparator is joined to compare a luminance signal of the aberration terminal from the display device with one first
Signal is examined, with signal after generation one relatively；The control circuit is coupled to the first comparator, and to according to the relatively rear signal
To produce one first digital controlled signal；First digital analog converter is coupled to the control circuit and this first compares
Device, and to produce first reference signal to the first comparator according to one first digital controlled signal；Second number
Word analog converter is coupled to the control circuit, and to according to caused by the control circuit one second digital controlled signal come
Produce one second reference signal；And second comparator is coupled to second digital analog converter, and it is bright to compare this
Signal and second reference signal are spent, to produce the horizontal synchronizing signal；Wherein the control circuit according to this relatively after signal with
First digital controlled signal caused by continuous updating, so that first reference signal approaches the luminance signal, the control
Circuit and first digital controlled signal when approaching the luminance signal according to first reference signal produce second numeral
Control signal.
According to another embodiment of the present invention, a kind of method for being used for producing a horizontal synchronizing signal in a display device includes
Have：Compare a luminance signal and one first reference signal for the aberration terminal from the display device, after producing one relatively
Signal；One first digital controlled signal is produced according to the relatively rear signal；Produced according to one first digital controlled signal
First reference signal is to the first comparator；According to this relatively after signal with continuous updating first digital controlled signal, with
So that first reference signal approaches the luminance signal, and when approaching the luminance signal according to first reference signal this first
Digital controlled signal produces one second digital controlled signal；One second is produced with reference to letter according to second digital controlled signal
Number, wherein second digital controlled signal is determined according to first digital controlled signal；And compare the luminance signal with being somebody's turn to do
Second reference signal, to produce the horizontal synchronizing signal.
Brief description of the drawings
Fig. 1 show the schematic diagram of luminance signal and the horizontal synchronizing signal to be produced.
Fig. 2 show the waveform diagram of the horizontal synchronization pulse in luminance signal.
Fig. 3 be according to one embodiment of the invention be used for produce showing for the circuit of a horizontal synchronizing signal in a display device
It is intended to.
Fig. 4 is switching signal and the graph of a relation of luminance signal in time.
Fig. 5 is a kind of method for producing a horizontal synchronizing signal in a display device according to one embodiment of the invention
Flow chart.
Wherein, the reference numerals are as follows：
300 circuits
302nd, 304,306 buffer
310th, 320 current type digital analog converter
330th, 350 comparator
340 control circuits
362nd, 364 delay circuit
C1, C2 capacitance
I1, I2, I3 current source
M1, M2, M3, M4, M5, M6 transistor
R, R1, R2 resistance
SW1, SW2 are switched
Embodiment
Some vocabulary has been used among specification and claims to censure specific component.Those skilled in the art
Member is, it is to be appreciated that hardware manufacturer may call same component with different nouns.This specification and follow-up right
It is required that not in a manner of the difference of title is used as and distinguishes component, but differentiation is used as with the difference of component functionally
Criterion.It is an open term in the "comprising" of specification in the whole text and follow-up claim mentioned in, therefore should explains
Into " including but not limited to ".In addition, " coupling " word includes any direct and indirect electrical connection herein, therefore,
If one first device of described in the text is coupled to a second device, second dress can be directly electrically connected in by representing the first device
Put, or be electrically connected indirectly to the second device through other devices or connection means.
Please refer to Fig.3, Fig. 3 be according to one embodiment of the invention be used for produce a horizontal synchronizing signal in a display device
The schematic diagram of the circuit 300 of Hsync.As shown in figure 3, circuit 300 includes three 302,304,306, two number type matrixes of buffer
Intend converter (in the present embodiment, being realized with current type digital analog converter 310,320), two comparators 330,350, one
340, two delay circuits 362 of control circuit, 364, three current source I1, I2, I3, two switch SW1, SW2, two resistance R,
Two wave filters (being made of respectively resistance R1 and capacitance C1 and resistance R2 and capacitance C2), wherein buffer 302 includes two
A transistor M1, M2, buffer 304 include two transistors M3, M4 and buffer 306 includes two transistors M5, M6,
The grid of wherein transistor M2, M4, M6 is connected to a bias Vb.In this present embodiment, circuit 300 is arranged at the display device
In, and for receiving a luminance signal Y (analog signal) of the aberration terminal from the display device, to produce horizontal synchronization
Signal Hsync.
Circuit in Fig. 3 buffers 302,304,306 illustrates only as example, in the other embodiment of the present invention,
Buffer 302,304,306 can be realized using other circuit frameworks.In addition, current type digital analog converter 310,
320 can be the circuit structure replicated, it can have identical circuit layout, therefore, in the situation of identical numeral input
Under, current type digital analog converter 310,320 can have identical simulation output.
In the present embodiment, with reference to figure 2, since the maximum voltage value Vmax of horizontal synchronization pulse is about 0.4V, and most
Small voltage value Vmin is about 0.1V, and therefore, current type digital analog converter 310,320 in design can be using 6
Input, and the voltage level (V1 shown in Fig. 3) caused by the electric current produced, about between 0~640mV, but this is only that example is said
It is bright, and it is not the limitation of the present invention.
In the operation of circuit 300, first, the waveform diagram of shown horizontal synchronization pulse, circuit are please referred to Fig.2
300 can first determine the digital value that is arrived corresponding to the maximum voltage value Vmax and minimum amount of voltage that Vmin of horizontal synchronization pulse, it
After maximum voltage value Vmax and minimum amount of voltage that Vmin is averaged again afterwards, to produce one second reference voltage level Vref2 (also
That is, Vref2=(Vmax+Vmin)/2).
To comparator 350 to produce horizontal synchronizing signal Hsync, the second reference voltage level Vref2 wherein shown in Fig. 3 is
Correspond to the Vref shown in Fig. 2.
The operation of circuit 300 is described in detail, first, during first horizontal synchronization pulse shown in Fig. 1 (during this
Can be learnt by the internal circuit of display device), switch SW1, SW2 can open (switch SW1, SW2's operates in subsequent detailed), control
Circuit 340 processed can produce one first digital controlled signal DC1To current type digital analog converter 310, so that the voltage of icon
The value of V1 is 0.1V, and voltage V1 is by becoming the first reference voltage Vref 1 after buffer 304, and via switch SW2, resistance R2
Comparator 330 is transmitted to capacitance C2；Meanwhile after luminance signal Y is by buffer 302, then via switch SW1, resistance R1 with
Capacitance C1 is transmitted to comparator 330.Then, comparator 330 compares luminance signal Y and the first reference voltage Vref 1 after buffering,
To obtain signal after a comparison.In the present embodiment, when this relatively after signal designation buffering after luminance signal Y be more than first ginseng
When examining voltage Vref1 (that is, luminance signal Y is more than voltage V1), control circuit 340 can update the first digital controlled signal DC1With
Increase voltage V1 (that is, first reference voltage Vref 1 of increase)；Conversely, when this relatively after signal designation luminance signal Y be less than the
During one reference voltage Vref 1, control circuit 340 can update the first digital controlled signal DC1(that is, the is reduced to reduce voltage V1
One reference voltage Vref 1).As described above, control circuit 340 can according to this relatively after signal repeatedly to update first digital control
Signal DC1, so that the first reference voltage Vref 1 approaches the luminance signal Y after buffering, (that is, voltage V1 approaches luminance signal
Y), and when the output of comparator 330 repeatedly switches between 0,1, then the operation of comparator 330 is stopped, and record at this time
The first digital controlled signal DC1, the first digital controlled signal D for being recorded at this timeC1The level as corresponded to shown in Fig. 2 is same
The digital value of the minimum amount of voltage that Vmin of pace pulse.Wherein the first reference voltage Vref 1 or voltage V1 are approached bright (after buffering)
(after buffering) luminance signal Y is equal in degree signal Y that is, the first reference voltage Vref 1 or voltage V1 its real value.
Then, (can be by display device during this during the trailing edge after first horizontal synchronization pulse shown in Fig. 1
Internal circuit is learnt), switch SW1, SW2 can open (switch SW1, SW2's operates in subsequent detailed), and control circuit 340 can produce
Raw first digital controlled signal DC1To current type digital analog converter 310, so that the value of the voltage V1 of icon is 0.4V, electricity
Pressure V1 is transmitted to ratio by becoming the first reference voltage Vref 1 after buffer 304, and via switch SW2, resistance R2 and capacitance C2
Compared with device 330；Meanwhile after luminance signal Y is by buffer 302, then compared with being transmitted to via switch SW1, resistance R1 with capacitance C1
Device 330.Then, comparator 330 compares the luminance signal Y after buffering and the first reference voltage Vref 1, to believe after obtaining one
Number.In the present embodiment, when the luminance signal Y after the relatively rear signal designation buffering is more than the first reference voltage Vref 1 (also
I.e. luminance signal Y is more than voltage V1), control circuit 340 can update the first digital controlled signal DC1With increase voltage V1 (that is, increase
Add the first reference voltage Vref 1)；Conversely, when the relatively rear signal designation luminance signal Y is less than the first reference voltage Vref 1,
Control circuit 340 can update the first digital controlled signal DC1To reduce voltage V1 (that is, reducing the first reference voltage Vref 1).Such as
Upper described, control circuit 340 can be according to relatively the first digital controlled signal of the renewal D of rear signal repeatedlyC1, so that the first ginseng
Examine voltage Vref1 and approach the luminance signal Y (that is, voltage V1 approaches luminance signal Y) after buffering, and work as the defeated of comparator 330
Go out when repeatedly switching between 0,1, then stop the operation of comparator 330, and record the first digital controlled signal D at this timeC1,
The the first digital controlled signal D recorded at this timeC1As correspond to the maximum voltage value Vmax of the horizontal synchronization pulse shown in Fig. 2
Digital value.Wherein the first reference voltage Vref 1 or voltage V1 approach (after buffering) luminance signal Y that is, the first reference voltage
(after buffering) luminance signal Y is equal in Vref1 or voltage V1 its real value.
Learning arrived corresponding to the minimum amount of voltage that Vmin and maximum voltage value Vmax of horizontal synchronization pulse two first
Digital controlled signal DC1Afterwards, control circuit 340 can produce one second digital controlled signal D according to thisC2To current type digital simulation
Converter 320, wherein the second digital controlled signal DC2For two the first digital controlled signal DC1Average value, that is, current type
Digital analog converter 320 is receiving the second digital controlled signal DC2Caused electric current can cause the voltage V2 of icon afterwards
Average (that is, V2=(Vmax+Vmin)/2) equal to minimum amount of voltage that Vmin and maximum voltage value Vmax).
Then, during second horizontal synchronization pulse shown in Fig. 1, voltage V2 is by becoming the after buffer 306
Two reference voltage Vrefs 2, and comparator 350 can compare the luminance signal Y after buffering and the second reference voltage Vref 2 to produce
Horizontal synchronizing signal Hsync.
It is noted that above-mentioned generation corresponds to the minimum amount of voltage that Vmin and maximum voltage value Vmax of horizontal synchronization pulse
Two the first digital controlled signal DC1And the second digital controlled signal DC2Be it is lasting carrying out, that is, nth bar line
During horizontal synchronization pulse with during trailing edge, the second digital controlled signal D produced by control circuit 340C2It is to exist for comparator 350
Corresponding horizontal synchronizing signal Hsync is produced during the horizontal synchronization pulse of (n+1) bar line；The level of (n+1) bar line is same
During pace pulse with during trailing edge, the second digital controlled signal D produced by control circuit 340C2It is in (n+ for comparator 350
2) corresponding horizontal synchronizing signal Hsync ... is produced during the horizontal synchronization pulse of bar line.
In addition, in the present embodiment, comparator 330 is an asynchronous comparator (asynchronous comparator), also
The actions of data need not be carried out according to fixed frequency signal after i.e. comparator 330 produces relatively.In addition, delay circuit
360 retardation design allow for the first reference voltage Vref 1 renewal when time delay (that is, control circuit 340,
Delay caused by current type digital analog converter 310, buffer 304, resistance R2 and capacitance C2), to control comparator 330
Operation is proceeded by again after the renewal of the first reference voltage Vref 1.
In addition, please also refer to the delay circuit 364 and switch SW1, SW2 shown in Fig. 4 and Fig. 3, Fig. 4 is switching signal
VSW1、VSW2With the graphs of a relation of luminance signal Y in time.With reference to figure 3, Fig. 4, switching signal VSW1By delay circuit 364 by level
Produced by synchronizing signal Hsync postpones a special time amount, the purpose is to make levels of switch SW1, the SW2 in luminance signal Y same
The bottom of pace pulse is just opened, so that comparator 330, control circuit 340, current type digital analog converter 310 start to obtain
Correspond to the first digital controlled signal D of minimum amount of voltage that VminC1.In addition, switching signal VSW2As produced by control circuit 340,
It can be opened during the trailing edge of luminance signal Y, for comparator 330, control circuit 340, current type digital analog converter
310 start to obtain the first digital controlled signal D for corresponding to maximum voltage value VmaxC1。
Fig. 5 is refer to, Fig. 5 is that one kind of foundation one embodiment of the invention is used for producing a horizontal synchronization in a display device
The flow chart of the method for signal.It is as described below with reference to above-mentioned Fig. 1~Fig. 3 and related disclosure, the flow of Fig. 5：
Step 500：Compare a luminance signal and one first reference signal for the aberration terminal from the display device, with
Signal after producing one relatively；
Step 502：One first digital controlled signal is produced according to the relatively rear signal；
Step 504：First reference signal is produced to a first comparator according to one first digital controlled signal；
Step 506：According to the relatively rear signal with continuous updating first digital controlled signal, so that first reference
The Signal approximation luminance signal, and first digital controlled signal when approaching according to first reference signal luminance signal come
Produce one second digital controlled signal；
Step 508：One second reference signal is produced according to second digital controlled signal, wherein this is second digital control
Signal is determined according to first digital controlled signal；And
Step 510：Compare the luminance signal and second reference signal, to produce the horizontal synchronizing signal.
The brief summary present invention, in the circuit and its method that are used for producing horizontal synchronizing signal in display device of the present invention
In, it is only necessary to through digital analog converter come find out the maximum voltage value Vmax of the horizontal synchronization pulse in luminance signal with most
Small voltage value Vmin, and the second reference voltage Vref 2 is produced according to this so that comparator 350 produces horizontal synchronizing signal Hsync.By
Need not be used in the circuit of the present invention and arrive analog-to-digital conversion circuit, thus with relatively low chip area with power consumption and compared with
Fast speed.
The foregoing is merely presently preferred embodiments of the present invention, all equivalent changes done according to the claims in the present invention are with repairing
Decorations, should all belong to the covering scope of the present invention.
Claims (13)
1. a kind of circuit for being used for producing a horizontal synchronizing signal in a display device, includes：
One first comparator, to compare a luminance signal of the aberration terminal from the display device with one first with reference to letter
Number, with signal after generation one relatively；
One control circuit, is coupled to the first comparator, to produce one first digital control letter according to the relatively rear signal
Number；
One first digital analog converter, is coupled to the control circuit and the first comparator, to according to one first number
Word control signal produces first reference signal to the first comparator；
One second digital analog converter, is coupled to the control circuit, to one second number according to caused by the control circuit
Word control signal produces one second reference signal；And
One second comparator, is coupled to second digital analog converter, believes to compare the luminance signal with second reference
Number, to produce the horizontal synchronizing signal；
The wherein control circuit first digital controlled signal according to caused by the relatively rear signal with continuous updating, so that
The luminance signal is equal in the first reference signal real value, and is believed according to the brightness is equal in the first reference signal real value
Number when first digital controlled signal produce second digital controlled signal.
2. circuit as claimed in claim 1, wherein the different time points in the luminance signal, the control circuit is according to the ratio
Compared with signal to determine two the first digital controlled signals respectively, wherein the two first digital controlled signals correspond to this respectively
One maximum voltage value of the horizontal synchronization pulse in luminance signal and a minimum amount of voltage that；The control circuit and according to the two
First digital controlled signal is to determine second digital controlled signal.
3. circuit as claimed in claim 2, wherein a bottom period of the horizontal synchronization pulse in the luminance signal, should
Control circuit is digital to determine to correspond to the first of the minimum amount of voltage that of the horizontal synchronization pulse according to the relatively rear signal
Control signal；And the trailing edge period in the luminance signal, the control circuit according to this relatively after signal to determine pair
The first digital controlled signal of the maximum voltage value of the horizontal synchronization pulse should be arrived.
4. circuit as claimed in claim 3, wherein the bottom period of the horizontal synchronization pulse in the luminance signal, should
Control circuit first digital controlled signal according to caused by repeatedly updating the relatively rear signal, until the comparison signal refers to
Show untill being equal to the luminance signal in the first reference voltage real value, the first numeral control caused by the control circuit at this time
First digital controlled signal of the signal processed as the minimum amount of voltage that for corresponding to the horizontal synchronization pulse；And believe in the brightness
The trailing edge period on number, the control circuit first digital control letter according to caused by repeatedly updating the relatively rear signal
Number, untill the comparison signal indicates to be equal to the luminance signal in the first reference voltage real value, the control circuit at this time
First numeral control of caused first digital controlled signal as the maximum voltage value for corresponding to the horizontal synchronization pulse
Signal processed.
5. circuit as claimed in claim 4, wherein the bottom period of the horizontal synchronization pulse in the luminance signal, should
Control circuit according to this relatively after signal repeatedly update caused by first digital controlled signal, until when this first compares
Untill the output of device switches between logical value " 0 ", " 1 ", the first comparator stops operation at this time, and records the control at this time
First digital controlled signal caused by circuit processed, to be used as the of the minimum amount of voltage that for corresponding to the horizontal synchronization pulse
One digital controlled signal；And the trailing edge period in the luminance signal, the control circuit according to this relatively after signal repeatedly
First digital controlled signal caused by ground renewal, until when the output of the first comparator is between logical value " 0 ", " 1 "
Untill switching, the first comparator stops operation at this time, and records the first numeral control caused by the control circuit at this time
Signal processed, using the first digital controlled signal as the maximum voltage value for corresponding to the horizontal synchronization pulse.
6. circuit as claimed in claim 1, has additionally comprised：
One first switch, is coupled to the first comparator, optionally to allow the first comparator according to a switching signal
Receive the luminance signal；
One second switch, is coupled to the first comparator and first digital analog converter, to according to the switching signal with
The first comparator is optionally allowed to receive first reference signal；And
One delay circuit, is coupled to second comparator, first switch and the second switch, to postpone the second comparator institute
The horizontal synchronizing signal of output is to produce the switching signal to the first switch and the second switch.
7. circuit as claimed in claim 1, the wherein first comparator are an asynchronous comparator.
8. a kind of method for producing a horizontal synchronizing signal in a display device, includes：
Compare a luminance signal and one first reference signal for the aberration terminal from the display device, after producing one relatively
Signal；
One first digital controlled signal is produced according to the relatively rear signal；
First reference signal is produced to a first comparator according to one first digital controlled signal；
According to this relatively after signal with continuous updating first digital controlled signal so as to approach this bright for first reference signal
First digital controlled signal when spending signal, and approaching the luminance signal according to first reference signal counts to produce one second
Word control signal；
One second reference signal is produced according to one second digital controlled signal；And
Compare the luminance signal and second reference signal, to produce the horizontal synchronizing signal.
9. method as claimed in claim 8, has additionally comprised：
Different time points wherein in the luminance signal, according to the comparison signal with determine respectively two it is first digital control
Signal, wherein the two first digital controlled signals correspond to a maximum of the horizontal synchronization pulse in the luminance signal respectively
Magnitude of voltage and a minimum amount of voltage that；And
According to the two first digital controlled signals to determine second digital controlled signal.
10. method as claimed in claim 9, wherein the step of determining two the first digital controlled signals includes：
The one bottom period of the horizontal synchronization pulse in the luminance signal, according to the comparison signal to determine to correspond to this
First digital controlled signal of the minimum amount of voltage that of horizontal synchronization pulse；And
A trailing edge period in the luminance signal, should with determine to correspond to the horizontal synchronization pulse according to the comparison signal
First digital controlled signal of maximum voltage value.
11. method as claimed in claim 10, wherein determining to correspond to the minimum amount of voltage that of the horizontal synchronization pulse
The step of first digital controlled signal, includes：
The bottom period of the horizontal synchronization pulse in the luminance signal, repeatedly updates according to the relatively rear signal and is produced
Raw first digital controlled signal, untill the comparison signal indicates that first reference voltage approaches the luminance signal, this
When come produce first digital controlled signal of first reference signal as correspond to the horizontal synchronization pulse the minimum electricity
First digital controlled signal of pressure value；And
Determine to include the step of corresponding to the first digital controlled signal of the maximum voltage value of the horizontal synchronization pulse：
The trailing edge period in the luminance signal, the first numeral control according to caused by repeatedly updating the relatively rear signal
Signal processed, untill the comparison signal indicates that first reference voltage approaches the luminance signal, at this time come produce this first ginseng
Examine first numeral control of first digital controlled signal as the maximum voltage value for corresponding to the horizontal synchronization pulse of signal
Signal processed.
12. method as claimed in claim 11, wherein determining to correspond to the minimum amount of voltage that of the horizontal synchronization pulse
The step of first digital controlled signal, includes：
The bottom period of the horizontal synchronization pulse in the luminance signal, repeatedly updates according to the relatively rear signal and is produced
Raw first digital controlled signal, untill the relatively rear signal switches between logical value " 0 ", " 1 ", and records at this time
The control circuit caused by first digital controlled signal, to be used as the minimum voltage for corresponding to the horizontal synchronization pulse
First digital controlled signal of value；And
Determine to include the step of corresponding to the first digital controlled signal of the maximum voltage value of the horizontal synchronization pulse：
The trailing edge period in the luminance signal, the first numeral control according to caused by repeatedly updating the relatively rear signal
Signal processed, untill the relatively rear signal switches between logical value " 0 ", " 1 ", and the control circuit recorded at this time is produced
Raw first digital controlled signal, to be used as the first digital control of the maximum voltage value for corresponding to the horizontal synchronization pulse
Signal.
13. method as claimed in claim 8, wherein compare the luminance signal of the aberration terminal from the display device with
The step of first reference signal, is carried out by the first comparator, and this method has additionally comprised：
A first switch is provided optionally to allow the first comparator to receive the luminance signal according to a switching signal；
A second switch is provided to believe according to the switching signal optionally to allow the first comparator to receive first reference
Number；And
Postpone the horizontal synchronizing signal to produce the switching signal to the first switch and the second switch.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410197972.4A CN105096908B (en) | 2014-05-12 | 2014-05-12 | For producing the circuit and related methods of horizontal synchronizing signal in display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410197972.4A CN105096908B (en) | 2014-05-12 | 2014-05-12 | For producing the circuit and related methods of horizontal synchronizing signal in display device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105096908A CN105096908A (en) | 2015-11-25 |
| CN105096908B true CN105096908B (en) | 2018-05-08 |
Family
ID=54577200
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410197972.4A Active CN105096908B (en) | 2014-05-12 | 2014-05-12 | For producing the circuit and related methods of horizontal synchronizing signal in display device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105096908B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108632499B (en) * | 2017-03-15 | 2020-12-11 | 深圳开阳电子股份有限公司 | Image signal processor and time sequence generating device thereof |
| CN109348201B (en) * | 2018-12-20 | 2021-01-22 | 歌尔光学科技有限公司 | Projector, method for generating line synchronization signal of projector, and computer-readable storage medium |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE4335197A1 (en) * | 1993-10-15 | 1995-04-20 | Thomson Brandt Gmbh | Synchronous signal separation circuit for a television receiver |
| CN1585493A (en) * | 2003-08-20 | 2005-02-23 | 台达电子工业股份有限公司 | Displaying method for color difference component visual signal and displaying device for supporting multiple sequential color difference component |
| US7408592B2 (en) * | 2004-06-02 | 2008-08-05 | Mstar Semiconductor, Inc. | Method and device for dynamically adjusting sync-on-green (SOG) signal of video signal |
| CN101415070B (en) * | 2007-10-16 | 2010-10-27 | 瑞昱半导体股份有限公司 | Acquisition device for synchronization signal |
| CN101237521B (en) * | 2008-01-31 | 2011-02-02 | 华为技术有限公司 | An extraction device and method for synchronous clock |
| CN103188421A (en) * | 2011-12-27 | 2013-07-03 | 龙迅半导体科技(合肥)有限公司 | Synchronization signal detection and extraction device for composite video stream |
-
2014
- 2014-05-12 CN CN201410197972.4A patent/CN105096908B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN105096908A (en) | 2015-11-25 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10269290B2 (en) | Shift register units and driving methods thereof, gate driving circuits and display devices with transistors having extended lifetime | |
| CN105321479B (en) | Source electrode driver, display driver circuit and display device | |
| WO2019174061A1 (en) | Array substrate row driving unit, circuit and liquid crystal display panel | |
| US11250806B2 (en) | Common voltage regulating circuit and method, display driving circuit and display device avoiding power-on afterimage | |
| US11249586B2 (en) | Voltage-supply circuit, method, and touch-control display apparatus | |
| CN105096908B (en) | For producing the circuit and related methods of horizontal synchronizing signal in display device | |
| CN106652954B (en) | Data drive circuit, its driving method, source driving chip and display device | |
| CN104050940A (en) | pixel circuit of liquid crystal display and control method thereof | |
| CN104038219A (en) | Apparatus and method for reducing sampling circuit timing mismatch | |
| TW201610953A (en) | Dynamically adjusting display driving method and display apparatus using the same | |
| CN201178465Y (en) | General fast port switching detection apparatus | |
| CN107968656A (en) | A kind of successive approximation simulates digital quantizer and its using switching method | |
| KR20200015132A (en) | Display driver and output buffer | |
| CN103345905B (en) | Method of Operating an Electrophoretic Display | |
| TWI542211B (en) | Circuit for generating horizontal synchronous signal of display and associated method | |
| CN201557088U (en) | Pulse output circuit with high driving capability | |
| CN104426524A (en) | Output circuit, method for detecting whether connecting port is connected to load or not and image output circuit | |
| CN101197125B (en) | Level shift circuit and display using same | |
| CN106973007A (en) | A kind of instant messaging application management method and system | |
| CN106160725A (en) | Whether output circuit is connected to the method for the connectivity port corresponding to output circuit with detecting load | |
| CN101751844B (en) | Method for driving a display and related display apparatus | |
| CN100403389C (en) | Latch, latch drive method, and flat display device | |
| CN207232955U (en) | Audio and video calling device and electronic equipment | |
| US20140258750A1 (en) | Control system and method for server | |
| CN203520062U (en) | Projector control system for multimedia electric classroom |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |