CN105096908A - Circuit and related method for generating horizontal synchronizing signal in display equipment - Google Patents
Circuit and related method for generating horizontal synchronizing signal in display equipment Download PDFInfo
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- CN105096908A CN105096908A CN201410197972.4A CN201410197972A CN105096908A CN 105096908 A CN105096908 A CN 105096908A CN 201410197972 A CN201410197972 A CN 201410197972A CN 105096908 A CN105096908 A CN 105096908A
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Abstract
The invention discloses a circuit and a related method for generating a horizontal synchronizing signal in display equipment. The circuit comprises a first comparator used for comparing a brightness signal of a component video connector of the display equipment and a first reference signal to generate a comparison signal; a control circuit used for generating a first digital control signal according to the comparison signal; a first digital analog converter used for generating the first reference signal according to the first digital control signal; a second digital analog converter used for generating a second reference signal according to a second digital control signal generated by the control circuit, wherein, the second digital control signal is determined according to the first digital control signal; and a second comparator used for comparing the brightness signal and the second reference signal to generate the horizontal synchronizing signal. The circuit with a relatively low chip area achieves low power consumption and a relatively high speed.
Description
Technical field
The present invention relates to display device, particularly relate to a kind of circuit and related methods being used for producing horizontal-drive signal in display device.
Background technology
In general display device, when received image is by aberration terminal (ComponentVideoConnector, that is Y/Pb/Pr interface) transmission come in time, can need to produce horizontal-drive signal (horizontalsynchronoussignal) in addition, for follow-up use from luminance signal (Y).
Please refer to Fig. 1, Figure 1 shows that brightness signal Y and the schematic diagram of horizontal-drive signal Hsync that will produce.As shown in Figure 1, brightness signal Y mainly contains horizontal synchronization pulse, leading edge (frontporch) is interval, trailing edge (backporch) interval and n-th online display data (activevideodata) on screen, in general, a comparer can be used in display to judge that whether brightness signal Y is lower than a reference voltage, to judge whether just to receive horizontal synchronization pulse, and produce horizontal-drive signal Hsync according to this.
But, please refer to Fig. 2, Figure 2 shows that the waveform schematic diagram of the horizontal synchronization pulse in brightness signal Y.Because brightness signal Y can be unstable in the process of transmission, therefore the maximum voltage value Vmax of illustrated horizontal synchronization pulse and minimum amount of voltage that Vmin may change to some extent, therefore, comparer is used for producing the reference voltage Vref that uses of horizontal-drive signal Hsync and must changes along with the variation of the maximum voltage value Vmax of horizontal synchronization pulse and minimum amount of voltage that Vmin.After brightness signal Y being converted to digital signal through an analog-to-digital conversion circuit in prior art, obtain maximum voltage value Vmax and the minimum amount of voltage that Vmin of horizontal synchronization pulse again, determine the reference voltage Vref that comparer uses afterwards again, but this mode can significantly consume chip area and power consumption.
Summary of the invention
Therefore, an object of the present invention is to provide a kind of circuit and the method thereof that are used for producing horizontal-drive signal in display device, it has lower chip area and power consumption, particularly do not need to use analog-to-digital conversion circuit to produce horizontal-drive signal, to solve the problem in known technology.
According to one embodiment of the invention, a kind ofly be used for the circuit of a horizontal-drive signal in generation one display device and include one first comparer, a control circuit, one first digital analog converter, one second digital analog converter and one second comparer, wherein this first comparer is in order to compare a luminance signal from an aberration terminal of this display device and one first reference signal, with produce one relatively after signal; This control circuit is coupled to this first comparer, and in order to produce one first digital controlled signal according to this relatively rear signal; This first digital analog converter is coupled to this control circuit and this first comparer, and in order to produce this first reference signal to this first comparer according to this one first digital controlled signal; This second digital analog converter is coupled to this control circuit, and produces one second reference signal in order to one second digital controlled signal produced according to this control circuit; And this second comparer is coupled to this second digital analog converter, and in order to compare this luminance signal and this second reference signal, to produce this horizontal-drive signal; Wherein this control circuit according to this relatively after this first digital controlled signal of producing with continuous updating of signal, to make this first reference signal approach this luminance signal, this control circuit this first digital controlled signal when approaching this luminance signal according to this first reference signal produces this second digital controlled signal.
According to another embodiment of the present invention, be a kind ofly used for the method for a horizontal-drive signal in generation one display device and include: compare the luminance signal from an aberration terminal of this display device and one first reference signal, to produce a signal relatively afterwards; One first digital controlled signal is produced according to this relatively rear signal; This first reference signal is produced to this first comparer according to this one first digital controlled signal; According to this relatively rear signal with this first digital controlled signal of continuous updating, to make this first reference signal approach this luminance signal, and this first digital controlled signal when approaching this luminance signal according to this first reference signal produces one second digital controlled signal; Produce one second reference signal according to this second digital controlled signal, wherein this second digital controlled signal decides according to this first digital controlled signal; And compare this luminance signal and this second reference signal, to produce this horizontal-drive signal.
Accompanying drawing explanation
Figure 1 shows that luminance signal and the schematic diagram of horizontal-drive signal that will produce.
Figure 2 shows that the waveform schematic diagram of the horizontal synchronization pulse in luminance signal.
Fig. 3 is the schematic diagram being used for the circuit of a horizontal-drive signal in generation one display device according to one embodiment of the invention.
Fig. 4 is switching signal and luminance signal graph of a relation in time.
Fig. 5 is used for the process flow diagram of the method for a horizontal-drive signal in generation one display device according to one embodiment of the invention a kind of.
Wherein, description of reference numerals is as follows:
300 circuit
302,304,306 impact dampers
310,320 current type digital analog converters
330,350 comparers
340 control circuits
362,364 delay circuits
C1, C2 electric capacity
I1, I2, I3 current source
M1, M2, M3, M4, M5, M6 transistor
R, R1, R2 resistance
SW1, SW2 switch
Embodiment
Some vocabulary is employed to censure specific assembly in the middle of instructions and claims.Those skilled in the art should understand, and hardware manufacturer may call same assembly with different nouns.This instructions and follow-up claim are not used as with the difference of title the mode distinguishing assembly, but are used as the criterion of differentiation with assembly difference functionally." comprising " mentioned in the middle of instructions and follow-up claim is in the whole text an open term, therefore should be construed to " comprise but be not limited to ".In addition, " couple " word comprise directly any at this and be indirectly electrically connected means, therefore, if describe a first device in literary composition to be coupled to one second device, then represent this first device and directly can be electrically connected in this second device, or be indirectly electrically connected to this second device through other devices or connection means.
Please refer to Fig. 3, Fig. 3 is the schematic diagram being used for the circuit 300 of a horizontal-drive signal Hsync in generation one display device according to one embodiment of the invention.As shown in Figure 3, circuit 300 comprises three impact dampers 302, 304, 306, two digital analog converters (in the present embodiment, with current type digital analog converter 310, 320 realize), two comparers 330, 350, one control circuit 340, two delay circuits 362, 364, three current source I1, I2, I3, two interrupteur SW 1, SW2, two resistance R, two wave filters are (respectively by resistance R1 and electric capacity C1, and resistance R2 and electric capacity C2 formed), wherein impact damper 302 comprises two transistor M1, M2, impact damper 304 comprises two transistor M3, M4, and impact damper 306 comprises two transistor M5, M6, wherein transistor M2, M4, the grid of M6 is connected to a bias voltage Vb.In the present embodiment, circuit 300 is arranged in this display device, and is used for receiving the brightness signal Y (simulating signal) from an aberration terminal of this display device, to produce horizontal-drive signal Hsync.
Circuit in Fig. 3 impact damper 302,304,306 is only illustrate as example, and in other embodiments of the present invention, impact damper 302,304,306 can use other circuit framework to realize.In addition, current type digital analog converter 310,320 can for the circuit structure copied, and it can have identical circuit layout, and therefore, when identical numeral inputs, current type digital analog converter 310,320 can have identical modulating output.
In the present embodiment, with reference to figure 2, maximum voltage value Vmax due to horizontal synchronization pulse is approximately 0.4V, and minimum amount of voltage that Vmin is approximately 0.1V, therefore, current type digital analog converter 310,320 can adopt the input of 6 in design, and the voltage level (V1 shown in Fig. 3) that the electric current produced causes is between 0 ~ 640mV, but this is only example and illustrates, and is not restriction of the present invention.
In the operation of circuit 300, first, please refer to the waveform schematic diagram of the horizontal synchronization pulse shown in Fig. 2, circuit 300 first can determine the digital value arrived corresponding to the maximum voltage value Vmax of horizontal synchronization pulse and minimum amount of voltage that Vmin, after again maximum voltage value Vmax and minimum amount of voltage that Vmin is average afterwards, to produce one second reference voltage level Vref2 (that is, Vref2=(Vmax+Vmin)/2).
To comparer 350 to produce horizontal-drive signal Hsync, namely the second reference voltage level Vref2 wherein shown in Fig. 3 corresponds to the Vref shown in Fig. 2.
Describe the operation of circuit 300 in detail, first, (can be learnt by the internal circuit of display device during this) during the horizontal synchronization pulse of first shown in Fig. 1, interrupteur SW 1, SW2 can open (interrupteur SW 1, SW2 operate in subsequent detailed), and control circuit 340 can produce one first digital controlled signal D
c1to current type digital analog converter 310, to make the value of the voltage V1 of icon for 0.1V, voltage V1 by becoming the first reference voltage Vref 1 after impact damper 304, and is sent to comparer 330 via interrupteur SW 2, resistance R2 and electric capacity C2; Meanwhile, brightness signal Y by after impact damper 302, then is sent to comparer 330 via interrupteur SW 1, resistance R1 and electric capacity C1.Then, comparer 330 compares the brightness signal Y after buffering and the first reference voltage Vref 1, to obtain a relatively rear signal.In the present embodiment, when the brightness signal Y after this relatively rear signal designation buffering is greater than the first reference voltage Vref 1 (that is brightness signal Y is greater than voltage V1), control circuit 340 can upgrade the first digital controlled signal D
c1to increase voltage V1 (that is increasing by the first reference voltage Vref 1); Otherwise when this relatively rear signal designation brightness signal Y is less than the first reference voltage Vref 1, control circuit 340 can upgrade the first digital controlled signal D
c1to reduce voltage V1 (that is reducing the first reference voltage Vref 1).As mentioned above, control circuit 340 can upgrade the first digital controlled signal D repeatedly according to this relatively rear signal
c1to make the first reference voltage Vref 1 approach the brightness signal Y after buffering (that is voltage V1 approaches brightness signal Y), and when the output of comparer 330 switches repeatedly between 0,1, then stop the operation of comparer 330, and record the first digital controlled signal D now
c1, the first now recorded digital controlled signal D
c1be the digital value of the minimum amount of voltage that Vmin corresponding to the horizontal synchronization pulse shown in Fig. 2.Wherein the first reference voltage Vref 1 or voltage V1 approach (after buffering) brightness signal Y that is the first reference voltage Vref 1 or voltage V1 its real-valued on be equal to (after buffering) brightness signal Y.
Then, (can be learnt by the internal circuit of display device during this) during trailing edge after the horizontal synchronization pulse of first shown in Fig. 1, interrupteur SW 1, SW2 can open (interrupteur SW 1, SW2 operate in subsequent detailed), and control circuit 340 can produce the first digital controlled signal D
c1to current type digital analog converter 310, to make the value of the voltage V1 of icon for 0.4V, voltage V1 by becoming the first reference voltage Vref 1 after impact damper 304, and is sent to comparer 330 via interrupteur SW 2, resistance R2 and electric capacity C2; Meanwhile, brightness signal Y by after impact damper 302, then is sent to comparer 330 via interrupteur SW 1, resistance R1 and electric capacity C1.Then, comparer 330 compares the brightness signal Y after buffering and the first reference voltage Vref 1, to obtain a relatively rear signal.In the present embodiment, when the brightness signal Y after this relatively rear signal designation buffering is greater than the first reference voltage Vref 1 (that is brightness signal Y is greater than voltage V1), control circuit 340 can upgrade the first digital controlled signal D
c1to increase voltage V1 (that is increasing by the first reference voltage Vref 1); Otherwise when this relatively rear signal designation brightness signal Y is less than the first reference voltage Vref 1, control circuit 340 can upgrade the first digital controlled signal D
c1to reduce voltage V1 (that is reducing the first reference voltage Vref 1).As mentioned above, control circuit 340 can according to this relatively rear signal renewal first digital controlled signal D repeatedly
c1to make the first reference voltage Vref 1 approach the brightness signal Y after buffering (that is voltage V1 approaches brightness signal Y), and when the output of comparer 330 switches repeatedly between 0,1, then stop the operation of comparer 330, and record the first digital controlled signal D now
c1, the first now recorded digital controlled signal D
c1be the digital value of the maximum voltage value Vmax corresponding to the horizontal synchronization pulse shown in Fig. 2.Wherein the first reference voltage Vref 1 or voltage V1 approach (after buffering) brightness signal Y that is the first reference voltage Vref 1 or voltage V1 its real-valued on be equal to (after buffering) brightness signal Y.
Learning two the first digital controlled signal D arrived corresponding to the minimum amount of voltage that Vmin of horizontal synchronization pulse and maximum voltage value Vmax
c1afterwards, control circuit 340 can produce one second digital controlled signal D according to this
c2to current type digital analog converter 320, wherein the second digital controlled signal D
c2be two the first digital controlled signal D
c1mean value, that is current type digital analog converter 320 is receiving the second digital controlled signal D
c2electric current produced afterwards can make the voltage V2 of icon equal average (that is, V2=(Vmax+Vmin)/2) of minimum amount of voltage that Vmin and maximum voltage value Vmax).
Then, during the horizontal synchronization pulse of second shown in Fig. 1, voltage V2 by becoming the second reference voltage Vref 2 after impact damper 306, and comparer 350 can compare buffering after brightness signal Y and the second reference voltage Vref 2 to produce horizontal-drive signal Hsync.
It is noted that, above-mentioned generation corresponds to the minimum amount of voltage that Vmin of horizontal synchronization pulse and two first digital controlled signal D of maximum voltage value Vmax
c1and the second digital controlled signal D
c2lasting carrying out, that is, during the horizontal synchronization pulse of n-th line with trailing edge during, control circuit 340 produce the second digital controlled signal D
c2during the horizontal synchronization pulse of (n+1) bar line, produce corresponding horizontal-drive signal Hsync for comparer 350; During the horizontal synchronization pulse of (n+1) bar line with trailing edge during, control circuit 340 produce the second digital controlled signal D
c2during the horizontal synchronization pulse of (n+2) bar line, produce corresponding horizontal-drive signal Hsync for comparer 350 ... by that analogy.
In addition, in the present embodiment, comparer 330 is an asynchronous comparator (asynchronouscomparator), that is comparer 330 produces the action of data relatively and do not need to carry out according to fixing frequency signal.In addition, delay circuit 360 retardation design be consider the first reference voltage Vref 1 upgrade time time delay (that is, the delay that control circuit 340, current type digital analog converter 310, impact damper 304, resistance R2 and electric capacity C2 cause), start again to operate after the first reference voltage Vref 1 upgrades to control comparer 330.
In addition, please also refer to the delay circuit 364 shown in Fig. 4 and Fig. 3 and interrupteur SW 1, SW2, Fig. 4 be switching signal V
sW1, V
sW2with brightness signal Y graph of a relation in time.With reference to figure 3, Fig. 4, switching signal V
sW1by delay circuit 364, horizontal-drive signal Hsync is postponed a special time amount produced, its objective is that the bottom of the horizontal synchronization pulse allowing switch SW1, SW2 in brightness signal Y is just opened, start to obtain for comparer 330, control circuit 340, current type digital analog converter 310 the first digital controlled signal D corresponding to minimum amount of voltage that Vmin
c1.In addition, switching signal V
sW2being produced by control circuit 340, it can open during the trailing edge of brightness signal Y, starts to obtain for comparer 330, control circuit 340, current type digital analog converter 310 the first digital controlled signal D corresponding to maximum voltage value Vmax
c1.
Please refer to Fig. 5, Fig. 5 is used for the process flow diagram of the method for a horizontal-drive signal in generation one display device according to one embodiment of the invention a kind of.Simultaneously with reference to above-mentioned Fig. 1 ~ Fig. 3 and relevant disclosure, the flow process of Fig. 5 is as described below:
Step 500: compare the luminance signal from an aberration terminal of this display device and one first reference signal, to produce a relatively rear signal;
Step 502: produce one first digital controlled signal according to this relatively rear signal;
Step 504: produce this first reference signal to one first comparer according to this one first digital controlled signal;
Step 506: according to this relatively rear signal with this first digital controlled signal of continuous updating, to make this first reference signal approach this luminance signal, and this first digital controlled signal when approaching this luminance signal according to this first reference signal produces one second digital controlled signal;
Step 508: produce one second reference signal according to this second digital controlled signal, wherein this second digital controlled signal decides according to this first digital controlled signal; And
Step 510: compare this luminance signal and this second reference signal, to produce this horizontal-drive signal.
Brief summary the present invention, in the circuit being used for producing horizontal-drive signal in display device of the present invention and method thereof, only need the maximum voltage value Vmax and the minimum amount of voltage that Vmin that find out the horizontal synchronization pulse in luminance signal through digital analog converter, and produce the second reference voltage Vref 2 according to this and produce horizontal-drive signal Hsync for comparer 350.Owing to not needing in circuit of the present invention to use analog-to-digital conversion circuit, therefore there is lower chip area and power consumption and speed faster.
The foregoing is only preferred embodiment of the present invention, all equalizations done according to the claims in the present invention change and modify, and all should belong to covering scope of the present invention.
Claims (13)
1. be used for the circuit of a horizontal-drive signal in generation one display device, include:
One first comparer, in order to compare a luminance signal from an aberration terminal of this display device and one first reference signal, with produce one relatively after signal;
One control circuit, is coupled to this first comparer, in order to produce one first digital controlled signal according to this relatively rear signal;
One first digital analog converter, is coupled to this control circuit and this first comparer, in order to produce this first reference signal to this first comparer according to this one first digital controlled signal;
One second digital analog converter, is coupled to this control circuit, produces one second reference signal in order to one second digital controlled signal produced according to this control circuit; And
One second comparer, is coupled to this second digital analog converter, in order to compare this luminance signal and this second reference signal, to produce this horizontal-drive signal;
Wherein this control circuit according to this relatively after this first digital controlled signal of producing with continuous updating of signal, with make this first reference signal real-valued on be equal to this luminance signal, and real-valued according to this first reference signal on this first digital controlled signal when being equal to this luminance signal produce this second digital controlled signal.
2. circuit as claimed in claim 1, different time points wherein in this luminance signal, this control circuit is according to this comparison signal to determine two the first digital controlled signals respectively, and wherein these two first digital controlled signals correspond to a maximum voltage value and a minimum amount of voltage that of the horizontal synchronization pulse in this luminance signal respectively; This control circuit according to these two first digital controlled signals to determine this second digital controlled signal.
3. circuit as claimed in claim 2, this horizontal synchronization pulse wherein in this luminance signal one bottom the period, this control circuit according to this relatively after signal to determine the first digital controlled signal of this minimum amount of voltage that corresponding to this horizontal synchronization pulse; And the trailing edge period in this luminance signal, this control circuit according to this relatively after signal to determine the first digital controlled signal of this maximum voltage value corresponding to this horizontal synchronization pulse.
4. circuit as claimed in claim 3, period bottom this of this horizontal synchronization pulse wherein in this luminance signal, this control circuit upgrades this produced first digital controlled signal repeatedly according to this relatively rear signal, until this comparison signal indicate this first reference voltage real-valued on be equal to this luminance signal, now this first digital controlled signal of producing of this control circuit is as the first digital controlled signal of this minimum amount of voltage that corresponding to this horizontal synchronization pulse; And this trailing edge period in this luminance signal, this control circuit upgrades this produced first digital controlled signal repeatedly according to this relatively rear signal, until this comparison signal indicate this first reference voltage real-valued on be equal to this luminance signal, now this first digital controlled signal of producing of this control circuit is as the first digital controlled signal of this maximum voltage value corresponding to this horizontal synchronization pulse.
5. circuit as claimed in claim 4, period bottom this of this horizontal synchronization pulse wherein in this luminance signal, this control circuit upgrades this produced first digital controlled signal repeatedly according to this relatively rear signal, until when the output of this first comparer switches between logical value " 0 ", " 1 ", now this first comparer shut-down operation, and this first digital controlled signal that record this control circuit now produces, using as the first digital controlled signal of this minimum amount of voltage that corresponding to this horizontal synchronization pulse; And this trailing edge period in this luminance signal, this control circuit upgrades this produced first digital controlled signal repeatedly according to this relatively rear signal, until when the output of this first comparer switches between logical value " 0 ", " 1 ", now this first comparer shut-down operation, and this first digital controlled signal that record this control circuit now produces, using as the first digital controlled signal of this maximum voltage value corresponding to this horizontal synchronization pulse.
6. circuit as claimed in claim 1, separately includes:
One first switch, is coupled to this first comparer, in order to receive this luminance signal according to a switching signal optionally to allow this first comparer;
One second switch, is coupled to this first comparer and this first digital analog converter, in order to receive this first reference signal according to this switching signal optionally to allow this first comparer; And
One delay circuit, is coupled to this second comparer, the first switch and this second switch, in order to postpone this horizontal-drive signal that this second comparer exports to produce this switching signal to this first switch and this second switch.
7. circuit as claimed in claim 1, wherein this first comparer is an asynchronous comparator.
8. be used for the method for a horizontal-drive signal in generation one display device, include:
Relatively from a luminance signal and one first reference signal of an aberration terminal of this display device, to produce a relatively rear signal;
One first digital controlled signal is produced according to this relatively rear signal;
This first reference signal is produced to this first comparer according to this one first digital controlled signal;
According to this relatively rear signal with this first digital controlled signal of continuous updating, to make this first reference signal approach this luminance signal, and this first digital controlled signal when approaching this luminance signal according to this first reference signal produces one second digital controlled signal;
One second reference signal is produced according to one second digital controlled signal; And
Relatively this luminance signal and this second reference signal, to produce this horizontal-drive signal.
9. method as claimed in claim 8, separately includes:
Different time points wherein in this luminance signal, according to this comparison signal to determine two the first digital controlled signals respectively, wherein these two first digital controlled signals correspond to a maximum voltage value and a minimum amount of voltage that of the horizontal synchronization pulse in this luminance signal respectively; And
According to these two first digital controlled signals to determine this second digital controlled signal.
10. method as claimed in claim 9, the step wherein determining two the first digital controlled signals includes:
This horizontal synchronization pulse in this luminance signal one bottom the period, according to this comparison signal to determine the first digital controlled signal of this minimum amount of voltage that corresponding to this horizontal synchronization pulse; And
A trailing edge period in this luminance signal, according to this comparison signal to determine the first digital controlled signal of this maximum voltage value corresponding to this horizontal synchronization pulse.
11. methods as claimed in claim 10, the step wherein determining the first digital controlled signal of this minimum amount of voltage that corresponding to this horizontal synchronization pulse includes:
Period bottom this of this horizontal synchronization pulse in this luminance signal, this produced first digital controlled signal is upgraded repeatedly according to this relatively rear signal, until this comparison signal indicates this first reference voltage to approach this luminance signal, this first digital controlled signal now producing this first reference signal is as the first digital controlled signal of this minimum amount of voltage that corresponding to this horizontal synchronization pulse; And
The step determining the first digital controlled signal of this maximum voltage value corresponding to this horizontal synchronization pulse includes:
This trailing edge period in this luminance signal, this produced first digital controlled signal is upgraded repeatedly according to this relatively rear signal, until this comparison signal indicates this first reference voltage to approach this luminance signal, this first digital controlled signal now producing this first reference signal is as the first digital controlled signal of this maximum voltage value corresponding to this horizontal synchronization pulse.
12. methods as claimed in claim 11, the step wherein determining the first digital controlled signal of this minimum amount of voltage that corresponding to this horizontal synchronization pulse includes:
Period bottom this of this horizontal synchronization pulse in this luminance signal, this produced first digital controlled signal is upgraded repeatedly according to this relatively rear signal, until this relatively rear signal switches between logical value " 0 ", " 1 ", and this first digital controlled signal that record this control circuit now produces, using as the first digital controlled signal of this minimum amount of voltage that corresponding to this horizontal synchronization pulse; And
The step determining the first digital controlled signal of this maximum voltage value corresponding to this horizontal synchronization pulse includes:
This trailing edge period in this luminance signal, this produced first digital controlled signal is upgraded repeatedly according to this relatively rear signal, until this relatively rear signal switches between logical value " 0 ", " 1 ", and this first digital controlled signal that record this control circuit now produces, using as the first digital controlled signal of this maximum voltage value corresponding to this horizontal synchronization pulse.
13. methods as claimed in claim 8, wherein compare and undertaken by a comparer from this luminance signal of this aberration terminal of this display device and the step of this first reference signal, and the method separately include:
There is provided one first switch to receive this luminance signal according to a switching signal optionally to allow this comparer;
There is provided a second switch to receive this first reference signal according to this switching signal optionally to allow this comparer; And
Postpone this horizontal-drive signal to produce this switching signal to this first switch and this second switch.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108632499A (en) * | 2017-03-15 | 2018-10-09 | 深圳开阳电子股份有限公司 | A kind of image-signal processor and its sequential generation device |
| CN109348201A (en) * | 2018-12-20 | 2019-02-15 | 歌尔股份有限公司 | The generation method and computer readable storage medium of projector and its line synchronising signal |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0649249A2 (en) * | 1993-10-15 | 1995-04-19 | Deutsche Thomson-Brandt Gmbh | Synchronizing signal separation circuit for a television receiver |
| CN1585493A (en) * | 2003-08-20 | 2005-02-23 | 台达电子工业股份有限公司 | Displaying method for color difference component visual signal and displaying device for supporting multiple sequential color difference component |
| CN1756298A (en) * | 2004-06-02 | 2006-04-05 | 晨星半导体股份有限公司 | Method and device for dynamically adjusting sync-on-green (SOG) signal of video signal |
| CN101237521A (en) * | 2008-01-31 | 2008-08-06 | 华为技术有限公司 | An extraction device and method for synchronous clock |
| CN101415070A (en) * | 2007-10-16 | 2009-04-22 | 瑞昱半导体股份有限公司 | Acquisition device for synchronization signal |
| CN103188421A (en) * | 2011-12-27 | 2013-07-03 | 龙迅半导体科技(合肥)有限公司 | Synchronization signal detection and extraction device for composite video stream |
-
2014
- 2014-05-12 CN CN201410197972.4A patent/CN105096908B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0649249A2 (en) * | 1993-10-15 | 1995-04-19 | Deutsche Thomson-Brandt Gmbh | Synchronizing signal separation circuit for a television receiver |
| EP0649249A3 (en) * | 1993-10-15 | 1995-06-28 | Thomson Brandt Gmbh | Synchronizing signal separation circuit for a television receiver. |
| CN1585493A (en) * | 2003-08-20 | 2005-02-23 | 台达电子工业股份有限公司 | Displaying method for color difference component visual signal and displaying device for supporting multiple sequential color difference component |
| CN1756298A (en) * | 2004-06-02 | 2006-04-05 | 晨星半导体股份有限公司 | Method and device for dynamically adjusting sync-on-green (SOG) signal of video signal |
| CN101415070A (en) * | 2007-10-16 | 2009-04-22 | 瑞昱半导体股份有限公司 | Acquisition device for synchronization signal |
| CN101237521A (en) * | 2008-01-31 | 2008-08-06 | 华为技术有限公司 | An extraction device and method for synchronous clock |
| CN103188421A (en) * | 2011-12-27 | 2013-07-03 | 龙迅半导体科技(合肥)有限公司 | Synchronization signal detection and extraction device for composite video stream |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108632499A (en) * | 2017-03-15 | 2018-10-09 | 深圳开阳电子股份有限公司 | A kind of image-signal processor and its sequential generation device |
| CN108632499B (en) * | 2017-03-15 | 2020-12-11 | 深圳开阳电子股份有限公司 | Image signal processor and time sequence generating device thereof |
| CN109348201A (en) * | 2018-12-20 | 2019-02-15 | 歌尔股份有限公司 | The generation method and computer readable storage medium of projector and its line synchronising signal |
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