CN105092989B - Calculate the method and system of piezoelectric charge distribution at piezoelectron device interfaces - Google Patents

Abstract

The invention discloses a method and system for calculating piezoelectric charge distribution at the interface of a piezoelectric electronic device. The method includes: receiving the atomic species, atomic coordinates and unit cell size of the atoms constituting the piezoelectric electronic device; Calculate the amount of charge at the interface under the condition of no strain and strain of the optical device, wherein, in the case of no strain, the amount of charge is the amount of unstrained charge, and in the case of strain, the amount of charge is the amount of strained charge; Calculate the difference between the unstrained charge and the strained charge at the interface to obtain the piezoelectric charge distribution at the interface. The present invention obtains the piezoelectric charge distribution at the interface by calculating the amount of charge at the interface of the piezoelectric electronic device without strain and with strain respectively, and can accurately understand the distribution of the piezoelectric charge at the interface, thereby being able to accurately Simulate the transport properties of piezoelectric electronic devices to provide help for optimizing the function of piezoelectric electronic devices and accelerating the industrialization of piezoelectric electronic devices.

Description

Method and system for calculating piezoelectric charge distribution at interfaces of piezoelectric electronic devices

technical field

The present invention relates to techniques for calculating piezoelectric charge distribution of piezoelectric electronic devices, in particular, to methods and systems for calculating piezoelectric charge distribution at interfaces of piezoelectric electronic devices.

Background technique

The core part of piezoelectric electronic devices is piezoelectric semiconductors, such as zinc oxide, gallium nitride, indium nitride, etc. Under the action of external stress, piezoelectric charges and corresponding piezoelectric electric fields will be generated on the surface of piezoelectric semiconductors, thereby affecting the transport properties of semiconductors. Therefore, external stress can be used to replace the traditional gate electrode to regulate the transport properties of piezoelectric electronic devices, which is called piezoelectric electronics. The piezoelectric charge generated at the interface between the piezoelectric semiconductor and other materials in the piezoelectric electronic device is a key factor of the piezoelectric electronic effect. At present, relevant theoretical studies have explained the regulation mechanism of piezoelectric charges on devices, but the methods used are only based on classical piezoelectric theory, semiconductor physics, and macroscopic finite element methods. The distribution length and shape of the distribution are also taken a simple approximation, so the distribution law of the piezoelectric charge cannot be obtained.

Contents of the invention

The purpose of the present invention is to provide a method and system for calculating the piezoelectric charge distribution at the interface of a piezoelectric electronic device, which is used to solve the problem of calculating the piezoelectric charge distribution of the piezoelectric electronic device, especially the piezoelectric charge distribution at the interface.

In order to achieve the above object, the present invention provides a method for calculating the piezoelectric charge distribution at the interface of a piezoelectric electronic device, comprising: receiving the atomic species, atomic coordinates and unit cell size of the atoms constituting the piezoelectric electronic device; In the case of no strain and strain in the piezoelectric electronic device, calculate the amount of charge at the interface according to the atomic species, atomic coordinates and unit cell size, wherein, in the case of no strain, the amount of charge is the amount of unstrained charge, and in the case of strain, the amount of charge is the amount of strained charge; and calculating the difference between the amount of unstrained charge and the amount of strained charge at the interface to obtain the The piezoelectric charge distribution at the interface.

Correspondingly, the present invention also provides a system for calculating piezoelectric charge distribution at the interface of a piezoelectric electronic device, including: a receiving device for receiving the atomic species, atomic coordinates and unit cell size; and computing means for: calculating the amount of charge at the interface according to the atomic species, atomic coordinates and unit cell size under the conditions of no strain and strain in the piezoelectric electronic device, respectively, wherein, In the case of no strain, the amount of charge is the amount of unstrained charge, and in the case of strain, the amount of charge is the amount of strained charge; and calculating the difference between the amount of charge without strain at the interface and the amount of charge without strain The difference in the amount of strain charge is used to obtain the piezoelectric charge distribution at the interface.

Through the above technical solution, the present invention obtains the distribution of piezoelectric charges at the interface by calculating the amount of charge at the interface of the piezoelectric electronic device without strain and with strain respectively, and can accurately understand the distribution of piezoelectric charges at the interface In this way, the transport properties of piezoelectric electronic devices can be accurately simulated, and it is helpful to optimize the function of piezoelectric electronic devices and accelerate the industrialization process of piezoelectric electronic devices.

Other features and advantages of the present invention will be described in detail in the following detailed description.

Description of drawings

The accompanying drawings are used to provide a further understanding of the present invention, and constitute a part of the description, together with the following specific embodiments, are used to explain the present invention, but do not constitute a limitation to the present invention. In the attached picture:

Fig. 1 is a flow chart of the method for calculating piezoelectric charge distribution at the interface of piezoelectric electronic devices provided by the present invention;

Fig. 2 is a piezoelectric electronic device provided by an embodiment of the present invention;

Fig. 3 (a) is the atomic scale model of the Ag-ZnO-Ag piezoelectronics transistor of the embodiment according to Fig. 2;

Fig. 3 (b) is the Ag-ZnO-Ag piezoelectric electronics transistor supercell inner surface average electrostatic potential and the macroscopic average electrostatic potential according to the embodiment provided in Fig. 2;

Fig. 3 (c) is the Ag-ZnO-Ag piezoelectronics transistor supercell inner surface average charge density of the embodiment provided according to Fig. 2;

Figure 4(a) is the piezoelectric charge distribution diagram of the Ag-Zn-O contact region of the hcp-Ag-ZnO-Ag transistor (that is, the BE region shown in Figure 3) when the ZnO in the transistor is under ±1% stress ;

Figure 4(b) is the piezoelectric charge distribution diagram of the Ag-Zn-O contact region of the hcp-Ag-ZnO-Ag transistor (that is, the BE region shown in Figure 3) when the ZnO in the transistor is under ±5% stress ;

Figure 4(c) is the piezoelectric charge distribution diagram of the Zn-O-Ag contact region of the hcp-Ag-ZnO-Ag transistor (that is, the FC region shown in Figure 3) when the ZnO in the transistor is under ±1% stress ;

Figure 4(d) is the piezoelectric charge distribution diagram of the Zn-O-Ag contact region of the hcp-Ag-ZnO-Ag transistor (that is, the FC region shown in Figure 3) when the ZnO in the transistor is under ±5% stress ;

Fig. 5(a) is the piezoelectric charge distribution diagram of the Ag-Zn-O contact region of the fcc-Ag-ZnO-Ag transistor when the ZnO in the transistor is under ±1% stress;

Figure 5(b) is the piezoelectric charge distribution diagram of the Ag-Zn-O contact region of the fcc-Ag-ZnO-Ag transistor when the ZnO in the transistor is under ±5% stress;

Figure 5(c) is the piezoelectric charge distribution diagram of the Zn-O-Ag contact region of the fcc-Ag-ZnO-Ag transistor when the ZnO in the transistor is under ±1% stress;

Figure 5(d) is the piezoelectric charge distribution diagram of the Zn-O-Ag contact region of the fcc-Ag-ZnO-Ag transistor when the ZnO in the transistor is under ±5% stress;

Figure 6(a) is a graphical representation of the total piezoelectric charge in the Ag-Zn-O contact region of the hcp-Ag-ZnO-Ag transistor as a function of stress when the stress is applied only on the ZnO;

Figure 6(b) is a graphical representation of the total piezoelectric charge in the Zn-O-Ag contact region of the hcp-Ag-ZnO-Ag transistor as a function of stress when the stress is applied only on the ZnO;

Figure 6(c) is a graphical representation of the total piezoelectric charge in the Ag-Zn-O contact region of fcc-Ag-ZnO-Ag transistors as a function of stress when stress is applied only on ZnO;

Figure 6(d) is a graphical representation of the total piezoelectric charge in the Zn-O-Ag contact region of fcc-Ag-ZnO-Ag transistors as a function of stress when stress is applied only on ZnO;

7-9 are illustrations corresponding to FIGS. 4-6 when stress is applied across the transistor; and

Fig. 10 is a block diagram of a system for calculating piezoelectric charge distribution at the interface of piezoelectric electronic devices provided by the present invention.

Detailed ways

Specific embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings. It should be understood that the specific embodiments described here are only used to illustrate and explain the present invention, and are not intended to limit the present invention.

Fig. 1 is the flow chart of the method for calculating piezoelectric charge distribution at the interface of piezoelectric electronic devices provided by the present invention, as shown in Fig. 1, the method includes: receiving atomic species, atomic coordinates and unit cell size; under the conditions of no strain and strain in the piezoelectric electronic device, the amount of charge at the interface is calculated according to the received atomic species, atomic coordinates and unit cell size, wherein, in the strain-free In the case of , the amount of charge is the amount of unstrained charge, and in the case of strain, the amount of charge is the amount of strained charge; and calculating the difference between the amount of unstrained charge and the amount of strained charge at the interface difference to get the piezoelectric charge distribution at the interface.

The present invention is described by taking the piezoelectric electronic device shown in FIG. 2 as an example, but it should be noted that the piezoelectric electronic device shown in FIG. 2 is not used to limit the scope of the present invention.

The piezoelectric electronic device shown in Figure 2 is made of two metal electrodes connected to the piezoelectric semiconductor in the middle. In the example shown in Figure 2, Ag (silver) is selected as the metal electrode, and ZnO (zinc oxide) is used as the piezoelectric semiconductor in the middle. Semiconductor material. Other alternative metal electrode materials include Au (gold), Al (aluminum), Pt (platinum), etc., and alternative piezoelectric semiconductor materials include GaN (gallium nitride), InN (indium nitride), etc.

The c-axis direction of ZnO is marked in Figure 2. When the external stress along the c-axis direction is applied to the piezoelectric electronic device, piezoelectricity will be generated at the interface between the two metal electrodes Ag and the piezoelectric semiconductor ZnO. Charge, the piezoelectric charge is the difference between the amount of strained charge and the amount of unstrained charge.

Wherein, calculating the amount of charge at the interface includes the following steps: divide the piezoelectric electronic device into multiple grid points (such as 2000 grid points) in the direction perpendicular to the interface of the piezoelectric electronic device, and then calculate the The amount of charge at the interface is obtained according to the atomic coordinates. Wherein, the direction perpendicular to the interface of the piezoelectric electronic device is the direction of the c-axis shown in FIG. 2 . Since the coordinates of each atom are known, the amount of charge at the interface can be obtained according to the coordinates of the atoms at the interface of the piezoelectric electronic device, which is the sum of positive and negative charges.

Among them, calculating the charge amount of each lattice point includes the following steps: obtain the surface average electrostatic potential of the piezoelectric electronic device according to the atomic species, atomic coordinates and unit cell size of the atoms constituting the piezoelectric electronic device, and then obtain the surface average electrostatic potential according to the surface average The surface average charge density of the piezoelectric electronic device is obtained from the electrostatic potential, and then the charge amount of each lattice point is obtained according to the surface average charge density. Among them, the amount of charge in each grid point is obtained by multiplying the average charge density in the grid point and the volume of the grid point. According to the atomic species, atomic coordinates and unit cell size of the atoms constituting the piezoelectric electronic device, the surface average electrostatic potential of the piezoelectric electronic device can be obtained using the following algorithm: density functional theory (Density Functional Theory, DFT) method or and The Terry-Fock method or the semi-empirical tight-binding method are all algorithms known to those skilled in the art, and will not be repeated here. These methods can give the electrostatic potential distributed with space inside the transistor, and average the spatial electrostatic potential of a certain plane (such as a plane parallel to the interface of the transistor in the specification of this application) to obtain the surface average electrostatic potential.

Among them, the surface average charge density ρ of the piezoelectric electronic device can be calculated according to the surface average electrostatic potential, which can be calculated by using the Poisson equation:

Among them, V is the surface average electrostatic potential, the z-axis is the direction parallel to the c-axis shown in Figure 2, and ε is the dielectric constant.

FIG. 3( a ) is an atomic scale model of an Ag-ZnO-Ag piezoelectronic transistor according to the embodiment provided in FIG. 2 . As shown in Figure 3(a), the left and right Ag electrodes are connected to the ZnO part in the middle, which contains two double-layers, that is, four single-layer Zn-O structures. The ZnO {0001} direction and the Ag(111) crystal plane are respectively parallel to the c-axis and the ab plane marked in FIG. 2 (that is, the plane parallel to the interface of the piezoelectric electronic device). Four planes A, B, C, and D parallel to the Ag(111) crystal plane (indicated by black dotted lines in the figure), divide the transistor into three parts: where AB is the left electrode, CD is the right electrode, and BC is the middle ZnO part. Periodic boundary conditions are imposed on the model in the three directions a, b, and c. The black box in Figure 3(a) shows a supercell of the transistor. For simplicity of simulation, impurities and defects are not introduced in the current model. Considering that the metal has better ductility, when dealing with the lattice matching problem between the Ag(111) plane and ZnO, the lattice constant of the Ag(111) plane can be increased by 11%, so that it is compatible with the ZnO plane. unanimous.

It should be noted that, for the right electrode in Figure 3(a), that is, the O-Ag junction, the stable structure is that the Ag atom is at the top of the oxygen atom; for the left electrode in Figure 3(a), that is, the Ag-Zn At the junction, there are two stable structures, the hexagonal cavity site (hcp) and the face-centered cavity site (fcc) of Zn. Therefore, according to the structure at the Ag-Zn polarization plane, there are two different stable transistor structures, named hcp-Ag-ZnO-Ag and fcc-Ag-ZnO-Ag transistors respectively. Figure 3(a) shows the structure of the hcp-Ag-ZnO-Ag transistor, but the method for calculating the piezoelectric charge distribution at the interface of the piezoelectric electronic device described in the present invention is also applicable to the fcc-Ag-ZnO - Structure of Ag transistors.

For the optimization of the atomic structure model, a method well known to those skilled in the art can be adopted: first, optimize the atomic structure of the bulk ZnO and Ag(111) crystal planes; secondly, use the optimized ZnO and Ag(111) structures to construct hcp- and fcc-Ag-ZnO-Ag transistor, and get the stable distance of ZnO and Ag(111) structures; finally, optimize the position of all atoms in the system to get the stable structure of the transistor without stress.

The external stress is along the c-axis direction shown in FIG. 3 , the stress that makes the transistor stretch along the c-axis direction is defined as positive, and the stress that makes it compress is defined as negative. The strain caused by the external stress is selected from -5% to +5%, and is applied to the transistor in two ways: (1) the stress is only applied to the middle ZnO region; (2) the stress is applied to the entire transistor. In order to obtain a stable structure of the transistor under stress, the structure of those atoms subjected to stress can be optimized (atomic coordinate relaxation). Because the coordinates of all atoms in the method (2) need to be relaxed, it takes more time than the method (1). Hereinafter, the present invention will be mainly described using the structure obtained by the method (1). In fact, the structure obtained by the method in (2) will also get a similar piezoelectric charge distribution.

Fig. 3(b) shows the average electrostatic potential (black solid line) and the macroscopic average electrostatic potential (black dotted line) of the Ag-ZnO-Ag piezoelectric electronic transistor supercell according to the embodiment provided in Fig. 3(a). The macroscopic average electrostatic potential is the average value obtained along the c-axis direction on the basis of the surface average electrostatic potential, and its calculation method is well known to those skilled in the art, and will not be repeated here. Fig. 3(c) is the average charge density on the inner surface of the Ag-ZnO-Ag piezoelectric electronic transistor supercell according to the embodiment provided in Fig. 3(a). Among them, the ordinate of Figure 3(b) is the electric potential (unit is electron volts), the ordinate of Figure 3(c) is the surface average charge density value (unit is absolute electron charge/angstrom ³ ), and the abscissa is the relative position.

It can be seen from Figure 3(b) and Figure 3(c) that among the four single-layer Zn-O layers in the ZnO region in the middle of the transistor, the second layer of Zn-O from the left as shown in the figure corresponds to The surface average electrostatic potential and surface average charge density are similar to those of the third layer, while the surface average electrostatic potential and surface average charge density corresponding to the first and fourth layers of Zn-O are different from those of the middle two layers due to the influence of the Ag electrode. Layers are different. In addition, the macroscopic electrostatic potential is linear in the second and third layers of Zn-O (indicated by the bold dashed line in Figure 3(b)) but deviates from linearity in the first and fourth layers. Through the above analysis, the middle ZnO region can be divided into three parts by E and F two planes parallel to the ab plane: BE is the left contact region, including the first layer of Zn from the left of the ZnO region as shown in Figure 3 -O, FC is the right contact area, including the fourth layer Zn-O from the left of the ZnO area shown in Figure 3, and EF is the ZnO internal area, including the fourth layer from the left of the ZnO area shown in Figure 3 2. Three layers of Zn-O, as shown in Figure 3.

It should be noted that although only the structure of the hcp-Ag-ZnO-Ag transistor is shown in Figure 3, the methods used above include structural optimization, calculation of surface average electrostatic potential and macroscopic average electrostatic potential, applying stress, and The method of dividing the left and right contact regions is also applicable to fcc-Ag-ZnO-Ag transistors.

Fig. 4 is a diagram of the piezoelectric charge distribution in the contact area of the hcp-Ag-ZnO-Ag transistor when the stress is only applied on the ZnO. Among them, Fig. 4 (a) is when the ZnO in the transistor is under ± 1% stress, the Ag-Zn-O contact region of the hcp-Ag-ZnO-Ag transistor (ie the left contact region BE shown in Fig. 3) Piezoelectric charge distribution diagram; Fig. 4 (b) is when the ZnO in the transistor is under ± 5% stress, the Ag-Zn-O contact area of hcp-Ag-ZnO-Ag transistor (ie the left contact as shown in Fig. 3 The piezoelectric charge distribution diagram of the region BE); Fig. 4 (c) is when the ZnO in the transistor is under ± 5% stress, the contact region of the Zn-O-Ag of the hcp-Ag-ZnO-Ag transistor (that is, as shown in Fig. 3 Figure 4(d) is the Zn-O-Ag contact region ( That is, the piezoelectric charge distribution diagram of the right contact region FC) as shown in FIG. 3 . Among them, curve 1 represents the piezoelectric charge distribution curve of the transistor subjected to compressive stress (i.e. negative stress), curve 2 represents the piezoelectric charge distribution curve of the transistor subjected to tensile stress (i.e. positive stress), and the illustration shows the charge distribution in the contact area (i.e. with distribution of strain charges). In Fig. 4, the abscissa is the relative position in the contact area, and the ordinate is the absolute electron charge.

Fig. 5 is a diagram of the piezoelectric charge distribution in the contact area of the fcc-Ag-ZnO-Ag transistor when the stress is only applied on the ZnO. Among them, Figure 5(a) is the piezoelectric charge distribution diagram of the Ag-Zn-O contact region of the fcc-Ag-ZnO-Ag transistor when the ZnO in the transistor is under ±1% stress; Figure 5(b) is the transistor The piezoelectric charge distribution diagram of the Ag-Zn-O contact region of the fcc-Ag-ZnO-Ag transistor when the ZnO in the transistor is under ±5% stress; Figure 5(c) is the ZnO in the transistor under the ±1% stress , the piezoelectric charge distribution diagram of the Zn-O-Ag contact region of the fcc-Ag-ZnO-Ag transistor; Figure 5(d) is the fcc-Ag-ZnO-Ag Piezoelectric charge distribution map of the Zn-O-Ag contact region of a transistor. Among them, curve 3 represents the piezoelectric charge distribution curve of the transistor subjected to compressive stress (i.e. negative stress), curve 4 represents the piezoelectric charge distribution curve of the transistor subjected to tensile stress (i.e. positive stress), and the illustration shows the charge distribution in the contact area (i.e. distribution of strain charges). In Fig. 5, the abscissa is the relative position in the contact area, and the ordinate is the absolute electron charge.

The charge distributions shown in the insets of Figures 4 and 5 show atomic-scale fluctuations. In the classical piezoelectric electronics theory, piezoelectric charge is defined as the charge generated by external stress in the contact area. According to this definition, the difference of charge distribution under stress and without stress in the contact area can be calculated. This difference of charge distribution is the distribution of piezoelectric charge shown in Fig. 4 and Fig. 5. From Fig. 4 and Fig. 5, it can be seen that the piezoelectric charge distribution at the same contact surface of hcp- and fcc-transistors under the same stress is similar. However, the piezoelectric charge distributions on the left and right contact surfaces are not the same, because the structures of the two contact surfaces are not symmetrical. In addition, the distribution of piezoelectric charges shows an approximate symmetry under different stresses: when the stress is relatively small, that is, ±1%, the distribution of piezoelectric charges under the opposite stress is approximately mirror-symmetrical, as shown in Figure 4(a) , 4(c), 5(a) and 5(c). However, when the stress increases to ±5%, the piezoelectric charge distribution under the opposite pressure deviates from the mirror symmetry, as shown in Figs. 4(b), 4(d), 5(b) and 5(d). Among them, the peaks with larger deviations are marked with arrows in the figure.

Figure 6 is a graphical representation of the total piezoelectric charge of the transistor contact region as a function of stress when stress is applied only on ZnO. Among them, Figure 6(a) is a diagram showing the total piezoelectric charge of the Ag-Zn-O contact region of the hcp-Ag-ZnO-Ag transistor as a function of stress when the stress is only applied on ZnO; Illustration of the total piezoelectric charge of the Zn-O-Ag contact region of the hcp-Ag-ZnO-Ag transistor as a function of stress when the stress is only applied on ZnO; Fig. 6(c) is fcc- when the stress is only applied on ZnO Illustration of the total piezoelectric charge of the Ag-Zn-O contact region of the Ag-ZnO-Ag transistor as a function of stress; Figure 6(d) is the Zn- Schematic representation of the total piezoelectric charge in the O-Ag contact region as a function of stress. Among them, the Ag-Zn-O contact region and Zn-O-Ag contact region in Figure 6(a) and Figure 6(b) are the left contact region and the right contact region in the atomic scale model of the transistor shown in Figure 3 , for the fcc-Ag-ZnO-Ag transistor described in Fig. 6(c) and Fig. 6(d), those skilled in the art should understand that the fcc-Ag-ZnO-Ag transistor should also exist with hcp-Ag-ZnO- Similar Ag-Zn-O (left) and Zn-O-Ag (right) contact regions for Ag transistors. Among them, the abscissa represents the magnitude of the stress, and the ordinate represents the absolute electronic charge.

It should be noted that the total charge in other areas except the contact area hardly changes with the external stress, which means that the piezoelectric charges are all distributed in the contact area, and the distribution length is the length of the contact area. For two kinds of transistors (i.e. hcp-Ag-ZnO-Ag transistor and fcc-Ag-ZnO-Ag transistor), the lengths of their left and right regions are close to each other, about This is consistent with the distribution area assumed in the existing theoretical studies of classical piezoelectric electronics are in the same magnitude. It can also be seen from Figure 6 that the piezoelectric charge distribution is very uneven, and larger peaks can be found between the Ag and Zn atoms and near the O atom, which is consistent with the uniform distribution of the piezoelectric charge in the existing research. Assume differently. Whether it is in the left or right contact area, increasing the magnitude of the tensile/compressive stress does not significantly change the distribution shape of the piezoelectric charge, but only increases the magnitude of the peak.

Fig. 6 shows the variation of total charges in the left/right contact regions of hcp-transistor and fcc-transistor with external stress when the stress is only applied on ZnO. The two transistors show the same trend, and the total charge in the contact area shows an obvious linear change trend with external stress. For the left contact region, the compressive stress increases the positive charge in the region and the tensile stress increases the negative charge in the region. The related trends can be seen in Figure 5(a) and 5(c). On the other hand, for the right contact region, the compressive stress increases the negative charge in the region and the tensile stress increases the positive charge in the region. The related trends are shown in Figure 5(b) and 5(d), which is opposite to the left region. In addition to the two contact regions, the left and right Ag electrodes and ZnO inner regions (not shown) were also calculated, and the total charge in these regions hardly changed with the external stress, which indicated that all piezoelectric charges were distributed in the two in the contact area. This conclusion is consistent with the classical piezoelectric electronics theory.

Correspondingly, FIGS. 7-9 are diagrams corresponding to FIGS. 4-6 when stress is applied to the entire transistor.

Fig. 10 is a block diagram of a system for calculating piezoelectric charge distribution at the interface of a piezoelectric electronic device provided by the present invention. As shown in Fig. 10 , the system includes a receiving device and a computing device. The receiving device is used to receive the atomic species, atomic coordinates and unit cell size of the atoms constituting the piezoelectric electronic device, and the calculating device is used to: respectively, in the case of no strain and strain in the piezoelectric electronic device, according to the piezoelectric electronic device The atomic species, atomic coordinates, and unit cell size of the atoms of the electronic device calculate the amount of charge at the interface, where, in the case of no strain, the amount of charge is the amount of charge without strain, and in the case of strain, the The charge amount is a strained charge amount; and the difference between the unstrained charge amount at the interface and the strained charge amount is calculated to obtain the piezoelectric charge distribution at the interface.

It should be noted that the specific details and benefits of the system for calculating the distribution of piezoelectric charges at the interface of piezoelectric electronic devices provided by the present invention correspond to the method for calculating the distribution of piezoelectric charges at the interface of piezoelectric electronic devices provided by the present invention, hereby I won't go into details.

The preferred embodiment of the present invention has been described in detail above in conjunction with the accompanying drawings, but the present invention is not limited to the specific details of the above embodiment, within the scope of the technical concept of the present invention, various simple modifications can be made to the technical solution of the present invention, These simple modifications all belong to the protection scope of the present invention.

According to the technique of calculating the piezoelectric charge distribution at the interface of the piezoelectric electronic device provided by the present invention above, the following experimental results can be obtained according to the experiment: when the stress is relatively small, such as ±1%, the piezoelectric charge distribution under the opposite stress is Approximate mirror symmetry, however, when the stress increases, eg up to ±5%, the piezoelectric charge distribution under opposite stress deviates from the mirror symmetry.

The process of calculating piezoelectric charge distribution provided by the present invention is simple and convenient, and the working performance of piezoelectric electronic devices can be simulated more accurately by using the obtained results. By calculating the piezoelectric charge distribution of different piezoelectric materials, piezoelectric The transport performance of electronic devices is simulated to find out the device with the best results for development and production to obtain a more optimized device, which can save device development time and production costs.

In addition, it should be noted that the various specific technical features described in the above specific implementation manners may be combined in any suitable manner if there is no contradiction. In order to avoid unnecessary repetition, various possible combinations are not further described in the present invention.

In addition, various combinations of different embodiments of the present invention can also be combined arbitrarily, as long as they do not violate the idea of the present invention, they should also be regarded as the disclosed content of the present invention.

Claims (10)

1. A method for calculating piezoelectric charge distribution at the interface of a piezoelectric electronic device, characterized in that it comprises: receiving atomic species, atomic coordinates, and unit cell sizes of atoms constituting the piezoelectric electronic device; In the case of no strain and strain in the piezoelectric electronic device, calculate the amount of charge at the interface according to the atomic species, atomic coordinates and unit cell size, wherein, in the case of no strain, the the charge is an unstrained charge, and in the case of strain, the charge is a strained charge; and calculating the difference between the unstrained charge amount and the strained charge amount at the interface to obtain the piezoelectric charge distribution at the interface. 2. The method according to claim 1, wherein the calculating the amount of charge at the interface comprises: dividing the piezoelectric electronic device into a plurality of lattice points in a direction perpendicular to the piezoelectric electronic device interface; and The amount of charge at each grid point is calculated, and the amount of charge at the interface is obtained according to the atomic coordinates. 3. The method according to claim 2, wherein said calculating the amount of charge of each lattice point comprises: Obtaining the surface average electrostatic potential of the piezoelectric electronic device according to the atomic species, atomic coordinates and unit cell size; Obtaining the surface average charge density of the piezoelectric electronic device according to the surface average electrostatic potential; and The charge amount of each lattice point is obtained according to the surface average charge density. 4. method according to claim 3, it is characterized in that, described according to described atomic species, atomic coordinates and unit cell size obtain the surface average electrostatic potential of described piezoelectric electronics device adopt density functional theory DFT method or Hartree-Fock method or semi-empirical tight-binding method. 5 . The method according to claim 3 , wherein the surface average charge density of the piezoelectric electronic device obtained according to the surface average electrostatic potential is calculated using Poisson's equation. 6. A system for calculating the piezoelectric charge distribution at the interface of a piezoelectric electronic device, characterized in that it comprises: receiving means for receiving the atomic species, atomic coordinates and unit cell size of the atoms constituting the piezoelectric electronic device; and Computing device for: In the case of no strain and strain in the piezoelectric electronic device, calculate the amount of charge at the interface according to the atomic species, atomic coordinates and unit cell size, wherein, in the case of no strain, the the charge is an unstrained charge, and in the case of strain, the charge is a strained charge; and calculating the difference between the unstrained charge amount and the strained charge amount at the interface to obtain the piezoelectric charge distribution at the interface. 7. The system according to claim 6, wherein the computing means calculating the amount of charge at the interface comprises: dividing the piezoelectric electronic device into a plurality of lattice points in a direction perpendicular to the piezoelectric electronic device interface; and The amount of charge at each grid point is calculated, and the amount of charge at the interface is obtained according to the atomic coordinates. 8. The system according to claim 7, wherein the calculating means calculating the amount of charge of each lattice point comprises: Obtaining the surface average electrostatic potential of the piezoelectric electronic device according to the atomic species, atomic coordinates and unit cell size; Obtaining the surface average charge density of the piezoelectric electronic device according to the surface average electrostatic potential; and The charge amount of each lattice point is obtained according to the surface average charge density. 9. The system according to claim 8, characterized in that, the computing device adopts density functional theory (DFT) method or Hartree-Fock method or semi-empirical tight binding method to calculate and unit cell size to obtain the surface average electrostatic potential of the piezoelectric electronic device. 10 . The system according to claim 9 , wherein the calculation device uses Poisson's equation to calculate the surface average charge density of the piezoelectric electronic device obtained from the surface average electrostatic potential. 11 .