CN105092989B - Calculate the method and system of piezoelectric charge distribution at piezoelectron device interfaces - Google Patents

Calculate the method and system of piezoelectric charge distribution at piezoelectron device interfaces Download PDF

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CN105092989B
CN105092989B CN201410183558.8A CN201410183558A CN105092989B CN 105092989 B CN105092989 B CN 105092989B CN 201410183558 A CN201410183558 A CN 201410183558A CN 105092989 B CN105092989 B CN 105092989B
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CN105092989A (en
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刘伟
张爱华
张岩
王中林
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Beijing Institute of Nanoenergy and Nanosystems
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Abstract

本发明公开了计算压电电子学器件界面处压电电荷分布的方法和系统,该方法包括:接收构成压电电子学器件的原子的原子种类、原子坐标和晶胞大小;分别在压电电子学器件无应变和有应变的情况下,计算界面处的电荷量,其中,在无应变的情况下,电荷量为无应变电荷量,在有应变的情况下,电荷量为有应变电荷量;计算界面处的无应变电荷量与有应变电荷量的差值以得到界面处的压电电荷分布。本发明通过分别计算在压电电子学器件无应变和有应变情况下界面处的电荷量来得到界面处的压电电荷分布,可以精确地了解压电电荷在界面处的分布情况,从而能够精确模拟压电电子学器件的输运性质,为优化压电电子学器件功能、加快压电电子学器件产业化进程提供帮助。

The invention discloses a method and system for calculating piezoelectric charge distribution at the interface of a piezoelectric electronic device. The method includes: receiving the atomic species, atomic coordinates and unit cell size of the atoms constituting the piezoelectric electronic device; Calculate the amount of charge at the interface under the condition of no strain and strain of the optical device, wherein, in the case of no strain, the amount of charge is the amount of unstrained charge, and in the case of strain, the amount of charge is the amount of strained charge; Calculate the difference between the unstrained charge and the strained charge at the interface to obtain the piezoelectric charge distribution at the interface. The present invention obtains the piezoelectric charge distribution at the interface by calculating the amount of charge at the interface of the piezoelectric electronic device without strain and with strain respectively, and can accurately understand the distribution of the piezoelectric charge at the interface, thereby being able to accurately Simulate the transport properties of piezoelectric electronic devices to provide help for optimizing the function of piezoelectric electronic devices and accelerating the industrialization of piezoelectric electronic devices.

Description

计算压电电子学器件界面处压电电荷分布的方法和系统Method and system for calculating piezoelectric charge distribution at interfaces of piezoelectric electronic devices

技术领域technical field

本发明涉及计算压电电子学器件的压电电荷分布的技术,具体地,涉及计算压电电子学器件界面处压电电荷分布的方法和系统。The present invention relates to techniques for calculating piezoelectric charge distribution of piezoelectric electronic devices, in particular, to methods and systems for calculating piezoelectric charge distribution at interfaces of piezoelectric electronic devices.

背景技术Background technique

压电电子学器件的核心部分是压电半导体,如氧化锌、氮化镓、氮化铟等。在外界应力的作用下,压电半导体的表面会产生压电电荷及相应的压电电场,从而影响半导体的输运性质。因而,可以利用外界应力来替代传统的门电极对压电电子学器件的输运性质进行调控,这叫做压电电子学。压电电子学器件中压电半导体与其他材料界面处产生的压电电荷是压电电子学效应的关键因素。目前,已有相关的理论研究阐述了压电电荷对器件的调控机理,但所采用的方法仅基于经典的压电理论、半导体物理、以及宏观的有限元方法,对压电电荷在微观界面处的分布长度及分布形状也采取了简单的近似,因而无法得到压电电荷的分布规律。The core part of piezoelectric electronic devices is piezoelectric semiconductors, such as zinc oxide, gallium nitride, indium nitride, etc. Under the action of external stress, piezoelectric charges and corresponding piezoelectric electric fields will be generated on the surface of piezoelectric semiconductors, thereby affecting the transport properties of semiconductors. Therefore, external stress can be used to replace the traditional gate electrode to regulate the transport properties of piezoelectric electronic devices, which is called piezoelectric electronics. The piezoelectric charge generated at the interface between the piezoelectric semiconductor and other materials in the piezoelectric electronic device is a key factor of the piezoelectric electronic effect. At present, relevant theoretical studies have explained the regulation mechanism of piezoelectric charges on devices, but the methods used are only based on classical piezoelectric theory, semiconductor physics, and macroscopic finite element methods. The distribution length and shape of the distribution are also taken a simple approximation, so the distribution law of the piezoelectric charge cannot be obtained.

发明内容Contents of the invention

本发明的目的是提供计算压电电子学器件界面处压电电荷分布的方法和系统,用于解决计算压电电子学器件的压电电荷分布,尤其是界面处的压电电荷分布的问题。The purpose of the present invention is to provide a method and system for calculating the piezoelectric charge distribution at the interface of a piezoelectric electronic device, which is used to solve the problem of calculating the piezoelectric charge distribution of the piezoelectric electronic device, especially the piezoelectric charge distribution at the interface.

为了实现上述目的,本发明提供了一种计算压电电子学器件界面处压电电荷分布的方法,包括:接收构成所述压电电子学器件的原子的原子种类、原子坐标和晶胞大小;分别在所述压电电子学器件无应变和有应变的情况下,根据原子种类、原子坐标和晶胞大小计算所述界面处的电荷量,其中,在无应变的情况下,所述电荷量为无应变电荷量,以及在有应变的情况下,所述电荷量为有应变电荷量;以及计算所述界面处的所述无应变电荷量与所述有应变电荷量的差值以得到所述界面处的压电电荷分布。In order to achieve the above object, the present invention provides a method for calculating the piezoelectric charge distribution at the interface of a piezoelectric electronic device, comprising: receiving the atomic species, atomic coordinates and unit cell size of the atoms constituting the piezoelectric electronic device; In the case of no strain and strain in the piezoelectric electronic device, calculate the amount of charge at the interface according to the atomic species, atomic coordinates and unit cell size, wherein, in the case of no strain, the amount of charge is the amount of unstrained charge, and in the case of strain, the amount of charge is the amount of strained charge; and calculating the difference between the amount of unstrained charge and the amount of strained charge at the interface to obtain the The piezoelectric charge distribution at the interface.

相应地,本发明还提供了一种计算压电电子学器件界面处压电电荷分布的系统,包括:接收装置,用于接收构成所述压电电子学器件的原子的原子种类、原子坐标和晶胞大小;以及计算装置,用于:分别在所述压电电子学器件无应变和有应变的情况下,根据原子种类、原子坐标和晶胞大小计算所述界面处的电荷量,其中,在无应变的情况下,所述电荷量为无应变电荷量,以及在有应变的情况下,所述电荷量为有应变电荷量;以及计算所述界面处的所述无应变电荷量与所述有应变电荷量的差值以得到所述界面处的压电电荷分布。Correspondingly, the present invention also provides a system for calculating piezoelectric charge distribution at the interface of a piezoelectric electronic device, including: a receiving device for receiving the atomic species, atomic coordinates and unit cell size; and computing means for: calculating the amount of charge at the interface according to the atomic species, atomic coordinates and unit cell size under the conditions of no strain and strain in the piezoelectric electronic device, respectively, wherein, In the case of no strain, the amount of charge is the amount of unstrained charge, and in the case of strain, the amount of charge is the amount of strained charge; and calculating the difference between the amount of charge without strain at the interface and the amount of charge without strain The difference in the amount of strain charge is used to obtain the piezoelectric charge distribution at the interface.

通过上述技术方案,本发明通过分别计算在压电电子学器件无应变和有应变情况下界面处的电荷量来得到界面处的压电电荷分布,可以精确地了解压电电荷在界面处的分布情况,从而能够精确模拟压电电子学器件的输运性质,为优化压电电子学器件功能、加快压电电子学器件产业化进程提供帮助。Through the above technical solution, the present invention obtains the distribution of piezoelectric charges at the interface by calculating the amount of charge at the interface of the piezoelectric electronic device without strain and with strain respectively, and can accurately understand the distribution of piezoelectric charges at the interface In this way, the transport properties of piezoelectric electronic devices can be accurately simulated, and it is helpful to optimize the function of piezoelectric electronic devices and accelerate the industrialization process of piezoelectric electronic devices.

本发明的其他特征和优点将在随后的具体实施方式部分予以详细说明。Other features and advantages of the present invention will be described in detail in the following detailed description.

附图说明Description of drawings

附图是用来提供对本发明的进一步理解,并且构成说明书的一部分,与下面的具体实施方式一起用于解释本发明,但并不构成对本发明的限制。在附图中:The accompanying drawings are used to provide a further understanding of the present invention, and constitute a part of the description, together with the following specific embodiments, are used to explain the present invention, but do not constitute a limitation to the present invention. In the attached picture:

图1是本发明提供的计算压电电子学器件界面处压电电荷分布方法的流程图;Fig. 1 is a flow chart of the method for calculating piezoelectric charge distribution at the interface of piezoelectric electronic devices provided by the present invention;

图2是本发明实施例提供的一种压电电子学器件;Fig. 2 is a piezoelectric electronic device provided by an embodiment of the present invention;

图3(a)是根据图2提供的实施例的Ag-ZnO-Ag压电电子学晶体管的原子尺度模型;Fig. 3 (a) is the atomic scale model of the Ag-ZnO-Ag piezoelectronics transistor of the embodiment according to Fig. 2;

图3(b)是根据图2提供的实施例的Ag-ZnO-Ag压电电子学晶体管超晶胞内面平均静电势及宏观平均静电势;Fig. 3 (b) is the Ag-ZnO-Ag piezoelectric electronics transistor supercell inner surface average electrostatic potential and the macroscopic average electrostatic potential according to the embodiment provided in Fig. 2;

图3(c)是根据图2提供的实施例的Ag-ZnO-Ag压电电子学晶体管超晶胞内面平均电荷密度;Fig. 3 (c) is the Ag-ZnO-Ag piezoelectronics transistor supercell inner surface average charge density of the embodiment provided according to Fig. 2;

图4(a)是晶体管中的ZnO在±1%应力下时,hcp-Ag-ZnO-Ag晶体管Ag-Zn-O接触区域(即如图3所示的BE区域)的压电电荷分布图;Figure 4(a) is the piezoelectric charge distribution diagram of the Ag-Zn-O contact region of the hcp-Ag-ZnO-Ag transistor (that is, the BE region shown in Figure 3) when the ZnO in the transistor is under ±1% stress ;

图4(b)是晶体管中的ZnO在±5%应力下时,hcp-Ag-ZnO-Ag晶体管Ag-Zn-O接触区域(即如图3所示的BE区域)的压电电荷分布图;Figure 4(b) is the piezoelectric charge distribution diagram of the Ag-Zn-O contact region of the hcp-Ag-ZnO-Ag transistor (that is, the BE region shown in Figure 3) when the ZnO in the transistor is under ±5% stress ;

图4(c)是晶体管中的ZnO在±1%应力下时,hcp-Ag-ZnO-Ag晶体管Zn-O-Ag接触区域(即如图3所示的FC区域)的压电电荷分布图;Figure 4(c) is the piezoelectric charge distribution diagram of the Zn-O-Ag contact region of the hcp-Ag-ZnO-Ag transistor (that is, the FC region shown in Figure 3) when the ZnO in the transistor is under ±1% stress ;

图4(d)是晶体管中的ZnO在±5%应力下时,hcp-Ag-ZnO-Ag晶体管Zn-O-Ag接触区域(即如图3所示的FC区域)的压电电荷分布图;Figure 4(d) is the piezoelectric charge distribution diagram of the Zn-O-Ag contact region of the hcp-Ag-ZnO-Ag transistor (that is, the FC region shown in Figure 3) when the ZnO in the transistor is under ±5% stress ;

图5(a)是晶体管中的ZnO在±1%应力下时,fcc-Ag-ZnO-Ag晶体管Ag-Zn-O接触区域的压电电荷分布图;Fig. 5(a) is the piezoelectric charge distribution diagram of the Ag-Zn-O contact region of the fcc-Ag-ZnO-Ag transistor when the ZnO in the transistor is under ±1% stress;

图5(b)是晶体管中的ZnO在±5%应力下时,fcc-Ag-ZnO-Ag晶体管Ag-Zn-O接触区域的压电电荷分布图;Figure 5(b) is the piezoelectric charge distribution diagram of the Ag-Zn-O contact region of the fcc-Ag-ZnO-Ag transistor when the ZnO in the transistor is under ±5% stress;

图5(c)是晶体管中的ZnO在±1%应力下时,fcc-Ag-ZnO-Ag晶体管Zn-O-Ag接触区域的压电电荷分布图;Figure 5(c) is the piezoelectric charge distribution diagram of the Zn-O-Ag contact region of the fcc-Ag-ZnO-Ag transistor when the ZnO in the transistor is under ±1% stress;

图5(d)是晶体管中的ZnO在±5%应力下时,fcc-Ag-ZnO-Ag晶体管Zn-O-Ag接触区域的压电电荷分布图;Figure 5(d) is the piezoelectric charge distribution diagram of the Zn-O-Ag contact region of the fcc-Ag-ZnO-Ag transistor when the ZnO in the transistor is under ±5% stress;

图6(a)是在应力仅施加在ZnO上时hcp-Ag-ZnO-Ag晶体管Ag-Zn-O接触区域总压电电荷随应力变化的图示;Figure 6(a) is a graphical representation of the total piezoelectric charge in the Ag-Zn-O contact region of the hcp-Ag-ZnO-Ag transistor as a function of stress when the stress is applied only on the ZnO;

图6(b)是在应力仅施加在ZnO上时hcp-Ag-ZnO-Ag晶体管Zn-O-Ag接触区域总压电电荷随应力变化的图示;Figure 6(b) is a graphical representation of the total piezoelectric charge in the Zn-O-Ag contact region of the hcp-Ag-ZnO-Ag transistor as a function of stress when the stress is applied only on the ZnO;

图6(c)是在应力仅施加在ZnO上时fcc-Ag-ZnO-Ag晶体管Ag-Zn-O接触区域总压电电荷随应力变化的图示;Figure 6(c) is a graphical representation of the total piezoelectric charge in the Ag-Zn-O contact region of fcc-Ag-ZnO-Ag transistors as a function of stress when stress is applied only on ZnO;

图6(d)是在应力仅施加在ZnO上时fcc-Ag-ZnO-Ag晶体管Zn-O-Ag接触区域总压电电荷随应力变化的图示;Figure 6(d) is a graphical representation of the total piezoelectric charge in the Zn-O-Ag contact region of fcc-Ag-ZnO-Ag transistors as a function of stress when stress is applied only on ZnO;

图7至图9是在应力施加在整个晶体管上时与图4至图6相对应的图示;以及7-9 are illustrations corresponding to FIGS. 4-6 when stress is applied across the transistor; and

图10是本发明提供的计算压电电子学器件界面处压电电荷分布系统的框图。Fig. 10 is a block diagram of a system for calculating piezoelectric charge distribution at the interface of piezoelectric electronic devices provided by the present invention.

具体实施方式Detailed ways

以下结合附图对本发明的具体实施方式进行详细说明。应当理解的是,此处所描述的具体实施方式仅用于说明和解释本发明,并不用于限制本发明。Specific embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings. It should be understood that the specific embodiments described here are only used to illustrate and explain the present invention, and are not intended to limit the present invention.

图1是本发明提供的计算压电电子学器件界面处压电电荷分布方法的流程图,如图1所示,该方法包括:接收构成压电电子学器件的原子的原子种类、原子坐标和晶胞大小;分别在该压电电子学器件无应变和有应变的情况下,根据所接收到的原子种类、原子坐标和晶胞大小计算所述界面处的电荷量,其中,在无应变的情况下,该电荷量为无应变电荷量,以及在有应变的情况下,该电荷量为有应变电荷量;以及计算所述界面处的所述无应变电荷量与所述有应变电荷量的差值以得到所述界面处的压电电荷分布。Fig. 1 is the flow chart of the method for calculating piezoelectric charge distribution at the interface of piezoelectric electronic devices provided by the present invention, as shown in Fig. 1, the method includes: receiving atomic species, atomic coordinates and unit cell size; under the conditions of no strain and strain in the piezoelectric electronic device, the amount of charge at the interface is calculated according to the received atomic species, atomic coordinates and unit cell size, wherein, in the strain-free In the case of , the amount of charge is the amount of unstrained charge, and in the case of strain, the amount of charge is the amount of strained charge; and calculating the difference between the amount of unstrained charge and the amount of strained charge at the interface difference to get the piezoelectric charge distribution at the interface.

本发明以图2所示的压电电子学器件为例进行说明,但应当注意的是,图2所示的压电电子学器件并不用于限定本发明的范围。The present invention is described by taking the piezoelectric electronic device shown in FIG. 2 as an example, but it should be noted that the piezoelectric electronic device shown in FIG. 2 is not used to limit the scope of the present invention.

图2所示的压电电子学器件是由两个金属电极连接中间的压电半导体而成,图2所示的示例选择Ag(银)作为金属电极,ZnO(氧化锌)作为中间的压电半导体材料。其他可以替换的金属电极材料有Au(金)、Al(铝)、Pt(铂金)等,可以替换的压电半导体材料有GaN(氮化镓)、InN(氮化铟)等。The piezoelectric electronic device shown in Figure 2 is made of two metal electrodes connected to the piezoelectric semiconductor in the middle. In the example shown in Figure 2, Ag (silver) is selected as the metal electrode, and ZnO (zinc oxide) is used as the piezoelectric semiconductor in the middle. Semiconductor material. Other alternative metal electrode materials include Au (gold), Al (aluminum), Pt (platinum), etc., and alternative piezoelectric semiconductor materials include GaN (gallium nitride), InN (indium nitride), etc.

在图2中标出了ZnO的c轴方向,在沿着c轴方向的外应力施加在该压电电子学器件上时,在两个金属电极Ag与压电半导体ZnO的界面处将产生压电电荷,该压电电荷为有应变电荷量与无应变电荷量的差值。The c-axis direction of ZnO is marked in Figure 2. When the external stress along the c-axis direction is applied to the piezoelectric electronic device, piezoelectricity will be generated at the interface between the two metal electrodes Ag and the piezoelectric semiconductor ZnO. Charge, the piezoelectric charge is the difference between the amount of strained charge and the amount of unstrained charge.

其中,计算界面处的电荷量包括以下步骤:在垂直于压电电子学器件界面的方向上将压电电子学器件划分多个格点(如,2000个格点),然后计算每个格点的电荷量,根据原子坐标得到界面处的电荷量。其中,垂直于压电电子学器件界面的方向为图2所示的c轴的方向。由于每个原子的坐标是已知的,所以可以根据处于压电电子学器件界面处的原子的坐标就可以得到界面处的电荷量,该电荷量为正电荷与负电荷之和。Wherein, calculating the amount of charge at the interface includes the following steps: divide the piezoelectric electronic device into multiple grid points (such as 2000 grid points) in the direction perpendicular to the interface of the piezoelectric electronic device, and then calculate the The amount of charge at the interface is obtained according to the atomic coordinates. Wherein, the direction perpendicular to the interface of the piezoelectric electronic device is the direction of the c-axis shown in FIG. 2 . Since the coordinates of each atom are known, the amount of charge at the interface can be obtained according to the coordinates of the atoms at the interface of the piezoelectric electronic device, which is the sum of positive and negative charges.

其中,计算每个格点的电荷量包括以下步骤:根据构成压电电子学器件的原子的原子种类、原子坐标和晶胞大小得到压电电子学器件的面平均静电势,然后根据该面平均静电势得到压电电子学器件的面平均电荷密度,然后根据该面平均电荷密度得到每个格点的电荷量。其中,每个格点中的电荷量由该格点中的平均电荷密度和格点的体积相乘得到。根据构成压电电子学器件的原子的原子种类、原子坐标和晶胞大小得到压电电子学器件的面平均静电势可以采用以下算法进行:密度泛函理论(Density Functional Theory,DFT)方法或和特里—福克(Hartree-Fock)方法或半经验的紧密束缚(tight-bingding)方法,这几种方法均为本领域技术人员已知的算法,于此不予赘述。这些方法都可以给出晶体管内部随空间分布的静电势,把某一特定平面(如本申请说明书中为平行于晶体管界面的平面)的空间静电势平均,就得到了面平均静电势。Among them, calculating the charge amount of each lattice point includes the following steps: obtain the surface average electrostatic potential of the piezoelectric electronic device according to the atomic species, atomic coordinates and unit cell size of the atoms constituting the piezoelectric electronic device, and then obtain the surface average electrostatic potential according to the surface average The surface average charge density of the piezoelectric electronic device is obtained from the electrostatic potential, and then the charge amount of each lattice point is obtained according to the surface average charge density. Among them, the amount of charge in each grid point is obtained by multiplying the average charge density in the grid point and the volume of the grid point. According to the atomic species, atomic coordinates and unit cell size of the atoms constituting the piezoelectric electronic device, the surface average electrostatic potential of the piezoelectric electronic device can be obtained using the following algorithm: density functional theory (Density Functional Theory, DFT) method or and The Terry-Fock method or the semi-empirical tight-binding method are all algorithms known to those skilled in the art, and will not be repeated here. These methods can give the electrostatic potential distributed with space inside the transistor, and average the spatial electrostatic potential of a certain plane (such as a plane parallel to the interface of the transistor in the specification of this application) to obtain the surface average electrostatic potential.

其中根据面平均静电势得到压电电子学器件的面平均电荷密度ρ可以采用泊松方程来计算:Among them, the surface average charge density ρ of the piezoelectric electronic device can be calculated according to the surface average electrostatic potential, which can be calculated by using the Poisson equation:

其中,V是面平均静电势,z轴为平行于图2所示的c轴方向,ε为介电常数。Among them, V is the surface average electrostatic potential, the z-axis is the direction parallel to the c-axis shown in Figure 2, and ε is the dielectric constant.

图3(a)是根据图2提供的实施例的Ag-ZnO-Ag压电电子学晶体管的原子尺度模型。如图3(a)所示,左右两个Ag电极连接着中间的ZnO部分,包含了两个双层,即4个单层的Zn-O结构。其中ZnO{0001}方向与Ag(111)晶面分别平行于图2中所标示的c轴及ab面(即平行于压电电子学器件界面的平面)。四个平行于Ag(111)晶面的平面A、B、C和D(在图中以黑色虚线表示),将晶体管分为了三个部分:其中AB为左电极,CD为右电极,而BC为中间的ZnO部分。模型在a、b、c三个方向上都被施加了周期性边界条件,图3(a)中的黑色方框给出了晶体管的一个超晶胞。为了模拟的简单起见,在目前的模型中没有引入杂质及缺陷。考虑到金属具有更好的延展性,因而在处理Ag(111)面与ZnO的晶格匹配问题时,可以将Ag(111)晶面的晶格常数增大11%,从而使其与ZnO的一致。FIG. 3( a ) is an atomic scale model of an Ag-ZnO-Ag piezoelectronic transistor according to the embodiment provided in FIG. 2 . As shown in Figure 3(a), the left and right Ag electrodes are connected to the ZnO part in the middle, which contains two double-layers, that is, four single-layer Zn-O structures. The ZnO {0001} direction and the Ag(111) crystal plane are respectively parallel to the c-axis and the ab plane marked in FIG. 2 (that is, the plane parallel to the interface of the piezoelectric electronic device). Four planes A, B, C, and D parallel to the Ag(111) crystal plane (indicated by black dotted lines in the figure), divide the transistor into three parts: where AB is the left electrode, CD is the right electrode, and BC is the middle ZnO part. Periodic boundary conditions are imposed on the model in the three directions a, b, and c. The black box in Figure 3(a) shows a supercell of the transistor. For simplicity of simulation, impurities and defects are not introduced in the current model. Considering that the metal has better ductility, when dealing with the lattice matching problem between the Ag(111) plane and ZnO, the lattice constant of the Ag(111) plane can be increased by 11%, so that it is compatible with the ZnO plane. unanimous.

需要说明的是,对于图3(a)中的右电极,即O-Ag连接处,稳定结构为Ag原子处于氧原子的顶部位置;对于图3(a)中的左电极,即Ag-Zn连接处,存在两种稳定的结构,Zn的六方空穴位置(hcp)及面心空穴位置(fcc)。因而根据Ag-Zn极化面处的结构,存在两种不同的稳定晶体管结构,分别命名为hcp-Ag-ZnO-Ag及fcc-Ag-ZnO-Ag晶体管。图3(a)所示的是hcp-Ag-ZnO-Ag晶体管的结构,但是本发明所描述的计算压电电子学器件界面处的压电电荷分布的方法也同样适用于fcc-Ag-ZnO-Ag晶体管的结构。It should be noted that, for the right electrode in Figure 3(a), that is, the O-Ag junction, the stable structure is that the Ag atom is at the top of the oxygen atom; for the left electrode in Figure 3(a), that is, the Ag-Zn At the junction, there are two stable structures, the hexagonal cavity site (hcp) and the face-centered cavity site (fcc) of Zn. Therefore, according to the structure at the Ag-Zn polarization plane, there are two different stable transistor structures, named hcp-Ag-ZnO-Ag and fcc-Ag-ZnO-Ag transistors respectively. Figure 3(a) shows the structure of the hcp-Ag-ZnO-Ag transistor, but the method for calculating the piezoelectric charge distribution at the interface of the piezoelectric electronic device described in the present invention is also applicable to the fcc-Ag-ZnO - Structure of Ag transistors.

对于原子结构模型的优化可以采取本领域技术人员熟知的方法:首先,优化块体ZnO及Ag(111)晶面的原子结构;其次,用优化所得的ZnO及Ag(111)结构构造hcp-及fcc-Ag-ZnO-Ag晶体管,并得到ZnO及Ag(111)结构的稳定距离;最后,对体系中所有原子的位置进行优化,得到未施加应力下的晶体管稳定结构。For the optimization of the atomic structure model, a method well known to those skilled in the art can be adopted: first, optimize the atomic structure of the bulk ZnO and Ag(111) crystal planes; secondly, use the optimized ZnO and Ag(111) structures to construct hcp- and fcc-Ag-ZnO-Ag transistor, and get the stable distance of ZnO and Ag(111) structures; finally, optimize the position of all atoms in the system to get the stable structure of the transistor without stress.

外应力延着图3所示的c轴方向,使晶体管沿c轴方向拉伸的应力规定为正,而使其压缩的应力规定为负。外应力造成的应变的大小选择由-5%至+5%,并分两种方式施加在晶体管上:(1)应力只施加在中间的ZnO区域上;(2)应力施加在整个晶体管上。为了获得应力下晶体管的稳定结构,可以对那些受到应力作用的原子进行结构的优化(原子坐标弛豫)。因为第(2)种方法中所有原子的坐标都要进行弛豫,因而其比第(1)种方法耗费更多的时间。在后文中,本发明主要以第(1)方法所得到的结构进行说明。实际上,利用第(2)中方法所得的结构也会得到相似的压电电荷分布。The external stress is along the c-axis direction shown in FIG. 3 , the stress that makes the transistor stretch along the c-axis direction is defined as positive, and the stress that makes it compress is defined as negative. The strain caused by the external stress is selected from -5% to +5%, and is applied to the transistor in two ways: (1) the stress is only applied to the middle ZnO region; (2) the stress is applied to the entire transistor. In order to obtain a stable structure of the transistor under stress, the structure of those atoms subjected to stress can be optimized (atomic coordinate relaxation). Because the coordinates of all atoms in the method (2) need to be relaxed, it takes more time than the method (1). Hereinafter, the present invention will be mainly described using the structure obtained by the method (1). In fact, the structure obtained by the method in (2) will also get a similar piezoelectric charge distribution.

图3(b)是根据图3(a)提供的实施例的Ag-ZnO-Ag压电电子学晶体管超晶胞内面平均静电势(黑色实线)及宏观平均静电势(黑色点线)。其中宏观平均静电势是在面平均静电势基础上沿c轴方向求得的平均值,其计算方法为本领域技术人员所熟知,于此不予赘述。图3(c)是根据图3(a)提供的实施例的Ag-ZnO-Ag压电电子学晶体管超晶胞内面平均电荷密度。其中,图3(b)的纵坐标为电势(单位为电子伏特),图3(c)的纵坐标为面平均电荷密度值(单位为绝对电子电荷/埃3),横坐标为相对位置。Fig. 3(b) shows the average electrostatic potential (black solid line) and the macroscopic average electrostatic potential (black dotted line) of the Ag-ZnO-Ag piezoelectric electronic transistor supercell according to the embodiment provided in Fig. 3(a). The macroscopic average electrostatic potential is the average value obtained along the c-axis direction on the basis of the surface average electrostatic potential, and its calculation method is well known to those skilled in the art, and will not be repeated here. Fig. 3(c) is the average charge density on the inner surface of the Ag-ZnO-Ag piezoelectric electronic transistor supercell according to the embodiment provided in Fig. 3(a). Among them, the ordinate of Figure 3(b) is the electric potential (unit is electron volts), the ordinate of Figure 3(c) is the surface average charge density value (unit is absolute electron charge/angstrom 3 ), and the abscissa is the relative position.

从图3(b)和图3(c)中可以看出,在晶体管中间的ZnO区域的四个单层Zn-O中,从如图所示的左边数第2层Zn-O所对应的面平均静电势和面平均电荷密度与第三层的相似,而第1层和第4层Zn-O所对应的面平均静电势和面平均电荷密度由于受到Ag电极的影响而与中间的两层不同。另外,宏观静电势在第2、3两层Zn-O中呈线性(由图3(b)中的粗体虚线表示)而在第1、4两层中偏离了线性。通过以上分析,可以用E和F两个平行于ab面的平面将中间ZnO区域分为三个部分:BE为左接触区域,包括从如图3所示的ZnO区域的左数第一层Zn-O,FC为右接触区域,包括从如图3所示的ZnO区域的左数第4层Zn-O,而EF为ZnO内部区域,包括从如图3所示的ZnO区域的左数第2、3层Zn-O,如图3所示。It can be seen from Figure 3(b) and Figure 3(c) that among the four single-layer Zn-O layers in the ZnO region in the middle of the transistor, the second layer of Zn-O from the left as shown in the figure corresponds to The surface average electrostatic potential and surface average charge density are similar to those of the third layer, while the surface average electrostatic potential and surface average charge density corresponding to the first and fourth layers of Zn-O are different from those of the middle two layers due to the influence of the Ag electrode. Layers are different. In addition, the macroscopic electrostatic potential is linear in the second and third layers of Zn-O (indicated by the bold dashed line in Figure 3(b)) but deviates from linearity in the first and fourth layers. Through the above analysis, the middle ZnO region can be divided into three parts by E and F two planes parallel to the ab plane: BE is the left contact region, including the first layer of Zn from the left of the ZnO region as shown in Figure 3 -O, FC is the right contact area, including the fourth layer Zn-O from the left of the ZnO area shown in Figure 3, and EF is the ZnO internal area, including the fourth layer from the left of the ZnO area shown in Figure 3 2. Three layers of Zn-O, as shown in Figure 3.

需要说明的是,虽然在图3中只给出了hcp-Ag-ZnO-Ag晶体管的结构,但是以上所用的方法,包括结构优化、计算面平均静电势和宏观平均静电势、施加应力、及划分左右接触区域的方法,也同样适用于fcc-Ag-ZnO-Ag晶体管。It should be noted that although only the structure of the hcp-Ag-ZnO-Ag transistor is shown in Figure 3, the methods used above include structural optimization, calculation of surface average electrostatic potential and macroscopic average electrostatic potential, applying stress, and The method of dividing the left and right contact regions is also applicable to fcc-Ag-ZnO-Ag transistors.

图4是应力仅施加在ZnO上时hcp-Ag-ZnO-Ag晶体管接触区域压电电荷分布图。其中,图4(a)是晶体管中的ZnO在±1%应力下时,hcp-Ag-ZnO-Ag晶体管的Ag-Zn-O接触区域(即如图3所示的左接触区域BE)的压电电荷分布图;图4(b)是晶体管中的ZnO在±5%应力下时,hcp-Ag-ZnO-Ag晶体管的Ag-Zn-O接触区域(即如图3所示的左接触区域BE)的压电电荷分布图;图4(c)是晶体管中的ZnO在±5%应力下时,hcp-Ag-ZnO-Ag晶体管的Zn-O-Ag的接触区域(即如图3所示的右接触区域FC)的压电电荷分布图;图4(d)是晶体管中的ZnO在±5%应力下时,hcp-Ag-ZnO-Ag晶体管的Zn-O-Ag接触区域(即如图3所示的右接触区域FC)的压电电荷分布图。其中,曲线1表示晶体管受到压缩应力(即负应力)的压电电荷分布曲线,曲线2表示晶体管受到拉伸应力(即正应力)的压电电荷分布曲线,插图为接触区域电荷分布(即有应变电荷的分布)。图4中横坐标为接触区域内相对位置,纵坐标为绝对电子电荷。Fig. 4 is a diagram of the piezoelectric charge distribution in the contact area of the hcp-Ag-ZnO-Ag transistor when the stress is only applied on the ZnO. Among them, Fig. 4 (a) is when the ZnO in the transistor is under ± 1% stress, the Ag-Zn-O contact region of the hcp-Ag-ZnO-Ag transistor (ie the left contact region BE shown in Fig. 3) Piezoelectric charge distribution diagram; Fig. 4 (b) is when the ZnO in the transistor is under ± 5% stress, the Ag-Zn-O contact area of hcp-Ag-ZnO-Ag transistor (ie the left contact as shown in Fig. 3 The piezoelectric charge distribution diagram of the region BE); Fig. 4 (c) is when the ZnO in the transistor is under ± 5% stress, the contact region of the Zn-O-Ag of the hcp-Ag-ZnO-Ag transistor (that is, as shown in Fig. 3 Figure 4(d) is the Zn-O-Ag contact region ( That is, the piezoelectric charge distribution diagram of the right contact region FC) as shown in FIG. 3 . Among them, curve 1 represents the piezoelectric charge distribution curve of the transistor subjected to compressive stress (i.e. negative stress), curve 2 represents the piezoelectric charge distribution curve of the transistor subjected to tensile stress (i.e. positive stress), and the illustration shows the charge distribution in the contact area (i.e. with distribution of strain charges). In Fig. 4, the abscissa is the relative position in the contact area, and the ordinate is the absolute electron charge.

图5是在应力仅施加在ZnO上时fcc-Ag-ZnO-Ag晶体管接触区域压电电荷分布图。其中,图5(a)是晶体管中的ZnO在±1%应力下时,fcc-Ag-ZnO-Ag晶体管的Ag-Zn-O接触区域的压电电荷分布图;图5(b)是晶体管中的ZnO在±5%应力下时,fcc-Ag-ZnO-Ag晶体管的Ag-Zn-O接触区域的压电电荷分布图;图5(c)是晶体管中的ZnO在±1%应力下时,fcc-Ag-ZnO-Ag晶体管的Zn-O-Ag接触区域的压电电荷分布图;图5(d)是晶体管中的ZnO在±5%应力下时,fcc-Ag-ZnO-Ag晶体管的Zn-O-Ag接触区域的压电电荷分布图。其中,曲线3表示晶体管受到压缩应力(即负应力)的压电电荷分布曲线,曲线4表示晶体管受到拉伸应力(即正应力)的压电电荷分布曲线,插图为接触区域电荷分布(即有应变电荷的分布)。图5中横坐标为接触区域内相对位置,纵坐标为绝对电子电荷。Fig. 5 is a diagram of the piezoelectric charge distribution in the contact area of the fcc-Ag-ZnO-Ag transistor when the stress is only applied on the ZnO. Among them, Figure 5(a) is the piezoelectric charge distribution diagram of the Ag-Zn-O contact region of the fcc-Ag-ZnO-Ag transistor when the ZnO in the transistor is under ±1% stress; Figure 5(b) is the transistor The piezoelectric charge distribution diagram of the Ag-Zn-O contact region of the fcc-Ag-ZnO-Ag transistor when the ZnO in the transistor is under ±5% stress; Figure 5(c) is the ZnO in the transistor under the ±1% stress , the piezoelectric charge distribution diagram of the Zn-O-Ag contact region of the fcc-Ag-ZnO-Ag transistor; Figure 5(d) is the fcc-Ag-ZnO-Ag Piezoelectric charge distribution map of the Zn-O-Ag contact region of a transistor. Among them, curve 3 represents the piezoelectric charge distribution curve of the transistor subjected to compressive stress (i.e. negative stress), curve 4 represents the piezoelectric charge distribution curve of the transistor subjected to tensile stress (i.e. positive stress), and the illustration shows the charge distribution in the contact area (i.e. distribution of strain charges). In Fig. 5, the abscissa is the relative position in the contact area, and the ordinate is the absolute electron charge.

图4和图5插图中所示的电荷分布显示出了原子尺度的波动。在经典压电电子学理论中,压电电荷被定义为接触区域中受外界应力而产生的电荷。根据这个定义,可以计算出接触区域中受到应力下和未受到应力下电荷分布的差值,这个电荷分布的差值就是图4和图5中所示的压电电荷的分布。从图4和图5中可以看出,hcp-和fcc-晶体管相同接触面在相同应力下的压电电荷分布是相似的。然而,左右接触面的压电电荷分布却并不相同,这是因为两个接触面的结构并不对称。另外,压电电荷的分布在不同的应力下呈现出近似的对称性:当应力比较小,即±1%时,相反应力下的压电电荷分布成近似的镜面对称,如图4(a),4(c),5(a)和5(c)所示。然而,当应力增大,到达±5%时,相反压力下的压电电荷分布偏离了镜面对称,如图4(b),4(d),5(b)和5(d)所示。其中,偏离较大的峰在图中用箭头标出。The charge distributions shown in the insets of Figures 4 and 5 show atomic-scale fluctuations. In the classical piezoelectric electronics theory, piezoelectric charge is defined as the charge generated by external stress in the contact area. According to this definition, the difference of charge distribution under stress and without stress in the contact area can be calculated. This difference of charge distribution is the distribution of piezoelectric charge shown in Fig. 4 and Fig. 5. From Fig. 4 and Fig. 5, it can be seen that the piezoelectric charge distribution at the same contact surface of hcp- and fcc-transistors under the same stress is similar. However, the piezoelectric charge distributions on the left and right contact surfaces are not the same, because the structures of the two contact surfaces are not symmetrical. In addition, the distribution of piezoelectric charges shows an approximate symmetry under different stresses: when the stress is relatively small, that is, ±1%, the distribution of piezoelectric charges under the opposite stress is approximately mirror-symmetrical, as shown in Figure 4(a) , 4(c), 5(a) and 5(c). However, when the stress increases to ±5%, the piezoelectric charge distribution under the opposite pressure deviates from the mirror symmetry, as shown in Figs. 4(b), 4(d), 5(b) and 5(d). Among them, the peaks with larger deviations are marked with arrows in the figure.

图6是在应力仅施加在ZnO上时晶体管接触区域总压电电荷随应力变化的图示。其中,图6(a)是在应力仅施加在ZnO上时hcp-Ag-ZnO-Ag晶体管的Ag-Zn-O接触区域总压电电荷随应力变化的图示;图6(b)是在应力仅施加在ZnO上时hcp-Ag-ZnO-Ag晶体管的Zn-O-Ag接触区域总压电电荷随应力变化的图示;图6(c)是在应力仅施加在ZnO上时fcc-Ag-ZnO-Ag晶体管的Ag-Zn-O接触区域总压电电荷随应力变化的图示;图6(d)是在应力仅施加在ZnO上时fcc-Ag-ZnO-Ag晶体管的Zn-O-Ag接触区域总压电电荷随应力变化的图示。其中,图6(a)和图6(b)的Ag-Zn-O接触区域和Zn-O-Ag接触区域分别是图3所示的晶体管的原子尺度模型中的左接触区域和右接触区域,对于图6(c)和图6(d)中描述的fcc-Ag-ZnO-Ag晶体管,本领域技术人员应当理解该fcc-Ag-ZnO-Ag晶体管也应存在与hcp-Ag-ZnO-Ag晶体管类似的Ag-Zn-O(左)接触区域和Zn-O-Ag(右)接触区域。其中,横坐标表示应力大小,纵坐标表示绝对电子电荷。Figure 6 is a graphical representation of the total piezoelectric charge of the transistor contact region as a function of stress when stress is applied only on ZnO. Among them, Figure 6(a) is a diagram showing the total piezoelectric charge of the Ag-Zn-O contact region of the hcp-Ag-ZnO-Ag transistor as a function of stress when the stress is only applied on ZnO; Illustration of the total piezoelectric charge of the Zn-O-Ag contact region of the hcp-Ag-ZnO-Ag transistor as a function of stress when the stress is only applied on ZnO; Fig. 6(c) is fcc- when the stress is only applied on ZnO Illustration of the total piezoelectric charge of the Ag-Zn-O contact region of the Ag-ZnO-Ag transistor as a function of stress; Figure 6(d) is the Zn- Schematic representation of the total piezoelectric charge in the O-Ag contact region as a function of stress. Among them, the Ag-Zn-O contact region and Zn-O-Ag contact region in Figure 6(a) and Figure 6(b) are the left contact region and the right contact region in the atomic scale model of the transistor shown in Figure 3 , for the fcc-Ag-ZnO-Ag transistor described in Fig. 6(c) and Fig. 6(d), those skilled in the art should understand that the fcc-Ag-ZnO-Ag transistor should also exist with hcp-Ag-ZnO- Similar Ag-Zn-O (left) and Zn-O-Ag (right) contact regions for Ag transistors. Among them, the abscissa represents the magnitude of the stress, and the ordinate represents the absolute electronic charge.

需要说明的是,除了接触区域以外的其他区域的总电荷量几乎不会随外应力有所变化,这说明压电电荷都分布在接触区域内,其分布长度就是接触区域的长度。对于两种晶体管(即hcp-Ag-ZnO-Ag晶体管和fcc-Ag-ZnO-Ag晶体管)来说,他们的左右区域的长度彼此接近,大约为这与现有的经典压电电子学理论研究中所假设的分布区域处于同一量级。从图6中还可以看出,压电电荷分布非常不均匀,在Ag和Zn原子之间及O原子的附近可以发现较大的峰,这与现有研究中所作的压电电荷均匀分布的假设不同。无论是左接触区域或右接触区域中,增加拉伸/压缩应力的大小并不会明显改变压电电荷的分布形状,而只会增加峰值的大小。It should be noted that the total charge in other areas except the contact area hardly changes with the external stress, which means that the piezoelectric charges are all distributed in the contact area, and the distribution length is the length of the contact area. For two kinds of transistors (i.e. hcp-Ag-ZnO-Ag transistor and fcc-Ag-ZnO-Ag transistor), the lengths of their left and right regions are close to each other, about This is consistent with the distribution area assumed in the existing theoretical studies of classical piezoelectric electronics are in the same magnitude. It can also be seen from Figure 6 that the piezoelectric charge distribution is very uneven, and larger peaks can be found between the Ag and Zn atoms and near the O atom, which is consistent with the uniform distribution of the piezoelectric charge in the existing research. Assume differently. Whether it is in the left or right contact area, increasing the magnitude of the tensile/compressive stress does not significantly change the distribution shape of the piezoelectric charge, but only increases the magnitude of the peak.

图6中示出了在应力仅施加在ZnO上时hcp-晶体管及fcc-晶体管中左/右接触区域中总电荷量随外应力的变化。两种晶体管给出了相同的趋势,接触区域内总电荷量随外应力显示出明显的线性变化趋势。对于左接触区域,压缩应力使区域内正电荷增多而拉伸应力使区域内的负电荷增多,相关趋势可参见图5(a)及5(c)。另一方面,对于右接触区域,压缩应力使区域内负电荷增多而拉伸应力使区域内正电荷增多,相关趋势由图5(b)及5(d)给出,与左区域相反。除了两个接触区域之外,还计算了左右Ag电极和ZnO内部区域(未示出),这些区域中的总电荷量几乎不随外应力有所变化,这说明所有压电电荷都分布在两个接触区域中。该结论与经典压电电子学理论相符。Fig. 6 shows the variation of total charges in the left/right contact regions of hcp-transistor and fcc-transistor with external stress when the stress is only applied on ZnO. The two transistors show the same trend, and the total charge in the contact area shows an obvious linear change trend with external stress. For the left contact region, the compressive stress increases the positive charge in the region and the tensile stress increases the negative charge in the region. The related trends can be seen in Figure 5(a) and 5(c). On the other hand, for the right contact region, the compressive stress increases the negative charge in the region and the tensile stress increases the positive charge in the region. The related trends are shown in Figure 5(b) and 5(d), which is opposite to the left region. In addition to the two contact regions, the left and right Ag electrodes and ZnO inner regions (not shown) were also calculated, and the total charge in these regions hardly changed with the external stress, which indicated that all piezoelectric charges were distributed in the two in the contact area. This conclusion is consistent with the classical piezoelectric electronics theory.

对应地,图7至图9是在应力施加在整个晶体管上时与图4至图6相对应的图示。Correspondingly, FIGS. 7-9 are diagrams corresponding to FIGS. 4-6 when stress is applied to the entire transistor.

图10是本发明提供的计算压电电子学器件界面处压电电荷分布系统的框图,如图10所示,该系统包括接收装置和计算装置。其中接收装置用于接收构成压电电子学器件的原子的原子种类、原子坐标和晶胞大小,计算装置用于:分别在压电电子学器件无应变和有应变的情况下,根据构成压电电子学器件的原子的原子种类、原子坐标和晶胞大小计算界面处的电荷量,其中,在无应变的情况下,该电荷量为无应变电荷量,以及在有应变的情况下,所述电荷量为有应变电荷量;以及计算界面处的无应变电荷量与所述有应变电荷量的差值以得到所述界面处的压电电荷分布。Fig. 10 is a block diagram of a system for calculating piezoelectric charge distribution at the interface of a piezoelectric electronic device provided by the present invention. As shown in Fig. 10 , the system includes a receiving device and a computing device. The receiving device is used to receive the atomic species, atomic coordinates and unit cell size of the atoms constituting the piezoelectric electronic device, and the calculating device is used to: respectively, in the case of no strain and strain in the piezoelectric electronic device, according to the piezoelectric electronic device The atomic species, atomic coordinates, and unit cell size of the atoms of the electronic device calculate the amount of charge at the interface, where, in the case of no strain, the amount of charge is the amount of charge without strain, and in the case of strain, the The charge amount is a strained charge amount; and the difference between the unstrained charge amount at the interface and the strained charge amount is calculated to obtain the piezoelectric charge distribution at the interface.

需要说明的是,本发明提供的计算压电电子学器件界面处压电电荷分布系统的具体细节及益处与本发明提供的计算压电电子学器件界面处压电电荷分布方法相对应,于此不予赘述。It should be noted that the specific details and benefits of the system for calculating the distribution of piezoelectric charges at the interface of piezoelectric electronic devices provided by the present invention correspond to the method for calculating the distribution of piezoelectric charges at the interface of piezoelectric electronic devices provided by the present invention, hereby I won't go into details.

以上结合附图详细描述了本发明的优选实施方式,但是,本发明并不限于上述实施方式中的具体细节,在本发明的技术构思范围内,可以对本发明的技术方案进行多种简单变型,这些简单变型均属于本发明的保护范围。The preferred embodiment of the present invention has been described in detail above in conjunction with the accompanying drawings, but the present invention is not limited to the specific details of the above embodiment, within the scope of the technical concept of the present invention, various simple modifications can be made to the technical solution of the present invention, These simple modifications all belong to the protection scope of the present invention.

根据以上本发明提供的计算压电电子学器件界面处压电电荷分布的技术,根据实验可以得到以下实验结果:在应力比较小,如,±1%时,相反应力下的压电电荷分布呈近似的镜面对称,然而,当应力增大,如到达±5%时,相反应力下的压电电荷分布偏离了镜面对称。According to the technique of calculating the piezoelectric charge distribution at the interface of the piezoelectric electronic device provided by the present invention above, the following experimental results can be obtained according to the experiment: when the stress is relatively small, such as ±1%, the piezoelectric charge distribution under the opposite stress is Approximate mirror symmetry, however, when the stress increases, eg up to ±5%, the piezoelectric charge distribution under opposite stress deviates from the mirror symmetry.

本发明提供的计算压电电荷分布的过程简便,利用所得到的结果可以对压电电子学器件的工作性能进行更为准确的模拟,通过计算不同压电材料的压电电荷分布,可以对压电电子学器件的输运性能进行模拟,以找出结果最好的器件进行研制、生产,以得到更为优化的器件,这样可以节省器件研发时间及生产成本。The process of calculating piezoelectric charge distribution provided by the present invention is simple and convenient, and the working performance of piezoelectric electronic devices can be simulated more accurately by using the obtained results. By calculating the piezoelectric charge distribution of different piezoelectric materials, piezoelectric The transport performance of electronic devices is simulated to find out the device with the best results for development and production to obtain a more optimized device, which can save device development time and production costs.

另外需要说明的是,在上述具体实施方式中所描述的各个具体技术特征,在不矛盾的情况下,可以通过任何合适的方式进行组合。为了避免不必要的重复,本发明对各种可能的组合方式不再另行说明。In addition, it should be noted that the various specific technical features described in the above specific implementation manners may be combined in any suitable manner if there is no contradiction. In order to avoid unnecessary repetition, various possible combinations are not further described in the present invention.

此外,本发明的各种不同的实施方式之间也可以进行任意组合,只要其不违背本发明的思想,其同样应当视为本发明所公开的内容。In addition, various combinations of different embodiments of the present invention can also be combined arbitrarily, as long as they do not violate the idea of the present invention, they should also be regarded as the disclosed content of the present invention.

Claims (10)

1.一种计算压电电子学器件界面处压电电荷分布的方法,其特征在于,包括:1. A method for calculating piezoelectric charge distribution at the interface of a piezoelectric electronic device, characterized in that it comprises: 接收构成所述压电电子学器件的原子的原子种类、原子坐标和晶胞大小;receiving atomic species, atomic coordinates, and unit cell sizes of atoms constituting the piezoelectric electronic device; 分别在所述压电电子学器件无应变和有应变的情况下,根据所述原子种类、原子坐标和晶胞大小计算所述界面处的电荷量,其中,在无应变的情况下,所述电荷量为无应变电荷量,以及在有应变的情况下,所述电荷量为有应变电荷量;以及In the case of no strain and strain in the piezoelectric electronic device, calculate the amount of charge at the interface according to the atomic species, atomic coordinates and unit cell size, wherein, in the case of no strain, the the charge is an unstrained charge, and in the case of strain, the charge is a strained charge; and 计算所述界面处的所述无应变电荷量与所述有应变电荷量的差值以得到所述界面处的压电电荷分布。calculating the difference between the unstrained charge amount and the strained charge amount at the interface to obtain the piezoelectric charge distribution at the interface. 2.根据权利要求1所述的方法,其特征在于,所述计算所述界面处的电荷量包括:2. The method according to claim 1, wherein the calculating the amount of charge at the interface comprises: 在垂直于该压电电子学器件界面的方向上将所述压电电子学器件划分多个格点;以及dividing the piezoelectric electronic device into a plurality of lattice points in a direction perpendicular to the piezoelectric electronic device interface; and 计算每个格点的电荷量,根据所述原子坐标得到所述界面处的电荷量。The amount of charge at each grid point is calculated, and the amount of charge at the interface is obtained according to the atomic coordinates. 3.根据权利要求2所述的方法,其特征在于,所述计算每个格点的电荷量包括:3. The method according to claim 2, wherein said calculating the amount of charge of each lattice point comprises: 根据所述原子种类、原子坐标和晶胞大小得到所述压电电子学器件的面平均静电势;Obtaining the surface average electrostatic potential of the piezoelectric electronic device according to the atomic species, atomic coordinates and unit cell size; 根据所述面平均静电势得到所述压电电子学器件的面平均电荷密度;以及Obtaining the surface average charge density of the piezoelectric electronic device according to the surface average electrostatic potential; and 根据所述面平均电荷密度得到每个格点的电荷量。The charge amount of each lattice point is obtained according to the surface average charge density. 4.根据权利要求3所述的方法,其特征在于,所述根据所述原子种类、原子坐标和晶胞大小得到所述压电电子学器件的面平均静电势采用密度泛函理论DFT方法或哈特里—福克方法或半经验的紧密束缚方法。4. method according to claim 3, it is characterized in that, described according to described atomic species, atomic coordinates and unit cell size obtain the surface average electrostatic potential of described piezoelectric electronics device adopt density functional theory DFT method or Hartree-Fock method or semi-empirical tight-binding method. 5.根据权利要求3所述的方法,其特征在于,根据所述面平均静电势得到所述压电电子学器件的面平均电荷密度采用泊松方程来计算。5 . The method according to claim 3 , wherein the surface average charge density of the piezoelectric electronic device obtained according to the surface average electrostatic potential is calculated using Poisson's equation. 6.一种计算压电电子学器件界面处压电电荷分布的系统,其特征在于,包括:6. A system for calculating the piezoelectric charge distribution at the interface of a piezoelectric electronic device, characterized in that it comprises: 接收装置,用于接收构成所述压电电子学器件的原子的原子种类、原子坐标和晶胞大小;以及receiving means for receiving the atomic species, atomic coordinates and unit cell size of the atoms constituting the piezoelectric electronic device; and 计算装置,用于:Computing device for: 分别在所述压电电子学器件无应变和有应变的情况下,根据所述原子种类、原子坐标和晶胞大小计算所述界面处的电荷量,其中,在无应变的情况下,所述电荷量为无应变电荷量,以及在有应变的情况下,所述电荷量为有应变电荷量;以及In the case of no strain and strain in the piezoelectric electronic device, calculate the amount of charge at the interface according to the atomic species, atomic coordinates and unit cell size, wherein, in the case of no strain, the the charge is an unstrained charge, and in the case of strain, the charge is a strained charge; and 计算所述界面处的所述无应变电荷量与所述有应变电荷量的差值以得到所述界面处的压电电荷分布。calculating the difference between the unstrained charge amount and the strained charge amount at the interface to obtain the piezoelectric charge distribution at the interface. 7.根据权利要求6所述的系统,其特征在于,所述计算装置计算界面处的电荷量包括:7. The system according to claim 6, wherein the computing means calculating the amount of charge at the interface comprises: 在垂直于该压电电子学器件界面的方向上将所述压电电子学器件划分多个格点;以及dividing the piezoelectric electronic device into a plurality of lattice points in a direction perpendicular to the piezoelectric electronic device interface; and 计算每个格点的电荷量,根据所述原子坐标得到所述界面处的电荷量。The amount of charge at each grid point is calculated, and the amount of charge at the interface is obtained according to the atomic coordinates. 8.根据权利要求7所述的系统,其特征在于,所述计算装置计算每个格点的电荷量包括:8. The system according to claim 7, wherein the calculating means calculating the amount of charge of each lattice point comprises: 根据所述原子种类、原子坐标和晶胞大小得到所述压电电子学器件的面平均静电势;Obtaining the surface average electrostatic potential of the piezoelectric electronic device according to the atomic species, atomic coordinates and unit cell size; 根据所述面平均静电势得到所述压电电子学器件的面平均电荷密度;以及Obtaining the surface average charge density of the piezoelectric electronic device according to the surface average electrostatic potential; and 根据所述面平均电荷密度得到每个格点的电荷量。The charge amount of each lattice point is obtained according to the surface average charge density. 9.根据权利要求8所述的系统,其特征在于,所述计算装置采用密度泛函理论DFT方法或哈特里—福克方法或半经验的紧密束缚方法来根据所述原子种类、原子坐标和晶胞大小得到所述压电电子学器件的面平均静电势。9. The system according to claim 8, characterized in that, the computing device adopts density functional theory (DFT) method or Hartree-Fock method or semi-empirical tight binding method to calculate and unit cell size to obtain the surface average electrostatic potential of the piezoelectric electronic device. 10.根据权利要求9所述的系统,其特征在于,所述计算装置采用泊松方程来计算根据所述面平均静电势得到所述压电电子学器件的面平均电荷密度。10 . The system according to claim 9 , wherein the calculation device uses Poisson's equation to calculate the surface average charge density of the piezoelectric electronic device obtained from the surface average electrostatic potential. 11 .
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