CN105070265B - Liquid crystal display and its demultplexer control circuit - Google Patents
Liquid crystal display and its demultplexer control circuit Download PDFInfo
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- CN105070265B CN105070265B CN201510572122.2A CN201510572122A CN105070265B CN 105070265 B CN105070265 B CN 105070265B CN 201510572122 A CN201510572122 A CN 201510572122A CN 105070265 B CN105070265 B CN 105070265B
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Abstract
One aspect of the present invention provides a kind of demultplexer control circuit for liquid crystal display, the demultplexer control circuit includes control unit and the demultplexer being electrically connected with the control unit, the demultplexer includes transmission gate, when the liquid crystal display carries out array test, the control unit provides control signal to the demultplexer, it is rear to disconnect to control the transmission gate of the demultplexer first to turn on.The present invention also provides a kind of liquid crystal display with above-mentioned demultplexer control circuit.Demultplexer control circuit of the invention and the liquid crystal display with the demultplexer can effectively reduce the border width of display panel.Meanwhile after liquid crystal display is normally shown, on the one hand the transmission gate of demultplexer can reduce the load force of the demultplexer, on the other hand can reduce the risk that signal end imports static discharge all in off-state.
Description
Technical field
The present invention relates to field of liquid crystal display, has this more more particularly, to a kind of demultplexer control circuit and one kind
The liquid crystal display of distributor.
Background technology
Existing display panel is such as mobile phone display panel, computer display panel when manufacturing and designing, it will usually reserved
Array test.Referring to Fig. 1, Fig. 1 is the plane cabling schematic diagram of existing liquid crystal display, specific method of testing is, aobvious
Show panel 60 side set one group of test pad 61, when then the display panel 60 is normally shown required signal by
The test pad 61 is provided to the display panel 60 by external mode, to be tested.Above-mentioned display panel 60 also wraps
Include integrated circuit 63 and the demultplexer (not shown) set in the inner.The demultplexer is respectively by positioned at display panel
First group of cabling A of 60 sides and second group of cabling B positioned at the relative opposite side of display panel 60 are connected with test pad 61.
First group of cabling A and second group of cabling B are used for when carrying out array test, control signal are provided to demultplexer, by it
Transmission gate is closed, and prevents it from electric leakage occurs and influences the effect of array test.
Wherein, if the demultplexer simply uses N-type TFT (Thin Film Transistor, thin film transistor (TFT))
Or p-type TFT is then respectively necessary for drawing 3 circuits as transmission gate.If the demultplexer uses N-type TFT and P simultaneously
Type TFT then needs to draw 6 circuits as transmission gate.Consequently, it is possible to not only add the complexity of wiring, and also need to
The space for accommodating the circuit is reserved in the opposite sides of the display panel 60, and causes the display panel 60 to a certain extent
The border width increase of both sides.Meanwhile when the display panel 60 is normally shown, the part circuit can increase the demultplexer
Load force, for the display panel 60 of ultrahigh resolution, it influences can be more serious.
The content of the invention
The present invention provides a kind of demultplexer control circuit and the liquid crystal display with the demultplexer, and it can subtract
The border width of small display panel both sides, meanwhile, when display panel is normally shown, reduce the load force of the demultplexer.
One aspect of the present invention provides a kind of demultplexer control circuit, and the demultplexer control circuit includes control
Unit processed and the demultplexer being electrically connected with the control unit, the demultplexer includes transmission gate, when the liquid crystal
When display carries out array test, described control unit provides control signal to the demultplexer, to control the multichannel
The transmission gate of distributor first turns on, rear to disconnect.
Wherein, the demultplexer is used as using N-type TFT (Thin Film Transistor, thin film transistor (TFT)) and passed
Defeated door, described control unit include the first control terminal, and the grid of the N-type TFT is electrically connected with first control terminal, described
N-type TFT drain electrode is electrically connected with the signal end of the demultplexer respectively, and the source electrode of the N-type TFT is low potential, when
When the liquid crystal display carries out array test, first control terminal provides high potential to the grid of the N-type TFT, control
N-type TFT is turned on so that the signal end of the demultplexer is pulled down to low potential, so as to which the N-type TFT be disconnected.
Wherein, when the liquid crystal display is normally shown, first control terminal provides low potential to the N-type TFT
Grid, with control N-type TFT disconnect.
Wherein, the demultplexer includes the second control terminal using p-type TFT as transmission gate, described control unit, should
P-type TFT grid is electrically connected with second control terminal, the p-type TFT signal with the demultplexer respectively that drains
End is electrically connected with, and p-type TFT source electrode is high potential, when the liquid crystal display carries out array test, second control terminal
Low potential is provided to the grid of the p-type TFT, to control p-type TFT to turn on so that the signal end quilt of the demultplexer
High potential is drawn high, so as to which the p-type TFT be disconnected.
Wherein, when the liquid crystal display is normally shown, second control terminal provides high potential to the p-type TFT
Grid, with control p-type TFT disconnect.
Wherein, when the demultplexer is simultaneously using N-type TFT and p-type TFT as transmission gate, described control unit
Including the first control terminal and the second control terminal, wherein, the grid of the N-type TFT is electrically connected with first control terminal, described
N-type TFT drain electrode is electrically connected with the signal end of the demultplexer respectively, and the source electrode of the N-type TFT is low potential, when
When the liquid crystal display carries out array test, first control terminal provides high potential to the grid of the N-type TFT, with control
N-type TFT is turned on so that the signal end of the demultplexer is pulled down to low potential, so as to which the N-type TFT be disconnected；It is described
P-type TFT grid is electrically connected with second control terminal, the signal with the demultplexer respectively that drains of the p-type TFT
End is electrically connected with, and the source electrode of the p-type TFT is high potential, when the liquid crystal display carries out array test, second control
End provides low potential to the grid of the p-type TFT, to control p-type TFT to turn on so that the signal end quilt of the demultplexer
High potential is drawn high, so as to which the p-type TFT be disconnected.
Wherein, when the liquid crystal display is normally shown, first control terminal provides low potential to the N-type TFT
Grid, with control N-type TFT disconnect.
Wherein, when the liquid crystal display is normally shown, second control terminal provides high potential to the p-type TFT
Grid, with control p-type TFT disconnect
Another aspect of the present invention provides a kind of liquid crystal display, and it includes display panel and demultplexer control electricity
Road, the display panel are provided with test pad, and for the demultplexer control circuit by the test pad incoming control signal, this is more
Distributor control circuit includes above-mentioned demultplexer control circuit.
Compared to prior art, in the demultplexer control circuit and liquid crystal display of the embodiment of the present invention, not only may be used
To simplify the complexity of wiring, but also it can effectively reduce the border width of display panel.It is meanwhile normal in liquid crystal display
After display, on the one hand the transmission gate of demultplexer can reduce the load force of the demultplexer all in off-state, another
Aspect can reduce the risk that signal end imports static discharge.
Brief description of the drawings
In order to illustrate more clearly about the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
There is the required accompanying drawing used in technology description to be briefly described, it should be apparent that, drawings in the following description are only this
Some embodiments of invention, for those of ordinary skill in the art, on the premise of not paying creative work, can be with
Other accompanying drawings are obtained according to these accompanying drawings.
Fig. 1 is the plane cabling schematic diagram of existing liquid crystal display.
Fig. 2 is the circuit diagram of the demultplexer control circuit of embodiments of the invention.
Fig. 3 be the present invention demultplexer control circuit when carrying out array test, the first control terminal offer control
The timing diagram of signal.
The demultplexer control circuit of Fig. 4 present invention in normal display, control signal that the first control terminal provides
Timing diagram.
Fig. 5 is the circuit diagram of the demultplexer control circuit of another embodiment of the present invention.
Fig. 6 be the present invention demultplexer control circuit when carrying out array test, the second control terminal offer control
The timing diagram of signal.
The demultplexer control circuit of Fig. 7 present invention in normal display, control signal that the second control terminal provides
Timing diagram.
Fig. 8 is the circuit diagram of the demultplexer control circuit of another embodiment of the present invention.
Fig. 9 is the floor map of the liquid crystal display of embodiments of the invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Site preparation describes, it is clear that described embodiment is only part of the embodiment of the present invention, rather than whole embodiments.It is based on
Embodiment in the present invention, those of ordinary skill in the art are obtained every other under the premise of creative work is not made
Embodiment, belong to the scope of protection of the invention.
In addition, the explanation of following embodiment is with reference to additional diagram, the spy implemented to illustrate the present invention can be used to
Determine embodiment.The direction term being previously mentioned in the present invention, for example, " on ", " under ", "front", "rear", "left", "right", " interior ",
" outer ", " side " etc., only it is the direction with reference to annexed drawings, therefore, the direction term used is to more preferably, more clearly say
It is bright and understand the present invention, rather than instruction or infer the device of meaning or element and must have specific orientation, with specific side
Position construction and operation, therefore be not considered as limiting the invention.
In the description of the invention, it is necessary to illustrate, unless otherwise clearly defined and limited, term " installation ", " phase
Even ", " connection " should be interpreted broadly, for example, it may be being fixedly connected or detachably connected, or integratedly be connected
Connect；Can mechanically connect；Can be joined directly together, can also be indirectly connected by intermediary, can be in two elements
The connection in portion.For the ordinary skill in the art, the tool of above-mentioned term in the present invention can be understood with concrete condition
Body implication.
In addition, in the description of the invention, unless otherwise indicated, " multiple " are meant that two or more.If this
Occurring the term of " process " in specification, it refers not only to independent process, when can not clearly be distinguished with other processes, as long as
It can realize that the effect desired by the process is then also included within this term.In addition, the numerical value model represented in this specification with "~"
Enclose the scope for referring to that "~" front and rear numerical value recorded is included as minimum value and maximum.In the accompanying drawings, structure
Similar or identical unit is indicated by the same numeral.
Referring to Fig. 2, Fig. 2 is the circuit diagram of the demultplexer control circuit of the present invention, the demultplexer can be used for
Liquid crystal display.As shown in Fig. 2 the demultplexer control circuit 100 is electric including control unit 10 and with the control unit 10
Property connected demultplexer 30, the demultplexer bag 30 includes transmission gate 31, when the liquid crystal display carries out array test,
The control unit 10 provides control signal to the demultplexer 30, and the transmission gate 31 is first turned on, rear to disconnect.
In this preferred embodiment, (Thin Film Transistor, film are brilliant using N-type TFT for the demultplexer 30
Body pipe) transmission gate 31 is used as, the control unit 10 includes the first control terminal Control-N.N-type TFT grid G with this first
Control terminal Control-N is electrically connected with, and its drain D is electric with signal end CKHR, CKHG, CKHB of the demultplexer 30 respectively
Property connection, its source S is low potential VGL.Referring to Fig. 3, the demultplexer control circuit that Fig. 3 is the present invention is carrying out array
During test, the timing diagram for the control signal that the first control terminal provides.When carrying out array test, first control terminal Control-
N provides high potential VGH to N-type TFT grid G, then controls N-type TFT conductings so that the signal end of the demultplexer 30
CKHR, CKHG, CKHB are pulled down to low potential VGL, so as to which the N-type TFT be disconnected.
Referring to Fig. 4, the demultplexer control circuit of Fig. 4 present invention is in normal display, what the first control terminal provided
The timing diagram of control signal.When the liquid crystal display is normally shown, first control terminal Control-N provides low potential VGL
To N-type TFT grid G, N-type TFT is controlled to disconnect.
Figure is referred to, Fig. 5 is the circuit diagram of the demultplexer control circuit of another embodiment of the present invention.In the present invention
Embodiment in, the demultplexer 50 includes the second control terminal using p-type TFT as transmission gate, the control unit 10
Control-P, p-type TFT grid G and second control terminal Control-P are electrically connected with, its drain D respectively with the multichannel
Signal end XCKHR, XCKHG, XCKHB of distributor 50 are electrically connected with, and its source S is high potential VGH.Referring to Fig. 6, Fig. 6 is
The demultplexer control circuit of the present invention is when carrying out array test, the timing diagram for the control signal that the second control terminal provides.
When carrying out array test, second control terminal Control-P provides low potential VGL to p-type TFT grid G, controls the P
Type TFT is turned on so that signal end CKHR, CKHG, CKHB of the demultplexer 50 are pulled high to high potential VGH, so as to by p-type
TFT disconnects.
Referring to Fig. 7, the demultplexer control circuit of Fig. 7 present invention is in normal display, what the second control terminal provided
The timing diagram of control signal.Second control terminal Control-P provides high potential to p-type TFT grid G, controls the p-type
TFT disconnects.
Referring to Fig. 8, Fig. 8 is the circuit diagram of the demultplexer control circuit of another embodiment of the present invention.In this hair
In bright embodiment, the demultplexer 70 is included using N-type TFT and p-type TFT as transmission gate, the control unit 10 simultaneously
First control terminal Control-N and the second control terminal Control-P, wherein, N-type TFT grid G and first control terminal
Control-N is electrically connected with, and N-type TFT drain D is electrical with signal end CKHR, CKHG, CKHB of demultplexer 30 respectively
Connection, N-type TFT source S is low potential VGL.Referring to Fig. 3, when carrying out array test, first control terminal
Control-N provides high potential VGH to N-type TFT grid G, controls the N-type TFT to turn on so that the demultplexer 30
Signal end CKHR, CKHG, CKHB be pulled down to low potential VGL, so that N-type TFT be disconnected.P-type TFT grid G is with being somebody's turn to do
Second control terminal Control-P is electrically connected with, the p-type TFT drain D signal end with the demultplexer 50 respectively
XCKHR, XCKHG, XCKHB are connected, and p-type TFT source S is high potential VGH, referring to Fig. 6, when carrying out array test,
Second control terminal Control-P provides low potential VGL to p-type TFT grid G, then controls p-type TFT conductings so that this is more
Signal end CKHR, CKHG, CKHB of distributor 50 are pulled high to high potential VGH, so as to which p-type TFT be disconnected.
When the liquid crystal display is normally shown, first control terminal Control-N provides low potential VGL to N-type TFT
Grid G, so as to control N-type TFT disconnect.Second control terminal Control-P provides high potential to p-type TFT grid
G, so as to control p-type TFT to disconnect.
Referring to Fig. 9, Fig. 9 is the liquid crystal display 200 with above-mentioned demultplexer control circuit 100 of the present invention
Floor map.The liquid crystal display 200 also includes display panel 80, and the display panel 80 is provided with test pad 81, should
First control terminal Control-N and second control terminal Control-P can access high low potential by test pad 81 from outside,
To carry out array test.
In summary, the demultplexer control circuit 100 described in the embodiment of the present invention is for using N-type TFT or p-type
For TFT is as the demultplexer 30,50 of transmission gate 31,51,1 cabling is only needed, for using N-type TFT and P simultaneously
For type TFT is as the demultplexer 70 of transmission gate 71,2 cablings are also only needed, so as to can not only simplify wiring
Complexity, but also can effectively reduce the border width of display panel 80.Meanwhile normally shown in liquid crystal display 200
Afterwards, signal end CKHR, CKHG, CKHB, XCKHR, XCKHG, XCKHB of demultplexer 30,50 and 70 be all in off-state,
On the one hand the load force of the demultplexer 30,50 and 70 can be reduced, on the other hand can reduce signal end CKHR, CKHG, CKHB,
XCKHR, XCKHG, XCKHB import the risk of static discharge.
In the description of this specification, reference term " one embodiment ", " some embodiments ", " example ", " specifically show
The description of example " or " some examples " etc. means specific features, structure, material or the feature for combining the embodiment or example description
It is contained at least one embodiment or example of the present invention.In this manual, the schematic representation of above-mentioned term is differed
Surely identical embodiment or example are referred to.Moreover, specific features, structure, material or the feature of description can be any one
Combined in an appropriate manner in individual or multiple embodiments or example.
The above disclosed power for being only a kind of preferred embodiment of the present invention, the present invention can not being limited with this certainly
Sharp scope, one of ordinary skill in the art will appreciate that realizing all or part of flow of above-described embodiment, and weighed according to the present invention
Profit requires made equivalent variations, still falls within and invents covered scope.
Claims (9)
- A kind of 1. demultplexer control circuit for liquid crystal display, it is characterised in that the demultplexer control electricity Road, which includes control unit and the demultplexer being electrically connected with the control unit, the demultplexer, includes transmission gate, when When the liquid crystal display carries out array test, described control unit provides control signal to the demultplexer, with control The transmission gate of the demultplexer first turns on, rear to disconnect；When the liquid crystal display is normally shown, described control unit to The demultplexer provides the control signal opposite with the current potential of the control signal, to control the biography of the demultplexer Defeated door disconnects.
- 2. demultplexer control circuit as claimed in claim 1, it is characterised in that the demultplexer uses N-type TFT (Thin Film Transistor, thin film transistor (TFT)) is used as transmission gate, and described control unit includes the first control terminal, the N Type TFT grid is electrically connected with first control terminal, the letter with the demultplexer respectively that drains of the N-type TFT Number end be electrically connected with, the source electrode of the N-type TFT be low potential, when the liquid crystal display progress array test when, described first Control terminal provides high potential to the grid of the N-type TFT, controls N-type TFT to turn on so that the signal of the demultplexer End is pulled down to low potential, so as to which the N-type TFT be disconnected.
- 3. demultplexer control circuit as claimed in claim 2, it is characterised in that when the liquid crystal display is normally shown When, first control terminal provides low potential to the grid of the N-type TFT, to control N-type TFT to disconnect.
- 4. demultplexer control circuit as claimed in claim 1, it is characterised in that the demultplexer uses p-type TFT As transmission gate, described control unit includes the second control terminal, and p-type TFT grid is electrically connected with second control terminal, P-type TFT drain electrode is electrically connected with the signal end of the demultplexer respectively, and p-type TFT source electrode is high potential, when When the liquid crystal display carries out array test, second control terminal provides low potential to the grid of the p-type TFT, with control P-type TFT is turned on so that the signal end of the demultplexer is pulled high to high potential, so as to which the p-type TFT be disconnected.
- 5. demultplexer control circuit as claimed in claim 4, it is characterised in that when the liquid crystal display is normally shown When, second control terminal provides high potential to the grid of the p-type TFT, to control p-type TFT to disconnect.
- 6. demultplexer control circuit as claimed in claim 1, it is characterised in that when simultaneously the demultplexer uses When N-type TFT and p-type TFT is as transmission gate, described control unit includes the first control terminal and the second control terminal, wherein, the N Type TFT grid is electrically connected with first control terminal, the letter with the demultplexer respectively that drains of the N-type TFT Number end be electrically connected with, the source electrode of the N-type TFT be low potential, when the liquid crystal display carry out array test when, this first control End processed provides high potential to the grid of the N-type TFT, to control N-type TFT to turn on so that the signal end of the demultplexer Low potential is pulled down to, so as to which the N-type TFT be disconnected；The grid of the p-type TFT is electrically connected with second control terminal, institute Signal end of the p-type TFT drain electrode respectively with the demultplexer to be stated to be electrically connected with, the source electrode of the p-type TFT is high potential, When the liquid crystal display carries out array test, second control terminal provides low potential to the grid of the p-type TFT, with control Make p-type TFT conductings so that the signal end of the demultplexer is pulled high to high potential, so as to which the p-type TFT be disconnected.
- 7. the demultplexer control circuit described in claim 6, it is characterised in that when the liquid crystal display is normally shown When, first control terminal provides low potential to the grid of the N-type TFT, to control N-type TFT to disconnect.
- 8. the demultplexer control circuit described in claim 6, it is characterised in that when the liquid crystal display is normally shown When, second control terminal provides high potential to the grid of the p-type TFT, to control p-type TFT to disconnect.
- 9. a kind of liquid crystal display, it includes display panel and demultplexer control circuit, and the display panel is provided with test Pad, the demultplexer control circuit pass through the test pad incoming control signal, it is characterised in that the multichannel point Orchestration control circuit includes the demultplexer control circuit described in any one in claim 1-8 items.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510572122.2A CN105070265B (en) | 2015-09-09 | 2015-09-09 | Liquid crystal display and its demultplexer control circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510572122.2A CN105070265B (en) | 2015-09-09 | 2015-09-09 | Liquid crystal display and its demultplexer control circuit |
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| Publication Number | Publication Date |
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| CN105070265A CN105070265A (en) | 2015-11-18 |
| CN105070265B true CN105070265B (en) | 2017-12-08 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| KR20070040505A (en) * | 2005-10-12 | 2007-04-17 | 삼성전자주식회사 | Display device and testing method for display device |
| KR20080010551A (en) * | 2006-07-27 | 2008-01-31 | 삼성전자주식회사 | Driving apparatus for display device and display device including the same |
| KR102047005B1 (en) * | 2013-05-31 | 2019-11-21 | 삼성디스플레이 주식회사 | Organic Light Emitting Display Panel |
| KR102054849B1 (en) * | 2013-06-03 | 2019-12-12 | 삼성디스플레이 주식회사 | Organic Light Emitting Display Panel |
| KR102174368B1 (en) * | 2014-02-25 | 2020-11-05 | 삼성디스플레이 주식회사 | Display apparatus and test method thereof |
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