CN105049022B - Interface circuit - Google Patents

Interface circuit Download PDF

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Publication number
CN105049022B
CN105049022B CN201510030179.XA CN201510030179A CN105049022B CN 105049022 B CN105049022 B CN 105049022B CN 201510030179 A CN201510030179 A CN 201510030179A CN 105049022 B CN105049022 B CN 105049022B
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Prior art keywords
voltage
transistor
transmission line
electric current
constant
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CN105049022A (en
Inventor
黄诚诛
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Samsung Display Co Ltd
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Samsung Display Co Ltd
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01—Details
    • H03K3/013—Modifications of generator to prevent operation by noise or interference
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/26—Current mirrors
    • G05F3/267—Current mirrors using both bipolar and field-effect technology
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/013—Modifications for accelerating switching in bipolar transistor circuits
    • H03K19/0136—Modifications for accelerating switching in bipolar transistor circuits by means of a pull-up or down element
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01707—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
    • H03K19/01721—Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits by means of a pull-up or down element
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01—Details
    • H03K3/012—Modifications of generator to improve response time or to decrease power consumption
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L23/00—Apparatus or local circuits for systems other than those covered by groups H04L15/00 - H04L21/00
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0264—Arrangements for coupling to transmission lines
    • H04L25/0298—Arrangement for terminating transmission lines

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)

Abstract

Interface circuit includes the first integrated circuit for sending or receiving data, by transmission line is connected to the first integrated circuit to send or receive the second integrated circuit of data and be connected to transmission line exporting the electric current with constant amplitude to the constant-current generating circuit of transmission line.Constant-current generating circuit is output to the amount of the electric current of transmission line by the voltage level adjustment of sensing transmission line.

Description

Interface circuit
Priority claim
This application claims Korea Spro 10-2014-0044832 submitted on April 15th, 2014 in Korean Intellectual Property Office The priority of state's patent application and its ownership equity of generation, all the contents of the application are incorporated herein by reference.
Technical field
The present invention relates to interface circuits, and more particularly to the interface circuit of the inflow for minimizing noise.
Background technique
As the scheme for connecting microprocessor He other peripheral equipments, in general, using address/data bus scheme. However, in this scenario, because each equipment is needed using many pins, therefore, it is difficult to reduce the size of PCB.
In order to solve these difficulties, had been proposed internal integrated circuit (I2C) in the 1980s, and use string Line interface only needs two bus lines to carry out data transmission for short haul connection.It, can by the way that two I/O pins are used only Data are sent and received to be up to the speed of 400kb/s.In addition, because it supports multiple spot scheme rather than point-to-point scheme, if It is standby to be continuously connected to I2C bus.Because communication needs serial line interface to send, receive, store and obtain increasing The data of amount, the interface should be able to cause the smallest interference (noise) and allow to interfere to be carried out at high speed operation.In addition, should Interface should be able to consume less power and occupy the smallest area on IC.In traditional I2C interface circuit, high electricity Flat signal is applied to the transmission line between interface circuit by pullup resistor, and due to pullup resistor and transmission line Parasitic capacitance and there is RC retardation ratio.Since the length of transmission line is longer, there are a large amount of RC retardation ratios, this causes under data transmission rate Drop.In addition, noise is easy to introduce by the impedance of pullup resistor in the case where the output of I2C is high level.
Summary of the invention
Aspects of the present invention, which provide, to improve connecing for transmission rate and transmission range by minimizing the inflow of noise Mouth circuit.
Aspects of the present invention also provide can minimum power consumption to prevent the interface circuit of the inflow of noise.
However, aspects of the present invention be not limited to it is those of described herein.By reference to the present invention given below Detailed description, more aobvious and easy will be become to those skilled in the art in terms of above and other of the invention See.
According to an aspect of the invention, there is provided a kind of interface circuit, which includes the first integrated circuit, the Two integrated circuits and constant-current generating circuit, wherein the first integrated circuit sends or receives data, the second integrated circuit passes through Transmission line is connected to the first integrated circuit to send or receive data, and constant-current generating circuit is connected to transmission line will have The electric current of constant amplitude is exported to transmission line, and wherein constant-current generating circuit adjusts quilt by the voltage level of sensing transmission line It exports to the amount of the electric current of transmission line.
Constant-current generating circuit may include that voltage sensing unit and constant current generate unit, wherein voltage sensing list For the voltage of member sensing transmission line to generate the first electric current corresponding with the voltage, constant current generates unit output and the first electric current Corresponding electric current.
It may include multiple transistors that constant current, which generates unit, and it may include current mirror with defeated that wherein constant current, which generates unit, The second electric current corresponding with the first electric current out.
Voltage sensing unit may include at least one sensing transistor, and wherein the sensing transistor may be in response to transmission line Voltage turn-on and generation the first electric current corresponding with the voltage of transmission line.
Each of sensing transistor and transistor can be formed by bipolar junction transistor.
Each of sensing transistor and transistor can be formed by field effect transistor.
Voltage sensing unit may include comparator and first diode, and wherein comparator can be by the voltage of transmission line and reference Voltage is compared to export predetermined voltage.
Each of transistor can be formed by bipolar junction transistor.
Each of transistor can be formed by field effect transistor.
Voltage sensing unit may include difference amplifier and multiple diodes, and wherein difference amplifier is exportable and transmission line The corresponding voltage of voltage.
Each of transistor can be formed by bipolar junction transistor.
Each of transistor can be formed by field effect transistor.
According to another aspect of the present invention, a kind of interface circuit is provided, which includes the first integrated circuit, the Two integrated circuits and multiple constant-current generating circuits, wherein the first integrated circuit sends or receives data, the second integrated circuit The first integrated circuit is connected to by transmission line to send or receive data, and multiple constant-current generating circuits are connected to transmission line Exporting the electric current with constant amplitude to transmission line, wherein each of constant-current generating circuit passes through sensing transmission line Voltage level adjustment be output to transmission line electric current amount.
Each of constant-current generating circuit may include that voltage sensing unit and constant current generate unit, wherein electricity Pressure sensitivity surveys the voltage of unit senses transmission line to generate the first electric current corresponding with the voltage, constant current generate unit output with The corresponding electric current of first electric current, wherein constant current generate unit may include multiple transistors and including current mirror with export with Corresponding second electric current of first electric current.
Voltage sensing unit may include at least one sensing transistor, and wherein sensing transistor may be in response to the electricity of transmission line Pressure is connected and generates the first electric current corresponding with the voltage of transmission line.
Voltage sensing unit may include comparator and first diode, and wherein comparator can be by the voltage of transmission line and reference Voltage is compared to export predetermined voltage.
Voltage sensing unit may include difference amplifier and multiple diodes, and wherein difference amplifier is exportable and transmission line The corresponding voltage of voltage.
According to another aspect of the invention, a kind of interface circuit is provided, which includes the multiple first integrated electricity Road, multiple second integrated circuits and constant-current generating circuit, wherein multiple first integrated circuits send or receive data, more A second integrated circuit is connected to each of first integrated circuit by transmission line to send or receive data, and constant current produces Raw circuit connection is to transmission line exporting the electric current with constant amplitude to transmission line, and wherein constant-current generating circuit passes through The voltage level adjustment of sensing transmission line is output to the amount of the electric current of transmission line.
Constant-current generating circuit may include that voltage sensing unit and constant current generate unit, wherein voltage sensing list For the voltage of member sensing transmission line to generate the first electric current corresponding with the voltage, constant current generates unit output and the first electric current Corresponding electric current, wherein constant current generate unit may include multiple transistors and including current mirror to export and the first electric current Corresponding second electric current.
Voltage sensing unit may include at least one sensing transistor, and wherein sensing transistor may be in response to the electricity of transmission line Pressure is connected and generates the first electric current corresponding with the voltage of transmission line.
Embodiments of the present invention provide at least following effect.
That is, the interface circuit that can minimize the inflow of noise can be provided.
The interface circuit that can carry out minimum power consumption by adjusting the magnitude of current for being supplied to transmission line can also be provided.
Effect of the invention is not limited to said effect, and by being described below, other effects pair not described herein Those skilled in the art will become obvious.
Detailed description of the invention
When considered in conjunction with the accompanying drawings, by reference to following detailed description, more complete understanding of the invention and its adjoint Multiple in advantage will become obvious and equally become better understood, and in the accompanying drawings, identical reference symbol instruction is identical Or similar component, in which:
Fig. 1 is the block diagram of interface circuit according to the first embodiment of the present invention；
Fig. 2 is the equivalent circuit diagram of constant-current generating circuit according to the first embodiment of the present invention；
Fig. 3 is the equivalent circuit diagram of integrated circuit according to the first embodiment of the present invention；
Fig. 4 is to show the flow chart of the operation of interface circuit according to the first embodiment of the present invention；
Fig. 5 is the equivalent circuit diagram of integrated circuit according to the first embodiment of the present invention；
Fig. 6 is the equivalent circuit diagram of current mirror according to the first embodiment of the present invention；
Fig. 7 is the characteristic shown when interface circuit according to the first embodiment of the present invention is in low level operation Circuit diagram；
Fig. 8 is the characteristic shown when interface circuit according to the first embodiment of the present invention is in high level operation Circuit diagram；
Fig. 9 is the equivalent circuit diagram of interface circuit according to the second embodiment of the present invention；
Figure 10 is the equivalent circuit diagram of current mirror according to the second embodiment of the present invention；
Figure 11 is the equivalent circuit diagram of interface circuit according to the third embodiment of the present invention；
Figure 12 is to show the flow chart of the operation of interface circuit according to the third embodiment of the present invention；
Figure 13 is to show the circuit diagram of comparator according to the third embodiment of the present invention；
Figure 14 is to show the figure of the voltage characteristic of comparator of Figure 13；
Figure 15 and Figure 16 is shown when interface circuit according to the third embodiment of the present invention is in high level operation Characteristic circuit diagram；
Figure 17 is the equivalent circuit diagram of interface circuit according to the fourth embodiment of the present invention；
Figure 18 is to show the flow chart of the operation of interface circuit according to the fourth embodiment of the present invention；
Figure 19 is the equivalent circuit diagram of voltage sensing unit according to the fourth embodiment of the present invention；
Figure 20 is to show the figure of the voltage characteristic of Figure 19；
Figure 21 is the characteristic shown when interface circuit according to the fourth embodiment of the present invention is in high level operation Circuit diagram；
Figure 22 is the equivalent circuit diagram of interface circuit according to the fifth embodiment of the present invention；And
Figure 23 to Figure 29 is the equivalent circuit diagram of the integrated circuit of some other embodiments according to the present invention.
Specific embodiment
By reference to the following detailed description and attached drawing of preferred embodiment, can be more easily to understand advantages of the present invention and Feature and the method for realizing advantages and features of the invention.However, the present invention can be presented as many different forms, and not It should be construed as being limited to embodiment as described herein.On the contrary, thesing embodiments are provided so that the disclosure will be thorough And it is complete and design of the invention will be fully transmitted to those skilled in the art, and the present invention will be only by appended Claim limits.Therefore, in some embodiments, well known structure and equipment is not shown in order to avoid unnecessary details is fuzzy Explanation of the invention.Identical number refers to identical element in full text.In the accompanying drawings, for the sake of clarity, layer and region Thickness is exaggerated.
It should be understood that when element or layer are referred to as positioned at another element or layer "upper" or " being connected to " another element or layer, It can be directly on another element or layer or be connected to another element or layer, or intermediary element or layer may be present.It compares Under, when element be referred to as it is " direct " positioned at another element or layer "upper" or " being connected directly to " another element or layer when, do not deposit In intermediary element or layer.As used herein, term "and/or" includes appointing for one or more of associated listed items What and all combinations.
Usable spatially relative term herein, such as " ... under ", " ... lower section ", " below ", " ... it On ", " above " etc., in order to describe the relationship of an elements or features and other elements or features shown in the drawings.Ying Li Solution, spatially relative term are intended to include the equipment different direction in addition to orientation as shown in the figure in use or operation.
Embodiment as described herein is by the mode reference plane figure and/or sectional plane of idealized schematic diagram through the invention Figure is described.Therefore, example view can be modified according to manufacturing technology and/or tolerance.Therefore, embodiments of the present invention are not It is limited to those shown in view, but the modification in the configuration including being formed based on manufacturing process.Therefore, it is illustrated in attached drawing Region has illustrative nature, and the concrete shape in the shape example elements region in region shown in the drawings is invented without limiting Aspect.
It should be noted that " interface circuit " as described herein can refer to that I2C interface circuit or open collector or drain electrode are opened Road output circuit.
Hereinafter, embodiments of the present invention are described with reference to the accompanying drawings.
Fig. 1 is the block diagram of interface circuit according to the first embodiment of the present invention, and Fig. 2 is according to the present invention first real The equivalent circuit diagram of the constant-current generating circuit of mode is applied, Fig. 3 is integrated circuit according to the first embodiment of the present invention Equivalent circuit diagram and Fig. 5 be integrated circuit according to the first embodiment of the present invention equivalent circuit diagram.
Referring to Fig.1, interface circuit may include constant-current generating circuit 100, the first integrated circuit 200 and the second integrated electricity Road 300.Constant-current generating circuit 100 can be connected in parallel to transmission line TL, and can provide to transmission line TL with constant The electric current of amplitude, wherein the first integrated circuit 200 is connected to the second integrated circuit 300 by transmission line TL.Due to transmission line TL's The internal impedance of internal resistance, transmission line TL increases, and may be readily incorporated noise.Therefore, when the signal of high level is applied When the first integrated circuit 200 or the second integrated circuit 300, it can reduce transmission line TL's by providing electric current to transmission line TL Internal impedance.
Referring to Fig. 2, constant-current generating circuit 100 may include that voltage sensing unit 110 and constant current generate unit 120.Voltage sensing unit 110 can produce first electric current I1 corresponding with the amplitude of the voltage of transmission line TL, and the first electric current I1 can flow through the first flow path that constant current generates unit 120.It may include current mirror that constant current, which generates unit 120, and And exportable the second electric current I2 with amplitude identical with the amplitude for the electric current for flowing through the first flow path.Second electric current I2 can The second flow path that constant current generates unit 120 is flowed through, and second flow path may be electrically connected to transmission line TL.Although Transmission line TL is shown as single line, and however, it is not limited to this, and transmission line TL may include a plurality of line, and may include, for example, string Row clock line SCL and serial data line SDL.
Referring to Fig. 3, the first integrated circuit 200 may include input buffer 210 to receive data to be transmitted and first Transistor Q1.First integrated circuit 200 can by transmission line TL by the data signal transmission inputted by input buffer 210 extremely Second integrated circuit 300.What the first integrated circuit 200 can be transmitted by the first transistor Q1 output from the second integrated circuit 300 Data-signal.
Referring to Fig. 5, the second integrated circuit 300 may include input buffer 310 to receive data to be transmitted and second Transistor Q2.Second integrated circuit 300 can by transmission line TL by the data signal transmission inputted by input buffer 310 extremely First integrated circuit 200.What the second integrated circuit 300 can be transmitted by second transistor Q2 output from the first integrated circuit 200 Data-signal.
In other words, it in the interface circuit of embodiment according to the present invention, is free to realize bidirectional data transfers, And the inflow of noise can be made to minimize by reducing the internal impedance of transmission line TL.
As described above, Fig. 2 is the equivalent circuit diagram of the constant-current generating circuit of embodiment according to the present invention.Reference Fig. 2, constant-current generating circuit 100 may include that voltage sensing unit 110 and constant current generate unit 120.
Voltage sensing unit 110 may include at least one transistor and resistor.Including in voltage sensing unit 110 The base stage of transistor Q5 is electrically connected to first node N1.The amplitude for flowing through the electric current of the collector terminal of transistor Q5 can be according to Voltage difference Vbe variation between the voltage VN1 and ground voltage GND of one node N1.Flow through the amplitude of the electric current of collector terminal It can be changed according to the element characteristic of transistor Q5.However, the amplitude for flowing through the electric current of collector terminal can be with first node N1 Voltage VN1 and ground voltage GND between voltage difference Vbe to the ratio between the threshold voltage vt h of transistor Q5 exponentially ratio.Stream The electric current for crossing collector terminal corresponds to the first electric current I1 with the sum of the electric current for flowing to ground level GND from second node N2.
It may include multiple transistor Q3 and Q4 that constant current, which generates unit 120,.The base terminal of third transistor Q3 and The base terminal of four transistor Q4 is in contact with each other.The emitter terminal of the emitter terminal of third transistor Q3 and the 4th transistor Q4 Son can be connected to the first supply voltage V by resistor R1 and R2 respectivelyCC.Corresponding to the first electricity for flowing through the first flowing path P 1 The amplitude for flowing I1, the second electric current I2 with amplitude identical with the amplitude of the first electric current I1 can flow through second flow path P2, And the second electric current I2 is provided to transmission line TL.
As described above, Fig. 3 is the equivalent circuit diagram of the integrated circuit of embodiment according to the present invention.Referring to Fig. 3, first Integrated circuit 200 includes input buffer 210 to receive data to be transmitted and the first transistor Q1.First integrated circuit 200 can be by transmission line TL by the data signal transmission inputted by input buffer 210 to the second integrated circuit 300.First Integrated circuit 200 can export the data-signal transmitted from the second integrated circuit 300 by the first transistor Q1.
Fig. 3 shows the equivalent circuit of integrated circuit, but it is not limited to this.It can be exported by using open collector Circuit or open-drain output circuit replace the first integrated circuit 200 and the second integrated circuit 300.
Fig. 4 is to show the flow chart of the operation of interface circuit of embodiment according to the present invention.
The signal of high level or low level signal can be applied to the first collection in interface circuit referring to Fig. 3 and Fig. 4 At circuit 200.If low level signal is applied to the first integrated circuit 200, the first transistor Q1 conducting, and transmission line TL may be electrically connected to ground level GND.In other words, if low level signal is applied to the first integrated circuit 200, transmission line TL's The inflow of impedance close to zero and noise becomes difficult.If the signal of high level is applied to the first integrated circuit 200, the One transistor Q1 cut-off, and the signal of high level can be applied in transmission line TL.
Referring to Fig. 4, firstly, the voltage sensing unit 110 of constant-current generating circuit 100, which can measure, is formed in transmission line TL On first node voltage VN1 (step S100).Voltage sensing unit 110 determines the voltage VN1 for the first node measured It whether is low level (step S200).If the voltage VN1 for the first node measured by voltage sensing unit 110 is low electricity It is flat, then it can not export the first electric current I1 (step S350).Because not exporting the first electric current I1, constant current generates single Member 120 cannot be activated (step S450), and electric current cannot be supplied to transmission line TL.On the other hand, if by voltage sensing The voltage VN1 for the first node that unit 110 is measured is high level, and voltage sensing unit 110 exports the first electric current I1 (step S300).First electric current I1 flows through the first flowing path P 1, and constant current generates unit 120 and activates (step by the first electric current I1 Rapid S400).The second electric current I2 corresponding to the first electric current I1 can be output to transmission line TL (step S500).
As described above, Fig. 5 is the equivalent circuit diagram of integrated circuit according to the first embodiment of the present invention.In addition, Fig. 6 It is the equivalent circuit diagram of current mirror according to the first embodiment of the present invention.
Referring to Fig. 5, interface circuit may include constant-current generating circuit 100, the first integrated circuit 200 and the second integrated electricity Road 300.
Constant-current generating circuit 100 may include that voltage sensing unit 110 and constant current generate unit 120, wherein electricity Pressing sensing unit 110 includes transistor Q5 and multiple resistor R3, R4 and R5, and it may include third that constant current, which generates unit 120, Transistor Q3 and the 4th transistor Q4.
The base stage of the transistor Q5 of voltage sensing unit 110 is electrically connected to first node N1 by resistor R5.Flow through crystalline substance The amplitude of the electric current of the collector terminal of body pipe Q5 can be according to the electricity between the voltage VN1 and ground voltage GND of first node N1 Pressure difference Vbe variation.The amplitude for flowing through the electric current of collector terminal can change according to the element characteristic of transistor Q5.However, flowing through The amplitude of the electric current of collector terminal can Vbe pairs of voltage difference between the voltage VN1 and ground voltage GND of first node N1 The ratio between threshold voltage vt h of transistor Q5 exponentially ratio.The electric current for flowing through collector terminal is flowed to from second node N2 The sum of electric current of ground level GND corresponds to the first electric current I1.
It may include multiple transistor Q3 and Q4 that constant current, which generates unit 120,.The base terminal of third transistor Q3 and The base terminal of four transistor Q4 is in contact with each other.The emitter terminal of the emitter terminal of third transistor Q3 and the 4th transistor Q4 Son can be connected to the first supply voltage V by resistor R1 and R2 respectivelyCC.Corresponding to the first electricity for flowing through the first flowing path P 1 The amplitude for flowing I1 with the first electric current I1 there is the second electric current I2 of identical amplitude can flow through second flow path P2, and second Electric current I2 is provided to transmission line TL.It will be detailed referring to Fig. 6 by the current mirror that third transistor Q3 and the 4th transistor Q4 are formed Description.
Fig. 6 shows pnp current mirror.In pnp current mirror, the emitter terminal of third transistor Q3 and the 4th transistor The emitter terminal of Q4 is connected to the first supply voltage VCC.The base terminal and collector terminal of 4th transistor Q4 joins each other It connects.
Reference current Iref is applied in the collector terminal of the 4th transistor Q4, and exports electric current Iout and flow through third Transistor Q3.If the characteristic of the 4th transistor Q4 is identical as the characteristic of third transistor Q3, that is, if according to the mark of transistor The characteristic of quasi- (for example, width, length etc.) transistor be it is identical, then export electric current Iout equal to reference current Iref.In Fig. 5 In, multiple resistor R1 and R2 are attached to the emitter terminal of current mirror, but can be omitted the emitter for being attached to current mirror The resistor R1 and R2 of terminal.
The description of Fig. 5 is returned to, the first integrated circuit 200 may include input buffer 210 to receive data to be transmitted, with And the first transistor Q1.The data-signal SL/H inputted by input buffer 210 can be transmitted to the second collection by transmission line TL At circuit 300.First integrated circuit 200 can be used as main circuit in I2C interface circuit or from circuit.
Second integrated circuit 300 may include input buffer 310 to receive data to be transmitted and second transistor Q2.The data-signal inputted by input buffer 310 can be transmitted to the first integrated circuit 200 by transmission line TL.From first The data-signal that integrated circuit 200 transmits can be exported by second transistor Q2.
Fig. 7 is the characteristic shown when interface circuit according to the first embodiment of the present invention is in low level operation Circuit diagram.Fig. 8 is the characteristic shown when interface circuit according to the first embodiment of the present invention is in high level operation Circuit diagram.
Referring to Fig. 7, if low level signal SL is input to the input terminal of the first integrated circuit 200, low level letter Number SL can be applied to transmission line TL by input buffer 210.In addition, if having input low level signal SL, first is integrated The second transistor Q2 of the first transistor Q1 of circuit 200 or the second integrated circuit 300 conducting, and transmission line TL can be electrically connected To ground level.In other words, transmission line TL is from the impedance of external observation close to zero, and almost impossible the stream of noise occurs Enter.
In addition, if low level signal SL is input to transmission line TL, the 5th transistor Q5 of voltage sensing unit 110 is not It can be connected, and low current only can flow through 3rd resistor device R3.In other words, because for changing constant-current generating circuit 100 The 5th transistor Q5 of current amplitude cannot be operated by low level signal SL, generate electricity so can reduce from constant current The magnitude of current that road 100 exports and power consumption can be reduced by reducing unnecessary electric current.
Referring to Fig. 8, if the signal SH of high level is input to the input terminal of the first integrated circuit 200, the letter of high level Number SH can be applied to transmission line TL by input buffer 210.In addition, if being applied with the signal SH of high level, first crystal Pipe Q1 or second transistor Q2 can be turned off.If being applied with the signal SH of high level, due to pullup resistor or due to transmission The internal resistance of line TL, in fact it could happen that the inflow of noise.The inflow of noise in order to prevent, constant-current generating circuit 100 can lead to Supply electric current is crossed to reduce the impedance of transmission line TL.
Firstly, the 5th transistor Q5 of voltage sensing unit 110 is connected in response to the voltage VN1 of first node N1, and The electric current I11 of voltage VN1 corresponding to first node N1 can flow through the collector terminal of the 5th transistor Q5.By corresponding to the , there is voltage drop in the 4th resistor R4 in the electric current I11 of the voltage VN1 of one node N1.The voltage VN2 of second node N2 passes through The voltage drop and increase.The electric current I12 of voltage VN2 corresponding to second node N2 can flow through 3rd resistor device R3.First electric current I1 is the electric current I12 in 3rd resistor device R3 corresponding to the voltage VN2 of second node N2 and the voltage corresponding to first node N1 The sum of electric current I11 of VN1.In other words, the amplitude of the first electric current I1 when applying the signal SH of high level is greater than low in application The amplitude of the first electric current I1 when the signal SL of level.
Constant current generates exportable the second electric current with amplitude identical with the amplitude of the first electric current I1 of unit 120 I2, and the second electric current I2 is provided to transmission line TL.Because transmission line TL may include internal impedance and parasitic capacitance, when biography When the length of defeated line TL increases, internal impedance increases, and timeconstantτ increases.When timeconstantτ increases, in fact it could happen that RC Delay, to reduce the rate of climb or decrease speed of input signal.In other words, constant-current generating circuit 100 is to transmission line TL provides electric current, and there is the effect for the impedance for reducing transmission line TL, and which reduce timeconstantτs.Therefore, reduce RC to prolong Late and interface circuit can operate at high speeds.
Fig. 9 is the equivalent circuit diagram of interface circuit according to the second embodiment of the present invention.Figure 10 is according to the present invention Second embodiment current mirror equivalent circuit diagram.
In the interface circuit of Fig. 9 and Figure 10, the bipolar junction transistor (BJT) in the interface circuit of Fig. 5 and Fig. 6 is by gold Belong to oxide semiconductor field effect transistor (hereinafter, referred to as " MOSFET ") to replace.Because of bipolar junction transistor (BJT) There is similar operating principle, the operating characteristic of the interface circuit of Fig. 9 and Figure 10 and the interface circuit of Fig. 5 and Fig. 6 with MOSFET Operating characteristic it is similar, therefore, repeated description will be omitted.
Referring to Fig. 9, interface circuit may include constant-current generating circuit 100, the first integrated circuit 200 and the second integrated electricity Road 300.
Constant-current generating circuit 100 may include that voltage sensing unit 110 and constant current generate unit 120.
The gate terminal of 5th transistor Q5 of voltage sensing unit 110 is electrically connected to first node by resistor R5 N1.The amplitude for flowing through the electric current of the drain terminal of the 5th transistor Q5 can be according to the voltage VN1 and ground voltage of first node N1 Voltage difference Vgs variation between GND.The amplitude for flowing through the electric current of drain terminal can become according to the element characteristic of the 5th transistor Q5 Change.However, the amplitude for flowing through the electric current of drain terminal can be between the voltage VN1 and ground voltage GND of first node N1 Voltage difference Vgs is to the ratio between the threshold voltage vt h of the 5th transistor Q5 exponentially ratio.Flow through the electric current of drain terminal and from second Node N2 flow to the sum of electric current of ground level GND corresponding to the first electric current I1.
It may include multiple transistor Q3 and Q4 that constant current, which generates unit 120,.The gate terminal of third transistor Q3 and The gate terminal of four transistor Q4 is in contact with each other.The source terminal of the source terminal of third transistor Q3 and the 4th transistor Q4 can It is connected to the first supply voltage VDD.Corresponding to the amplitude for the first electric current I1 for flowing through the first flowing path P 1, have and the first electricity The the second electric current I2 for flowing the identical amplitude of amplitude of I1 can flow through second flow path P2, and the second electric current I2 is provided to biography Defeated line TL.The current mirror that referring to Fig.1 0 detailed description is formed by third transistor Q3 and the 4th transistor Q4.
Figure 10 shows p-type current mirror.In p-type current mirror, the source terminal of third transistor Q3 and the 4th transistor Q4 Source terminal be connected to the first supply voltage VDD.The gate terminal and drain terminal of 4th transistor Q4 is coupled to each other.
Reference current Iref is applied to the drain terminal of the 4th transistor Q4, and exports electric current Iout and flow through third crystal Pipe Q3.If the characteristic of the 4th transistor Q4 is identical as the characteristic of third transistor Q3, that is, if according to the standard of transistor The characteristic of (for example, width, length etc.) transistor be it is identical, then export electric current Iout equal to reference current Iref.
Figure 11 is the equivalent circuit diagram of interface circuit according to the third embodiment of the present invention.
Referring to Fig.1 1, interface circuit may include that constant-current generating circuit 100, the first integrated circuit 200 and second are integrated Circuit 300.
Constant-current generating circuit 100 may include that voltage sensing unit 111 and constant current generate unit 120, wherein electricity Pressing sensing unit 111 includes comparator OPA1 and multiple resistor R3 and R4, and it includes third crystal that constant current, which generates unit 120, Pipe Q3 and the 4th transistor Q4.
Voltage sensing unit 111 can sense the amplitude of the voltage VN1 of first node N1 by using comparator OPA1, In, the amplitude of voltage VN1 of first node N1 is compared by comparator OPA1 with the amplitude of reference voltage Vref.It will be referring to figure The operating principle of comparator OPA1 is discussed in more detail below in 13 and Figure 14.
It may include multiple transistor Q3 and Q4 that constant current, which generates unit 120,.The base terminal of third transistor Q3 and The base terminal of four transistor Q4 is in contact with each other.The emitter terminal of the emitter terminal of third transistor Q3 and the 4th transistor Q4 Son can be connected to the first supply voltage VCC.Corresponding to the amplitude for the first electric current I1 for flowing through the first flowing path P 1, have and the Second electric current I2 of the identical amplitude of amplitude of one electric current I1 can flow through second flow path P2, and the second electric current I2 can provide Give transmission line TL.Because of the electricity formed in above-detailed by third transistor Q3 and the 4th transistor Q4 with reference to Fig. 6 Mirror is flowed, so descriptions thereof will be omitted.
The description of Figure 11 is returned to, the first integrated circuit 200 may include input buffer 210 to receive data to be transmitted, And the first transistor Q1.The data-signal SL/H inputted by input buffer 210 can be transmitted to second by transmission line TL Integrated circuit 300.First integrated circuit 200 can be used as main circuit in I2C interface circuit or from circuit.
Second integrated circuit 300 may include input buffer 310 to receive data to be transmitted and second transistor Q2.The data-signal inputted by input buffer 310 can be transmitted to the first integrated circuit 200 by transmission line TL.From first The data-signal that integrated circuit 200 transmits can be exported by second transistor Q2.
Figure 12 is to show the flow chart of the operation of interface circuit according to the third embodiment of the present invention.
1 and Figure 12 referring to Fig.1, the voltage sensing unit 111 of constant-current generating circuit 100, which can measure, is formed in transmission line The voltage VN1 (step S100) of first node on TL.Voltage sensing unit 111 is by the voltage VN1 for the first node measured Amplitude be compared (step S210) with the amplitude of reference voltage Vref.If measured by voltage sensing unit 111 The voltage VN1 of one node is lower than reference voltage Vref, then can not export the first electric current I1 (step S350).Because not exporting One electric current I1, so constant current generates unit 120 and cannot be activated (step S450), and electric current cannot be supplied to transmission line TL.On the other hand, if the voltage VN1 for the first node measured by voltage sensing unit 111 is higher than reference voltage Vref, Voltage sensing unit 111 exports the first electric current I1 (step S300).First electric current I1 flows through the first flowing path P 1, and constant Current generating unit 120 activates (step S400) by the first electric current I1.The second electric current I2 corresponding to the first electric current I1 is exportable To transmission line TL (step S500).
However, the voltage sensing unit 111 of the interface circuit of another embodiment according to the present invention can only determine The voltage VN1 of one node is above or below reference voltage Vref, and exporting is the first constant electric current I1.Therefore, it refers to The amplitude of voltage Vref can be changed by controller (not shown) to adjust the width for the second electric current I2 for being provided to transmission line TL Value.
Figure 13 is to show the circuit diagram of comparator according to the third embodiment of the present invention.Figure 14 is to show Figure 13 Comparator voltage characteristic figure.
The comparable positive input terminal for being applied to operational amplifier of referring to Fig.1 3, comparator OPA1 and negative input terminal The amplitude of voltage is with output voltage.In general, reference voltage Vref is applied to positive input terminal, and voltage to be compared is applied to Negative input terminal.Comparator OPA1 can determine that the voltage Vp of positive input terminal and the difference of the voltage Vn of negative input terminal are greater than 0 Or constant output voltage Vout is exported less than 0.
Referring to Fig.1 4, if the difference Vd of the voltage Vn of the voltage Vp and negative input terminal of positive input terminal is greater than 0, compare The exportable positive saturation voltage of device OPA1, and positive saturation voltage can correspond to the positive power supply for being applied to comparator OPA1 Voltage VCCValue.If the difference Vd of the voltage Vn of the voltage Vp and negative input terminal of positive input terminal is less than 0, comparator OPA1 Exportable negative saturation voltage, and negative saturation voltage can correspond to the negative supply voltage V for being applied to comparator OPA1EE Value.However, comparator OPA1 can if the difference Vd of the voltage Vn of the voltage Vp and negative input terminal of positive input terminal is less than 0 As amplifier operations.In the case where comparator OPA1 is as amplifier operations, relative to positive input terminal voltage Vp with The voltage Vout that the difference Vd of the voltage Vn of negative input terminal is exported can linearly increase.
In other words, in the part in comparator OPA1 as amplifier operations, the first variable electric current can flow through Figure 11's Voltage sensing unit 111.
Figure 15 and Figure 16 is shown when interface circuit according to the third embodiment of the present invention is in high level operation Characteristic circuit diagram.
Referring to Fig.1 5, if the signal SH of high level is input to the input terminal of the first integrated circuit 200, the letter of high level Number SH can be applied to transmission line TL by input buffer 210.In addition, if being applied with the signal SH of high level, then first collects It can be turned off at the first transistor Q1 of circuit 200 or the second transistor Q2 of the second integrated circuit 300.If being applied with high electricity Flat signal SH, due to pullup resistor or due to the internal resistance of transmission line TL, in fact it could happen that the inflow of noise.In order to prevent The inflow of noise, constant-current generating circuit 100 can reduce the impedance of transmission line TL by providing electric current.
Firstly, the voltage sensing unit 111 of constant-current generating circuit 100 can measure formed on transmission line TL first The voltage VN1 of node N1.Voltage sensing unit 111 is by the amplitude and reference voltage of the voltage VN1 of the first node N1 measured The amplitude of Vref is compared.If the voltage VN1 of the first node N1 measured by voltage sensing unit 111 is lower than with reference to electricity Vref is pressed, then comparator OPA1 exports positive supply voltage VCC(being shown in FIG. 14).The output terminal of comparator OPA1 can connect It is connected to the cathode electrode of first diode D1.Because electric current can be from the anode electrode of first diode D1 to cathode electrode Direction flowing, so the voltage of anode electrode needs the voltage higher than cathode electrode so that electric current flowing.First diode D1's Anode electrode is connected to second node N2 via the 4th resistor R4, and the cathode electrode of first diode D1 can be connected to ratio Compared with the output terminal of device OPA1.In Figure 15 because reference voltage Vref be applied to the positive input terminal of comparator OPA1 and The voltage VN1 of first node N1 is applied to the negative input terminal of comparator OPA1, so be applied to the voltage of positive input terminal Amplitude is greater than the amplitude for being applied to the voltage of negative input terminal, and exports positive saturation voltage.Because of the output of comparator OPA1 Voltage is higher than the voltage VN2 of second node N2, so electric current cannot flow through the 4th resistor R4 by first diode D1, and Only a small amount of electric current flows through 3rd resistor device R3.
In other words, if the voltage VN1 of first node N1 is lower than reference voltage Vref, constant current generates unit 120 can A small amount of electric current is exported to transmission line TL, to reduce the power consumption consumed by constant-current generating circuit 100.
Referring to Fig.1 6, if the voltage VN1 of the first node N1 measured by voltage sensing unit 111 is higher than reference voltage Vref, then the supply voltage V that comparator OPA1 output is bornEE(being shown in FIG. 14).The output terminal of comparator OPA1 can connect To the cathode electrode of first diode D1.Because reference voltage Vref is applied to the positive input terminal of comparator OPA1 and first The voltage VN1 of node N1 is applied to the negative input terminal of comparator OPA1, so being applied to the amplitude of the voltage of positive input terminal Less than the amplitude for the voltage for being applied to negative input terminal, and export negative saturation voltage.Because of the output voltage of comparator OPA1 Voltage VN2 lower than second node N2, electric current I11 can flow through first diode D1.By the voltage for corresponding to first node N1 , there is voltage drop in the 4th resistor R4 in the electric current I11 of VN1.The voltage VN2 of second node N2 is increased by the voltage drop. The electric current I12 of voltage VN2 corresponding to second node N2 can also flow through 3rd resistor device R3.First electric current I1 is 3rd resistor device In R3 corresponding to second node N2 voltage VN2 electric current I12 with corresponding to first node N1 voltage VN1 electric current I11 it With.In other words, the amplitude of the first electric current I1 when applying the signal SH of high level is greater than when applying low level signal SL The first electric current I1 amplitude.
Constant current generates exportable the second electric current with amplitude identical with the amplitude of the first electric current I1 of unit 120 I2, and the second electric current I2 is provided to transmission line TL.It is normal which reduce the time in the presence of the effect for the impedance for reducing transmission line TL Number τ.Therefore, reduce RC retardation ratio and interface circuit can operate at high speeds.
The interface circuit using bipolar junction transistor (BJT) has been shown in Figure 15 and Figure 16, but and it is unlimited In this.The first transistor Q1 to the 4th transistor Q4 can be replaced by MOSFET respectively.
Figure 17 is the equivalent circuit diagram of interface circuit according to the fourth embodiment of the present invention.
Referring to Fig.1 7, interface circuit may include that constant-current generating circuit 100, the first integrated circuit 200 and second are integrated Circuit 300.
Constant-current generating circuit 100 may include that voltage sensing unit 112 and constant current generate unit 120, wherein electricity Pressing sensing unit 112 includes difference amplifier OPA2 and multiple resistor R3, R4, R5 and RC, the constant current generation packet of unit 120 Include third transistor Q3 and the 4th transistor Q4.
Voltage sensing unit 112 can sense the amplitude of the voltage VN1 of first node N1 by using difference amplifier OPA2, Wherein difference amplifier OPA2 can continuously export the voltage V for the positive input terminal for being applied to operational amplifierCC/ 2, operation amplifier The branch pressure voltage of the voltage VN1 of the voltage and first node N1 of the output terminal of device is output voltage.It will be below in reference to Figure 19 With the operating principle of Figure 20 detailed description difference amplifier OPA2.
It may include multiple transistor Q3 and Q4 that constant current, which generates unit 120,.The base terminal of third transistor Q3 and The base terminal of four transistor Q4 is in contact with each other.The emitter terminal of the emitter terminal of third transistor Q3 and the 4th transistor Q4 Son can be connected to the first supply voltage VCC.Corresponding to the amplitude for the first electric current I1 for flowing through the first flowing path P 1, have and the Second electric current I2 of the identical amplitude of amplitude of one electric current I1 can flow through second flow path P2, and the second electric current I2 can provide Give transmission line TL.Because the current mirror formed by third transistor Q3 and the 4th transistor Q4 is described in detail referring to Fig. 6, Therefore descriptions thereof will be omitted.
First integrated circuit 200 may include input buffer 210 to receive data to be transmitted and the first transistor Q1.The data-signal SL/H inputted by input buffer 210 can be transmitted to the second integrated circuit 300 by transmission line TL.
Second integrated circuit 300 may include input buffer 310 to receive data to be transmitted and second transistor Q2.The data-signal inputted by input buffer 310 can be transmitted to the first integrated circuit 200 by transmission line TL.From first The data-signal that integrated circuit 200 transmits can be exported by second transistor Q2.
Figure 18 is to show the flow chart of the operation of interface circuit according to the fourth embodiment of the present invention.
Referring to Figure 17 and Figure 18, the voltage sensing unit 112 of constant-current generating circuit 100 can measure and be formed in transmission line The voltage VN1 (step S100) of first node N1 on TL.Voltage sensing unit 112 is by the width of the voltage VN2 of second node N2 Value is compared (step S220) with the amplitude of the voltage VN3 of third node N3.If the amplitude of the voltage VN2 of second node N2 Lower than the amplitude of the voltage VN3 of third node N3, since electric current cannot flow through the 4th resistor R4 because of first diode D1, institute The first electric current I1 (step S350) can not be exported.Because not exporting the first electric current I1, constant current generates unit 120 It cannot be activated (step S450), and electric current cannot be supplied to transmission line TL.
On the other hand, if the amplitude of voltage VN3 of the amplitude of the voltage VN2 of second node N2 higher than third node N3, Then voltage sensing unit 112 determines whether the voltage VN2 of second node N2 is higher than the voltage (0V) (step S230) of ground level.Such as The voltage VN2 of fruit second node N2 is lower than the voltage (0V) of ground level, due to electric current because second diode D2 due to cannot flow through the Three resistor R3, it is impossible to export the first electric current I1 (step S350).Because not exporting the first electric current I1, constant electricity Stream generation unit 120 cannot be activated (step S450), and electric current cannot be supplied to transmission line TL.
If the voltage VN2 of second node N2 is higher than the voltage (0V) of ground level, because the first electric current I1 can flow into third In resistor R3, so the first electric current I1 flows through the first flowing path P 1 (step S300).Constant current generates unit 120 by the One electric current I1 activates (step S400), and the second electric current I2 corresponding to the first electric current I1 is provided to transmission line TL (step S500)。
Figure 19 is the equivalent circuit diagram of voltage sensing unit according to the fourth embodiment of the present invention.Figure 20 is to show The figure of the voltage characteristic of Figure 19.
7 and Figure 19 referring to Fig.1, it is assumed that be applied to the amplitude of the voltage of the positive input terminal of operational amplifier and be applied to fortune The amplitude for calculating the voltage of the negative input terminal of amplifier is identical, and difference amplifier OPA2 can be by adjusting variable resistance RCElectricity The amplitude of resistance flows through variable resistance R to adjustCElectric current amplitude.The voltage Vout of output terminal can be by flowing through variable resistance Device RCThe magnitude of current determine.Therefore, it can adjust and to be flowed between second node N2 and the output terminal of operational amplifier The amplitude of electric current.Because of variable resistance RCIt is connected to the negative input terminal of operational amplifier, difference amplifier OPA2 can be to defeated Terminal provides reverse voltage out.Difference amplifier OPA2 can be by generating output voltage linearly relative to input voltage come linear Ground adjusts the amplitude of the first electric current I1.Hereinafter, the voltage characteristic of difference amplifier OPA2 will be described in detail referring to Figure 20.
7 and Figure 20 referring to Fig.1, because passing through variable resistance RCPartial pressure and the voltage that obtains is applied to negative input end Son, difference amplifier OPA2 are used as inverting amplifier.In other words, as the voltage VN1 of first node N1 increases, difference amplifier Output voltage Vout reduce.The ratio A of the voltage VN1 of the output voltage Vout and first node N1 of difference amplifier can bases Variable resistance RCChange with the amplitude of the resistance of the 5th resistor R5.
In addition, the output voltage of operational amplifier is no more than applied to operation because of the characteristic according to operational amplifier The voltage of amplifier, thus difference amplifier OPA2 can linearly provide it is defeated between positive saturation voltage and negative saturation voltage Voltage Vout out.
Figure 21 is the characteristic shown when interface circuit according to the fourth embodiment of the present invention is in high level operation Circuit diagram.
Referring to Figure 21, if the signal SH of high level is input to the input terminal of the first integrated circuit 200, high level Signal SH can be applied to transmission line TL by input buffer 210.In addition, if being applied with the signal SH of high level, the first collection It can be turned off at the first transistor Q1 of circuit 200 or the second transistor Q2 of the second integrated circuit 300.If being applied with high electricity Flat signal SH, due to pullup resistor or due to the internal resistance of transmission line TL, in fact it could happen that the inflow of noise.In order to prevent The inflow of noise, constant-current generating circuit 100 can reduce the impedance of transmission line TL by providing electric current.
Firstly, the voltage sensing unit 112 of constant-current generating circuit 100 can measure first be formed on transmission line TL The voltage VN1 of node N1.Because be applied to the positive input terminal of the difference amplifier OPA2 of voltage sensing unit 112 voltage and The voltage of negative input terminal is almost identical, so with the voltage VN1 of first node N1 and being applied to the electricity of negative input terminal Press VCCThe corresponding electric current of/2 difference flows through the 5th resistor R5.Because of electric current stream identical with the electric current for flowing through the 5th resistor R5 Cross variable resistance RC(input terminal that electric current cannot flow through ideal operational amplifier), so the voltage of third node N3 can According to the positive input voltage V of difference amplifier OPA2CC/ 2 linearly change.
If the voltage of third node N3 is lower than the voltage of second node N2, electric current I11 can be flowed by first diode D1 Enter the 4th resistor R4.If the voltage of third node N3 is higher than the voltage of second node N2, electric current I11 is because of first diode D1 And it cannot flow into the 4th resistor R4.As the amount for the electric current for flowing through the 4th resistor R4 increases, the amplitude of the first electric current I1 increases Add, and generates unit 120 from constant current and export to the amount of the electric current of transmission line TL and increase.Therefore, transmission line can be reduced The internal impedance of TL, to reduce the inflow of noise.
Figure 22 is the equivalent circuit diagram of interface circuit according to the fifth embodiment of the present invention.
In the interface circuit of Figure 22, the bipolar junction transistor (BJT) in the interface circuit of Figure 18 is replaced by MOSFET. Because the operating principle of bipolar junction transistor (BJT) is similar to the operating principle of MOSFET, the interface circuit of Figure 22 Operating characteristic is similar to the operating characteristic of the interface circuit of Figure 18, and will omit repeated description.
Referring to Figure 22, interface circuit may include that constant-current generating circuit 100, the first integrated circuit 200 and second are integrated Circuit 300.
Constant-current generating circuit 100 may include that voltage sensing unit 112 and constant current generate unit 120.Constant electricity Stream generation unit 120 may include multiple transistor Q3 and Q4.The grid of the gate terminal of third transistor Q3 and the 4th transistor Q4 Extreme son is in contact with each other.The source terminal of the source terminal of third transistor Q3 and the 4th transistor Q4 can be connected to the first power supply Voltage VDD.Corresponding to the amplitude for the first electric current I1 for flowing through the first flowing path P 1, have identical as the amplitude of the first electric current I1 The second electric current I2 of amplitude can flow through second flow path P2, and the second electric current I2 is provided to transmission line TL.By The current mirror that three transistor Q3 and the 4th transistor Q4 are formed 0 is described in detail referring to Fig.1.
Figure 23 to Figure 29 is the equivalent circuit diagram of the integrated circuit of some other embodiments according to the present invention.
Figure 23 is to show the constant current at the both ends for being connected to interface circuit according to embodiment of the present invention The circuit diagram of generation circuit.The circuit of Figure 23 is similar to the interface circuit of Fig. 5, but permanent unlike the interface circuit of Fig. 5 Constant current generation circuit 100a is additionally connected to transmission line TL adjacent to the second integrated circuit 300.Due to transmission line TL longer, The internal impedance of transmission line TL increases.Therefore, it by adding constant-current generating circuit 100a, can reduce from the outer of transmission line TL The impedance of the transmission line TL of portion's observation.
Figure 24 is to show the constant current at the both ends for being connected to interface circuit of another embodiment according to the present invention The circuit diagram of generation circuit.The circuit of Figure 24 is similar to the interface circuit of Figure 11, but unlike the interface circuit of Figure 11 Constant-current generating circuit 100a is additionally connected to transmission line TL adjacent to the second integrated circuit 300.Due to transmission line TL compared with Long, the internal impedance of transmission line TL increases.Therefore, it by adding constant-current generating circuit 100a, can reduce from transmission line TL External observation transmission line TL impedance.
Figure 25 is to show the constant current at the both ends for being connected to interface circuit of another embodiment according to the present invention The circuit diagram of generation circuit.The circuit of Figure 25 is similar to the interface circuit of Figure 17, but unlike the interface circuit of Figure 17 Constant-current generating circuit 100a is additionally connected to transmission line TL adjacent to the second integrated circuit 300.Due to transmission line TL compared with Long, the internal impedance of transmission line TL increases.Therefore, it by adding constant-current generating circuit 100a, can reduce from transmission line TL External observation transmission line TL impedance.
Figure 26 shows the multi-connection circuit between multiple first integrated circuits and multiple second integrated circuits.Passing through will Constant-current generating circuit 100 is added to the transmission line TL in multiple main circuits and multiple connections between circuit, can subtract The inflow of few noise.The circuit of Figure 26 is similar to the interface circuit of Fig. 5, but difference is that n main circuit and n are a logical from circuit Cross transmission line TL connection.Although multiple circuits are connected by transmission line TL, the operation circuit of transmission line TL is passed through by offer Address, multi-connection circuit can also mode identical with the interface circuit of Fig. 5 operate.Figure 26 show n main circuit and n from Connection between circuit, but not limited to this.One main circuit and multiple connections between circuit are also available.
Figure 27 shows the multi-connection circuit between multiple first integrated circuits and multiple second integrated circuits.Passing through will Constant-current generating circuit 100 is added to the transmission line TL in multiple main circuits and multiple connections between circuit, can subtract The inflow of few noise.The circuit of Figure 27 is similar to the interface circuit of Figure 11, but difference is that n main circuit and n are a from circuit It is connected by transmission line TL.Figure 27 shows n main circuit and n is a from the connection between circuit, and but not limited to this.One master Circuit and multiple connections between circuit are also available.
Figure 28 shows the multi-connection circuit between multiple first integrated circuits and multiple second integrated circuits.By will be permanent Constant current generation circuit 100 is added to the transmission line TL in multiple main circuits and multiple connections between circuit, can reduce The inflow of noise.The circuit of Figure 28 is similar to the interface circuit of Figure 17, but difference is that n main circuit and n are a logical from circuit Cross transmission line TL connection.Figure 28 shows n main circuit and n is a from the connection between circuit, and but not limited to this.One main electricity Road and multiple connections between circuit are also available.
In the interface circuit of Figure 29, the bipolar junction transistor (BJT) in the interface circuit of Figure 26 is replaced by MOSFET. Because the operating principle of bipolar junction transistor (BJT) is similar to the operating principle of MOSFET, the interface circuit of Figure 29 Operating characteristic of the operating characteristic similar to the interface circuit of Figure 26.Moreover, in the interface circuit of Figure 27 and Figure 28, dipole Transistor (BJT) can be replaced by MOSFET.
However, effect of the invention be not limited to it is those of described herein.By reference to claim, of the invention is upper Those skilled in the art will be become more apparent from other effects by stating.
Although being particularly shown and described the present invention, this field referring to exemplary embodiments of the present invention One of ordinary skill appreciates that various change can be carried out in form and details to it, without departing from being defined by the following claims The spirit and scope of the present invention.Therefore should it is expected, embodiments of the present invention be considered as in all respects it is illustrative and Unrestricted, with reference to appended claims rather than description above is to indicate the scope of the present invention.

Claims (16)

1. a kind of interface circuit, comprising:
First integrated circuit, sends or receives data；
Second integrated circuit is connected to first integrated circuit by transmission line to send or receive data；And
Constant-current generating circuit is connected to the transmission line exporting the electric current with constant amplitude to the transmission line；
Wherein, the constant-current generating circuit is output to the transmission line by sensing the voltage adjustment of the transmission line The amount of electric current,
Wherein, the constant-current generating circuit includes:
Voltage sensing unit senses the voltage of the transmission line to generate corresponding with the voltage of the transmission line One electric current；And
Constant current generates unit, including the current mirror for exporting the second electric current corresponding with first electric current, wherein institute Stating current mirror includes third transistor and the 4th transistor,
Wherein, the base terminal of the third transistor is connect with the base terminal of the 4th transistor, and
Wherein, the emitter terminal of the emitter terminal of the third transistor and the 4th transistor is connected to the first power supply Voltage, and
Wherein, the base terminal of the 4th transistor and collector terminal are attached to the voltage sensing unit.
2. interface circuit as described in claim 1, wherein the voltage sensing unit includes at least one sensing transistor；With And
Wherein at least one described sensing transistor in response to the transmission line the voltage turn-on and generate and the biography Corresponding first electric current of the voltage of defeated line.
3. interface circuit as claimed in claim 2, wherein each of at least one described sensing transistor and the multiple Each of transistor is formed by bipolar junction transistor.
4. interface circuit as claimed in claim 2, wherein each of at least one described sensing transistor and the multiple Each of transistor is formed by field effect transistor.
5. interface circuit as described in claim 1, wherein the voltage sensing unit includes comparator and first diode；With And
Wherein the voltage of the transmission line is compared with reference voltage to export predetermined voltage by the comparator.
6. interface circuit as claimed in claim 5, wherein each of the multiple transistor is formed by bipolar junction transistor.
7. interface circuit as claimed in claim 5, wherein each of the multiple transistor is formed by field effect transistor.
8. interface circuit as described in claim 1, wherein the voltage sensing unit includes difference amplifier and at least one Diode；And
Wherein the difference amplifier exports voltage corresponding with the voltage of the transmission line.
9. interface circuit as claimed in claim 8, wherein each of the multiple transistor is formed by bipolar junction transistor.
10. interface circuit as claimed in claim 8, wherein each of the multiple transistor is tubular by field effect transistor At.
11. a kind of interface circuit, comprising:
First integrated circuit, sends or receives data；
Second integrated circuit is connected to first integrated circuit by transmission line to send or receive data；And
Multiple constant-current generating circuits are connected to the transmission line exporting the electric current with constant amplitude to the transmission Line；
Wherein, each of described constant-current generating circuit is output to described by the voltage adjustment of the sensing transmission line The amount of the electric current of transmission line,
Wherein, the constant-current generating circuit includes:
Voltage sensing unit senses the voltage of the transmission line to generate corresponding with the voltage of the transmission line One electric current；And
Constant current generates unit, including the current mirror for exporting the second electric current corresponding with first electric current, wherein institute Stating current mirror includes third transistor and the 4th transistor,
Wherein, the base terminal of the third transistor is connect with the base terminal of the 4th transistor, and
Wherein, the emitter terminal of the emitter terminal of the third transistor and the 4th transistor is connected to the first power supply Voltage, and
Wherein, the base terminal of the 4th transistor and collector terminal are attached to the voltage sensing unit.
12. interface circuit as claimed in claim 11, wherein the voltage sensing unit includes at least one sensing transistor, And
Wherein, at least one described sensing transistor in response to the transmission line the voltage turn-on and generate with the biography Corresponding first electric current of the voltage of defeated line.
13. interface circuit as claimed in claim 11, wherein the voltage sensing unit includes comparator and first diode； And
Wherein, the voltage of the transmission line is compared with reference voltage to export predetermined voltage by the comparator.
14. interface circuit as claimed in claim 11, wherein the voltage sensing unit includes difference amplifier and at least one A diode；And
Wherein the difference amplifier exports voltage corresponding with the voltage of the transmission line.
15. a kind of interface circuit, comprising:
Multiple first integrated circuits, send or receive data；
Multiple second integrated circuits are connected to each of described first integrated circuit by transmission line to send or receive number According to；And
Constant-current generating circuit is connected to the transmission line exporting the electric current with constant amplitude to the transmission line；
Wherein, the constant-current generating circuit is output to the transmission line by sensing the voltage adjustment of the transmission line The amount of electric current,
Wherein, the constant-current generating circuit includes:
Voltage sensing unit senses the voltage of the transmission line to generate corresponding with the voltage of the transmission line One electric current；And
Constant current generates unit, including the current mirror for exporting the second electric current corresponding with first electric current, wherein institute Stating current mirror includes third transistor and the 4th transistor,
Wherein, the base terminal of the third transistor is connect with the base terminal of the 4th transistor, and
Wherein, the emitter terminal of the emitter terminal of the third transistor and the 4th transistor is connected to the first power supply Voltage, and
Wherein, the base terminal of the 4th transistor and collector terminal are attached to the voltage sensing unit.
16. interface circuit as claimed in claim 15, wherein the voltage sensing unit includes at least one sensing transistor, And
Wherein, at least one described sensing transistor in response to the transmission line the voltage turn-on and generate with the biography Corresponding first electric current of the voltage of defeated line.
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US20150295563A1 (en) 2015-10-15
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KR20150119551A (en) 2015-10-26
EP2933923B1 (en) 2017-12-06
KR102182572B1 (en) 2020-11-25

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