CN105048895A - Single-phase driving circuit structure based on multiple MEMS sensors - Google Patents
Single-phase driving circuit structure based on multiple MEMS sensors Download PDFInfo
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Abstract
A single-phase driving circuit structure based on multiple MEMS sensors is disclosed. The invention relates to the integrated circuit field, and aims to solve the problem that a conventional motor is low in intelligent level and reliability, and unreasonable in drive circuit structure, and has no endurance under extreme environment. The circuit structure comprise, sequentially connected, MEMS sensing units which obtain target sensing data, convert the sensing data into clock signals and send the clock signals; a pulse timing modulation unit which conducts pulse width modulation according to the control clock sent by the MEMS sensing unit, carries out pulse time-delay feedback adjustment and sends level modulation signals; and a single-phase motor unit which obtains ordered driving mode and realizes ordered rotation according to the level modulation signals of the pulse timing modulation unit. The pulse timing modulation unit feeds data back to the MEMS sensing units, and the single-phase motor unit feeds electromotive force back to the pulse timing modulation unit. The single-phase driving circuit structure is applicable to motor intellectualization.
Description
Technical field
The present invention relates to integrated circuit fields, be specifically related to a kind of single-phase driving circuit structure based on MEMS sensor.
Background technology
Existing motor, lacks integrated control device or control device degree of intelligence is not high, needs a large amount of manual operation, cannot automatically complete each generic operation; The modulation of pulse, delay adjustment circuit unreasonable structure, cause double-field effect tube voltage regulating circuit to there is overlapping conducting voltage scope, affect drive circuit further; The extraneous factors such as motor is integrated with position transducer, and the reliability of position transducer is low, is vulnerable to ambient temperature, pressure affect, and reduce further the reliability of motor.
Summary of the invention
For above-mentioned prior art, the object of the invention is to provide a kind of single-phase driving circuit structure based on MEMS sensor, it is intended to solve existing motor and there is low degree of intelligence, irrational driving circuit structure, low reliability and do not possess the technical problems such as extreme environment tolerance.
For achieving the above object, the technical solution used in the present invention is as follows:
Based on a single-phase driving circuit structure for MEMS sensor, comprise the MEMS sensing unit connected successively: obtain target sensing data, change sensing data and control clock into clock signal and transmission; Pulse timing modulating unit: the control clock sent according to MEMS sensing unit, carries out pulse-width modulation, and horizontal pulse Time-delayed Feedback of going forward side by side regulates and level modulated signals sends; Monophase machine unit: according to pulse timing modulating unit level modulated signals, obtains orderly drive pattern and realizes rotating in order; Pulse timing modulating unit is to MEMS sensing unit feedback data; Monophase machine unit is to pulse timing modulating unit feedback back electromotive force.
In such scheme, described MEMS sensing unit, comprise export for clock, the FPGA of data processing and signal controlling: be provided with MEMS sensor interface; First analog to digital converter: output port connects FPGA, receives FPGA control command, to FPGA output digit signals; MEMS sensor: clock input interface connects the MEMS sensor interface of FPGA, and output connects the input of the first analog to digital converter, receives the clock sequence of FPGA, sends sensing data to the first analog to digital converter.MEMS sensor has that volume is little, lightweight, low in energy consumption, reliability is high, highly sensitive, be easy to integrated and the advantage such as resistance to harsh environments.Extract extraneous echo signal, mate with FPGA preset reference, can recognition function be completed; Multiple MEMS sensor combination, can make the different characteristic of same target fully be identified checking, promote accuracy; After deal with data, send middle control order to the next circuit; Needing to propose ground is that, after FPGA completes programming, sequence of maneuvers all can self-servicely complete, extraneous by host computer reading related data, embodies motor intelligent.
In such scheme, described pulse timing modulating unit, comprises modulation pulse generator: input connects the output terminal of clock of FPGA, receives FPGA and controls clock; First inverter: input connects the output of modulation pulse generator; First programmable delayer: input connects the output of the first inverter; Second inverter: input connects the output of the first programmable delayer; First field effect transistor: grid connects the output of the second inverter, and source electrode is connected to inductance; Inductance one end is High_V; For eliminating the switching circuit of judgement time delay: be connected with the output of modulation pulse generator, be connected with the output of the first programmable delayer; Second field effect transistor: grid connecting valve circuit, the source electrode of drain electrode connection first field effect transistor; Schottky synchronous rectification diode: positive pole, negative pole connect source electrode, the drain electrode of the second field-effect diode respectively; Schottky synchronous rectification diode cathode is Low_V.According to the control clock that MEMS sensing unit sends, realize pulse-width modulation, the function that pulse delay feedback regulation and level modulated signals send.The reaction speed of the whole circuit of remarkable increase.
In such scheme, described switching circuit, comprises cut-off circuit, and turning circuit also comprises rest-set flip-flop: Q holds the grid of connection second field effect transistor Q2.
In such scheme, described cut-off circuit, comprises buffer register: input connects the output of the first programmable delayer; First appreciation counter; Clock end connects the output of buffer register; First with door: input port is connected High_V and programmed sequence; First NOR gate: input port is connected with the output of first and door, and output connects the counting end of the first appreciation counter; 3rd inverter: input is for presetting end; First or door: input port connects the output of the 3rd inverter and the output of buffer register; Second NOR gate: input port is connected with first or the output of door and the output of the first NOR gate, and output is connected to the input port of the first NOR gate; Second programmable delayer: activate the counting end-Q that counting end A connects the first appreciation counter, time delay end D connects the output ID of the first programmable delayer; 4th inverter: input connects the output Y of the second programmable delayer; 3rd NOR gate: input port connects input and the output of the 4th inverter respectively; Second and door; Second or door: input port is connected with the output and second and the output of door of the 3rd NOR gate; 5th inverter: input is connected the input port of second and door with output; Second or door output connect rest-set flip-flop R end.After cut-off circuit activates, Schottky synchronous rectification diode D1 will end, and thoroughly eliminate voltage range and the waveform drift of double-field effect pipe overlapping conducting, namely now only have field effect transistor Q2 conducting.The reaction speed of the whole circuit of remarkable increase.
In such scheme, described turning circuit, comprises the second appreciation counter: clock end connects the output of modulation pulse generator; 3rd or door: input port connects output and the High_V of the 3rd inverter; Four nor gate: input port is connected with the output of the 3rd or door; 5th NOR gate: input port is connected with the output of four nor gate, output connects the counting end UP of the second appreciation counter; 3rd and door: input port is connected with the output of buffer register, and output is connected to the input port of the 5th NOR gate; 4th and door: input port is provided with monitoring point, output be connected to the 3rd with the input port of door; Reference power supply: plus earth; Comparator: high level end connects the negative pole of reference power supply, output is connected to the input port of the 4th and door; 3rd programmable delayer: activate the Q end that counting end A connects the second appreciation counter, time delay end connects the output of the first programmable delayer; Hex inverter: input connects the output of the 3rd programmable delayer; 5th with door: input port is connected output and the input of hex inverter, output connect rest-set flip-flop S end.Turning circuit activate after, Schottky synchronous rectification diode D1 by conducting, field effect transistor Q1 conducting, field effect transistor Q2 short circuit; Set up loop, opposing electromotance feedback basis.The reaction speed of the whole circuit of remarkable increase.
In such scheme, described monophase machine unit, comprises drive circuit: 1_H end connects High_V, Low_V and connects Low_V; Motor: interface 1 connects the output interface OUT1 of drive circuit; Second analog to digital converter: input connects the interface 1 of monophase machine, output connects the low level end of comparator.Motor does not need position transducer, passes through set up feedback loop and passes back electromotive force back pulse timing modulating unit, completes self-adjusting operation, strengthens motor extreme environment tolerance, reduces extraneous impacting, remarkable lifting motor reliability.
Accompanying drawing explanation
Fig. 1 is circuit module figure of the present invention;
Fig. 2 is physical circuit figure of the present invention;
Fig. 3 is that back electromotive force of the present invention replaces position transducer embodiment motor phase oscillogram;
In figure: 100-MEMS sensing unit, 200-pulse timing modulating unit, 300-monophase machine unit, 4-modulation pulse generator, 5, 12, 23, 28, 30, 24-inverter, 6, 21, 22-programmable delayer, 7-buffer register, 8, 16, 17, 25, 29-and door, 9, 10, 14, 18, 27-NOR gate, 11, 13, 26-or door, 31-RS trigger, Q1, Q2-field effect transistor, D1, D2-Schottky synchronous rectification diode, PRESET-presets end, Checkpoint-monitoring point, High_V-high level point, Low_V-low level point, MEMSSENSOR-micro-electro-mechanical sensors, FPGA-Field Programmable Gate Array, MOTOR-motor, PDC-drive circuit, 31, 32-analog to digital converter, CI-network interface, UPPER-host computer, BEMF-back electromotive force.
Embodiment
All features disclosed in this specification, or the step in disclosed all methods or process, except mutually exclusive feature and/or step, all can combine by any way.
Below in conjunction with accompanying drawing, the present invention will be further described:
Fig. 1 is circuit module figure of the present invention, and a kind of single-phase driving circuit structure based on MEMS sensor, comprises the MEMS sensing unit 100 connected successively: obtain target sensing data, changes sensing data and controls clock Clock into clock signal and transmission; Pulse timing modulating unit 200: the control clock Clock sent according to MEMS sensing unit 100, carries out pulse-width modulation, and horizontal pulse Time-delayed Feedback of going forward side by side regulates and level modulated signals sends; Monophase machine unit 300: according to pulse timing modulating unit 200 level modulated signals, obtains orderly drive pattern and realizes rotating in order; Pulse timing modulating unit 200 is to MEMS sensing unit 100 feedback data Data; Monophase machine unit 300 feeds back back electromotive force BEMF to pulse timing modulating unit 200.
Fig. 2 is physical circuit figure of the present invention, in such scheme, described MEMS sensing unit 100, comprise export for clock, the FPGA of data processing and signal controlling: be provided with MEMS sensor interface; First analog to digital converter 31: output port connects FPGA, receives FPGA control command, to FPGA output digit signals; MEMS sensor: clock input interface connects the MEMS sensor interface of FPGA, and output connects the input of the first analog to digital converter 31, receives the clock sequence of FPGA, sends sensing data to the first analog to digital converter 31.
Described pulse timing modulating unit 200, comprises modulation pulse generator 4: input connects the output terminal of clock of FPGA, receives FPGA and controls clock Clock; First inverter 5: input connects the output of modulation pulse generator 4; First programmable delayer 6: input connects the output of the first inverter 5; Second inverter 24: input connects the output of the first programmable delayer 6; First field effect transistor Q1: grid connects the output of the second inverter 24, and source electrode is connected to inductance L 1; Inductance L 1 one end is High_V; For eliminating the switching circuit of judgement time delay: be connected with the output of modulation pulse generator 4, be connected with the output of the first programmable delayer 6; Second field effect transistor Q2: grid connecting valve circuit, the source electrode of drain electrode connection first field effect transistor Q1; Schottky synchronous rectification diode D1: positive pole, negative pole connect source electrode, the drain electrode of the second field-effect diode respectively; Schottky synchronous rectification diode D1 just very Low_V.
Described switching circuit, comprises cut-off circuit, turning circuit, also comprises the grid that rest-set flip-flop 31:Q holds connection second field effect transistor Q2.
Described cut-off circuit, comprises buffer register 7: input connects the output ID of the first programmable delayer 6; First appreciation counter 19; Clock end CLK connects the output of buffer register 7; First with door 8: input port is connected High_V and programmed sequence Pro.bit; First NOR gate 9: input port is connected with the output of first and door 8, and output connects the counting end UP of the first appreciation counter 19; 3rd inverter 12: input is for presetting end Preset; First or door 11: input port connects the output of the 3rd inverter 12 and the output of buffer register 7; Second NOR gate 10: input port is connected with first or the output of door 11 and the output of the first NOR gate 9, and output is connected to the input port of the first NOR gate; Second programmable delayer 21: activate the counting end-Q that counting end A connects the first appreciation counter 19, time delay end D connects the output ID of the first programmable delayer; 4th inverter 28: input connects the output Y of the second programmable delayer 21; 3rd NOR gate 27: input port connects input and the output of the 4th inverter 28 respectively; Second with door 25; Second or door 26: input port is connected with the output and second and the output of door 25 of the 3rd NOR gate 27; 5th inverter 23: input is connected the input port of second and door 25 with output; Second or door 26 output connect rest-set flip-flop 31 R end.
Described turning circuit, comprises the second appreciation counter 20: clock end CLK connects the output of modulation pulse generator 4; 3rd or door 13: input port connects output and the High_V of the 3rd inverter 12; Four nor gate 14: input port is connected with the output of the 3rd or door 13; 5th NOR gate 18: input port is connected with the output of four nor gate 14, output connects the counting end UP of the second appreciation counter 20; 3rd with door 17: input port is connected with the output of buffer register 7, and output is connected to the input port of the 5th NOR gate 18; 4th with door 16: input port is provided with monitoring point Checkpoint, output be connected to the 3rd with the input port of door 17; Reference power supply Ref_1: plus earth; Comparator 15: high level end connects the negative pole of reference power supply Ref_1, output is connected to the input port of the 4th and door 16; 3rd programmable delayer 22: activate the Q end that counting end A connects the second appreciation counter 20, time delay end D connects the output ID of the first programmable delayer 6; Hex inverter 30: input connects the output Y of the 3rd programmable delayer 22; 5th with door 29: input port is connected output and the input of hex inverter 30, output connect rest-set flip-flop 31 S end.
Described monophase machine unit 300, comprises drive circuit PDC:1_H and holds connection High_V, Low_V to connect Low_V; Monophase machine MOTOR: interface 1 connects the output interface OUT1 of drive circuit; Second analog to digital converter 32: input connects the interface 1 of monophase machine MOTOR, output connects the low level end of comparator 15.
Fig. 3 is that back electromotive force of the present invention replaces position transducer embodiment motor phase oscillogram, and each phase place is π/6 compared with the transfer delay phase place of reference power supply Ref_1 voltage, provides and implements zero passage detection condition.When back electromotive force BEMF changes, lay equal stress on and establish counter in pulse timing modulating unit 200 interval writing time; When the timing of counter is more than or equal to the back electromotive force BEMF time interval be recorded, will start phase place change timing, pulse timing modulating unit 200, by regulation output, rotates with further drive motors.
Embodiment 1,
If an identified target, sensing data be sent to FPGA process after MEMS sensor identification, FPGA uploads readable information to host computer UPPER by network interface CI while giving an order to the next circuit, and in specific FPGA application, host computer can also send instruction to FPGA; When modulation pulse generator 4 receives the order that FPGA sends, export anti-phase modulating pulse to the first programmable delayer 6, first programmable delayer 6 obtains signal and preloads, export the modulation signal of a time delay, after switching circuit, Schottky synchronous rectification diode D1 always shifts to an earlier date validation signal waveform trailing edge, to complete high and low level conversion in advance, eliminate double-field effect pipe Q1, the overlapping interval of Q2, thus accurately sending level signal to drive circuit PDC, drive circuit PDC obtains orderly drive pattern, and drive motors rotates in order further.
In AEROSPACE APPLICATION, embodiment 2,
In space shuttle and space station docking operation, the docking port of space station is as MEMS sensor specific identification target, select MEMS laser sensor, coordinate a high reverse--bias light laser, by " identify-rotate-feedback-adjustment-identify ... " process, space shuttle can be completed comparatively accurately and dock with space station.
In Military Application, embodiment 3,
Infrared laser can be coordinated to make from aiming at weapon mount pad, in enforcement, select MEMS infrared sensor, from strike weapon (as rocket launcher RPG, armour-piercing machine gun) be arranged on the base that controls by electric machine rotation, when hostile low flyer or near, middlely appear in MEMS infrared sensor investigative range apart from ground target, host computer sends and hits instruction to FPGA, motor moves with target and rotates, and realizes locking-type and continues to hit institute's target-marking.At specific restricted area, can pre-set target distinguishing feature, then do not need host computer to issue an order, as long as one appears in MEMS sensor investigative range, weapon strikes target at once, and electromechanical locks fixed pattern rotates, and makes weapon be continued to strike target.
In civilian applications, embodiment 4,
Be arranged on by stage lighting on motor, can make the main follow spot light of stage, in enforcement, the performing artist followed spot required for mark in advance, performing artist is able to lasting acquisition and follows spot, and does not need the main follow spot light of manual control.
Beneficial effect of the present invention: motor rate of straining soon, practices scope wide, can work alone intelligently, can tolerate extreme environment and reliability is high.
The above; be only the specific embodiment of the present invention, but protection scope of the present invention is not limited thereto, anyly belongs to those skilled in the art in the technical scope that the present invention discloses; the change that can expect easily or replacement, all should be encompassed within protection scope of the present invention.
Claims (7)
1. based on a single-phase driving circuit structure for MEMS sensor, to it is characterized in that, comprise and connecting successively
MEMS sensing unit (100): obtain target sensing data, changes sensing data and controls clock Clock into clock signal and transmission;
Pulse timing modulating unit (200): the control clock Clock sent according to MEMS sensing unit (100), carries out pulse-width modulation, and horizontal pulse Time-delayed Feedback of going forward side by side regulates and level modulated signals sends;
Monophase machine unit (300): according to pulse timing modulating unit (200) level modulated signals, obtains orderly drive pattern and realizes rotating in order;
Pulse timing modulating unit (200) is to MEMS sensing unit (100) feedback data Data; Monophase machine unit (300) is to pulse timing modulating unit (200) feedback back electromotive force BEMF.
2. a kind of single-phase driving circuit structure based on MEMS sensor according to claim 1, is characterized in that, described MEMS sensing unit (100), comprises
Export for clock, the FPGA of data processing and signal controlling: be provided with MEMS sensor interface;
First analog to digital converter (31): output port connects FPGA, receives FPGA control command, to FPGA output digit signals;
MEMS sensor: clock input interface connects the MEMS sensor interface of FPGA, and output connects the input of the first analog to digital converter (31), receives the clock sequence of FPGA, sends sensing data to the first analog to digital converter (31).
3. a kind of single-phase driving circuit structure based on MEMS sensor according to claim 1, is characterized in that, described pulse timing modulating unit (200), comprises
Modulation pulse generator (4): input connects the output terminal of clock of FPGA, receives FPGA and controls clock Clock;
First inverter (5): input connects the output of modulation pulse generator (4);
First programmable delayer (6): input connects the output of the first inverter (5);
Second inverter (24): input connects the output of the first programmable delayer (6);
First field effect transistor Q1: grid connects the output of the second inverter (24), source electrode is connected to inductance L 1;
Inductance L 1 one end is High_V;
For eliminating the switching circuit of judgement time delay: be connected with the output of modulation pulse generator (4), be connected with the output of the first programmable delayer (6);
Second field effect transistor Q2: grid connecting valve circuit, the source electrode of drain electrode connection first field effect transistor Q1;
Schottky synchronous rectification diode D1: positive pole, negative pole connect source electrode, the drain electrode of the second field-effect diode respectively;
Schottky synchronous rectification diode D1 just very Low_V.
4. a kind of single-phase driving circuit structure based on MEMS sensor according to claim 3, it is characterized in that, described switching circuit, comprises cut-off circuit, turning circuit, also comprises rest-set flip-flop (31): Q holds the grid of connection second field effect transistor Q2.
5. a kind of single-phase driving circuit structure based on MEMS sensor according to claim 3 or 4, it is characterized in that, described cut-off circuit, comprises
Buffer register (7): input connects the output ID of the first programmable delayer (6);
First appreciation counter (19); Clock end CLK connects the output of buffer register (7);
First with door (8): input port is connected High_V and programmed sequence Pro.bit;
First NOR gate (9): input port is connected with the output of first and door (8), and output connects the counting end UP of the first appreciation counter (19);
3rd inverter (12): input is for presetting end Preset;
First or door (11): input port connects the output of the 3rd inverter (12) and the output of buffer register (7);
Second NOR gate (10): input port is connected with first or the output of door (11) and the output of the first NOR gate (9), and output is connected to the input port of the first NOR gate;
Second programmable delayer (21): activate the counting end-Q that counting end A connects the first appreciation counter (19), time delay end D connects the output ID of the first programmable delayer;
4th inverter (28): input connects the output Y of the second programmable delayer (21);
3rd NOR gate (27): input port connects input and the output of the 4th inverter (28) respectively;
Second with door (25);
Second or door (26): input port is connected with the output and second and the output of door (25) of the 3rd NOR gate (27);
5th inverter (23): input is connected the input port of second and door (25) with output;
Second or door (26) output connect rest-set flip-flop (31) R end.
6. a kind of single-phase driving circuit structure based on MEMS sensor according to claim 3 or 4, it is characterized in that, described turning circuit, comprises
Second appreciation counter (20): clock end CLK connects the output of modulation pulse generator (4);
3rd or door (13): input port connects output and the High_V of the 3rd inverter (12);
Four nor gate (14): input port is connected with the output of the 3rd or door (13);
5th NOR gate (18): input port is connected with the output of four nor gate (14), output connects the counting end UP of the second appreciation counter (20);
3rd with door (17): input port is connected with the output of buffer register (7), and output is connected to the input port of the 5th NOR gate (18);
4th with door (16): input port is provided with monitoring point Checkpoint, output be connected to the 3rd with the input port of door (17);
Reference power supply Ref_1: plus earth;
Comparator (15): high level end connects the negative pole of reference power supply Ref_1, output is connected to the input port of the 4th and door (16);
3rd programmable delayer (22): activate the Q end that counting end A connects the second appreciation counter (20), time delay end D connects the output ID of the first programmable delayer (6);
Hex inverter (30): input connects the output Y of the 3rd programmable delayer (22);
5th with door (29): input port is connected output and the input of hex inverter (30), output connect rest-set flip-flop (31) S end.
7. a kind of single-phase driving circuit structure based on MEMS sensor according to claim 1, is characterized in that, described monophase machine unit (300), comprises
Drive circuit PDC:1_H holds and connects High_V, Low_V connection Low_V;
Monophase machine MOTOR: interface 1 connects the output interface OUT1 of drive circuit;
Second analog to digital converter (32): input connects the interface 1 of monophase machine MOTOR, output connects the low level end of comparator (15).
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Effective date of registration: 20200528 Address after: 3a, NANDA industry university research building, No. 6, Yuexing Third Road, high tech Zone, Yuehai street, Nanshan District, Shenzhen City, Guangdong Province Patentee after: SHENZHEN HAIPPI NANOOPTICAL TECHNOLOGY CO., LTD. Address before: 610000 1, Tianyi street, Chengdu hi tech Zone, Chengdu, Sichuan, 1 Patentee before: SICHUAN HONGYI WISDOM INTELLECTUAL PROPERTY OPERATION Co.,Ltd. |