CN105024561A - IGCT-based three-level circuit fault elimination method - Google Patents
IGCT-based three-level circuit fault elimination method Download PDFInfo
- Publication number
- CN105024561A CN105024561A CN201510500735.5A CN201510500735A CN105024561A CN 105024561 A CN105024561 A CN 105024561A CN 201510500735 A CN201510500735 A CN 201510500735A CN 105024561 A CN105024561 A CN 105024561A
- Authority
- CN
- China
- Prior art keywords
- igct
- circuit
- fault
- frequency converter
- turning
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
Disclosed in the invention is an IGCT-based three-level circuit fault elimination method. The method comprises: state parameters of a first IGCT, a second IGCT, a third IGCT, and a fourth IGCT are obtained; according to the state parameters, whether a turning-off damage fault occurs at the first IGCT or the fourth IGCT is determined; if so, a control pulse of an inversion circuit of a phase where the first IGCT or the fourth IGCT is located is kept to be unchanged; a front-end circuit breaker of a frequency converter is disconnected until direct-current voltages at the two ends of a support capacitor are reduced to safe voltage values; and a blocking pulse [0,0,0,0] are inserted to block the first IGCT, the second IGCT, the third IGCT, and the fourth IGCT correspondingly. According to the invention, the characteristics of the IGCT element in a short-circuit state after the turning-off damage fault occurrence; and when the turning-off damage fault occurs at the IGCT, the control pulse of the inversion circuit of the phase where the first IGCT or the fourth IGCT is located is kept to be unchanged, so that a short-circuit phenomenon of a three-level circuit due to the IGCT fault short-circuit occurrence can be avoided and the safety and reliability of the IGCT-based three-level circuit can be improved.
Description
Technical field
The present invention relates to tri-level circuit fault technical solution field, particularly relate to a kind of fault solution of the tri-level circuit based on IGCT.
Background technology
Along with the needs of social development, frequency converter is widely used in the modern life.In prior art, after frequency converter breaks down, the control impuls usually by blocking all switching devices in frequency converter in inverter circuit is protected, and this method is widely used in two level converters, and is proved to be reliable and stable.But put clamped three-level IGCT (Integrated GateCommutated Thyristors in the diode; integrated gate commutated thyristor) in frequency converter; power failure or IGCT fault etc. all carry out system protection words by the control impuls of blocking all IGCT are driven for the direct voltage overvoltage in three level IGCT frequency converter, input and output overcurrent, door; when just probably there will be same half-bridge two switching devices shutoff reality differences, thus the situation causing single switch device to bear full-bridge voltage and damage.
Please refer to Fig. 1, Fig. 1 is a kind of three level phase bridge arm circuit topological diagram based on IGCT provided by the invention, in figure, wherein V1-V4 is IGCT, D1-D4 is anti-paralleled diode, D5, D6 are neutral point clamp diode, half-bridge absorbing circuit in Ls1, Rs1, Cs1 and D7 formation, and Ls2, Rs2, Cs2 and D8 are lower half-bridge absorbing circuit.IGCT and FRD is compression joint type semiconductor device, shows as short-circuit condition in case of a fault, and IGCT has fault to feed back signal to controller when fault.
Situation about damaging in order to avoid occurring single IGCT to bear full-bridge voltage when there is locking pulse, solution of the prior art is that zero level transition pulses [0,1,1, the 0] transition pulses adding a period of time when pulse blocking solves.This method in essence or the catastrophe failure all to frequency converter all carry out blocking the mode of control impuls and process, but owing to being in the feature of short-circuit condition after IGCT component wear, take the method for all pulses of above blockade that fault will be made to expand further under some failure condition, more serious damage is caused to frequency converter.
Therefore, a kind of fault solution of the safe and reliable tri-level circuit based on IGCT how is provided to be the problem that those skilled in the art need to solve at present.
Summary of the invention
The object of this invention is to provide a kind of fault solution of the tri-level circuit based on IGCT, after IGCT occurs turning off damage fault, keep the control impuls of this fault IGCT place phase inverter circuit constant, avoid the tri-level circuit short circuit owing to causing after IGCT failed shorted, improve the security reliability of the tri-level circuit based on IGCT.
For solving the problems of the technologies described above, the invention provides a kind of fault solution of the tri-level circuit based on IGCT, be applied to frequency converter, described frequency converter comprises rectification circuit, three-phase inverting circuit and the Support Capacitor between described rectification circuit and three-phase inverting circuit, wherein, in described three-phase inverting circuit, the IGCT, the 2nd IGCT, the 3rd IGCT and the 4th IGCT that connect successively every phase inverter circuit includes from direct-current input power supplying positive pole to direct-current input power supplying negative pole, for every phase inverter circuit, the method comprises:
Step s101: the state parameter obtaining a described IGCT, the 2nd IGCT, the 3rd IGCT and the 4th IGCT;
Step s102: judge whether a described IGCT or described 4th IGCT occurs turning off according to described state parameter and damage fault;
Step s103: when a described IGCT or described 4th IGCT occurs turning off damage fault, keep the control impuls of a described IGCT or described 4th IGCT place phase inverter circuit constant accordingly;
Step s104: the front end circuit breaker disconnecting described frequency converter, until the direct voltage at described Support Capacitor two ends is down to safe voltage value;
Step s105: insert locking pulse [0,0,0,0] and block a described IGCT, the 2nd IGCT, the 3rd IGCT and the 4th IGCT accordingly respectively, wherein, 0 in described locking pulse represents allows corresponding IGCT turn off.
Preferably, step s103 also comprises:
When a described IGCT or described 4th IGCT does not occur turning off damage fault, enter step s105.
Preferably, also comprise between step s104 and step s105:
Insert the zero level transition pulses [0,1,1 of Preset Time, 0] accordingly a described IGCT, the 2nd IGCT, the 3rd IGCT and the 4th IGCT are controlled respectively, wherein, 0 in described zero level pulse represents allows corresponding IGCT turn off, and 1 represents and allows corresponding IGCT conducting.
Preferably, described safe voltage value is 0.
Preferably, described Preset Time is 25us.
The fault solution of a kind of tri-level circuit based on IGCT provided by the invention, first whether an IGCT or the 4th IGCT is occurred that turning off damage fault detects, when an IGCT or the 4th IGCT occurs turning off damage fault, keep the control impuls of an IGCT or the 4th IGCT place phase inverter circuit constant accordingly, and then disconnect the front end circuit breaker of frequency converter, the energy of release Support Capacitor, until when the direct voltage at Support Capacitor two ends is down to safe voltage value, insert locking pulse [0, 0, 0, 0] respectively accordingly to an IGCT, 2nd IGCT, 3rd IGCT and the 4th IGCT blocks, the present invention has taken into full account the feature being in short-circuit condition after IGCT element OFF damages fault, after IGCT occurs turning off damage fault, keep the control impuls of this fault IGCT place phase inverter circuit constant, avoid the tri-level circuit short circuit owing to causing after IGCT failed shorted, improve the security reliability of the tri-level circuit based on IGCT.
Accompanying drawing explanation
In order to be illustrated more clearly in the technical scheme in the embodiment of the present invention, be briefly described to the accompanying drawing used required in prior art and embodiment below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is a kind of three level phase bridge arm circuit topological diagram based on IGCT provided by the invention;
Fig. 2 is the circuit theory diagrams of a kind of frequency converter provided by the invention;
Fig. 3 is the flow chart of the process of the fault solution of a kind of tri-level circuit based on IGCT provided by the invention;
Fig. 4 is the flow chart of another kind provided by the invention based on the process of the fault solution of the tri-level circuit of IGCT.
Embodiment
Core of the present invention is to provide a kind of fault solution of the tri-level circuit based on IGCT, after IGCT occurs turning off damage fault, keep the control impuls of this fault IGCT place phase inverter circuit constant, avoid the tri-level circuit short circuit owing to causing after IGCT failed shorted, improve the security reliability of the tri-level circuit based on IGCT.
For making the object of the embodiment of the present invention, technical scheme and advantage clearly, below in conjunction with the accompanying drawing in the embodiment of the present invention, technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
Please refer to Fig. 2 and Fig. 3, wherein, Fig. 2 is the circuit theory diagrams of a kind of frequency converter provided by the invention; Fig. 3 is the flow chart of the process of the fault solution of a kind of tri-level circuit based on IGCT provided by the invention.
This fault solution, be applied to frequency converter, frequency converter comprises rectification circuit, three-phase inverting circuit (U, V, W) and the Support Capacitor between rectification circuit and three-phase inverting circuit, wherein, in three-phase inverting circuit, the IGCT, the 2nd IGCT that connect successively every phase inverter circuit includes from direct-current input power supplying positive pole to direct-current input power supplying negative pole, the 3rd IGCT and the 4th IGCT (being corresponding in turn to V1, V2, V3 and the V4 Fig. 2), for every phase inverter circuit, the method comprises:
Step s101: the state parameter obtaining an IGCT, the 2nd IGCT, the 3rd IGCT and the 4th IGCT;
Step s102: judge whether an IGCT or the 4th IGCT occurs turning off according to state parameter and damage fault;
Be understandable that, the state parameter of 4 road PWM drive singal and IGCT is sent to FPGA (Field-Programmable Gate Array by master control borad, field programmable gate array), according to the state parameter of IGCT, FPGA judges whether each IGCT occurs turning off damage fault.
It should be noted that in the application and all illustrate for a phase inverter circuit when introducing fault solution, because the fault solution of two-phase inverter circuit is the same in addition, so do not repeat them here.In actual applications, the state parameter of 12 road PWM drive singal and IGCT is sent to FPGA by master control borad.
Step s103: when an IGCT or the 4th IGCT occurs turning off damage fault, keep the control impuls of an IGCT or the 4th IGCT place phase inverter circuit constant accordingly;
Step s104: the front end circuit breaker disconnecting frequency converter, until the direct voltage at Support Capacitor two ends is down to safe voltage value;
Step s105: insert locking pulse [0,0,0,0] and block an IGCT, the 2nd IGCT, the 3rd IGCT and the 4th IGCT accordingly respectively, wherein, 0 in locking pulse represents allows corresponding IGCT turn off.
Be understandable that, here Cd1 and Cd2 in Support Capacitor and Fig. 2, during in order to avoid occurring that certain IGCT occurs turning off damage fault, another IGCT directly bears the turn-off capacity that full-bridge direct current voltage makes to exceed this IGCT, cause the catastrophe failure of whole brachium pontis, the front end circuit breaker of frequency converter was first disconnected before inserting locking pulse, release Support Capacitor energy, until the direct voltage at Support Capacitor two ends is down to safe voltage value, insert locking pulse [0 again, 0, 0, 0] respectively accordingly to an IGCT, 2nd IGCT, 3rd IGCT and the 4th IGCT blocks.
In addition, the fault solution just for the circuitry phase in three-phase inverting circuit in the application is described, and in actual applications, the fault solution of three-phase inverting circuit is the same.When detect in three-phase inverting circuit only have a circuitry phase to occur IGCT fault time, the fault solution that then this fault phase circuit provides according to the application carries out trouble shooting, and the fault solution of quarter-phase circuit inserts locking pulse again after the zero level transition pulses of directly insertion one section of Preset Time to block in addition.
The fault solution of a kind of tri-level circuit based on IGCT provided by the invention, first whether an IGCT or the 4th IGCT is occurred that turning off damage fault detects, when an IGCT or the 4th IGCT occurs turning off damage fault, keep the control impuls of an IGCT or the 4th IGCT place phase inverter circuit constant accordingly, and then disconnect the front end circuit breaker of frequency converter, the energy of release Support Capacitor, until when the direct voltage at Support Capacitor two ends is down to safe voltage value, insert locking pulse [0, 0, 0, 0] respectively accordingly to an IGCT, 2nd IGCT, 3rd IGCT and the 4th IGCT blocks, the present invention has taken into full account the feature being in short-circuit condition after IGCT element OFF damages fault, after IGCT occurs turning off damage fault, keep the control impuls of this fault IGCT place phase inverter circuit constant, avoid the tri-level circuit short circuit owing to causing after IGCT failed shorted, improve the security reliability of the tri-level circuit based on IGCT.
Embodiment two
Please refer to Fig. 4, Fig. 4 is the flow chart of another kind provided by the invention based on the process of the fault solution of the tri-level circuit of IGCT, and the method comprises:
Step s201: the state parameter obtaining an IGCT, the 2nd IGCT, the 3rd IGCT and the 4th IGCT;
Step s202: judge whether an IGCT or the 4th IGCT occurs turning off according to state parameter and damage fault, if so, enter step s203; Otherwise, enter step s205;
Step s203: keep the control impuls of an IGCT or the 4th IGCT place phase inverter circuit constant accordingly;
Step s204: the front end circuit breaker disconnecting frequency converter, until the direct voltage at Support Capacitor two ends is down to safe voltage value;
Be understandable that, the span of safe voltage value is here relevant with the ability to bear of IGCT.
As preferably, safe voltage value is 0.Certainly, the present invention does not do special restriction for the concrete numerical value of safe voltage value, can realize the safe voltage value of the object of the invention all within protection scope of the present invention.
Step s205: the zero level transition pulses [0,1,1 inserting Preset Time, 0] accordingly an IGCT, the 2nd IGCT, the 3rd IGCT and the 4th IGCT are controlled respectively, wherein, 0 in zero level pulse represents allows corresponding IGCT turn off, and 1 represents and allows corresponding IGCT conducting;
As preferably, Preset Time is 25us.Certainly, the present invention does not do special restriction for the concrete numerical value of Preset Time, can realize the safe voltage value of the object of the invention all within protection scope of the present invention.
Step s206: insert locking pulse [0,0,0,0] and block an IGCT, the 2nd IGCT, the 3rd IGCT and the 4th IGCT accordingly respectively, wherein, 0 in locking pulse represents allows corresponding IGCT turn off.
The fault solution of a kind of tri-level circuit based on IGCT provided by the invention, on the basis of embodiment one, also comprise when an IGCT or the 4th IGCT does not occur turning off damage fault, insert locking pulse again after directly inserting the zero level transition pulses of one section of Preset Time and block; In addition, the direct voltage when Support Capacitor two ends is down to safe voltage value, inserts locking pulse again and blocks, further increase the security reliability of the tri-level circuit based on IGCT after first inserting the zero level transition pulses of one section of Preset Time.
It should be noted that, in this manual, the such as relational terms of first and second grades and so on is only used for an entity or operation to separate with another entity or operating space, and not necessarily requires or imply the relation that there is any this reality between these entities or operation or sequentially.And, term " comprises ", " comprising " or its any other variant are intended to contain comprising of nonexcludability, thus make to comprise the process of a series of key element, method, article or equipment and not only comprise those key elements, but also comprise other key elements clearly do not listed, or also comprise by the intrinsic key element of this process, method, article or equipment.When not more restrictions, the key element limited by statement " comprising ... ", and be not precluded within process, method, article or the equipment comprising described key element and also there is other identical element.
Professional can also recognize further, in conjunction with unit and the algorithm steps of each example of embodiment disclosed herein description, can realize with electronic hardware, computer software or the combination of the two, in order to the interchangeability of hardware and software is clearly described, generally describe composition and the step of each example in the above description according to function.These functions perform with hardware or software mode actually, depend on application-specific and the design constraint of technical scheme.Professional and technical personnel can use distinct methods to realize described function to each specifically should being used for, but this realization should not thought and exceeds scope of the present invention.
To the above-mentioned explanation of the disclosed embodiments, professional and technical personnel in the field are realized or uses the present invention.To be apparent for those skilled in the art to the multiple amendment of these embodiments, General Principle as defined herein can without departing from the spirit or scope of the present invention, realize in other embodiments.Therefore, the present invention can not be restricted to these embodiments shown in this article, but will meet the widest scope consistent with principle disclosed herein and features of novelty.
Claims (5)
1. the fault solution based on the tri-level circuit of IGCT, be applied to frequency converter, described frequency converter comprises rectification circuit, three-phase inverting circuit and the Support Capacitor between described rectification circuit and three-phase inverting circuit, wherein, in described three-phase inverting circuit, the IGCT, the 2nd IGCT, the 3rd IGCT and the 4th IGCT that connect successively every phase inverter circuit includes from direct-current input power supplying positive pole to direct-current input power supplying negative pole, it is characterized in that, for every phase inverter circuit, the method comprises:
Step s101: the state parameter obtaining a described IGCT, the 2nd IGCT, the 3rd IGCT and the 4th IGCT;
Step s102: judge whether a described IGCT or described 4th IGCT occurs turning off according to described state parameter and damage fault;
Step s103: when a described IGCT or described 4th IGCT occurs turning off damage fault, keep the control impuls of a described IGCT or described 4th IGCT place phase inverter circuit constant accordingly;
Step s104: the front end circuit breaker disconnecting described frequency converter, until the direct voltage at described Support Capacitor two ends is down to safe voltage value;
Step s105: insert locking pulse [0,0,0,0] and block a described IGCT, the 2nd IGCT, the 3rd IGCT and the 4th IGCT accordingly respectively, wherein, 0 in described locking pulse represents allows corresponding IGCT turn off.
2. the fault solution as described in any one of claim 1, it is characterized in that, step s103 also comprises:
When a described IGCT or described 4th IGCT does not occur turning off damage fault, enter step s105.
3. the fault solution as described in any one of claim 1-2, is characterized in that, also comprise between step s104 and step s105:
Insert the zero level transition pulses [0,1,1 of Preset Time, 0] accordingly a described IGCT, the 2nd IGCT, the 3rd IGCT and the 4th IGCT are controlled respectively, wherein, 0 in described zero level pulse represents allows corresponding IGCT turn off, and 1 represents and allows corresponding IGCT conducting.
4. fault solution as claimed in claim 1, it is characterized in that, described safe voltage value is 0.
5. fault solution as claimed in claim 3, it is characterized in that, described Preset Time is 25us.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510500735.5A CN105024561B (en) | 2015-08-14 | 2015-08-14 | IGCT-based three-level circuit fault elimination method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510500735.5A CN105024561B (en) | 2015-08-14 | 2015-08-14 | IGCT-based three-level circuit fault elimination method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105024561A true CN105024561A (en) | 2015-11-04 |
| CN105024561B CN105024561B (en) | 2017-02-08 |
Family
ID=54414329
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510500735.5A Active CN105024561B (en) | 2015-08-14 | 2015-08-14 | IGCT-based three-level circuit fault elimination method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105024561B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105450009A (en) * | 2016-01-12 | 2016-03-30 | 华为技术有限公司 | Voltage converter fault processing method and voltage converter |
| CN111030053A (en) * | 2019-11-29 | 2020-04-17 | 苏州伟创电气科技股份有限公司 | Protection circuit and protection method of diode-clamped three-level converter |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1384593A (en) * | 2002-06-07 | 2002-12-11 | 清华大学 | Bridge arm through protecting system for 6KV three-level integrated gate phase-changing thyristor inverter |
| CN1747273A (en) * | 2005-09-02 | 2006-03-15 | 清华大学 | Safety sealing impulse method of medium-high voltage three-level converter based on IGCT |
| CN101242136A (en) * | 2008-02-03 | 2008-08-13 | 天津电气传动设计研究所 | Voltage source frequency converter bridge arm direct pass protector for three level integrated gate pole conversion transistor |
| CN103618293A (en) * | 2013-11-27 | 2014-03-05 | 华为技术有限公司 | Three-level circuit short-circuit protection method and device and three-level circuit |
-
2015
- 2015-08-14 CN CN201510500735.5A patent/CN105024561B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1384593A (en) * | 2002-06-07 | 2002-12-11 | 清华大学 | Bridge arm through protecting system for 6KV three-level integrated gate phase-changing thyristor inverter |
| CN1747273A (en) * | 2005-09-02 | 2006-03-15 | 清华大学 | Safety sealing impulse method of medium-high voltage three-level converter based on IGCT |
| CN101242136A (en) * | 2008-02-03 | 2008-08-13 | 天津电气传动设计研究所 | Voltage source frequency converter bridge arm direct pass protector for three level integrated gate pole conversion transistor |
| CN103618293A (en) * | 2013-11-27 | 2014-03-05 | 华为技术有限公司 | Three-level circuit short-circuit protection method and device and three-level circuit |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105450009A (en) * | 2016-01-12 | 2016-03-30 | 华为技术有限公司 | Voltage converter fault processing method and voltage converter |
| CN105450009B (en) * | 2016-01-12 | 2018-03-09 | 华为技术有限公司 | Electric pressure converter fault handling method and electric pressure converter |
| CN111030053A (en) * | 2019-11-29 | 2020-04-17 | 苏州伟创电气科技股份有限公司 | Protection circuit and protection method of diode-clamped three-level converter |
Also Published As
| Publication number | Publication date |
|---|---|
| CN105024561B (en) | 2017-02-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7054173B2 (en) | Circuit with DC filter having a link fuse serially connected between a pair of capacitors | |
| CN104917365B (en) | A kind of current-limiting method and current-limiting apparatus | |
| EP3251201B1 (en) | A method of controlling an uninterruptible power supply to clear a shorted load | |
| CN103516244A (en) | Protection control system for a multilevel power conversion circuit | |
| WO2017168519A1 (en) | Power conversion device | |
| CN104993472A (en) | MMC-HVDC system, DC side isolation device and isolation method | |
| JP5049964B2 (en) | Power converter | |
| AU2016286710A1 (en) | Fault current-suppressing damper topology circuit and control method thereof and converter | |
| CN110649831B (en) | Shutdown wave-sealing control method of multi-level inverter circuit and application device thereof | |
| CN105790236A (en) | DC turn-off apparatus and control method thereof | |
| JP2015012621A (en) | Multilevel power conversion circuit | |
| CN104393613A (en) | Direct current fault processing method and apparatus | |
| CN107765112B (en) | Converter valve overcurrent turn-off test circuit, method and device | |
| CN103534916A (en) | Power conversion device | |
| CN113555854A (en) | Short-circuit current suppression circuit for flying capacitor converter and energy storage system with same | |
| CN203747688U (en) | Three-level grid-connected inverter | |
| EP3035509B1 (en) | Method and device for switching operation mode of a five-level inverter | |
| EP4170849A1 (en) | Power conversion system | |
| CN103401407A (en) | Fault protection method for H-bridge cascaded high-voltage converter | |
| CN105024561A (en) | IGCT-based three-level circuit fault elimination method | |
| CN105226977A (en) | A kind of control method of inverter, device and uninterrupted power supply | |
| CN104779825A (en) | Cross type sub-module structure of modular multilevel converter (MMC) | |
| EP3958452A1 (en) | Neutral-point-clamped three-level circuit and control method | |
| CN102386754B (en) | Current limiting protection method of diode clamping type multi-electrical level convertor and realization circuit thereof | |
| WO2021243501A1 (en) | Fault protection apparatus |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |