CN105009267B - The manufacture method of power device - Google Patents
The manufacture method of power device Download PDFInfo
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- CN105009267B CN105009267B CN201480002902.7A CN201480002902A CN105009267B CN 105009267 B CN105009267 B CN 105009267B CN 201480002902 A CN201480002902 A CN 201480002902A CN 105009267 B CN105009267 B CN 105009267B
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- power device
- wafer
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/6834—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
- H01L29/456—Ohmic electrodes on silicon
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Electrodes Of Semiconductors (AREA)
- Wire Bonding (AREA)
- Dicing (AREA)
Abstract
It is an object of the invention to provide the manufacture method that can adapt to the strict demand of chip minimal thickness, productivity ratio also excellent power device, and then provide the power device manufacture method that can manufacture the power device that energy loss is few, thermal diffusivity is excellent.The manufacture method of the power device of the present invention, it is characterised in that successively with following (1)~(7) process：(1) process at least forming electrode in wafer surface；(2) process that chip is carried out to grinding back surface (BG)；(3) be in wafer back surface forming electrode back pad metal (BM) process；(4) process of glass substrate is pasted in chip back surface；(5) process for forming UBM by electroless plating on the electrode of the wafer surface；(6) process for peeling off the glass substrate of the chip back surface；(7) by pasting dicing tape in chip back surface and being cut, it is picked up from dicing tape to carry out the process of chip.
Description
Technical field
The present invention relates to the manufacture method of power device, more particularly to the system for the power device that can carry out minimal thickness
Make method.
Background technology
IGBT(Insulated Gate Bipolar Transistor：Insulated gate bipolar transistor), power MOSFET
(MOS Field Effect Transistor (mos field effect transistor)), IPD (Intelligent
Power Device (smart power device)) constant power device, the viewpoint in terms of energy loss, the characteristic such as thermal diffusivity is reduced goes out
Hair, it is desirable to chip minimal thickness, be strongly required to establish the manufacturing process that LED reverse mounting type is made.In addition, as joining technique, to ensure
For the purpose of wire bonding, the high reliability of solder engagement, Al electrodes, Cu electrodes to wafer surface form UBM (Under
bump Metallurgy：Underbump metallization) situation increase.
As UBM forming method, increased using the electroless plating method that can expect low cost come situation about being formed, it is generally logical
Electroless nickel plating and displaced type electroless gold plating are crossed to form Ni/Au epitheliums, in electroless nickel plating and displaced type electroless gold plating
Between carry out as caused by heat Ni diffusion barrier layer electroless plating palladium, be made for Ni/Pd/Au epitheliums or be made for
Eliminate the Ni/Pd epitheliums of displaced type electroless gold plating.
As the manufacture method of in general power device, in process above formed the structure of inner wafer and
After surface forms Al or Cu electrodes, Ni/Au, Ni/Pd or Ni/Pd/Au epithelium are formed by electroless plating on electrode.Its
Afterwards, grinding back surface (BG) is carried out, by wafer grinding, in wafer back surface forming electrode (back pad metal；Liner Ferrule (BM：
backmetal)).Thereafter, after the inspection for carrying out electrical characteristics etc., dicing tape (dicing-tape is overleaf pasted：
Dicingtape), and cut (section：Dicing chip) is carried out.
But in the methods described above, for nearest further chip minimal thickness, in above-mentioned grinding back surface, the back of the body
Pad metal is formed in (BGBM) process, expends heat, UBM Ni epitheliums crystallization, chip warpage, therefore exist with to it
Process afterwards causes the problem of situation of obstacle.It is thus impossible to enough make the thickness of chip fully thin, or by making plating Ni layers
Thickness is tried one's best thin tackle.
In addition, Patent Document 1 discloses a kind of preparation method of semiconductor device, the manufacture method is to subtract
It is few to carry out ion implanting and heat treatment and the feelings for forming backplate to chip back surface in the process after by wafer film
Under condition and and then formed surface electrode in the case of semiconductor substrate warpage, reduce the cracking rate of semiconductor substrate, will tie
Thin semiconductor substrate after beam grinding back surface and etching, which is pasted onto, to be supported on substrate (glass substrate), is subsequently formed back side electricity
Pole.But in the semiconductor device described in patent document 1, no any record is formed for UBM, especially for UBM
Above mentioned problem during backplate after formation is formed does not have any display yet.
In addition, semiconductor devices, grinding back surface back pad metal shape is carried out after plating treatment process is made as above
In the case of process, the stress of coating also becomes big if the thickness of coating is thicker, thus chip warpage, and process thereafter is made
Into harmful effect.
For it is such the problem of, once have studied before plating treatment process progress grinding back surface back pad as described below
The method of metal formation process.
For example, carry out above-mentioned each operation according to the order of following (1)~(4).
(1) the grinding back surface back pad metal formation process of chip；
(2) it is used for the plating treatment process that Underbump metallization (UBM) is formed in wafer surface；
(3) cutting action；
(4) chip separation circuit.
But above-mentioned manufacture method, due to carrying out back grinding procedure before plating treatment process, thus produce to
Want the chip back surface of plating attachment and chip damage it is such the problem of.Therefore, as disclosed respectively in patent document 2~4
As, it can seek to prevent the attachment to the chip back surface for wanting plating by using plating application fixture.
But if use special plating application fixture, particularly in the case of LED reverse mounting type, installation, dismounting in fixture
The warpage of chip occurs for Shi Rongyi.In addition, special plating application fixture makes the operability deterioration of chip, it is big to be additionally, since needs
Space, therefore exist and be difficult to once plating and handle the problem of many chips are such.
In order to solve the problem, Patent Document 5 discloses a kind of manufacture method of semiconductor devices, the manufacture method
Including：The back grinding procedure 1 of chip back surface；Then, adhering more than the stacking of the back side of chip, stickup 1 or two panels
There is again the process 2 of the adhesive film of exfoliated sticker on face；Then, for being overleaf pasted with the chip of adhesive film, implement
For forming the electroless plating treatment process 3 of Underbump metallization (UBM) in wafer surface, then implement the process for peeling off adhesive film
4。
According to this method, due to the expansion and contraction of the adhesive tape in plating process, gas is produced at chip/adhesive tape interface sometimes
Bubble, there is a situation where to make yield rate reduction.
In addition, Patent Document 6 discloses following methods, i.e. suppresses chip as when carrying out plating processing to chip
Warpage and damage, the good semiconductor devices of the plating treatment effeciency of chip, after wafer film, by the back side of chip
It is fixed on dicing tape in annular frame, the method to being carried out plating processing by the surface of fixed chip.
When carrying out plating processing due to the back side of chip is fixed on into progress plating processing in annular frame, therefore inhibited
Chip warpage.But when being fixed in annular frame, correspondingly become big, it is therefore desirable to the groove of plating lines it is big
It is small also to become big, it can not be tackled using existing equipment sometimes.Further, since the expansion and contraction of the adhesive tape in plating process,
Sometimes bubble is produced at chip/adhesive tape interface, there is a situation where to make yield rate reduction.
In addition, recorded a kind of manufacture method of semiconductor-type sensors in patent document 7, this method is in order to improve to corruption
The corrosion resistance of corrosion medium, when directly forming terminal for connecting on the Al electrodes in (pad) portion of pad, with glass substrate
Deng insulant cover electroless plating processing carried out in the state of substrate back.Above-mentioned patent document 7 is on semiconductor-type
The invention of the manufacture method of sensor, the barrier film formed with recess in substrate back is provided with a semiconductor substrate
(diaphragm), the glass substrate is doubled as to seal the coating material of the encapsulant of the recess and the substrate back, glass base
Plate is the component parts of product.
Citation
Patent document
Patent document 1：No. 4525048 publications of Japanese Patent No.
Patent document 2：Japanese Unexamined Patent Publication 2002-339078 publications
Patent document 3：Japanese Unexamined Patent Publication 2002-339079 publications
Patent document 4：Japanese Unexamined Patent Publication 2002-343851 publications
Patent document 5：Japanese Unexamined Patent Publication 2011-216584 publications
Patent document 6：Japanese Unexamined Patent Publication 2010-283312 publications
Patent document 7：No. 5056862 publications of Japanese Patent No.
The content of the invention
It is an object of the invention to provide the warpage in the manufacturing process that can suppress with the minimal thickness of chip, cause is prevented
In the generation of the unfavorable condition of the warpage, and it is also excellent to adapt to the strict demand of chip minimal thickness in recent years, productivity ratio
Power device manufacture method.Moreover, the purpose is to provide that the power device that energy loss is few, thermal diffusivity is excellent can be manufactured
Power device manufacture method.
The present inventor etc. have studied the minimal thickness with the chip in power device, and warpage occurs in its manufacturing process
Various factors and the influence caused by each warpage.Its result is found, is most impacted in the warpage with minimal thickness
Be in the case where carrying out the Ni epitheliums formation process of electroless plating, back grinding procedure, back pad metal formation process successively, by
Caused by UBM Ni epitheliums crystallization in the hot influence that grinding back surface or back pad metal are formed in (BGBM) process
The warpage of chip.
The result that the present inventor etc. is attentively studied is found, changes process sequence, overleaf grinding, back pad metal (BM)
The UBM formation process of electroless plating is carried out after formation process to suppressing effective with the warpage of chip minimal thickness, moreover, right
It is in overleaf grinding, when the UBM formation process of electroless plating is carried out after back pad metal (BM) formation process, to wanting plating
The problem of attachment of chip back surface and such damage of chip, by pasting glass substrate in chip back surface, can solve above-mentioned
Problem, so as to complete the present invention.
That is, the present invention as described below.
[1] a kind of manufacture method of power device, it is characterised in that successively with following (1)~(7) process,
(1) process at least forming electrode in wafer surface；
(2) process that chip is carried out to grinding back surface (BG)；
(3) in wafer back surface forming electrode (back pad metal (BM)) process；
(4) process of glass substrate is pasted in chip back surface；
(5) process for forming UBM by electroless plating on the electrode of above-mentioned wafer surface；
(6) process for peeling off the glass substrate of above-mentioned chip back surface；
(7) by pasting dicing tape in chip back surface and being cut, (pick up) is picked up from dicing tape
The process for carrying out chip.
[2] manufacture method of the power device according to above-mentioned [1], it is characterised in that passing through in above-mentioned (5) process
The UBM that electroless plating is carried out is formed, and is to form Ni/Au epitheliums, Ni/Pd epitheliums or Ni/Pd/Au skins by electroless plating
Film.
[3] manufacture method of the power device according to above-mentioned [1] or [2], it is characterised in that in above-mentioned (7) process
In, before pasting dicing tape to chip back surface, Protection glue band or glass substrate are pasted to wafer surface, to chip back surface
After pasting dicing tape, the Protection glue band or glass substrate are peeled off.
According to the manufacture method of the power device of the present invention, chip can be sufficiently carried out minimal thickness.Even if by crystalline substance
Piece carries out minimal thickness, and chip does not almost have warpage yet, obstacle will not be caused to process thereafter, in addition, productivity ratio is also excellent.
Therefore, the manufacture method of power device of the invention is utilized, using the teaching of the invention it is possible to provide the power device that energy loss is few, thermal diffusivity is excellent.
Embodiment
Power device requires the minimal thickness of chip.But if carrying out minimal thickness, the easy warpage of chip, make chip
Thickness it is thinner, warpage is bigger.
In the manufacturing process of power device, after overleaf grinding, formed in chip back surface the work of back pad metal
In the case of sequence and/or formation UBM process, the easy warpage of chip in these processes.In addition, after UBM is formed, carried on the back
In the case that face is ground or back pad metal forms (BGBM) process, heat, UBM Ni epitheliums crystallization are expended in these processes
Change, chip warpage.Warpage when carrying out grinding back surface after forming the UBM, back pad metal forming (BGBM) process, than upper
Stating grinding back surface, the process of formation back pad metal, the warpage for the process for forming UBM are big afterwards, turn into problem in manufacturing process.
Back pad metal is formed in surface mount glass substrate after UBM is formed, warpage is also big, and chip occurs and is shelled from glass substrate
From, problems of crack.
The manufacture method of the power device of the present invention, in order to avoid when carrying out the formation of back pad metal after above-mentioned UBM is formed
Warpage, back pad metal (BM) formation after carry out electroless plating UBM formed.In addition, in order to prevent by electroless plating shape
The cracking of warpage, chip into chip during UBM, easily operation, after back pad metal (BM) formation, overleaf paste glass base
Plate, glass substrate is peeled off after UBM is formed.
That is, the manufacture method of power device of the invention has following (1)~(7) process.
(1) process at least forming electrode in wafer surface；
(2) process that chip is carried out to grinding back surface (BG)；
(3) in wafer back surface forming electrode (back pad metal (BM)) process；
(4) process of glass substrate is pasted in chip back surface；
(5) process for forming UBM by electroless plating on the electrode of above-mentioned wafer surface；
(6) process for peeling off the glass substrate of above-mentioned chip back surface；
(7) by pasting dicing tape in chip back surface and being cut, it is picked up from dicing tape to carry out chip
The process of change.
Formed as above-mentioned UBM, preferably on the electrode of wafer surface by electroless plating formed Ni/Au epitheliums or
Ni/Pd epitheliums, Ni/Pd/Au epitheliums.
It is preferred that：In above-mentioned (7) process, before pasting dicing tape to chip back surface, Protection glue is pasted to wafer surface
Band or glass substrate, after dicing tape is pasted to chip back surface, peel off the Protection glue band or glass substrate.
(1) process at least forming electrode in wafer surface
Chip does not limit, and is formed as the discoid of about 50~300mm diameters, uses the compound semiconductors such as silicon or GaAs
To be formed.
As long as chip, in addition can also the internal structure formed with chip in table surface forming electrode.
As above-mentioned electrode, preferably Al electrodes, Cu electrodes, as Al electrodes, Cu electrodes, can include in power device
Known Al electrodes, the Cu electrodes used.
The process for forming the process of the internal structure of chip and forming electrode in wafer surface, it is the manufacture of power device
Necessary known wafer processing procedures, for example, side known to photoetching, etching, ion implanting, sputtering, CVD etc. can be used
Method is carried out.In addition, as the device used in the process, known arbitrary device can be used.
(2) process on chip to be carried out to grinding back surface (BG)
Usually before back grinding procedure is entered, paste wafer surface Protection glue band in wafer surface and (grind at the back side
Grind adhesive tape) or glass substrate.The wafer surface Protection glue band or glass substrate, overleaf protected in grinding step to be formed
The wafer surface of element, prevent the pollution of the wafer surface as caused by the infiltration of grinding water, grindstone dust etc..Also it is excellent in the present invention
It is selected in before entering back grinding procedure, pastes wafer surface Protection glue band (tape) or glass in wafer surface
Glass substrate.Generally commercially available product can be used in wafer surface Protection glue band or glass substrate.
In addition, the wafer surface Protection glue band or glass substrate pasted before back grinding procedure is entered, preferably
Thereafter chip back surface paste glass substrate after, UBM formed before peeled off.
In the present invention, back pad metal is overleaf formed after grinding step, if but chip is carried out by grinding back surface
Back pad metal is formed after minimal thickness, then the warpage of chip occurs sometimes.In the case where warpage occurs, stuck up to suppress this
Song, glass substrate is used preferably as described in patent document 1.That is, the warpage of chip occurs when forming back pad metal
In the case of, glass substrate is pasted in wafer surface before back grinding procedure is entered, to be pasted with the glass substrate
State forms back pad metal.Then, preferably overleaf paste glass substrate after, formed UBM before peel off surface glass substrate.
After wafer surface Protection glue band or glass substrate are pasted on into chip, implement the back grinding procedure of chip.With
Can use known arbitrary device in the device of grinding back surface, for example, by the vacuum adsorption table (table) of fixed wafer,
It is ground the grindstone of chip, is formed in grinding to grinding fluid supply unit of supply grinding fluid on chip (being usually water) etc..
The chip on surface will be protected with wafer surface Protection glue band or glass substrate, its back side is arranged on the back of the body upward
In the vacuum adsorption table of face lapping device.Then, in the state of with vacuum adsorption table, chip suction is secured, by grinding fluid
Supply unit is to while supplying grinding fluid on chip, using grindstone by grinding wafer to defined thickness.In addition, if need
Will, then after being ground using grindstone, finishing grinding is then carried out, the grinding surface of chip is finished smooth.Pass through
Above procedure, can be by chip minimal thickness to such as 50~400 μm, more preferably 50~150 μm of thickness.
(3) on the process in wafer back surface forming electrode (back pad metal (BM))
The formation process of the back pad metal of (3) is carried out after the grinding back surface of (2).Back pad metal formation process is also referred to as carried on the back
Face electrode forming process, it is the process that the back side of semiconductor wafer after grinding forms backplate.Backplate can be used
Various metals, in the present invention using the metal of general used backplate.For example, carrying out the back side
The back side of the substrate of grinding, nickel silicide layer and/or titanium layer are formed, is formed on metal level.Metal level is preferably nickel dam, platinum
Layer, silver layer, layer gold etc..The thickness of nickel silicide layer is preferably below 200nm, the thickness of titanium layer be preferably more than 5nm 500nm with
Under, the thickness of metal level is preferably more than 50nm below 1000nm.Device for forming above-mentioned back pad metal can use public affairs
The arbitrary device known.
In the manufacture method of the power device of the present invention, back pad metal (backplate) is formed before UBM formation.Cause
This, due to the Ni epitheliums in the absence of UBM, so expending heat when back pad metal is formed, does not occur to be crystallized by Ni epitheliums yet
Chip warpage caused by change.
(4) on the process in chip back surface stickup glass substrate
After back pad metal is formed, glass substrate is pasted in chip back surface.The purpose is to：Prevent in process below without electricity
During solution plating coating is formed in chip back surface；Make the operability of thin chip good；Prevent the cracking of chip；Prevent by electroless plating
Caused warpage.
In addition, it be not to paste glass substrate but in the case of stickup Protection glue band, due to the adhesive tape in plating process
Expansion and contraction, produce bubble at chip/adhesive tape interface sometimes, reduce yield rate sometimes, but by being pasted in chip back surface
Glass substrate, just without expansion and contraction, and bubble will not be produced, therefore productivity ratio improves.
Glass used in glass substrate can be any glass, and soda lime glass, alkali-free glass, quartz can be used
Glass, pyrex etc..The thickness of glass substrate as long as there is the support substrate as chip intensity, be preferably
0.5mm~5mm or so thickness.Chip and glass substrate two-sided tape are pasted easier thus preferred.In two-sided tape
Used sticker, can use acrylic acid series, metha crylic, silicon systems, polyamide-based, Polyester, polyurethane series with
And resin of EVA (copolymer of ethene and vinylacetate) system etc., but solidify or produce preferably by UV and/or heating
Gas and the acrylic acid series sticker being easily peeled off.
The stickup of chip and glass substrate, as long as being pasted using commercially available device.
(5) process on forming UBM by electroless plating on the electrode of above-mentioned wafer surface
Then, to being overleaf pasted with the chip of glass substrate, it is used to form Underbump metallization in wafer surface
(UBM) electroless plating processing.The method of electroless plating processing is known in itself, can be used well known by persons skilled in the art
Arbitrary method is implemented, and preferred embodiment is illustrated below.
When carrying out electroless plating processing, first, as the processing by surfacing of chip, purifying work is generally carried out
Sequence.As purifying process, whether dry process or wet processed can.It is preferably grey in the case of dry process
Change processing, UV processing and reactive-ion etch process etc..In the case of wet processed, infusion process and spin-coating method can be used
It is any, but using infusion process for the use of it can be uniformly processed more preferably.As wet processed, can include in water
Ultrasonic washing, the dipping into alkali or acidic degreasing liquid, the dipping into aqueous surfactant solution, into soft etching solution
Impregnating.As wet processed, it can include and be carried out using commercially available acidic degreasing liquid, alkaline degreaser, soft etching solution
Processing, if using these processing, the aspect for managing simplicity in this place is preferred.These processing individually use can also be combined and adopted
With preferably selecting most suitable processing method according to the pollution condition of chip, the species for being passivated (passivation).
It is above-mentioned it is purifying after, then, it is preferred to use there is catalysis in wafer surface precipitating metal by non-electrolysis plating liquid
The metallic compound of agent activity is handled.There are palladium compound, zinc compound etc. as such metallic compound.On palladium
Compound, the ammino-complex of the chloride of palladium of display catalytic effect, hydroxide, oxide, sulfate, ammonium salt etc. can be included
Deng.Palladium compound is used in the form of aqueous solution or organic solvent solution.As organic solvent, such as first can be used
Alcohol, ethanol, isopropanol, acetone, methyl ethyl ketone, toluene, ethylene glycol, polyethylene glycol, dimethylformamide, dimethyl sulfoxide, twoAlkane etc. or their mixture.Palladium compound, in a series of relation of processing, more preferably use as an aqueous solution.Separately
Outside, zinc compound uses generally as zincic acid salt treatment, can use commercially available chemicals.
After the processing of above-mentioned metallic compound, by water immersion in non-electrolysis plating liquid, electroless plating processing is carried out.Carry out
During electroless plating, in order to improve production efficiency, by multiple wafer storages in such as wafer case of 3 support types or 4 support types
In, and the wafer case is impregnated in non-electrolysis plating liquid to carry out advantageously.Electroless plating can be carried out by replacing
Electroless plating or the electroless plating by reducing progress.In non-electrolysis plating liquid, with such as oxysulfide, chloride
Contain the metal ion source for forming desired coating etc. form.And then in non-electrolysis plating liquid, first can also be included
Reducing agent, sodium acetate, EDTA, the winestones such as aldehyde, hydrazine (hydrazine), sodium hypophosphite, sodium borohydride, ascorbic acid, glyoxalic acid
The complexants such as acid, malic acid, citric acid, glycine and precipitation controlling agent etc..
Non-electrolysis plating liquid, as pH regulators, the commonly used materials such as sodium hydroxide, potassium hydroxide can be used,
But wish in semiconductor applications in the case of avoiding the alkali metal such as sodium, potassium, preferably using tetramethyl ammonium hydroxide.
By above-mentioned process, electroless plating processing is carried out in wafer surface, such as Ni/ can be formed in wafer surface
Au, Ni/Pd, Ni/Pd/Au epithelium etc..Grinding back surface is carried out after electroless plating is carried out, the conventional work that back pad metal is formed
In sequence, it is following as 1 μm or so due to the generation of warpage to plate the thickness of Ni epitheliums, if but carry solder on UBM, can be with
The thickness that several microns of zero point forms intermetallic compound, therefore is preferably more than 1 μm from the viewpoint of Ni epitheliums are ensured.At this
In invention, warpage is lacked, therefore thick-film is possibly realized, as long as below 10 μ m thicks.From based on plating time
Operating efficiency, formed etc. and set out with the epithelium of the metallic compound of solder, Ni epitheliums are preferably 1~5 μm.In addition, plating Pd
Block that the thickness of epithelium spreads from Ni, preferably 0.02~0.2 μm of plating time.Au epitheliums are plated for the purpose of ensuring that solder
The purpose of wetability is preferably 0.01~0.2 μm.
In the present invention, after overleaf pasting glass substrate, the breakage of chip when forming UBM, therefore can prevent plating
With the plating attachment to chip back surface.In addition, it can also prevent the warpage of the chip as caused by plating.
(6) on the process for the glass substrate for peeling off above-mentioned chip back surface
After above-mentioned (5) process, the glass substrate that will be pasted in above-mentioned (4) process is peeled off.
As long as the method for stripping is peeled off using commercially available stripping off device.If use by UV or heating and solid
Change or produce the sticker of gas, then due to UV or heating, reduce, be easily peeled off with the adhesion strength of chip, thus preferably.
(7) on by pasting dicing tape in chip back surface and being cut, being picked up from dicing tape to carry out
The process of chip
The process is known in itself, using arbitrary method well known by persons skilled in the art, carries out example below
Show.
First, using placement equipment (mounter), dicing tape is pasted in chip back surface together with annular frame.
Before dicing tape is pasted Protection glue band or glass substrate can be pasted in wafer surface to protect surface.
In the case that wafer surface has pasted Protection glue band or glass substrate, after dicing tape is pasted onto into chip back surface, table is peeled off
The Protection glue band or glass substrate in face.Above-mentioned Protection glue band or glass substrate, can use with above-mentioned (2) process or
(4) the product identical adhesive tape or glass substrate used in process.In addition, its method of attaching can also use with it is above-mentioned
(2) process or (4) process identical method.For Protection glue band, can use be attached with being pasted in above-mentioned operation (4)
The Protection glue band of the sticker identical sticker used during glass substrate, can be pasted using commercially available device.Peel off
As long as method is carried out using commercially available stripping off device.Thereafter, surface is made to be placed in the cutting of cutter device upward chip
On platform, it is fixed by the vacuum suction of adsorption section.
Then, using cast-cutting saw, by the chip in annular frame from face side it is longitudinal and transverse cut off, obtain the chip of monolithic.
The chip of monolithic after cut-out is fixed using dicing tape, thus maintaining the state of arrangement.
After cutting action, shifted to chip separation circuit, separated each chip is assembled into the rule in circuit substrate
Positioning is put, and connects each chip and the metal wiring of circuit substrate, thus makes desired power device.
Manufacturing method according to the invention, it can also be manufactured even if by chip minimal thicknessization.According to the manufacturer of the present invention
Method, turn into the process sequence for having avoided the process that chip warpage occurs, and pasted in the process that chip warpage easily occurs
Glass substrate, therefore resulting power device, even if by chip minimal thicknessization also almost without the warpage of chip, are being manufactured
The problem of not occurring to be caused by warpage in process (stripping from glass substrate in process), in addition, productivity ratio is also excellent.
Due to can be by chip minimal thickness, therefore the power device that energy loss is few, thermal diffusivity is excellent can be provided.
Embodiment
Embodiments of the invention described below, but these embodiments are to provide for a better understanding of the present invention, and
It is not intended to limit the present invention.
Embodiment 1
Chip process is carried out by the order of following process (1)~(7) and carries out chip.
＜ processes (1) ＞
Using existing device, it is crystalline substance to have made in AlSi electrode and electrode area of the wafer surface formed with 1cm square
8 inches of silicon test wafers of the 80% of piece surface.
＜ processes (2) ＞
Wafer surface is protected with commercially available tape, carries out grinding back surface, it is 100 μm to make wafer thickness.
＜ processes (3) ＞
Using existing device, titanium layer 100nm, nickel dam 200nm, layer gold 100nm back pad metal are formed.
＜ processes (4) ＞
It is using the two-sided tape of the sticker with UV curing types that quartz glass (1mm is thick) is viscous using existing device
Chip back surface is attached to, has peeled off the tape of process (2).
＜ processes (5) ＞
Using existing method, 3 μm of electroless plating epithelium nickel, 0.05 μm of gold are formed on the pad of wafer surface.
＜ processes (6) ＞
The quartz glass of chip back surface has been peeled off using existing device.
＜ processes (7) ＞
It is using the two-sided tape of the sticker with UV curing types that quartz glass (1mm is thick) is viscous using existing device
It is attached to wafer surface.Thereafter, dicing tape is overleaf pasted, after stripping is pasted onto the quartz glass of wafer surface, is cut,
It is picked up from dicing tape, confirms and without problem pick up, power device can be also manufactured even if minimal thicknessization.
Embodiment 2
For embodiment 1, the wafer thickness for making to have carried out the grinding back surface in process (2) is 150 μm, in addition with reality
Example 1 is applied similarly to carry out.
Confirm and without problem picked up in process (7), power device can be also manufactured even if minimal thicknessization.
Embodiment 3
For embodiment 1, the wafer thickness for making to have carried out the grinding back surface in process (2) is 50 μm, in addition with reality
Example 1 is applied similarly to carry out.
Confirm and without problem picked up in process (7), power device can be also manufactured even if minimal thicknessization.
Embodiment 4
For embodiment 1, the nickel dam for making the back pad metal in process (3) is 400nm, in addition similarly to Example 1
Ground is carried out.
Confirm and without problem picked up in process (7), power device can be also manufactured even if minimal thicknessization.
Embodiment 5
For embodiment 1, make the electroless plating epithelium in process (5) be 3 μm of nickel, 0.05 μm of palladium, 0.03 μm of gold, except this with
Carry out similarly to Example 1 outside.
Confirm and without problem picked up in process (7), power device can be also manufactured even if minimal thicknessization.
Embodiment 6
For embodiment 1, make the electroless plating epithelium in process (5) be 3 μm of nickel, 0.2 μm of palladium, in addition with embodiment
1 is similarly carried out.
Confirm and without problem picked up in process (7), power device can be also manufactured even if minimal thicknessization.
Embodiment 7
For embodiment 1, it is パ イ レ ッ Network ス (registration mark) glass (borosilicic acid glass to make the quartz glass in process (4)
Glass 1mm is thick), carry out similarly to Example 1 in addition.
Confirm and without problem picked up in process (7), power device can be also manufactured even if minimal thicknessization.
Embodiment 8
For embodiment 1, without stickup of the quartz glass in process (7) to wafer surface, cutting is overleaf pasted
Adhesive tape is simultaneously cut, and is carried out similarly to Example 1 in addition.
Confirm and without problem picked up in process (7), power device can be also manufactured even if minimal thicknessization.
In embodiment 1~8 more than, the process by carrying out forming UBM after back pad metal formation process (3)
(5), can also prevent warpage even if wafer thickness minimal thickness is turned into 50~150nm, can productivity ratio be made without well
Due to power device unfavorable condition, having carried out defined minimal thickness of warpage.
Comparative example 1
The process sequence of embodiment 1 is changed, is manufactured in the following order, as a result chip sticks up in the process (3)
Qu Bian great, it is impossible to produce.
Process sequence：(1)→(5)→(2)→(3)→(7)
Comparative example 2
In comparative example 1, the tape of process (2) is substituted, glass substrate (quartzy 1mm is thick) has been pasted, except this
The process same with comparative example 1 has been carried out in addition, as a result because the warpage of chip, chip are shelled from glass substrate in process (3)
From, it is impossible to produce.
Comparative example 3
In embodiment 1, the quartz glass of process (4) is changed to the protection of the commercially available sticker with UV curing types
Adhesive tape, process same as Example 1 has been carried out in addition.As a result, in Protection glue band and the back pad metal of chip back surface
Bubble is produced between layer, sticker residue is attached on the back pad metal level of chip back surface.
It can be picked up in process (7), but yield rate reduces.
Claims (3)
- A kind of 1. manufacture method of power device, it is characterised in that successively with following (1)~(7) process,(1) process at least forming electrode in wafer surface；(2) process that chip is carried out to grinding back surface (BG)；(3) be in wafer back surface forming electrode back pad metal (BM) process；(4) process of glass substrate is pasted in chip back surface；(5) process for forming UBM by electroless plating on the electrode of the wafer surface；(6) process for peeling off the glass substrate of the chip back surface；(7) by pasting dicing tape in chip back surface and being cut, it is picked up from dicing tape to carry out chip Process.
- 2. the manufacture method of power device according to claim 1, it is characterised in that pass through nothing in (5) process The UBM that electrolysis plating is carried out is formed, and is to form Ni/Au epitheliums, Ni/Pd epitheliums or Ni/Pd/Au epitheliums by electroless plating.
- 3. the manufacture method of power device according to claim 1 or 2, it is characterised in that in (7) process, to Before chip back surface pastes dicing tape, Protection glue band or glass substrate are pasted to wafer surface, is pasted to chip back surface The Protection glue band or glass substrate are peeled off after dicing tape.
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| JP2014-034054 | 2014-02-25 | ||
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| JP2014-036805 | 2014-02-27 | ||
| PCT/JP2014/077404 WO2015129095A1 (en) | 2014-02-25 | 2014-10-15 | Method for manufacturing power device |
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| CN105009267B true CN105009267B (en) | 2017-12-12 |
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| KR (1) | KR101685317B1 (en) |
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| TWI748342B (en) * | 2020-02-13 | 2021-12-01 | 朋程科技股份有限公司 | Semi-finished product of power device and manufacturing method thereof and manufacturing method of power device |
| CN111540681A (en) * | 2020-05-29 | 2020-08-14 | 上海华虹宏力半导体制造有限公司 | Metallization method applied to IGBT chip |
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| JP3088506B2 (en) | 1991-08-30 | 2000-09-18 | 松下電器産業株式会社 | kitchenware |
| JP2616247B2 (en) * | 1993-07-24 | 1997-06-04 | 日本電気株式会社 | Method for manufacturing semiconductor device |
| JP4497737B2 (en) * | 2001-03-12 | 2010-07-07 | 株式会社ルネサステクノロジ | Manufacturing method of semiconductor device |
| JP2002339079A (en) | 2001-05-18 | 2002-11-27 | Seiko Epson Corp | Wafer fixture for plating |
| JP2002343851A (en) | 2001-05-18 | 2002-11-29 | Seiko Epson Corp | Wafer jig for plating |
| JP2002339078A (en) | 2001-05-18 | 2002-11-27 | Seiko Epson Corp | Wafer fixture for plating |
| JP4525048B2 (en) * | 2003-10-22 | 2010-08-18 | 富士電機システムズ株式会社 | Manufacturing method of semiconductor device |
| JP2006196779A (en) * | 2005-01-14 | 2006-07-27 | Sharp Corp | Method for manufacturing semiconductor device |
| JP4917832B2 (en) * | 2006-05-19 | 2012-04-18 | 上緯企業股▲分▼有限公司 | Method for manufacturing flexible liquid crystal display panel |
| JP2010283312A (en) | 2009-05-07 | 2010-12-16 | Jx Nippon Mining & Metals Corp | Method for manufacturing semiconductor device |
| JP2011216584A (en) * | 2010-03-31 | 2011-10-27 | Jx Nippon Mining & Metals Corp | Method of manufacturing semiconductor device |
| JP2013197434A (en) * | 2012-03-22 | 2013-09-30 | Elpida Memory Inc | Semiconductor device manufacturing method |
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| TW201533783A (en) | 2015-09-01 |
| WO2015129095A1 (en) | 2015-09-03 |
| TWI538034B (en) | 2016-06-11 |
| JP6385921B2 (en) | 2018-09-05 |
| JPWO2015129095A1 (en) | 2017-03-30 |
| CN105009267A (en) | 2015-10-28 |
| KR101685317B1 (en) | 2016-12-09 |
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