CN105009267A - Method for manufacturing power device - Google Patents

Method for manufacturing power device Download PDF

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Publication number
CN105009267A
CN105009267A CN201480002902.7A CN201480002902A CN105009267A CN 105009267 A CN105009267 A CN 105009267A CN 201480002902 A CN201480002902 A CN 201480002902A CN 105009267 A CN105009267 A CN 105009267A
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wafer
back surface
glass substrate
power device
chip
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CN201480002902.7A
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CN105009267B (en
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道下尚则
土田克之
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JX Nippon Mining and Metals Corp
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JX Nippon Mining and Metals Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/6834—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45—Ohmic electrodes
    • H01L29/456—Ohmic electrodes on silicon

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Wire Bonding (AREA)
  • Dicing (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

The objective of the present invention is to provide a method for manufacturing a power device that is easy to produce and can satisfy the strict requirements of reduced wafer thickness, and to provide a method for manufacturing a power device whereby a power device having excellent heat-dissipating properties and low energy loss can be provided. This method for manufacturing a power device is characterized in including sequential steps (1) to (7) below. (1) A step for forming an electrode at least on the front surface of a wafer, (2) a step for backgrinding (BG) the wafer, (3) a step for forming an electrode (back metal (BM)) on the rear surface of the wafer, (4) a step for attaching a glass substrate to the rear surface of the wafer, (5) a step for forming UBM on the electrode on the front surface of the wafer by electroless plating, (6) a step for peeling off the glass substrate on the rear surface of the wafer, and (7) a step for producing a chip by attaching dicing tape to the rear surface of the wafer, performing dicing, and performing a pickup from the dicing tape.

Description

The manufacture method of power device
Technical field
The present invention relates to the manufacture method of power device, particularly relate to the manufacture method can carrying out the power device of minimal thickness.
Background technology
IGBT (Insulated Gate Bipolar Transistor: insulated gate bipolar transistor), power MOSFET (MOS Field Effect Transistor (mos field effect transistor)), IPD (Intelligent Power Device (smart power device)) constant power device, from the view point of aspect such as characteristic such as reduction energy loss, thermal diffusivity etc., require chip minimal thickness, be strongly required to establish the manufacturing process making LED reverse mounting type.In addition, as joining technique, to guarantee for the purpose of the high reliability for line joint, solder bonds, the Al electrode of wafer surface, the situation of Cu electrode formation UBM (Under bump Metallurgy: Underbump metallization) are increased.
As the formation method of UBM, utilization can expect that the situation that the electroless plating method of low cost is formed increases, usually Ni/Au epithelium is formed by electroless nickel plating and displaced type electroless gold plating, between electroless nickel plating and displaced type electroless gold plating, carry out the electroless plating palladium on the barrier layer as the Ni diffusion caused by heat, be made for Ni/Pd/Au epithelium or be made for the Ni/Pd epithelium eliminating displaced type electroless gold plating.
As the manufacture method of general power device, in the structure of formation inner wafer and after surface forms Al or Cu electrode in operation above, electrode forms Ni/Au, Ni/Pd or Ni/Pd/Au epithelium by electroless plating.Thereafter, carry out grinding back surface (BG), by wafer grinding, at wafer back surface forming electrode (back pad metal; Liner Ferrule (BM:backmetal)).Thereafter, after carrying out the inspection of electrical characteristics etc., paste dicing tape (dicing-tape: dicingtape) overleaf, and carry out cutting (section: dicing) carry out chip.
But, in the methods described above, for nearest further chip minimal thickness, formed in (BGBM) operation at above-mentioned grinding back surface, back pad metal, expend heat, the Ni epithelium crystallization of UBM, therefore there is the problem with situation operation thereafter being caused to obstacle in chip warpage.Therefore, the thickness of wafer can not be made fully thin, or the thickness of plating Ni layer is as far as possible thin to be dealt with by making.
In addition, Patent Document 1 discloses a kind of manufacture method of semiconductor device, described manufacture method be in order to reduce when by when ion implantation and heat treatment being carried out to chip back surface in the operation after wafer film and form backplate and and then form surface electrode when the warpage of semiconductor substrate, reduce the cracking rate of semiconductor substrate, thin semiconductor substrate after terminating grinding back surface and etching is pasted onto on support substrate (glass substrate), forms backplate thereafter.But in the semiconductor device recorded in patent documentation 1, formed without any record for UBM, the problems referred to above in particularly being formed for the backplate after UBM is formed are also without any display.
In addition, semiconductor device, when carrying out grinding back surface back pad metal formation process after carrying out plating treatment process as described above, if the thickness of coating is thicker, the stress of coating also becomes large, thus chip warpage, causes harmful effect to operation thereafter.
For such problem, once have studied the method for carrying out grinding back surface back pad metal formation process before plating treatment process as described below.
Such as, above-mentioned each operation is carried out according to the order of following (1) ~ (4).
(1) the grinding back surface back pad metal formation process of wafer;
(2) for forming the plating treatment process of Underbump metallization (UBM) in wafer surface;
(3) cutting action;
(4) chip separation circuit.
But above-mentioned manufacture method, owing to carrying out back grinding procedure before plating treatment process, therefore produces to the attachment of the chip back surface wanting plating and the such problem of the damage of wafer.Therefore, as disclosed in difference in patent documentation 2 ~ 4, can seek to prevent the attachment to the chip back surface wanting plating by using plating fixture.
But, if use special plating fixture, then particularly LED reverse mounting type when, easily there is the warpage of wafer when installation, the dismounting of fixture.In addition, special plating fixture makes the operability of wafer worsen, and, owing to needing large space, therefore exist and be difficult to the such problem of wafer that once plating process is a lot of.
In order to solve this problem, Patent Document 5 discloses a kind of manufacture method of semiconductor device, this manufacture method comprises: the back grinding procedure 1 of chip back surface; Then, the operation 2 on bonding plane again with the adhesive film of exfoliated sticker of pasting 1 slice or two panels more than stacked at the back side of wafer; Then, for the wafer being pasted with adhesive film overleaf, implement the electroless plating treatment process 3 being used for forming Underbump metallization (UBM) in wafer surface, then implement the operation 4 peeling off adhesive film.
According to the method, due to expansion and the contraction of the adhesive tape in plating operation, sometimes produce bubble at wafer/adhesive tape interface, there is the situation that rate of finished products is reduced.
In addition, Patent Document 6 discloses following methods, namely, as the warpage and the damage that suppress wafer when wafer being carried out to plating process, the semiconductor device that the plating treatment effeciency of wafer is good, after wafer film, the back side dicing tape of wafer is fixed in annular frame, the surface of the wafer be fixed is carried out to the method for plating process.
Carry out plating process owing to being fixed in annular frame at the back side of wafer, therefore inhibit the warpage of wafer when carrying out plating process.But, when being fixed in annular frame, correspondingly becoming large, therefore needing the size of the groove of plating lines also to become large, sometimes adopt existing equipment to tackle.In addition, due to expansion and the contraction of the adhesive tape in plating operation, sometimes produce bubble at wafer/adhesive tape interface, there is the situation that rate of finished products is reduced.
In addition, a kind of manufacture method of semiconductor-type sensors is described in patent documentation 7, the method is in order to improve the corrosion resistance to Korrosionsmedium, when the Al electrode in liner (pad) portion directly forms terminal for connecting, under the state covering substrate back with the insulant of glass substrate etc., carry out electroless plating process.Above-mentioned patent documentation 7 is inventions of the manufacture method about semiconductor-type sensors, be provided with the barrier film (diaphragm) being formed with recess at substrate back on a semiconductor substrate, this glass substrate doubles as the coating material for the encapsulant He this substrate back sealing this recess, and glass substrate is the component parts of goods.
At first technical literature
Patent documentation
Patent documentation 1: Japan Patent No. 4525048 publication
Patent documentation 2: Japanese Unexamined Patent Publication 2002-339078 publication
Patent documentation 3: Japanese Unexamined Patent Publication 2002-339079 publication
Patent documentation 4: Japanese Unexamined Patent Publication 2002-343851 publication
Patent documentation 5: Japanese Unexamined Patent Publication 2011-216584 publication
Patent documentation 6: Japanese Unexamined Patent Publication 2010-283312 publication
Patent documentation 7: Japan Patent No. 5056862 publication
Summary of the invention
The object of this invention is to provide the warpage that can suppress with in the manufacturing process of the minimal thickness of wafer, prevent from resulting from the generation of the unfavorable condition of this warpage, and adapt to the strict demand of wafer minimal thickness in recent years, the manufacture method of power device that productivity ratio is also excellent.And, the power device manufacture method providing and can manufacture the power device that energy loss is few, thermal diffusivity is excellent is provided.
The present inventor etc. have studied the minimal thickness with the wafer in power device, and the various factors of warpage and the impact caused by each warpage occur in its manufacturing process.It found that, impact most in the warpage of minimal thickness be in the Ni epithelium formation process of carrying out electroless plating successively, back grinding procedure, back pad metal formation process, because grinding back surface or back pad metal form the warpage of the impact of heat in (BGBM) operation and the wafer caused by the Ni epithelium crystallization of UBM.
The present inventor etc. carry out found that of wholwe-hearted research, change process sequence, the UBM formation process of carrying out electroless plating overleaf after grinding, back pad metal (BM) formation process is effective to the warpage suppressed with wafer minimal thickness, and, for grinding overleaf, when carrying out the UBM formation process of electroless plating after back pad metal (BM) formation process, to the such problem of the damage of the attachment and wafer of wanting the chip back surface of plating, by at chip back surface sticking glass substrate, above-mentioned problem can be solved, thus complete the present invention.
That is, the present invention as described below.
[1] manufacture method for power device, is characterized in that, has following (1) ~ (7) operation successively,
(1) operation of electrode is at least formed in wafer surface;
(2) wafer is carried out the operation of grinding back surface (BG);
(3) in the operation of wafer back surface forming electrode (back pad metal (BM));
(4) in the operation of chip back surface sticking glass substrate;
(5) on the electrode of above-mentioned wafer surface, the operation of UBM is formed by electroless plating;
(6) operation of the glass substrate of above-mentioned chip back surface is peeled off;
(7) by pasting dicing tape at chip back surface and cutting, the operation of picking up (pick up) to carry out chip is carried out from dicing tape.
The manufacture method of the power device [2] according to above-mentioned [1], it is characterized in that, the UBM formation undertaken by electroless plating in above-mentioned (5) operation forms Ni/Au epithelium, Ni/Pd epithelium or Ni/Pd/Au epithelium by electroless plating.
The manufacture method of the power device [3] according to above-mentioned [1] or [2]; it is characterized in that; in above-mentioned (7) operation; before pasting dicing tape to chip back surface; protective tapes or glass substrate is pasted to wafer surface; after pasting dicing tape to chip back surface, peel off this protective tapes or glass substrate.
According to the manufacture method of power device of the present invention, wafer can be carried out minimal thickness fully.Even if wafer is carried out minimal thickness, wafer does not almost have warpage yet, and can not cause obstacle to operation thereafter, in addition, productivity ratio is also excellent.Therefore, utilize the manufacture method of power device of the present invention, the power device that energy loss is few, thermal diffusivity is excellent can be provided.
Embodiment
Power device requires the minimal thickness of chip.But if carry out minimal thickness, then the easy warpage of wafer, make the thickness of wafer thinner, warpage is larger.
In the manufacturing process of power device, overleaf after grinding, carry out when chip back surface forms the operation of back pad metal and/or forms the operation of UBM, the easy warpage of wafer in these operations.In addition, after formation UBM, when carrying out grinding back surface or back pad metal formation (BGBM) operation, in these operations, expend heat, the Ni epithelium crystallization of UBM, chip warpage.Formed to carry out grinding back surface after this UBM, back pad metal forms (BGBM) operation time warpage, than the operation forming back pad metal after above-mentioned grinding back surface, form UBM the warpage of operation large, manufacturing process becomes problem.Even if form back pad metal at surface mount glass substrate after formation UBM, warpage is also large, wafer occurs from glass substrate stripping, problems of crack.
The manufacture method of power device of the present invention, in order to avoid carrying out warpage when back pad metal is formed after above-mentioned UBM is formed, the UBM carrying out electroless plating after back pad metal (BM) is formed is formed.In addition, in order to prevent by the warpage of wafer, the cracking of wafer during electroless plating formation UBM, easily operate, after back pad metal (BM) is formed, sticking glass substrate, peels off glass substrate after UBM is formed overleaf.
That is, the manufacture method of power device of the present invention has following (1) ~ (7) operation.
(1) operation of electrode is at least formed in wafer surface;
(2) wafer is carried out the operation of grinding back surface (BG);
(3) in the operation of wafer back surface forming electrode (back pad metal (BM));
(4) in the operation of chip back surface sticking glass substrate;
(5) on the electrode of above-mentioned wafer surface, the operation of UBM is formed by electroless plating;
(6) operation of the glass substrate of above-mentioned chip back surface is peeled off;
(7) by pasting dicing tape at chip back surface and cutting, carry out from dicing tape picking up the operation of carrying out chip.
Formed as above-mentioned UBM, preferably on the electrode of wafer surface, form Ni/Au epithelium or Ni/Pd epithelium, Ni/Pd/Au epithelium by electroless plating.
Preferred: in above-mentioned (7) operation, before pasting dicing tape to chip back surface, paste protective tapes or glass substrate to wafer surface, after pasting dicing tape to chip back surface, peel off this protective tapes or glass substrate.
(1) about the operation at least forming electrode in wafer surface
Wafer does not limit, and is formed as the discoid of about 50 ~ 300mm diameter, uses the compound semiconductor such as silicon or GaAs to be formed.
As long as wafer, at table surface forming electrode, also can be formed with the internal structure of wafer in addition.
As above-mentioned electrode, preferred Al electrode, Cu electrode, as Al electrode, Cu electrode, can list the known Al electrode, the Cu electrode that use in power device.
Form the operation of the internal structure of wafer and form the operation of electrode in wafer surface, it is the necessary known wafer processing procedures of manufacture of power device, such as, the known methods such as photoetching, etching, ion implantation, sputtering, CVD can be adopted to carry out.In addition, as the device used in this operation, known arbitrary device can be used.
(2) about the operation of wafer being carried out grinding back surface (BG)
Usually before entering into back grinding procedure, paste wafer surface protective tapes (grinding back surface adhesive tape) or glass substrate in wafer surface.This wafer surface protective tapes or glass substrate, protect the wafer surface of element to be formed overleaf in grinding step, prevent the pollution of the wafer surface caused by the infiltration of grinding water, grindstone dust etc.Also preferred before entering into back grinding procedure in the present invention, paste wafer surface protective tapes (grinding back surface adhesive tape) or glass substrate in wafer surface.Wafer surface protective tapes or glass substrate can use usually commercially available goods.
In addition, the wafer surface protective tapes pasted before entering into back grinding procedure or glass substrate, preferably after this after chip back surface sticking glass substrate, UBM formed before peel off.
In the present invention, form back pad metal after grinding step overleaf, if but form back pad metal after wafer being carried out minimal thickness by grinding back surface, then sometimes there is the warpage of wafer.When there is warpage, in order to suppress this warpage, preferably as recorded in patent documentation 1, use glass substrate.That is, when there is the warpage of wafer when forming back pad metal, at wafer surface sticking glass substrate before entering into back grinding procedure, back pad metal is formed with the state being pasted with this glass substrate.Then, preferably overleaf after sticking glass substrate, form UBM before the glass substrate of stripper surface.
After wafer surface protective tapes or glass substrate are pasted on wafer, implement the back grinding procedure of wafer.Device for grinding back surface can use known arbitrary device, such as, be made up of the grindstone of the vacuum adsorption table (table) of fixed wafer, grinding wafer, the grinding fluid supply unit etc. that supplies grinding fluid (being generally water) in grinding on wafer.
By the wafer with wafer surface protective tapes or glass substrate protection surface, its back side is arranged in the vacuum adsorption table of backgrinding apparatus upward.Then, by vacuum adsorption table wafer aspirated under the state secured, while supplying grinding fluid by grinding fluid supply unit on wafer, utilizing grindstone by grinding wafer to the thickness of regulation.In addition, if needed, then after utilizing grindstone grinding, then carry out fine finishining grinding, the grinding face fine finishining of wafer is obtained smooth.By above process, by wafer minimal thicknessization to such as 50 ~ 400 μm, the thickness of 50 ~ 150 μm can be more preferably.
(3) about the operation at wafer back surface forming electrode (back pad metal (BM))
The formation process of the back pad metal of (3) is carried out after the grinding back surface of (2).Back pad metal formation process, also referred to as backplate formation process, is the operation of the back side formation backplate of the semiconductor wafer after grinding.Backplate can use various metal, uses the metal of general used backplate in the present invention.Such as, at the back side of the substrate carrying out grinding back surface, form nickel silicide layer and/or titanium layer, form metal level thereon.Metal level is preferably nickel dam, platinum layer, silver layer, layer gold etc.The thickness of nickel silicide layer is preferably below 200nm, and the thickness of titanium layer is preferably more than 5nm below 500nm, and the thickness of metal level is preferably more than 50nm below 1000nm.Device for the formation of above-mentioned back pad metal can use known arbitrary device.
In the manufacture method of power device of the present invention, before UBM is formed, form back pad metal (backplate).Therefore, owing to there is not the Ni epithelium of UBM, even if so expend heat when forming back pad metal, there is not the chip warpage caused by Ni epithelium crystallization yet.
(4) about the operation at chip back surface sticking glass substrate
After back pad metal is formed, at chip back surface sticking glass substrate.Its objective is: prevent from forming coating at chip back surface during the electroless plating of the operation below; Make the operability of thin wafer good; Prevent the cracking of wafer; Prevent the warpage caused by electroless plating.
In addition; not sticking glass substrate but under pasting protective tapes situation; due to expansion and the contraction of the adhesive tape in plating operation; sometimes bubble is produced at wafer/adhesive tape interface; sometimes make rate of finished products reduce, but by chip back surface sticking glass substrate, just do not expand and shrink; and can not bubble be produced, therefore productivity ratio improves.
The glass used in glass substrate can be any glass, can use soda lime glass, alkali-free glass, quartz glass, pyrex etc.As long as the thickness of glass substrate has the intensity of the support substrate as wafer, be preferably the thickness of about 0.5mm ~ 5mm.Wafer and glass substrate two-sided tape are pasted easier thus preferred.The sticker used in two-sided tape, the resin etc. that acrylic acid series, metha crylic, silicon system, polyamide-based, Polyester, polyurethane series and EVA (copolymer of ethene and vinylacetate) are can be used, but preferably utilize UV and/or heating and solidify or produce gas and the acrylic acid series sticker easily peeled off.
The stickup of wafer and glass substrate, as long as utilize commercially available device to paste.
(5) about the operation being formed UBM on the electrode of above-mentioned wafer surface by electroless plating
Then, to the wafer being pasted with glass substrate overleaf, the electroless plating process for forming Underbump metallization (UBM) in wafer surface is carried out.The method of electroless plating process itself is known, and arbitrary method well known by persons skilled in the art can be adopted to implement, below to being preferred embodiment described.
When carrying out electroless plating process, first, as wafer by the process of surfacing, usually carry out purifying operation.As purifying operation, no matter be that dry process or wet processed can.When dry process, preferred ashing process, UV process and reactive-ion etch process etc.When wet processed, any one of infusion process and spin-coating method can be used, but use infusion process can unify process in more preferably.As wet processed, the ultrasonic washing in water can be listed, to the dipping in alkali or acidic degreasing liquid, to the dipping in aqueous surfactant solution, to the impregnating in soft etching solution.As wet processed, the process utilizing commercially available acidic degreasing liquid, alkaline degreaser, soft etching solution to carry out can be listed, if use these to process, then this process easy in preferred.These process can adopt separately also can combine employing, preferably selects the suitableeest processing method according to the pollution condition of wafer, the kind of passivation (passivation).
Above-mentioned purifying after, then, preferably adopt the metallic compound having catalyst activity when wafer surface precipitating metal by non-electrolysis plating liquid to process.Palladium compound, zinc compound etc. is had as such metallic compound.About palladium compound, the ammino-complex etc. of the chloride, hydroxide, oxide, sulfate, ammonium salt etc. of the palladium of display catalytic effect can be listed.Palladium compound uses with the form of aqueous solution or organic solvent solution.As organic solvent, such as methyl alcohol, ethanol, isopropyl alcohol, acetone, methyl ethyl ketone, toluene, ethylene glycol, polyethylene glycol, dimethyl formamide, methyl-sulfoxide, two can be used alkane etc. or their mixture.Palladium compound, fastens in the pass of a series of process, more preferably uses as an aqueous solution.In addition, zinc compound generally uses as zincate process, can use commercially available chemicals.
After above-mentioned metallic compound process, by water immersion in non-electrolysis plating liquid, carry out electroless plating process.When carrying out electroless plating, in order to enhance productivity, by multiple wafer storage in the wafer case of such as 3 support types or 4 support types, and this wafer case be impregnated in non-electrolysis plating liquid carry out advantageously.Electroless plating can be by replacing the electroless plating carried out, and also can be by reducing the electroless plating carried out.In non-electrolysis plating liquid, contain the metal ion source for being formed desired coating with the such as form such as oxysulfide, chloride.And then, in non-electrolysis plating liquid, also can comprise the complexants such as reducing agent, sodium acetate, EDTA, tartaric acid, malic acid, citric acid, glycine such as formaldehyde, hydrazine (hydrazine), sodium hypophosphite, sodium borohydride, ascorbic acid, glyoxalic acid and separate out controlling agent etc.
Non-electrolysis plating liquid, as pH adjusting agent, can use usual the used material such as NaOH, potassium hydroxide, but wish to avoid the alkali-metal situation such as sodium, potassium in semiconductor applications under, preferably uses tetramethyl ammonium hydroxide.
By above-mentioned operation, carry out electroless plating process in wafer surface, such as Ni/Au, Ni/Pd, Ni/Pd/Au epithelium etc. can be formed in wafer surface.Carry out in the operation in the past of grinding back surface, the formation of back pad metal after carrying out electroless plating, the thickness of plating Ni epithelium becomes less than about 1 μm due to the generation of warpage, if but solder is carried on UBM, then can form intermetallic compound with the thickness at zero point several microns, therefore from guaranteeing that the viewpoint of Ni epithelium is preferably more than 1 μm.In the present invention, the generation of warpage is few, and therefore thick-film becomes possibility, as long as below 10 μm of thickness.From based on the operating efficiency of plating time, the epithelium formation grade with the metallic compound of solder, Ni epithelium is preferably 1 ~ 5 μm.In addition, the block that the thickness plating Pd epithelium spreads from Ni, plating time are preferably 0.02 ~ 0.2 μm.Plating Au epithelium is for guaranteeing that the object of solder wettability is preferably 0.01 ~ 0.2 μm.
In the present invention, overleaf after sticking glass substrate, formed UBM, therefore, it is possible to when preventing plating wafer breakage and adhere to the plating of chip back surface.In addition, the warpage of the wafer caused by plating can also be prevented.
(6) about the operation of the glass substrate of the above-mentioned chip back surface of stripping
After above-mentioned (5) operation, the glass substrate will pasted in above-mentioned (4) operation is peeled off.
As long as the method peeled off uses commercially available stripping off device to carry out peeling off.If use is solidified by UV or heating or produced the sticker of gas, then due to UV or heating, reduce with the adhesion strength of wafer, easily peel off, thus preferably.
(7) about by pasting dicing tape at chip back surface and cutting, carry out from dicing tape picking up the operation of carrying out chip
This operation itself is known, adopts arbitrary method well known by persons skilled in the art, below illustrates.
First, use placement equipment (mounter), paste dicing tape at chip back surface together with annular frame.
Protective tapes or glass substrate can be pasted to protect surface in wafer surface before stickup dicing tape.When wafer surface has pasted protective tapes or glass substrate, after dicing tape is pasted onto chip back surface, the protective tapes of stripper surface or glass substrate.Above-mentioned protective tapes or glass substrate, can use the adhesive tape identical with the goods used in above-mentioned (2) operation or (4) operation or glass substrate.In addition, its method of attaching also can use the method identical with above-mentioned (2) operation or (4) operation.For protective tapes, the protective tapes being attached with the sticker identical with the sticker used during sticking glass substrate in above-mentioned operation (4) can be used, commercially available device can be utilized to paste.As long as stripping means uses commercially available stripping off device to carry out.Thereafter, made by wafer surface be placed on the cutting bed of cutter sweep upward, be fixed by the vacuum suction of adsorption section.
Then, utilize cast-cutting saw, by the wafer in annular frame from face side longitudinal and transverse cut off, obtain the chip of monolithic.The chip of the monolithic after cut-out utilizes dicing tape to be fixed, and thus maintaining the state of arrangement.
After cutting action, to the transfer of chip separation circuit, separated each chip is assemblied in the assigned position on circuit substrate, connects the metal wiring of each chip and circuit substrate, make desired power device thus.
Manufacturing method according to the invention, even if also can manufacture wafer minimal thicknessization.Manufacturing method according to the invention, become the process sequence having avoided the operation that chip warpage occurs, and glass substrate has been pasted in the operation that chip warpage easily occurs, therefore obtained power device, even if wafer minimal thicknessization almost be there is no yet the warpage of wafer, the problem (stripping from glass substrate in operation) caused by warpage does not occur in manufacturing process, and in addition, productivity ratio is also excellent.
Due to can by wafer minimal thickness, therefore, it is possible to provide the power device that energy loss is few, thermal diffusivity is excellent.
Embodiment
Below embodiments of the invention are shown, but these embodiments providing to understand the present invention better, being not intended to limit the present invention.
Embodiment 1
Carry out wafer operation by the order of following operation (1) ~ (7) and carry out chip.
< operation (1) >
Use existing device, made and be formed with the square AlSi electrode of 1cm and electrode area is 8 inches of silicon test wafer of 80% of wafer surface in wafer surface.
< operation (2) >
By commercially available grinding back surface adhesive tape protection wafer surface, carry out grinding back surface, make wafer thickness be 100 μm.
< operation (3) >
Use existing device, form the back pad metal of titanium layer 100nm, nickel dam 200nm, layer gold 100nm.
< operation (4) >
Use existing device, utilize the two-sided tape with the sticker of UV curing type that quartz glass (1mm is thick) is pasted onto chip back surface, peeled off the grinding back surface adhesive tape of operation (2).
< operation (5) >
Utilize existing method, the liner of wafer surface is formed 3 μm, electroless plating epithelium nickel, gold 0.05 μm.
< operation (6) >
The quartz glass of chip back surface that used existing device to peel off.
< operation (7) >
Use existing device, utilize the two-sided tape with the sticker of UV curing type that quartz glass (1mm is thick) is pasted onto wafer surface.Thereafter, paste dicing tape overleaf, peel off after being pasted onto the quartz glass of wafer surface, cut, pick up from dicing tape, confirm and can pick up no problemly, even if minimal thicknessization also can manufacture power device.
Embodiment 2
For embodiment 1, make the wafer thickness of the grinding back surface carried out in operation (2) be 150 μm, carry out similarly to Example 1 in addition.
Confirm can be no problem in operation (7) pick up, even if minimal thicknessization also can manufacture power device.
Embodiment 3
For embodiment 1, make the wafer thickness of the grinding back surface carried out in operation (2) be 50 μm, carry out similarly to Example 1 in addition.
Confirm can be no problem in operation (7) pick up, even if minimal thicknessization also can manufacture power device.
Embodiment 4
For embodiment 1, make the nickel dam of the back pad metal in operation (3) be 400nm, carry out similarly to Example 1 in addition.
Confirm can be no problem in operation (7) pick up, even if minimal thicknessization also can manufacture power device.
Embodiment 5
For embodiment 1, make the electroless plating epithelium in operation (5) be 3 μm, nickel, palladium 0.05 μm, gold 0.03 μm, carry out similarly to Example 1 in addition.
Confirm can be no problem in operation (7) pick up, even if minimal thicknessization also can manufacture power device.
Embodiment 6
For embodiment 1, make the electroless plating epithelium in operation (5) be 3 μm, nickel, palladium 0.2 μm, carry out similarly to Example 1 in addition.
Confirm can be no problem in operation (7) pick up, even if minimal thicknessization also can manufacture power device.
Embodiment 7
For embodiment 1, make the quartz glass in operation (4) be パ イ レ ッ Network ス (registered trade mark) glass (pyrex 1mm is thick), carry out similarly to Example 1 in addition.
Confirm can be no problem in operation (7) pick up, even if minimal thicknessization also can manufacture power device.
Embodiment 8
For embodiment 1, do not carry out the stickup of the quartz glass in operation (7) to wafer surface, paste dicing tape overleaf and cut, carrying out similarly to Example 1 in addition.
Confirm can be no problem in operation (7) pick up, even if minimal thicknessization also can manufacture power device.
In above embodiment 1 ~ 8, by carrying out the operation (5) forming UBM after back pad metal formation process (3), even if wafer thickness minimal thickness is turned to 50 ~ 150nm also can prevent warpage, can productivity ratio manufacture well do not result from warpage unfavorable condition, the power device of minimal thickness that specifies.
Comparative example 1
Change the process sequence of embodiment 1, manufacture by following order, the warpage of result wafer in operation (3) becomes large, can not produce.
Process sequence: (1) → (5) → (2) → (3) → (7)
Comparative example 2
In comparative example 1, substitute the grinding back surface adhesive tape of operation (2), paste glass substrate (quartzy 1mm is thick), carry out the operation same with comparative example 1 in addition, result in operation (3) due to the warpage of wafer, wafer is peeled off from glass substrate, can not produce.
Comparative example 3
In embodiment 1, the quartz glass of operation (4) is changed to the protective tapes of the commercially available sticker with UV curing type, carried out the operation identical with embodiment 1 in addition.Its result, produces bubble between protective tapes and the back pad metal level of chip back surface, and the back pad metal level of chip back surface attached to sticker residue.
Can pick up in operation (7), but rate of finished products reduces.

Claims (3)

1. a manufacture method for power device, is characterized in that, has following (1) ~ (7) operation successively,
(1) operation of electrode is at least formed in wafer surface;
(2) wafer is carried out the operation of grinding back surface (BG);
(3) in the operation of wafer back surface forming electrode and back pad metal (BM);
(4) in the operation of chip back surface sticking glass substrate;
(5) on the electrode of described wafer surface, the operation of UBM is formed by electroless plating;
(6) operation of the glass substrate of described chip back surface is peeled off;
(7) by pasting dicing tape at chip back surface and cutting, carry out from dicing tape picking up the operation of carrying out chip.
2. the manufacture method of power device according to claim 1, it is characterized in that, the UBM formation undertaken by electroless plating in described (5) operation forms Ni/Au epithelium, Ni/Pd epithelium or Ni/Pd/Au epithelium by electroless plating.
3. the manufacture method of power device according to claim 1 and 2; it is characterized in that; in described (7) operation; before pasting dicing tape to chip back surface; paste protective tapes or glass substrate to wafer surface, after pasting dicing tape to chip back surface, peel off this protective tapes or glass substrate.
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