CN104981087B - Signal transmission cable architecture and its electronic device of application - Google Patents

Signal transmission cable architecture and its electronic device of application Download PDF

Info

Publication number
CN104981087B
CN104981087B CN201410134385.0A CN201410134385A CN104981087B CN 104981087 B CN104981087 B CN 104981087B CN 201410134385 A CN201410134385 A CN 201410134385A CN 104981087 B CN104981087 B CN 104981087B
Authority
CN
China
Prior art keywords
conducting wire
transmission line
cable architecture
signal transmission
silicon perforation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201410134385.0A
Other languages
Chinese (zh)
Other versions
CN104981087A (en
Inventor
颜孝璁
简育生
叶达勋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Realtek Semiconductor Corp
Original Assignee
Realtek Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Realtek Semiconductor Corp filed Critical Realtek Semiconductor Corp
Priority to CN201410134385.0A priority Critical patent/CN104981087B/en
Publication of CN104981087A publication Critical patent/CN104981087A/en
Application granted granted Critical
Publication of CN104981087B publication Critical patent/CN104981087B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Landscapes

  • Structure Of Printed Boards (AREA)
  • Endoscopes (AREA)

Abstract

The present invention relates to signal transmission cable architecture and its electronic device of application.A kind of signal transmission cable architecture includes substrate, multiple silicon perforations(TSV)Formula groove, conductive materials, at least one conducting wire and dielectric layer.Substrate has each other relative first surface and the second surface.Silicon perforation formula groove is formed in the first surface of substrate and extends along first surface.The bottom surface of silicon perforation formula groove is located between the first surface and second surface of substrate.Conductive materials fill up silicon perforation formula groove so that forming transmission line.Conducting wire is located at the top of transmission line.Dielectric layer is located on the first surface of substrate, and is spaced conducting wire and transmission line.

Description

Signal transmission cable architecture and its electronic device of application
Technical field
The present invention is on a kind of microstripline(microstrip)Structure design, especially with regard to a kind of signal transmission Cable architecture and its electronic device of application.
Background technology
At present due to wireless network, mobile phone, global positioning system(Global Positioning System; GPS)And rapid progress and the vast demand of the wireless communication technique such as DTV, the design and system of high-speed digital circuit Make the extremely popular electronic technology become in field of Communications.Substantially, most high-speed digital circuit all uses Microstripline(microstrip)Or banding pattern circuit(stripline)It is used as signal transmssion line, is believed with transmitting the numeral of high speed Number.The board structure of circuit of many various different high-speed digital signal transmission has been developed in electronics industry at present.
Known signal transmission cable architecture is to form two metal layers corresponded respectively on two surfaces of dielectric layer. , must be more than a specific range between two metal layers in order to provide preferable signal transmission(That is, dielectric layer has one A specific thicknesses), such as 2 microns(μm).However, at 65 nanometers(nm)Under processing procedure, at most at a distance of 3 microns between two metal layers (μm)(Potential range between as minimum metal layer and highest metal layer);And under 28nm processing procedures, between two metal layers At most at a distance of 1.5 μm.However, the size of electronic device tends to light and short change always, but in order to maintain signal quality, letter The size of number transmission line structure is then difficult to go diminution again, so that overall volume is limited.Another metal layer for advanced process is also got over Come it is thinner, if only implement multiple layer metal layer stack if can cause it is more difficult in transmission line design.
The content of the invention
In embodiment, a kind of signal transmission cable architecture includes substrate, multiple silicon perforations(TSV)Formula groove and conductive material Matter.Substrate has each other relative first surface and the second surface.Silicon perforation formula groove is formed in the first surface of substrate simultaneously Extend along first surface.The bottom surface of each silicon perforation formula groove is located between the first surface and second surface of substrate.Conductive material Matter fills up these silicon perforation formula grooves so that forming multiple transmission lines.
In another embodiment, a kind of signal transmission cable architecture includes substrate, multiple silicon perforations(TSV)Formula groove, conduction Material, at least one first conducting wire and dielectric layer.Substrate has each other relative first surface and the second surface.Silicon Punched-type groove is formed in the first surface of substrate and extends along first surface.The bottom surface of silicon perforation formula groove is located at substrate Between first surface and second surface.Conductive materials fill up silicon perforation formula groove so that forming transmission line.First conducting wire Positioned at the top of transmission line.Dielectric layer position is spaced the first conducting wire and transmission line on the first surface of substrate.
In another embodiment, a kind of electronic device using signal transmission cable architecture includes foregoing signal transmission knot Structure, front stage circuits and late-class circuit.Front stage circuits couple one end of each transmission line and one end of each first conducting wire, And late-class circuit couples the other end of each transmission line and the other end of each first conducting wire.
To sum up, signal transmission cable architecture according to the present invention and its electronic device of application will be transmitted using silicon perforation technology Circuit is formed in a substrate, the required distance between larger signal path and grounding path is provided with enable, and then reduce letter The area of plane that number transmission line structure uses, and preferable component characteristic is provided.Signal transmission cable architecture according to the present invention And its electronic device of application can provide relatively low resistance value, less parasitic capacitance and larger inductance value, and easily provide institute The characteristic impedance needed(characteristic impedance)(Such as:50 ohm or 75 ohm etc.).Furthermore according to the present invention Signal transmission cable architecture and its application electronic device be further able to provide Slow-wave effect(slow wave effects), with Desired signal conveying length is reduced, and then further reduces chip area.
Brief description of the drawings
Fig. 1 is the schematic diagram according to the signal transmission cable architecture of first embodiment of the invention.
Fig. 2 is the exploded view of the signal transmission cable architecture in Fig. 1.
Fig. 3 is the schematic diagram according to the signal transmission cable architecture of second embodiment of the invention.
Fig. 4 is the schematic diagram according to the signal transmission cable architecture of third embodiment of the invention.
Fig. 5 is the schematic diagram according to the signal transmission cable architecture of fourth embodiment of the invention.
Fig. 6 is the schematic diagram according to the signal transmission cable architecture of fifth embodiment of the invention.
Fig. 7 is the schematic diagram according to the signal transmission cable architecture of sixth embodiment of the invention.
Fig. 8 is the schematic diagram according to the signal transmission cable architecture of seventh embodiment of the invention.
Fig. 9 is the sectional view of transversal I-I in Fig. 8.
Figure 10 is the exploded view of signal transmission cable architecture 10 in Fig. 8.
The exploded view of the signal transmission cable architectures of Figure 11 according to a eighth embodiment of the present invention.
The exploded view of the signal transmission cable architectures of Figure 12 according to a ninth embodiment of the present invention.
The schematic diagram of the signal transmission cable architectures of Figure 13 according to a tenth embodiment of the present invention.
Figure 14 is the sectional view of transversal II-II in Figure 13.
Figure 15 is the schematic diagram using one embodiment of the electronic device of signal transmission cable architecture.
Figure 16 is the schematic diagram using another embodiment of the electronic device of signal transmission cable architecture.Figure 17 is frequency pair Feature resistance hole(Z0)Variation relation curve map.
Figure 18 is frequency to small-signal gain(S21)Variation relation curve map.
Symbol description:
10 signal transmission cable architectures
20 front stage circuits
30 late-class circuits
110 substrates
110a first surfaces
110b second surfaces
112 dielectric layers
120 insulating layers
130 transmission lines
130a silicon perforation formula grooves
130b conductive materials
132 transmission lines
132a silicon perforation formula grooves
132b conductive materials
134 transmission lines
134a silicon perforation formula grooves
134b conductive materials
136 transmission lines
138 transmission lines
150 conducting wires
152 conducting wires
154 conducting wires
160 conducting wires
162 conducting wires
164 conducting wires
166 conducting wires
170 via holes
172 via holes
174 via holes
176 via holes
L1 length
H1 depth
H2 thickness
H3 thickness
D1 width
D2 configures width
D3 width
D31 width
D32 width
D4 configures width
I-I transversals
II-II transversals
C1 curves
C2 curves
C3 curves
C4 curves
Embodiment
With reference to Fig. 1 and 2, signal transmission cable architecture 10 includes:Substrate 110, multiple silicon perforations(through-silicon via;TSV)Formula groove 130a, 132a and conductive materials 130b, 132b.Below by taking two silicon perforation formula grooves as an example.
Substrate 110 has first surface 110a and second surface 110b, and first surface 110a and second surface 110b Toward each other.In other words, the first surface 110a of substrate 110 is upper surface, and the second surface 110b of substrate 110 is following table Face.
Silicon perforation formula groove 130a, 132a are formed in the first surface 110a of substrate 110.Each silicon perforation formula groove 130a, 132a extend its length L1 along first surface 110a.In other words, silicon perforation formula groove 130a, 132a is strip.
Each silicon perforation formula groove 130a, 132a is downward by first surface 110a(To second surface 110b)Extend it Depth H 1, but not through substrate 110.In this, the depth H 1 of each silicon perforation formula groove 130a, 132a are less than the thickness of substrate 110 Spend H2, i.e. the bottom surface position of each silicon perforation formula groove 130a, 132a are between first surface 110a and second surface 110b.
In certain embodiments, the depth H 1 of each silicon perforation formula groove 130a, 132a are greater than or equal to half The thickness H2 of substrate 110.
In certain embodiments, the depth H 1 of each silicon perforation formula groove 130a, 132a are greater than or equal to about 5 microns(μ m).In certain embodiments, TSV depth can be 5 μm~60 μm, be main with 15 μm~25 μm for actual implementation state Scope.In other words, the depth of silicon perforation formula groove is preferably 5 μm -60 μm, and is more preferably 15 μm~25 μm.
Conductive materials 130b, 132b correspond to silicon perforation formula groove 130a, 132a respectively.Conductive materials 130b fills up corresponding Silicon perforation formula groove 130a, to form transmission line 130.And conductive materials 132b fills up corresponding silicon perforation formula groove 132a, to form transmission line 132.In other words, transmission line 130,132 is embedded on the surface of substrate 110(That is, it is embedded In substrate 110).In this, the transmission line formed has the architectural feature of silicon perforation technology, i.e., relative to general circuit layer With thicker thickness(Approximately equal to depth H 1).In certain embodiments, the thickness of transmission line is greater than or equal to about 5 μ M, preferably 5 μm -60 μm, and preferably 15 μm~25 μm.
In certain embodiments, substrate 110 can be silicon substrate.At this time, between substrate 110 and each transmission line 130/132 Form insulating layer 120.120 spacer substrate 110 of insulating layer and each transmission line 130/132, to cause substrate 110 and each transmission line Road 130/132 is electrically insulated.Wherein, the material of insulating layer 120 may be, for example, silica or silication nitrogen(SiN), it is also possible to it is The oxide layer of other materials.
In certain embodiments, transmission line 130,132 both, one can be used as signal path, and another one then conduct Grounding path.And this both distance can select to adjust depending on the needs designed.
In order to facilitate description, two silicon perforation formula grooves 130a, 132a are referred to as the first silicon perforation formula ditch below Groove 130a and the second silicon perforation formula groove 132a.In certain embodiments, with reference to Fig. 3, to overlook the first surface of substrate 110 From the point of view of 110a, the first silicon perforation formula groove 130a is along first surface 110a and with collapsible(folded)Extend its length L, and Second silicon perforation formula groove 132a is then between the first silicon perforation formula groove 130a.In other words, the first silicon perforation formula groove The both ends of 130a and one end of the second silicon perforation formula groove 132a are located at the same side of substrate 110.Second silicon perforation formula groove The other end of 132a is located at the opposite side of substrate 110, and the first silicon perforation formula groove 130a extends around the second silicon perforation formula The other end of groove 132a.Wherein, U-shaped can be presented in the first silicon perforation formula groove 130a.
Then, transmission line 130 can be used as grounding path, and transmission line 132 is then used as signal path, and transmission line Road 130 is collapsible configuration, to form collapsible co-plane waveguide(folded coplanar waveguide;folded CPW)Framework, causes signal path to be folded between grounding path, and then provides preferable signal shielding and provide at the same time altogether, Therefore save on usable floor area.
With reference to Fig. 4, in certain embodiments, signal transmission cable architecture 10 can have three or more by conductive materials 130b, 132b, 134b fill up the transmission line 130,132,134 that silicon perforation formula groove 130a, 132a, 134a are formed.Then, Transmission line 130,134 can be used as grounding path, and transmission line 132 is then used as signal path, to cause signal path sandwiched Between grounding path, and then provide preferable signal shielding.
In certain embodiments, when signal transmission cable architecture 10 has the transmission line of more than four(Not shown in figure) When, these transmission lines are alternately as signal path or grounding path, i.e. signal path and grounding path alternately sequentially Configuration, to form co-plane waveguide(coplanar waveguide;CPW)Framework.
In certain embodiments, silicon perforation formula groove 130a, 132a, 134a are filled up by conductive materials 130b, 132b, 134b The transmission line 130,132,134 formed also can only be used as grounding path.
Then, conductive materials 130b, 132b, the 134b for forming different transmission lines 130,132 can be phase same material or not Same material.Wherein, conductive materials 130b, 132b, 134b can be metal material.
With reference to Fig. 5 and Fig. 6, signal transmission cable architecture 10 can further comprise dielectric layer 112 and at least one conductor wire Road(Hereinafter referred to as the first conducting wire 150).In the drawings, by 112 transparence of dielectric layer, to clearly show that each component. Then, transmission line 130 is used as grounding path, and the first conducting wire 150 is used as signal path, but the limit of this non-invention System, it also can be opposite.
First conducting wire 150 is in the top of transmission line 130.112 first surfaces in substrate 110 of dielectric layer On 110a, and it is spaced the first conducting wire 150 and transmission line 130.
Then, transmission line 130 as it is above-mentioned be to fill up silicon perforation formula groove by conductive materials to be formed, and conductor wire Road 150 can be melted into by metal layer pattern.In other words, the thickness H3 of conducting wire 150 is the line thicknesses of general single circuit layer. In other words, the thickness of transmission line 130(That is, the depth H 1 of silicon perforation formula groove)More than the thickness H3 of conducting wire 150.
In certain embodiments, the configuration width of transmission line 130(That is, the width D 1 of transmission line 130)The can be equal to The configuration width of one conducting wire 150(That is, the width D 3 of the first conducting wire 150), as shown in figs. 5 and 8.Furthermore transmission line The configuration width on road 130(That is, width D 1)The also greater than configuration width of the first conducting wire 150(That is, width D 3), such as Fig. 6 Shown in 7, but the conductor width of transmission line 130 is smaller than or the conductor width more than the first conducting wire 150.
For example, with reference to Fig. 6, the conductor width of transmission line 130(It is equal to width D 1)Substantially larger than first is conductive The conductor width of circuit 150(It is equal to width D 3).With reference to Fig. 7, the conductor width of transmission line 130 is less than the first conducting wire 150 conductor width, but the configuration width of transmission line 130(That is, width D 1)More than the configuration width of the first conducting wire 150 (That is, width D 3).
In certain embodiments, with reference to Fig. 7 to 9, signal transmission cable architecture 10 can set multiple transmission lines 130,132, 134、136、138.Then, in these transmission lines 130,132,134,136,138 each as it is foregoing be by conductive material Matter is filled up silicon perforation formula groove and is formed, and is used as grounding path.First conducting wire 150 is then used as signal path.Instead It, also can be using transmission line 130,132,134,136,138 as signal path, and the first conducting wire 150 is then used as and connects Ground path.In addition, other configurations mode, generally as foregoing, so it will not be repeated.
In certain embodiments, the first conducting wire 150 can correspond to the centre of transmission line 130,132,134,136,138 And set.
In certain embodiments, it is conductive can be equal to first for the configuration width D 2 of transmission line 130,132,134,136,138 The configuration width of circuit 150(That is, width D 4), as shown in FIG. 8 and 9.Furthermore the configuration width of transmission line 130(That is, width D2)The also greater than configuration width of the first conducting wire 150(That is, width D 3), as shown in Figure 7.
In certain embodiments, when signal transmission cable architecture 10 sets multiple transmission lines 130,132,134,136,138 When, the width of transmission line 130,132,134,136,138 can be equal(As shown in Figure 7)Or can be unequal(Such as the institutes of Fig. 8 and 9 Show).
In certain embodiments, with reference to Fig. 8 to 14, signal transmission cable architecture 10 can set multiple first conducting wires 150, 152、154.Then, signal transmission cable architecture 10 can set single transmission line 130 or multiple transmission lines 130,132,134, 136.Then, in transmission line 130,132,134,136 each as it is foregoing be to fill up silicon perforation formula ditch by conductive materials Groove is formed, and is used as grounding path.
First conducting wire 150,152,154 is in the same plane, and this plane is substantially parallel to substrate 110 First surface 110a.In certain embodiments, the first conducting wire 150,152,154 can be formed by same metal layer pattern.
First conducting wire 150,152,154 is located at the top of transmission line 130,132,134,136.112 shape of dielectric layer Into on the first surface 110a of substrate 110, and be spaced the first conducting wire 150,152,154 and transmission line 130,132, 134、136。
Wherein, the first conducting wire 150 is used as signal path, and the first conducting wire 152,154 is used as grounding path, with Preferable signal shielding is provided.
Then, multiple transmission lines 130,132,134,136 can be straight line configuration, as shown in Figure 10.In addition, multiple biographies Defeated circuit 130,132 can be collapsible configuration(As shown in 1 Figure 11), or for partial straight lines configuration and be partly collapsible Configuration(As shown in figure 12), to reduce the configuration quantity of signal wire.
In certain embodiments, one or more via holes can be set with reference to Fig. 8 to 14, signal transmission cable architecture 10(With It is referred to as the first via hole 170,172 down).
First via hole 170,172 runs through dielectric layer 112.Each first via hole 170(Or 172)One end coupled transmission lines road 130(Or 136), and each first via hole 170(Or 172)The other end couple the first conducting wire 152(Or 154).In other words, First via hole 170 turns on 130 and first conducting wire 152 of transmission line, and the first via hole 172 turns on transmission line 136 With the first conducting wire 154.
In certain embodiments, with reference to Fig. 8 to 14, the first conducting wire 150,152,154 and transmission line 130, The 132nd, one or more layers circuit layer can be also set between 134,136.In other words, signal transmission cable architecture 10 can further comprise it His conducting wire(Hereinafter referred to as the second conducting wire 160,162,164,166).
Each second conducting wire 160,162,164,166 is located at the first conducting wire 150,152,154 and transmission line 130th, on the either circuit layer between 132,134,136.Then, any one in the second conducting wire 160,162,164,166 Corresponding first conducting wire 150,152, one of 154 is set.
Second conducting wire 160,164 is correspondingly arranged between corresponding first conducting wire 152 and transmission line 130, And it is spaced apart between both appointing by dielectric layer 112.Then, the first conducting wire of coupling 152 and the first conducting of transmission line 130 Hole 170 is also run through and is coupled(It is electrically connected)Second conducting wire 160,164, with storehouse transmission line 130 come increase depth, Reduce resistance value or strengthen shielding.Wherein, the second conducting wire 160,164 can be overlapping with corresponding first conducting wire 152.This Outside, the second conducting wire 160,164 can also can have the size being substantially the same with the first corresponding conducting wire 152.
Moreover, the first conducting wire and the second conducting wire can select the pattern with transmission line depending on design requirement (pattern)It is identical, differ or part same section is different.For example, in fig. 8, the pattern of conducting wire(Straight line Shape)With the pattern of transmission line(Linear)It is identical;In fig. 11, the pattern of conducting wire(Linear)With the sample of transmission line Formula(U-shaped)Differ;In fig. 12, the pattern of conducting wire(Linear)With the pattern of transmission line(Transmission line 132,134 For linear)It is partly identical, and with the pattern of transmission line(Transmission line 136 is U-shaped)Part differs.It is in addition, conductive The pattern of circuit can also coordinate the form design of corresponding transmission line, such as:The part of transmission line 136 is corresponded in Figure 12 One conducting wire or the second conducting wire are also U-shaped pattern.
Second conducting wire 162,166 is correspondingly arranged between corresponding first conducting wire 154 and transmission line 136, And it is spaced apart between both appointing by dielectric layer 112.In this, the first conducting wire of coupling 154 is turned on the first of transmission line 136 Hole 172 is also run through and is coupled(It is electrically connected)Second conducting wire 162,166.Wherein, the second conducting wire 162,166 can be with Corresponding first conducting wire 152 is overlapping.In addition, the second conducting wire 160,164 can also be with corresponding first conducting wire 152 There can be the size being substantially the same.
In certain embodiments, the second conducting wire 160,162 is generally aligned in the same plane.Wherein, the second conducting wire 160, 162 metal layer patterning can be formed by same.
In certain embodiments, the second conducting wire 164,166 is generally aligned in the same plane.Wherein, the second conducting wire 160, 162 metal layer patterning can be formed by same.
Then, signal transmission cable architecture 10 forms grounding type co-plane waveguide(grounded coplanar waveguide;GCPW)Framework.
In certain embodiments, other via holes can be set with reference to Fig. 9, signal transmission cable architecture 10(Hereinafter referred to as second Via hole 174,176).
Second via hole 174,176 runs through dielectric layer 112.Each second via hole 174(Or 176)One end coupled transmission lines Road 132(Or 134), and each second via hole 174(Or 176)The other end couple the second conducting wire 164(Or 166).Change speech It, the second via hole 174(Or 176)Turn on transmission line 132(Or 134)With the second conducting wire 164(Or 166).
Then, signal transmission cable architecture 10 forms slot grounding type co-plane waveguide(slotted-grounded coplanar waveguide;slotted GCPW)Framework.Slot(slot)Direction can be parallel transmission-line or be vertically to pass Defeated line intersects for 45 degree of angles.
In certain embodiments, above-mentioned dielectric layer 112 can for by one or multi-channel semiconductor procedures be formed one Layer or multilayer dielectric material.
In certain embodiments, the signal transmission cable architecture 10 of any embodiment can have high-frequency inductor effect according to the present invention Should, to be used as the inductor in high frequency needed for either circuit.
In certain embodiments, the signal transmission cable architecture 10 of any embodiment can be used to transmit two circuits according to the present invention Between signal.
Collocation includes a front stage circuits 20, foregoing any reality with reference to Figure 15 using the electronic device of signal transmission cable architecture Apply the signal transmission cable architecture 10 and late-class circuit 30 of example.
One end coupling front stage circuits 20 of signal transmission cable architecture 10, and after the coupling of the other end of signal transmission cable architecture 10 Level circuit 30.In other words, before one end of the first conducting wire 150,152,154 and transmission line 130,132,134,136 couples Level circuit 20, and the first conducting wire 150,152,154 and the other end coupling rear class electricity of transmission line 130,132,134,136 Road 30.
Wherein, signal transmission cable architecture 10 can provide system conversion function.In other words, front stage circuits 20 and late-class circuit 30 Can have different characteristic impedance or out of phase, and signal transmission cable architecture 10 is used for changing or adjusting its characteristic impedance or phase Position.
For example, collocation is with reference to Figure 16, and front stage circuits 20 have 75 ohm of characteristic impedance, and late-class circuit 30 has 50 ohm of characteristic impedance.At this time, the width D 31 of one end of the first conducting wire 150 coupling front stage circuits 20(Or its section Product)Less than the width D 32 of one end of coupling late-class circuit 30(Or its sectional area).
To sum up, signal transmission cable architecture according to the present invention and its electronic device of application will be transmitted using silicon perforation technology Circuit is formed in a substrate, the required distance between larger signal path and grounding path is provided with enable, and then reduce letter The area of plane of number transmission line structure simultaneously provides preferable component characteristic.Signal transmission cable architecture according to the present invention and its application Electronic device relatively low resistance value, less parasitic capacitance and larger inductance value can be provided, and easily provide required feature Impedance(Such as:50 ohm or 75 ohm etc.).Furthermore signal transmission cable architecture according to the present invention and its electronic device of application It is further able to provide Slow-wave effect(slow wave effects), to reduce desired signal conveying length, and then further reduce Chip area.
For example, by taking the signal transmission cable architecture 10 shown in Fig. 6 as an example, then, the width D 3 of the first conducting wire 150 It is designed as 8 microns, 3 times, the first conducting wire 150 of the width D 3 that the width D 1 of transmission line 130 is the first conducting wire 150 Thickness H3 be 3.4 microns, and between the lower surface of the first conducting wire 150 and the upper surface of transmission line 130 it is absolute away from From for 1.5 microns.Known signal transmission cable architecture is to form two metals corresponded respectively on two surfaces of a dielectric layer Layer.With reference to Figure 17, in characteristic impedance(Z0)Under test, compared to known signal transmission cable architecture(Such as the curve in schema C1), signal transmission cable architecture 10 according to embodiments of the present invention(Such as the curve C2 in schema)With about 70% improvement.Reference Figure 18, in small-signal gain(S21)Under test, compared to known signal transmission cable architecture(Such as the curve C3 in schema), root According to the signal transmission cable architecture 10 of the embodiment of the present invention(Such as the curve C4 in schema)Improve 0.25 decibel(dB)More than, it is provided Compared with the analog signal transmission of no Sun Mao.
Although the invention discloses above-described embodiment, but it is not used for limiting the present invention, the technology of any this area Personnel, without departing from the spirit and scope of the invention, when can make a little change with retouching, therefore the present invention patent protection Scope must be regarded subject to the claim defender appended by this specification.

Claims (10)

1. a kind of electronic device using signal transmission cable architecture, including:
Signal transmission cable architecture, including:
Substrate, has each other relative first surface and the second surface;
Silicon perforation formula groove, forms in the first surface and extends along the first surface, wherein the silicon perforation formula ditch The bottom surface of groove is between the first surface and the second surface;
Conductive materials, fill up the silicon perforation formula groove to form transmission line;
At least one first conducting wire, positioned at the top of the transmission line;And
Dielectric layer, on the first surface and separates at least one first conducting wire and the transmission line;
Front stage circuits, couple one end of the transmission line and one end of at least one first conducting wire;And
Late-class circuit, couples the other end of the transmission line and the other end of at least one first conducting wire;
Wherein, the front stage circuits have different characteristic impedance or out of phase with the late-class circuit, and the signal passes Defeated cable architecture is used to adjust the characteristic impedance or the phase;
Wherein, silicon perforation formula groove is started to extend depth H 1 to second surface from first surface, but not through substrate, wherein, institute Thickness of the depth more than the substrate of half of silicon perforation formula groove is stated, or the depth of the silicon perforation formula groove is more than 5 microns.
2. the electronic device according to claim 1 using signal transmission cable architecture, wherein described at least one first leads The width of one end of electric line is different from the width of the other end of at least one first conducting wire.
3. the electronic device according to claim 1 using signal transmission cable architecture, wherein described at least one first leads Electric line is multiple, and the transmission line structure further includes:
At least one first via hole, through the dielectric layer, one end of each first via hole couples the transmission line, and each the The other end of one via hole couples one among at least one first conducting wire.
4. the electronic device according to claim 3 using signal transmission cable architecture, further includes:
At least one second conducting wire, between the transmission line and first conducting wire, wherein it is described at least One the first via hole runs through and couples at least one second conducting wire.
5. the electronic device according to claim 1 using signal transmission cable architecture, wherein the silicon perforation formula groove Configure the configuration width that width is more than at least one first conducting wire.
6. the electronic device according to claim 1 using signal transmission cable architecture, wherein described at least one first leads The pattern of electric line is identical with least a portion of the pattern of the transmission line.
7. the electronic device according to claim 1 using signal transmission cable architecture, wherein, the transmission line is ground connection Path.
8. the electronic device according to claim 1 using signal transmission cable architecture, wherein, described at least one first leads The one of electric line is grounding path.
9. the electronic device according to claim 1 using signal transmission cable architecture, further includes:
Insulating layer, between the substrate and the transmission line, the transmission line is isolated with the substrate.
10. a kind of signal transmission cable architecture, including:
Substrate, has each other relative first surface and the second surface;
Silicon perforation formula groove, forms in the first surface and extends along the first surface, wherein the silicon perforation formula ditch The bottom surface of groove is between the first surface and the second surface;
Conductive materials, fill up these silicon perforation formula grooves to form transmission line;
At least one first conducting wire, positioned at the top of the transmission line;And
Dielectric layer, on the first surface and separates at least one first conducting wire and the transmission line;
Wherein, silicon perforation formula groove is started to extend depth H 1 to second surface from first surface, but not through substrate, wherein, institute Thickness of the depth more than the substrate of half of silicon perforation formula groove is stated, or the depth of the silicon perforation formula groove is more than 5 microns.
CN201410134385.0A 2014-04-03 2014-04-03 Signal transmission cable architecture and its electronic device of application Active CN104981087B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201410134385.0A CN104981087B (en) 2014-04-03 2014-04-03 Signal transmission cable architecture and its electronic device of application

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201410134385.0A CN104981087B (en) 2014-04-03 2014-04-03 Signal transmission cable architecture and its electronic device of application

Publications (2)

Publication Number Publication Date
CN104981087A CN104981087A (en) 2015-10-14
CN104981087B true CN104981087B (en) 2018-04-13

Family

ID=54277029

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201410134385.0A Active CN104981087B (en) 2014-04-03 2014-04-03 Signal transmission cable architecture and its electronic device of application

Country Status (1)

Country Link
CN (1) CN104981087B (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI645428B (en) * 2016-11-25 2018-12-21 瑞昱半導體股份有限公司 Integrated inductor
US10505245B2 (en) 2018-02-12 2019-12-10 International Business Machines Corporation Microwave attenuators on high-thermal conductivity substrates for quantum applications
US10601096B2 (en) 2018-02-12 2020-03-24 International Business Machines Corporation Reduced thermal resistance attenuator on high-thermal conductivity substrates for quantum applications

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1829414A (en) * 2005-03-03 2006-09-06 日本电气株式会社 Transmission line and wiring forming method

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100773165B1 (en) * 1999-12-24 2007-11-02 가부시키가이샤 에바라 세이사꾸쇼 Semiconductor wafer processing apparatus and processing method
JP4050631B2 (en) * 2003-02-21 2008-02-20 株式会社ルネサステクノロジ Manufacturing method of electronic device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1829414A (en) * 2005-03-03 2006-09-06 日本电气株式会社 Transmission line and wiring forming method

Also Published As

Publication number Publication date
CN104981087A (en) 2015-10-14

Similar Documents

Publication Publication Date Title
JP6000317B2 (en) Semiconductor device
CN107004938B (en) Millimeter wave duplexer, construction millimeter wave duplexer and biobelt signal duplex method
US10164310B2 (en) High-frequency transmission line
US9843085B2 (en) Directional coupler
JP6013298B2 (en) High frequency transmission line
WO2007046271A1 (en) Vertical signal path, printed board provided with such vertical signal path, and semiconductor package provided with such printed board and semiconductor element
WO2010150588A1 (en) Signal transmission line
US8106721B2 (en) Multilayer complementary-conducting-strip transmission line structure with plural interlaced signal lines and mesh ground planes
CN104981087B (en) Signal transmission cable architecture and its electronic device of application
CN106532212A (en) Radio-frequency vertical transition structure based on ceramic microstrip line
CN107819177A (en) Flexible the high frequency flat wire and its device of multilayer co-planar waveguide thin type structure
JP5922604B2 (en) Multilayer wiring board
TWI492543B (en) Monolithic power splitter for differenital signal
JP2008205099A (en) Multilayer wiring board
TWI394507B (en) Complementary-conducting-strip coupled line
JP4243443B2 (en) Balun transformer
TWI533500B (en) Transmission-line structure and electronic device using the same
JP6013296B2 (en) High frequency transmission line
CN103796424B (en) A kind of multilayer circuit board and its impedance adjustment
KR20150025706A (en) Structure of a slow-wave microstrip line with high Q factor and a shorter wavelength
KR101515854B1 (en) Wideband coupler
JP4471281B2 (en) Multilayer high frequency circuit board
JP2004350143A (en) Balun transformer
US20110241803A1 (en) Signal transmission line
JP5455703B2 (en) High frequency transmission structure and antenna using the same

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant