CN104980042A - Low-noise high-frequency converter based on surging current limitation - Google Patents

Low-noise high-frequency converter based on surging current limitation Download PDF

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Publication number
CN104980042A
CN104980042A CN201510325351.4A CN201510325351A CN104980042A CN 104980042 A CN104980042 A CN 104980042A CN 201510325351 A CN201510325351 A CN 201510325351A CN 104980042 A CN104980042 A CN 104980042A
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Prior art keywords
triode
resistance
pole
circuit
collector electrode
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CN201510325351.4A
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Chinese (zh)
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雷明方
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Chengdu Jiesheng Technology Co Ltd
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Chengdu Jiesheng Technology Co Ltd
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Priority to CN201510325351.4A priority Critical patent/CN104980042A/en
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M5/00Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases
    • H02M5/02Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc
    • H02M5/04Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters
    • H02M5/22Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M5/275Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M5/293Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/0045Converters combining the concepts of switch-mode regulation and linear regulation, e.g. linear pre-regulator to switching converter, linear and switching converter in parallel, same converter or same transistor operating either in linear or switching mode

Abstract

The invention discloses a low-noise high-frequency converter based on surging current limitation. The low-noise high-frequency converter comprises a transformer T1, a transformer T2, a mixer circuit connected with the secondary side of the transformer T1, a first conversion circuit connected with the mixer circuit, a processing circuit connected with the mixer circuit and the first conversion circuit simultaneously, a second conversion circuit connected with the output end of the processing circuit, a surge current limiting circuit arranged between the primary side of the transformer T1 and the mixer circuit as well as a linear drive circuit connected with the surge current limiting circuit. The primary side of the transformer T2 is connected with the second conversion circuit; the surge current limiting circuit comprises a PDP type darlington transistor Q1, a PDP type darlington transistor Q2, a triode VT8, an inductor L and the like. By adopting the surge current limiting circuit, the low-noise high-frequency converter based on surging current limitation can limit the current of the high frequency converter and can keep the current at the lowest effective value, so that noises generated during the operation of the high frequency converter are reduced.

Description

A kind of low noise high-frequency converter based on surge current restriction
Technical field
The present invention relates to electronic applications, specifically refer to a kind of low noise high-frequency converter based on surge current restriction.
Background technology
Along with the development of electric circuit electronics technical technology, converter has been applied in all trades and professions.Meanwhile, along with industrial development is constantly accelerated, production equipment also continuous renewal, to meet the Production requirement of people.But the instability of electric current causes noise excessive when existing converter works under high frequency environment, the occasion of some low noise requirements cannot be met.
Summary of the invention
The object of the invention is to overcome the instability of electric current when existing converter works under high frequency environment causes noise excessive, provides a kind of low noise high-frequency converter.
Object of the present invention is achieved through the following technical solutions: a kind of low noise high-frequency converter based on surge current restriction, by transformer T1, transformer T2, the mixting circuit be connected with transformer T1 secondary, the first change-over circuit be connected with mixting circuit, the treatment circuit be simultaneously connected with the first change-over circuit with mixting circuit, at the second change-over circuit that the output for the treatment of circuit is connected, between the former limit of transformer T1 and mixting circuit, be also provided with ICLC, and the linear drive circuit be connected with ICLC forms.The former limit of described transformer T2 is connected with the second change-over circuit, described ICLC is by PDP type Islington pipe Q1, PDP type Islington pipe Q2, triode VT8, inductance L, P pole is in turn through voltage stabilizing didoe D4, polar capacitor C13, resistance R22, be connected with the collector electrode of triode VT8 after variable resistor R23, N pole is in turn through diode D5, the voltage stabilizing didoe D3 be connected with the emitter of triode VT8 after adjustable resistance R21, positive pole is connected with the collector electrode of triode VT8, the polar capacitor C14 that negative pole is connected with the base stage of triode VT8 after resistance R15, one end is connected with the negative pole of polar capacitor C14, the resistance R14 that the other end is connected with the N pole of voltage stabilizing didoe D3, positive pole is connected with the tie point of the collector electrode of triode VT8 with resistance R21 after resistance R18, the polar capacitor C10 of minus earth, N pole is connected with the collector electrode of triode VT8, P pole is in turn through resistance R19, the voltage stabilizing didoe D6 be connected with the emitter of PDP type Islington pipe Q1 after polar capacitor C11, negative pole is connected with the base stage of PDP type Islington pipe Q1, the polar capacitor C12 that positive pole is connected with the collector electrode of PDP type Islington pipe Q2 after thermistor R20, and P pole is in turn through resistance R17, be connected with the tie point of adjustable resistance R21 with diode D5 after resistance R16, the diode D7 that N pole is connected with non-same polarity with transformer T1 former limit Same Name of Ends after the tie point of polar capacitor C11 through resistance R19 forms, described inductance L is serially connected in P pole and the two ends, N pole of diode D7, described diode D7 is connected with the tie point of diode D4 with polar capacitor C13 with the tie point of resistance R17, the base stage of described PDP type Islington pipe Q2 is connected with the P pole of diode D6, its grounded emitter, the collector electrode of described PDP type Islington pipe Q1 is connected with mixting circuit with the collector electrode of triode VT8 respectively, polar capacitor C13 is connected with linear drive circuit with the tie point of resistance R22.
Described linear drive circuit is by driving chip U, triode VT4, triode VT5, triode VT6, triode VT7, positive pole is as circuit input end, the polar capacitor C7 that negative pole is connected with the IN1 pin of driving chip U after resistance R7, one end is connected with the collector electrode of triode VT4, the resistance R8 that the other end is connected with the base stage of triode VT6 after resistance R9, positive pole is connected with the base stage of triode VT4, the polar capacitor C9 that negative pole is connected with the IN1 pin of driving chip U, positive pole is connected with the IN2 pin of driving chip U, the polar capacitor C8 of minus earth, one end is connected with the emitter of triode VT4, the resistance R11 that the other end is connected with the base stage of triode VT5, one end is connected with the base stage of triode VT5, the resistance R10 that the other end is connected with the base stage of triode VT6, N pole is connected with the collector electrode of triode VT4, the diode D1 that P pole is connected with the collector electrode of triode VT5, positive terminal is connected with the collector electrode of triode VT4, the not gate K that end of oppisite phase is connected with triode VT7 collector electrode, one end is connected with triode VT7 emitter, the resistance R13 that the other end is connected with the emitter of triode VT6 after resistance R12, and the end of oppisite phase of P pole NAND gate K is connected, the diode D2 that N pole is connected with the tie point of resistance R13 with resistance R12 forms, the VCC pin of described driving chip U is connected with the base stage of triode VT4, END pin ground connection, OUT pin are connected with the collector electrode of triode VT5, the collector electrode of triode VT5 is also connected with the base stage of triode VT7, its emitter is connected with the base stage of triode man VT6, the grounded collector of triode VT6, the N pole of diode D2 is connected with the tie point of resistance R22 with polar capacitor C13.
Described mixting circuit is by dual-gate field-effect pipe Q, crystal oscillator X, resistance R1, resistance R3, and inductance L 1 forms; One end of resistance R1 is connected with a grid of dual-gate field-effect pipe Q, the other end is connected with the collector electrode of PDP type Islington pipe Q1, one end of crystal oscillator X is connected with a grid of field effect transistor Q, the other end is connected with the drain electrode of field effect transistor Q, the drain electrode that one end of inductance L 1 is connected with the drain electrode of field effect transistor Q, the other end gets back to field effect transistor Q after resistance R3; The tie point of resistance R3 and inductance L 1 is connected with the first change-over circuit with treatment circuit simultaneously, the b grid of field effect transistor Q is connected with transformer T1 secondary non-same polarity, drain be connected with treatment circuit, source electrode is connected with the first change-over circuit.
The first described change-over circuit is by triode VT2, the resistance R2 that one end is connected with the emitter of triode VT2, the other end is connected with the source electrode of dual-gate field-effect pipe Q, the electric capacity C1 be in parallel with resistance R2, the electric capacity C1 that negative pole is connected with the tie point of inductance L 1 with resistance R3, positive pole is connected with the collector electrode of triode VT2 forms; The base stage of described triode VT2 is connected with the non-same polarity on the former limit of transformer T1, and its emitter is connected with treatment circuit.
Described treatment circuit is by triode VT1, triode VT3, the resistance R4 that one end is connected with the base stage of triode VT3, the other end is connected with the emitter of triode VT2, the resistance R5 that one end is connected with the emitter of triode VT3, the other end is connected with emitter and second change-over circuit of triode VT2 simultaneously forms; The base stage of described triode VT3 is connected with the emitter of triode VT1, its collector electrode is connected with the Same Name of Ends on the former limit of transformer T2, emitter is connected with the second change-over circuit, and the base stage of triode VT1 is connected with the tie point of inductance L 1 with resistance R3, its collector electrode is connected with the drain electrode of field effect transistor Q and the second change-over circuit simultaneously.
The second described change-over circuit comprises electric capacity C6, electric capacity C5, electric capacity C4, electric capacity C3, resistance R6; The positive pole of electric capacity C6 is connected with transformer T2 former limit Same Name of Ends, its negative pole is connected with the collector electrode of triode VT1, the positive pole of electric capacity C5 is connected with non-same polarity with the Same Name of Ends on the former limit of transformer T2 respectively with negative pole, the positive pole of electric capacity C4 is connected with the emitter of triode VT3, negative pole is connected with the non-same polarity on the former limit of transformer T2, and the positive pole of electric capacity C3 is connected with the emitter of triode VT2, its negative pole is then connected with the negative pole of electric capacity C4 after resistance R6; The negative pole of electric capacity C3 is also connected with external voltage, described transformer T1 secondary Same Name of Ends ground connection, and the Same Name of Ends ground connection of transformer T2 secondary, non-same polarity are as signal output part.
Described driving chip U is LM387 integrated chip.
The present invention comparatively prior art compares, and has the following advantages and beneficial effect:
(1), the present invention can put forward the operating frequency of high-frequency converter greatly, can meet the work requirements of present novel device.
(2), the present invention adopts ICLC, can limit high-frequency converter electric current, make its electric current remain on lowest effective value, thus reduces noise when high-frequency converter works long hours.
(3), the present invention adopts the design of dual-gate field-effect pipe, makes converter work more stable.
(4), the present invention adopts linear drive circuit, the noise that when converter can be made to work under high frequency operating mode, generation is very little, the occasion that some low noises of foot require.
Accompanying drawing explanation
Fig. 1 is integrated circuit figure of the present invention.
Fig. 2 is the integrated circuit figure of linear drive circuit of the present invention.
Embodiment
Below in conjunction with embodiment, the present invention is described in further detail, but embodiments of the present invention are not limited thereto.
Embodiment
As shown in Figure 1, low noise high-frequency converter of the present invention, by transformer T1, transformer T2, the mixting circuit be connected with transformer T1 secondary, the first change-over circuit be connected with mixting circuit, the treatment circuit be simultaneously connected with the first change-over circuit with mixting circuit, at the second change-over circuit that treatment circuit phase output terminal is connected; Be arranged on the ICLC between the former limit of transformer T1 and mixting circuit, and the linear drive circuit be connected with ICLC forms.The former limit of described transformer T2 is connected with the second change-over circuit.
Described ICLC is by PDP type Islington pipe Q1, PDP type Islington pipe Q2, triode VT8, inductance L, resistance R14, resistance R15, resistance R16, resistance R17, resistance R18, resistance R19, thermistor R20, resistance R21, resistance R22, resistance R23, polar capacitor C10, polar capacitor C11, polar capacitor C12, polar capacitor C13, polar capacitor C14, voltage stabilizing didoe D3, voltage stabilizing didoe D4, diode D5, voltage stabilizing didoe D6, and diode D7 forms.
During enforcement, the P pole of voltage stabilizing didoe D3 is connected with the collector electrode of triode VT8 in turn after voltage stabilizing didoe D4, polar capacitor C13, resistance R22, variable resistor R23, N pole is connected with the emitter of triode VT8 in turn after diode D5, adjustable resistance R21.The positive pole of polar capacitor C14 is connected with the collector electrode of triode VT8, negative pole is connected with the base stage of triode VT8 after resistance R15.One end of resistance R14 is connected with the negative pole of polar capacitor C14, the other end is connected with the N pole of voltage stabilizing didoe D3.The positive pole of polar capacitor C10 is connected with the tie point of the collector electrode of triode VT8 with resistance R21 after resistance R18, minus earth.
Wherein, the N pole of voltage stabilizing didoe D6 is connected with the collector electrode of triode VT8, P pole is connected with the emitter of PDP type Islington pipe Q1 in turn after resistance R19, polar capacitor C11.The negative pole of polar capacitor C12 is connected with the base stage of PDP type Islington pipe Q1, positive pole is connected with the collector electrode of PDP type Islington pipe Q2 after thermistor R20.And the P pole of diode D7 is connected with the tie point of adjustable resistance R21 with diode D5 in turn after resistance R17, resistance R16, N pole is connected with non-same polarity with transformer T1 former limit Same Name of Ends after the tie point of polar capacitor C11 through resistance R19.
Described inductance L is serially connected in P pole and the two ends, N pole of diode D7; Described diode D7 is connected with the tie point of diode D4 with polar capacitor C13 with the tie point of resistance R17; The base stage of described PDP type Islington pipe Q2 is connected with the P pole of diode D6, its grounded emitter; The collector electrode of described PDP type Islington pipe Q1 is connected with mixting circuit with the collector electrode of triode VT8 respectively; Polar capacitor C13 is connected with linear drive circuit with the tie point of resistance R22;
In order to better implement the present invention, the variable resistor R23 in this circuit preferentially adopts Metal Oxide Varistor, its variable value scope 5 Ω ~ 25 Ω; Thermistor R20 then adopts negative tempperature coefficient thermistor, starts unrestrained galvanization for limiting.
As shown in Figure 2, described linear drive circuit by driving chip U, triode VT4, triode VT5, triode VT6, triode VT7, resistance R7, resistance R8, resistance R9, resistance R10, resistance R11, resistance R12, resistance R13, polar capacitor C7, polar capacitor C18, polar capacitor C9, diode D1, diode D2, and not gate K forms.
During connection, the positive pole of polar capacitor C7 is connected with the IN1 pin of driving chip U after resistance R7 as circuit input end, negative pole.One end of resistance R8 is connected with the collector electrode of triode VT4, the other end is connected with the base stage of triode VT6 after resistance R9.The positive pole of polar capacitor C9 is connected with the base stage of triode VT4, negative pole is connected with the IN1 pin of driving chip U.The positive pole of polar capacitor C8 is connected with the IN2 pin of driving chip U, minus earth.One end of resistance R11 is connected with the emitter of triode VT4, the other end is connected with the base stage of triode VT5.One end of resistance R10 is connected with the base stage of triode VT5, the other end is connected with the base stage of triode VT6.
Wherein, the N pole of diode D1 is connected with the collector electrode of triode VT4, P pole is connected with the collector electrode of triode VT5.The positive terminal of not gate K is connected with the collector electrode of triode VT4, end of oppisite phase is connected with triode VT7 collector electrode.One end of resistance R13 is connected with triode VT7 emitter, the other end is connected with the emitter of triode VT6 after resistance R12.The end of oppisite phase of the P pole NAND gate K of diode D2 is connected, N pole is connected with the tie point of resistance R13 with resistance R12.
The VCC pin of described driving chip U is connected with the base stage of triode VT4, END pin ground connection, OUT pin are connected with the collector electrode of triode VT5, the collector electrode of triode VT5 is also connected with the base stage of triode VT7, its emitter is connected with the base stage of triode man VT6, the grounded collector of triode VT6, the N pole of diode D2 is connected with the tie point of resistance R22 with polar capacitor C13 with the N pole of diode D2.
Linear drive circuit in the present invention, produces very little noise when converter can be made to work under high frequency operating mode, the occasion that some low noises of foot require.
In order to ensure implementation result, described driving chip U is preferably LM387 integrated chip, its highly sensitive and low price.
Described mixting circuit is by dual-gate field-effect pipe Q, crystal oscillator X, resistance R1, resistance R3, and inductance L 1 forms.
During connection, one end of resistance R1 is connected with a grid of dual-gate field-effect pipe Q, the other end is connected with the collector electrode of PDP type Islington pipe Q1, one end of crystal oscillator X is connected with a grid of field effect transistor Q, the other end is connected with the drain electrode of field effect transistor Q, the drain electrode that one end of inductance L 1 is connected with the drain electrode of field effect transistor Q, the other end gets back to field effect transistor Q after resistance R3.
The tie point of described resistance R3 and inductance L 1 is connected with the first change-over circuit with treatment circuit simultaneously, the b grid of field effect transistor Q is connected with transformer T1 secondary non-same polarity, drain be connected with treatment circuit, source electrode is connected with the first change-over circuit.
The first described change-over circuit is by triode VT2, the resistance R2 that one end is connected with the emitter of triode VT2, the other end is connected with the source electrode of dual-gate field-effect pipe Q, the electric capacity C1 be in parallel with resistance R2, the electric capacity C1 that negative pole is connected with the tie point of inductance L 1 with resistance R3, positive pole is connected with the collector electrode of triode VT2 forms.
The base stage of described triode VT2 is connected with the non-same polarity on the former limit of transformer T1, and its emitter is connected with treatment circuit.
Described treatment circuit by triode VT1, triode VT3, resistance R4, and resistance R5 forms.
One end of resistance R4 is connected with the base stage of triode VT3, the other end is connected with the emitter of triode VT2.One end of resistance R5 is connected with the emitter of triode VT3, the other end is connected with the emitter of triode VT2 and the second change-over circuit simultaneously.
The base stage of described triode VT3 is connected with the emitter of triode VT1, its collector electrode is connected with the Same Name of Ends on the former limit of transformer T2, emitter is connected with the second change-over circuit, and the base stage of triode VT1 is connected with the tie point of inductance L 1 with resistance R3, its collector electrode is connected with the drain electrode of field effect transistor Q and the second change-over circuit simultaneously.
The second described change-over circuit comprises electric capacity C6, electric capacity C5, electric capacity C4, electric capacity C3, and resistance R6 forms.
During connection, the positive pole of electric capacity C6 is connected with transformer T2 former limit Same Name of Ends, its negative pole is connected with the collector electrode of triode VT1, the positive pole of electric capacity C5 is connected with non-same polarity with the Same Name of Ends on the former limit of transformer T2 respectively with negative pole, the positive pole of electric capacity C4 is connected with the emitter of triode VT3, negative pole is connected with the non-same polarity on the former limit of transformer T2, and the positive pole of electric capacity C3 is connected with the emitter of triode VT2, its negative pole is then connected with the negative pole of electric capacity C4 after resistance R6; The negative pole of electric capacity C3 is also connected with external voltage.
Described transformer T1 secondary Same Name of Ends ground connection, the Same Name of Ends ground connection of transformer T2 secondary, non-same polarity are as signal output part.
As mentioned above, just the present invention can well be realized.

Claims (6)

1. the low noise high-frequency converter based on surge current restriction, by transformer T1, transformer T2, the mixting circuit be connected with transformer T1 secondary, the first change-over circuit be connected with mixting circuit, the treatment circuit be simultaneously connected with the first change-over circuit with mixting circuit, and the second change-over circuit be connected with the output for the treatment of circuit forms, it is characterized in that: between the former limit of transformer T1 and mixting circuit, be also provided with ICLC, and the linear drive circuit be connected with ICLC, the former limit of described transformer T2 is connected with the second change-over circuit, described ICLC is by PDP type Islington pipe Q1, PDP type Islington pipe Q2, triode VT8, inductance L, P pole is in turn through voltage stabilizing didoe D4, polar capacitor C13, resistance R22, be connected with the collector electrode of triode VT8 after variable resistor R23, N pole is in turn through diode D5, the voltage stabilizing didoe D3 be connected with the emitter of triode VT8 after adjustable resistance R21, positive pole is connected with the collector electrode of triode VT8, the polar capacitor C14 that negative pole is connected with the base stage of triode VT8 after resistance R15, one end is connected with the negative pole of polar capacitor C14, the resistance R14 that the other end is connected with the N pole of voltage stabilizing didoe D3, positive pole is connected with the tie point of the collector electrode of triode VT8 with resistance R21 after resistance R18, the polar capacitor C10 of minus earth, N pole is connected with the collector electrode of triode VT8, P pole is in turn through resistance R19, the voltage stabilizing didoe D6 be connected with the emitter of PDP type Islington pipe Q1 after polar capacitor C11, negative pole is connected with the base stage of PDP type Islington pipe Q1, the polar capacitor C12 that positive pole is connected with the collector electrode of PDP type Islington pipe Q2 after thermistor R20, and P pole is in turn through resistance R17, be connected with the tie point of adjustable resistance R21 with diode D5 after resistance R16, the diode D7 that N pole is connected with non-same polarity with transformer T1 former limit Same Name of Ends after the tie point of polar capacitor C11 through resistance R19 forms, described inductance L is serially connected in P pole and the two ends, N pole of diode D7, described diode D7 is connected with the tie point of diode D4 with polar capacitor C13 with the tie point of resistance R17, the base stage of described PDP type Islington pipe Q2 is connected with the P pole of diode D6, its grounded emitter, the collector electrode of described PDP type Islington pipe Q1 is connected with mixting circuit with the collector electrode of triode VT8 respectively, polar capacitor C13 is connected with linear drive circuit with the tie point of resistance R22,
Described linear drive circuit is by driving chip U, triode VT4, triode VT5, triode VT6, triode VT7, positive pole is as circuit input end, the polar capacitor C7 that negative pole is connected with the IN1 pin of driving chip U after resistance R7, one end is connected with the collector electrode of triode VT4, the resistance R8 that the other end is connected with the base stage of triode VT6 after resistance R9, positive pole is connected with the base stage of triode VT4, the polar capacitor C9 that negative pole is connected with the IN1 pin of driving chip U, positive pole is connected with the IN2 pin of driving chip U, the polar capacitor C8 of minus earth, one end is connected with the emitter of triode VT4, the resistance R11 that the other end is connected with the base stage of triode VT5, one end is connected with the base stage of triode VT5, the resistance R10 that the other end is connected with the base stage of triode VT6, N pole is connected with the collector electrode of triode VT4, the diode D1 that P pole is connected with the collector electrode of triode VT5, positive terminal is connected with the collector electrode of triode VT4, the not gate K that end of oppisite phase is connected with triode VT7 collector electrode, one end is connected with triode VT7 emitter, the resistance R13 that the other end is connected with the emitter of triode VT6 after resistance R12, and the end of oppisite phase of P pole NAND gate K is connected, the diode D2 that N pole is connected with the tie point of resistance R13 with resistance R12 forms, the VCC pin of described driving chip U is connected with the base stage of triode VT4, END pin ground connection, OUT pin are connected with the collector electrode of triode VT5, the collector electrode of triode VT5 is also connected with the base stage of triode VT7, its emitter is connected with the base stage of triode man VT6, the grounded collector of triode VT6, the N pole of diode D2 is connected with the tie point of resistance R22 with polar capacitor C13.
2. a kind of low noise high-frequency converter based on surge current restriction according to claim 1, is characterized in that: described mixting circuit is by dual-gate field-effect pipe Q, crystal oscillator X, resistance R1, resistance R3, and inductance L 1 forms; One end of resistance R1 is connected with a grid of dual-gate field-effect pipe Q, the other end is connected with the collector electrode of PDP type Islington pipe Q1, one end of crystal oscillator X is connected with a grid of field effect transistor Q, the other end is connected with the drain electrode of field effect transistor Q, the drain electrode that one end of inductance L 1 is connected with the drain electrode of field effect transistor Q, the other end gets back to field effect transistor Q after resistance R3; The tie point of resistance R3 and inductance L 1 is connected with the first change-over circuit with treatment circuit simultaneously, the b grid of field effect transistor Q is connected with transformer T1 secondary non-same polarity, drain be connected with treatment circuit, source electrode is connected with the first change-over circuit.
3. a kind of low noise high-frequency converter based on surge current restriction according to claim 2, it is characterized in that: the first described change-over circuit is by triode VT2, the resistance R2 that one end is connected with the emitter of triode VT2, the other end is connected with the source electrode of dual-gate field-effect pipe Q, the electric capacity C1 be in parallel with resistance R2, the electric capacity C1 that negative pole is connected with the tie point of inductance L 1 with resistance R3, positive pole is connected with the collector electrode of triode VT2 forms; The base stage of described triode VT2 is connected with the non-same polarity on the former limit of transformer T1, and its emitter is connected with treatment circuit.
4. a kind of low noise high-frequency converter based on surge current restriction according to claim 3, it is characterized in that: described treatment circuit is by triode VT1, triode VT3, the resistance R4 that one end is connected with the base stage of triode VT3, the other end is connected with the emitter of triode VT2, the resistance R5 that one end is connected with the emitter of triode VT3, the other end is connected with emitter and second change-over circuit of triode VT2 simultaneously forms; The base stage of described triode VT3 is connected with the emitter of triode VT1, its collector electrode is connected with the Same Name of Ends on the former limit of transformer T2, emitter is connected with the second change-over circuit, and the base stage of triode VT1 is connected with the tie point of inductance L 1 with resistance R3, its collector electrode is connected with the drain electrode of field effect transistor Q and the second change-over circuit simultaneously.
5. a kind of low noise high-frequency converter based on surge current restriction according to claim 4, is characterized in that: the second described change-over circuit comprises electric capacity C6, electric capacity C5, electric capacity C4, electric capacity C3, resistance R6; The positive pole of electric capacity C6 is connected with transformer T2 former limit Same Name of Ends, its negative pole is connected with the collector electrode of triode VT1, the positive pole of electric capacity C5 is connected with non-same polarity with the Same Name of Ends on the former limit of transformer T2 respectively with negative pole, the positive pole of electric capacity C4 is connected with the emitter of triode VT3, negative pole is connected with the non-same polarity on the former limit of transformer T2, and the positive pole of electric capacity C3 is connected with the emitter of triode VT2, its negative pole is then connected with the negative pole of electric capacity C4 after resistance R6; The negative pole of electric capacity C3 is also connected with external voltage, described transformer T1 secondary Same Name of Ends ground connection, and the Same Name of Ends ground connection of transformer T2 secondary, non-same polarity are as signal output part.
6. a kind of low noise high-frequency converter based on surge current restriction according to any one of Claims 1 to 5, is characterized in that: described driving chip U is LM387 integrated chip.
CN201510325351.4A 2014-11-29 2015-06-14 Low-noise high-frequency converter based on surging current limitation Withdrawn CN104980042A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201510325351.4A CN104980042A (en) 2014-11-29 2015-06-14 Low-noise high-frequency converter based on surging current limitation

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CN2014107145124 2014-11-29
CN201410714512.4A CN104467447A (en) 2014-11-29 2014-11-29 Low-noise high-frequency converter
CN201510325351.4A CN104980042A (en) 2014-11-29 2015-06-14 Low-noise high-frequency converter based on surging current limitation

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109802573A (en) * 2019-01-30 2019-05-24 西安微电子技术研究所 A kind of current source PWM controller and Magnetic isolation feedback driving circuit and DC/DC converter based on it

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109802573A (en) * 2019-01-30 2019-05-24 西安微电子技术研究所 A kind of current source PWM controller and Magnetic isolation feedback driving circuit and DC/DC converter based on it
CN109802573B (en) * 2019-01-30 2020-04-17 西安微电子技术研究所 Magnetic isolation feedback drive circuit based on current type pulse width modulation controller and DC/DC converter

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Application publication date: 20151014