CN104979354B - A kind of structure of ETOX NOR-types flash memory and preparation method thereof - Google Patents
A kind of structure of ETOX NOR-types flash memory and preparation method thereof Download PDFInfo
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Abstract
The invention discloses a kind of structure of ETOX NOR-types flash memory and preparation method thereof, wherein, the structure of ETOX NOR-type flash memories includes：P type substrate；Deep n-type well region and P type trap zone in the P type substrate, wherein, the P type trap zone is located on the deep n-type well region；First groove in the P type trap zone；Surface channel layer in the P type trap zone, and lining the first groove inwall and be covered in the surface channel layer surface tunnel oxidation layer；Floating boom on the tunnel oxidation layer and the active area under the tunnel oxidation layer；And the inter polysilicon dielectric layer on the floating boom and the control gate on the inter polysilicon dielectric layer.The present invention can make the width micro of floating boom in the case of the channel length for ensureing memory cell is sufficiently long, so as to so that ETOX NOR-types flash memory can be below micro to 45nm nodes.
Description
Technical field
The present invention relates to technical field of semiconductors, more particularly to a kind of structure of ETOX NOR-types flash memory and its making side
Method.
Background technology
ETOX（EPROM with Tunnel Oxide or Erasable Programmable Read Only
Memory with Tunnel Oxide, erasable programmable read-only register tunnel oxidation layer）NOR（It is or non-）Type flash memory belongs to
A kind of non-volatile flash memory, be characterized in that application program directly can be run in flash memory, it is not necessary to again code read system with
In machine memory, so as to make it have higher efficiency of transmission, therefore, the application of the type flash memory is than wide.
At present, for ETOX NOR-type flash memories, most advanced processing procedure is 45nm nodes, and reason is due to ETOX NOR-type flash memories
Writing mechanism be HCI（Hot Carrier Injection, hot carrier in jection）Effect, but HCI effects need corresponding device
Raceway groove long enough to ensure that source-drain electrode is not short-circuit, while need the enough electric fields of electron to accelerate to improve the energy of electronics
Amount, so to make the micro of ETOX NOR-type flash memories largely be limited to channel length below 45nm nodes.
Fig. 1 is the schematic cross-section of the structure of the ETOX NOR-type flash memories of prior art.In the prior art, such as Fig. 1 institutes
Show, floating boom（Floating Gate）16 are located at formation in P type trap zone（P-Well）The top of surface channel layer 14 in 13, two
Tunnel oxidation layer between person be present（Tunnel Oxide）15, and tunnel oxidation layer 15 and floating boom 16 are planar structure.Should
The ETOX NOR-types flash memory of structure can normal work, it is necessary to the channel length of corresponding memory cell（Under this planar structure,
The channel length of memory cell is equal to the width of its floating boom）100nm is have to be larger than, i.e. the width of floating boom must be also greater than
100nm, therefore, the dimension limitation of this channel length ETOX NOR-types flash memory can only micro to 45nm nodes, and can not be after
Below continuous micro to 45nm nodes.
The content of the invention
In view of this, the embodiment of the present invention provides a kind of structure of ETOX NOR-types flash memory and preparation method thereof, is ensureing
In the case of the channel length of memory cell is sufficiently long accordingly, solving ETOXNOR types flash memory in the prior art can not continue
Technical problem below micro to 45nm nodes.
In a first aspect, the embodiments of the invention provide a kind of structure of ETOX NOR-types flash memory, including：
P type substrate；
Deep n-type well region and P type trap zone in the P type substrate, wherein, the P type trap zone is located at the deep n-type trap
Qu Shang；
First groove in the P type trap zone；
Surface channel layer in the P type trap zone, and lining the first groove inwall and be covered in described
The tunnel oxidation layer on the surface of surface channel layer；
Floating boom on the tunnel oxidation layer and the active area under the tunnel oxidation layer；And
Inter polysilicon dielectric layer on the floating boom and the control gate on the inter polysilicon dielectric layer.
Further, the depth of the first groove is 500 angstroms to 2000 angstroms.
Further, the P type substrate is P-type silicon substrate.
Further, the material of the tunnel oxidation layer is silica.
Second aspect, the embodiment of the present invention additionally provide a kind of preparation method of the structure of ETOX NOR-types flash memory, including：
One P type substrate is provided；
Deep n-type well region and P type trap zone are sequentially formed in the P type substrate, wherein, the P type trap zone is in the deep n-type
On well region；
The P type trap zone is performed etching, forms first groove；
Surface channel layer is formed in the P type trap zone, then forms tunnel oxidation layer, wherein, the tunnel oxidation layer
Serve as a contrast the first groove inwall and be covered in the surface of the surface channel layer；
Floating boom is formed on the tunnel oxidation layer successively and forms active area under the tunnel oxidation layer；And
Inter polysilicon dielectric layer and control gate are sequentially formed on the floating gate.
Further, the P type trap zone is performed etching, forms first groove, including：
Photoresist layer is formed in the P type trap zone；
Photoetching, exposed portion P type trap zone are carried out to the photoresist layer；
The part P type trap zone exposed is performed etching, forms first groove；
Remove the photoresist layer.
Further, the depth of the first groove is 500 angstroms to 2000 angstroms.
Further, the P type substrate is P-type silicon substrate.
Further, the material of the tunnel oxidation layer is silica.
Structure of ETOX NOR-types flash memory provided in an embodiment of the present invention and preparation method thereof, passes through the shape in P type trap zone
First groove is filled into first groove, and with the tunnel oxidation layer and floating boom that are subsequently formed so that tunnel oxidation layer and floating
Grid form the stereochemical structure different from the planar structure of prior art, and cause memory cell corresponding with the stereochemical structure
Channel length the depth sum of first groove is embedded to determine by width and the floating boom of the floating boom of memory cell, so ensureing
In the case of the channel length of memory cell is sufficiently long, the width of the floating boom of memory cell can be reduced, make the width of floating boom micro-
Contracting, so as to so that ETOXNOR types flash memory can be below micro to 45nm nodes.
Brief description of the drawings
By reading the detailed description made to non-limiting example made with reference to the following drawings, of the invention is other
Feature, objects and advantages will become more apparent upon：
Fig. 1 is the schematic cross-section of the structure of the ETOX NOR-type flash memories of prior art；
Fig. 2 is a kind of schematic cross-section of the structure of ETOX NOR-types flash memory of the embodiment of the present invention one；
Fig. 3 is the flow chart of the preparation method of the structure of the ETOX NOR-type flash memories of the embodiment of the present invention two；
Fig. 4 a- Fig. 4 f are that each stage of the preparation method of the structure of the ETOX NOR-type flash memories of the embodiment of the present invention two is corresponding
Structure schematic cross-section；
Fig. 5 a- Fig. 5 c are the schematic cross-sections for realizing structure corresponding to step S303 each stage in Fig. 3.
The technical characteristic that reference in figure refers to respectively is：
11st, P type substrate；12nd, deep n-type well region；13rd, P type trap zone；14th, surface channel layer；15th, tunnel oxidation layer；16th, float
Grid；17th, inter polysilicon dielectric layer；18th, control gate；
21st, P type substrate；22nd, deep n-type well region；23rd, P type trap zone；24th, surface channel layer；25th, tunnel oxidation layer；26th, float
Grid；27th, inter polysilicon dielectric layer；28th, control gate；A, first groove；
41st, P type substrate；42nd, deep n-type well region；43rd, P type trap zone；44th, surface channel layer；45th, tunnel oxidation layer；46th, float
Grid；47th, inter polysilicon dielectric layer；48th, control gate；B, first groove；
51st, photoresist layer.
Embodiment
The present invention is described in further detail with reference to the accompanying drawings and examples.It is understood that this place is retouched
The specific embodiment stated is used only for explaining the present invention, rather than limitation of the invention.It also should be noted that in order to just
Part related to the present invention rather than full content are illustrate only in description, accompanying drawing.
Embodiment one
The embodiment of the present invention one provides a kind of structure of ETOX NOR-types flash memory.Fig. 2 is one kind of the embodiment of the present invention one
The schematic cross-section of the structure of ETOX NOR-type flash memories.As shown in Fig. 2 the structure of the ETOX NOR-types flash memory includes：P-type serves as a contrast
Bottom（P-Substrate）21；Deep n-type well region in the P type substrate 21（Deep N-Well）22 and P type trap zone（P-
Well）23, wherein, the P type trap zone 23 is located on the deep n-type well region 22；First groove in the P type trap zone 23
A；Surface channel layer 24 in the P type trap zone 23, and lining in the first groove A inwalls and are covered in the surface
The tunnel oxidation layer 25 on the surface of channel layer 24；Floating boom 26 on the tunnel oxidation layer 25 and positioned at the tunnel oxidation layer
Active area under 25（It is not shown in fig. 2）；And the inter polysilicon dielectric layer on the floating boom 26（Inter Poly
Dielectric, abbreviation IPD）With the control gate on the inter polysilicon dielectric layer 27（Control Gate）28.
It should be noted that in manufacturing process, deep n-type well region 22 and P type trap zone 23 shape in P type substrate 21 successively
Into, and can be formed by the way of doping, wherein, alternatively, P type substrate 21 can be P-type silicon substrate；Then, in p-type
First groove A is formed in well region 23；After first groove A is formed, then surface channel layer 24 is formed in P type trap zone 23, and
Surface channel layer 24 can also be formed by the way of doping.
Specifically, referring to Fig. 2, because first groove A is located in P type trap zone 23, and tunnel oxidation layer 25 is served as a contrast first
Groove A inwalls and the surface of surface channel layer 24 is covered in, and floating boom 26 is located on tunnel oxidation layer 25, the floating boom so formed
26 are filled with the remaining space that first groove A removes its inwall, that is to say, that the structure of the ETOX NOR-type flash memories of the present embodiment
In tunnel oxidation layer 25 and floating boom 26 structure it is different from planar structure of the prior art, belong to stereochemical structure.It is existing
The channel length of memory cell corresponding with planar structure is defined by the width of the floating boom of memory cell in technology, however, this
In embodiment the channel length of memory cell corresponding with stereochemical structure by memory cell floating boom width and floating boom embedment the
The depth of one groove（Floating boom fills the depth of first groove）Sum determines, is so ensureing the channel length foot of memory cell
It is enough long（More than 100nm）In the case of, the width of the floating boom of memory cell can be reduced, make the width micro of floating boom, so as to
So that ETOX NOR-types flash memory can be below micro to 45nm nodes, and very little, Jin Jinzeng are changed to the processing procedure of prior art
Extra photoetching and etching has been added once to complete.
Alternatively, the depth of the first groove A can be 500 angstroms to 2000 angstroms.In the case where processing procedure allows, if
First groove A depth is deeper, then in the case of the channel length for ensureing memory cell is sufficiently long, the floating boom of memory cell
Width reduces more, makes the width micro of floating boom must be more, so as to so that ETOX NOR-types flash memory can be easier micro
To 45nm nodes.
Alternatively, the material of the tunnel oxidation layer 25 can be silica.
The structure for the ETOX NOR-type flash memories that the embodiment of the present invention one provides, by forming first groove in P type trap zone,
And fill first groove with the tunnel oxidation layer and floating boom that are subsequently formed so that tunnel oxidation layer and floating boom are formd with showing
Have a different stereochemical structure of the planar structure of technology, and cause the channel length of memory cell corresponding with the stereochemical structure by
The depth sum of the width of the floating boom of memory cell and floating boom embedment first groove determines, is so ensureing the ditch of memory cell
In the case of road length is sufficiently long, the width of the floating boom of memory cell can be reduced, make the width micro of floating boom, so as to so that
ETOX NOR-types flash memory can be below micro to 45nm nodes.
Embodiment two
The embodiment of the present invention two provides a kind of preparation method of the structure of ETOX NOR-types flash memory.Fig. 3 is implementation of the present invention
The flow chart of the preparation method of the structure of the ETOX NOR-type flash memories of example two；The ETOX of Fig. 4 a- Fig. 4 f embodiment of the present invention two
The schematic cross-section of structure corresponding to each stage of the preparation method of the structure of NOR-type flash memory.As shown in Fig. 3 and Fig. 4 a- Fig. 4 f,
The preparation method of the structure of the ETOX NOR-types flash memory includes：
S301, provide a P type substrate 41.
Referring to Fig. 4 a, there is provided a P type substrate 41.Alternatively, the P type substrate 41 can be P-type silicon substrate.
S302, deep n-type well region 42 and P type trap zone 43 are sequentially formed in P type substrate 41, wherein, P type trap zone 43 is in deep N
On type well region 42.
Referring to Fig. 4 b, deep n-type well region 42 and P type trap zone 43 are sequentially formed in P type substrate 41, wherein, P type trap zone 43 exists
On deep n-type well region 42.Wherein, deep n-type well region 42 and P type trap zone 43 can be by being doped come shape successively to P type substrate 41
Into.
S303, P type trap zone 43 is performed etching, form first groove B.
Referring to Fig. 4 c, P type trap zone 43 is performed etching, forms first groove B.
Fig. 5 a- Fig. 5 c are the schematic cross-sections for realizing structure corresponding to step S303 each stage in Fig. 3.Alternatively, join
See Fig. 5 a- Fig. 5 c, P type trap zone 43 is performed etching, form first groove B, can specifically include：In the P type trap zone 43
Photoresist layer 51 is formed, referring to Fig. 5 a；Photoetching, exposed portion P type trap zone 43, referring to Fig. 5 b are carried out to the photoresist layer 51；
The part P type trap zone 43 exposed is performed etching, first groove B is formed, referring to Fig. 5 c；The photoresist layer 51 is removed, can be with
Obtain the schematic cross-section of corresponding structure as illustrated in fig. 4 c.
Alternatively, the depth of the first groove B can be 500 angstroms to 2000 angstroms.
S304, surface channel layer 44 is formed in P type trap zone 43, then form tunnel oxidation layer 45, wherein, tunnel oxidation
The lining of layer 45 first groove B inwall and be covered in the surface of surface channel layer 44.
Referring to Fig. 4 d, surface channel layer 44 is formed in P type trap zone 43, then forms tunnel oxidation layer 45, wherein, tunnel
Oxide layer 45 serve as a contrast first groove B inwall and be covered in the surface of surface channel layer 44.Wherein, surface channel layer 44 can be with
By being doped P type trap zone 43 to be formed；Tunnel oxidation layer 45 can utilize deposition or extension life well known in the art
The technology such as long is formed, wherein, deposition includes but is not limited to physical vapour deposition (PVD)（Physical Vapor Deposition, referred to as
PVD）Or chemical vapor deposition（Chemical Vapor Deposition, abbreviation CVD）.
Alternatively, the material of the tunnel oxidation layer 45 can be silica.
S305, floating boom 46 is formed on tunnel oxidation layer 45 successively and forms active area under tunnel oxidation layer 45.
Referring to Fig. 4 e, floating boom 46 is formed on tunnel oxidation layer 45 successively and forms active area under tunnel oxidation layer 45
（It is not shown in figure 4e）.Wherein, floating boom 46 can be formed by polysilicon.Floating boom 46 can utilize it is well known in the art deposition or
The technologies such as person's epitaxial growth are formed, wherein, deposition includes but is not limited to physical vapour deposition (PVD)（PVD）Or chemical vapor deposition
（CVD）.
It should be noted that in previous step is step S304, in first groove B inwall and surface channel layer 44
Surface form tunnel oxidation layer 45, next, in this step, floating boom 46 is formed on tunnel oxidation layer 45, so formation
Floating boom 26 be filled with the remaining space that first groove B removes its inwall, that is to say, that the ETOX NOR that the present embodiment is formed
The structure of tunnel oxidation layer 25 and floating boom 26 in the structure of type flash memory is different from planar structure of the prior art, belongs to stand
Body structure.The channel length of memory cell corresponding with planar structure is determined by the width of the floating boom of memory cell in the prior art
Justice, however, in the present embodiment memory cell corresponding with stereochemical structure channel length by memory cell floating boom width with
Floating boom is embedded to the depth of first groove（Floating boom fills the depth of first groove）Sum determines, is so ensureing memory cell
Channel length long enough（More than 100nm）In the case of, the width of the floating boom of memory cell can be reduced, make the width of floating boom micro-
Contracting, so as to so that ETOX NOR-types flash memory can be below micro to 45nm nodes, and the processing procedure change to prior art is very
Small, only increasing once extra photoetching and etching can complete, and specifically refer to Fig. 5 b and Fig. 5 c and related description.
Further, in the case where processing procedure allows, if first groove B depth is deeper, memory cell is being ensured
Channel length it is sufficiently long in the case of, the width of the floating boom of memory cell reduces more, makes the width micro of floating boom must get over
It is more, so as to so that ETOX NOR-types flash memory can be easier below micro to 45nm nodes.
S306, inter polysilicon dielectric layer 47 and control gate 48 are sequentially formed on floating boom 46.
Referring to Fig. 4 f, inter polysilicon dielectric layer 47 and control gate 48 are sequentially formed on floating boom 46.Wherein, control gate 48
It can be formed by polysilicon；Inter polysilicon dielectric layer 47 is used for separating floating boom 46 and control gate 48, and it can be by oxide-nitrogen
Compound-oxide（Oxide-Nitride-Oxide, abbreviation ONO）To be formed, such as silicon oxide-silicon nitride-silica.
Also, inter polysilicon dielectric layer 47 and control gate 48 can utilize the technology shapes such as deposition well known in the art or epitaxial growth
Into, wherein, deposition includes but is not limited to physical vapour deposition (PVD)（PVD）Or chemical vapor deposition（CVD）.
The preparation method of the structure for the ETOX NOR-type flash memories that the embodiment of the present invention two provides, passes through the shape in P type trap zone
First groove is filled into first groove, and with the tunnel oxidation layer and floating boom that are subsequently formed so that tunnel oxidation layer and floating
Grid form the stereochemical structure different from the planar structure of prior art, and cause memory cell corresponding with the stereochemical structure
Channel length the depth sum of first groove is embedded to determine by width and the floating boom of the floating boom of memory cell, so ensureing
In the case of the channel length of memory cell is sufficiently long, the width of the floating boom of memory cell can be reduced, make the width of floating boom micro-
Contracting, so as to so that ETOX NOR-types flash memory can be below micro to 45nm nodes.
Pay attention to, above are only presently preferred embodiments of the present invention and institute's application technology principle.It will be appreciated by those skilled in the art that
The invention is not restricted to specific embodiment described here, can carry out for a person skilled in the art various obvious changes,
Readjust and substitute without departing from protection scope of the present invention.Therefore, although being carried out by above example to the present invention
It is described in further detail, but the present invention is not limited only to above example, without departing from the inventive concept, also
Other more equivalent embodiments can be included, and the scope of the present invention is determined by scope of the appended claims.
Claims (7)
- A kind of 1. structure of ETOX NOR-types flash memory, it is characterised in that including：P type substrate；Deep n-type well region and P type trap zone in the P type substrate, wherein, the P type trap zone is located at the deep n-type well region On；First groove in the P type trap zone；Surface channel layer in the P type trap zone, and lining the first groove inwall and be covered in the surface The tunnel oxidation layer on the surface of channel layer；Floating boom on the tunnel oxidation layer and the active area under the tunnel oxidation layer；AndInter polysilicon dielectric layer on the floating boom and the control gate on the inter polysilicon dielectric layer；The depth of the first groove is 500 angstroms to 2000 angstroms.
- 2. the structure of ETOX NOR-types flash memory according to claim 1, it is characterised in that the P type substrate serves as a contrast for P-type silicon Bottom.
- 3. the structure of ETOX NOR-types flash memory according to claim 1, it is characterised in that the material of the tunnel oxidation layer For silica.
- A kind of 4. preparation method of the structure of ETOX NOR-types flash memory, it is characterised in that including：One P type substrate is provided；Deep n-type well region and P type trap zone are sequentially formed in the P type substrate, wherein, the P type trap zone is in the deep n-type well region On；The P type trap zone is performed etching, forms first groove；Surface channel layer is formed in the P type trap zone, then forms tunnel oxidation layer, wherein, the tunnel oxidation layer lining exists The inwall of the first groove and the surface for being covered in the surface channel layer；Floating boom is formed on the tunnel oxidation layer successively and forms active area under the tunnel oxidation layer；AndInter polysilicon dielectric layer and control gate are sequentially formed on the floating gate；The depth of the first groove is 500 angstroms to 2000 angstroms.
- 5. the preparation method of the structure of ETOX NOR-types flash memory according to claim 4, it is characterised in that to the p-type Well region performs etching, and forms first groove, including：Photoresist layer is formed in the P type trap zone；Photoetching, exposed portion P type trap zone are carried out to the photoresist layer；The part P type trap zone exposed is performed etching, forms first groove；Remove the photoresist layer.
- 6. the preparation method of the structure of ETOX NOR-types flash memory according to claim 5, it is characterised in that the p-type lining Bottom is P-type silicon substrate.
- 7. the preparation method of the structure of ETOX NOR-types flash memory according to claim 5, it is characterised in that the tunnel oxygen The material for changing layer is silica.
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| CN1254189A (en) * | 1998-11-16 | 2000-05-24 | 世大积体电路股份有限公司 | Low-voltage high-speed store unit and its making method |
| CN1677648A (en) * | 2004-03-29 | 2005-10-05 | 力晶半导体股份有限公司 | Structure of non-volatile memory and its making method |
| CN1787218A (en) * | 2004-12-08 | 2006-06-14 | 三星电子株式会社 | Nonvolatile memory device and method of manufacturing the same |
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| KR100578656B1 (en) * | 2003-06-30 | 2006-05-11 | 에스티마이크로일렉트로닉스 엔.브이. | Method for forming a floating gate in flash memory device |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1254189A (en) * | 1998-11-16 | 2000-05-24 | 世大积体电路股份有限公司 | Low-voltage high-speed store unit and its making method |
| CN1677648A (en) * | 2004-03-29 | 2005-10-05 | 力晶半导体股份有限公司 | Structure of non-volatile memory and its making method |
| CN1787218A (en) * | 2004-12-08 | 2006-06-14 | 三星电子株式会社 | Nonvolatile memory device and method of manufacturing the same |
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