CN104967291A - Intelligent power module and driving circuit thereof - Google Patents
Intelligent power module and driving circuit thereof Download PDFInfo
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Abstract
The invention discloses a driving circuit of an intelligent power module. The driving circuit comprises a first synchronous level converting circuit, a second synchronous level converting circuit and a third synchronous level converting circuit which have the same circuit structure. Each synchronous level converting circuit comprises a double-pulse generating circuit; a first inverter; a first CMOS circuit; a first switch circuit including a first DMOS pipe, and a first triode and a second triode being turned on and off in a synchronous way with the first DMOS pipe; a second inverter; a second CMOS circuit; a second switch circuit including a second DMOS pipe, and a third triode and a fourth triode being turned on and off in a synchronous way with the second DMOS pipe; and an output circuit. The driving circuit can guarantee that the DMOS pipes and the triodes therein are turned on in a synchronous way. The service lifetime of the intelligent power module is effectively prolonged. The safety of the intelligent power module is effectively improved. The invention further discloses the intelligent power module.
Description
Technical field
The present invention relates to Intelligent Power Module technical field, particularly a kind of drive circuit of Intelligent Power Module and a kind of Intelligent Power Module.
Background technology
Intelligent Power Module is a kind of power drive series products power electronics and integrated circuit technique combined.Intelligent Power Module integrates device for power switching and high-voltage driving circuit, and has overvoltage, overcurrent and the failure detector circuit such as overheated.Intelligent Power Module receives the control signal of MCU (Micro Control Unit, micro-control unit) on the one hand, drives subsequent conditioning circuit work, on the other hand the status signal of the system of detection is sent to MCU.Compared with traditional discrete scheme, Intelligent Power Module wins increasing market with its advantage such as high integration, high reliability, being particularly suitable for the frequency converter of drive motors and various inverter, is a kind of desired power level electronic device of frequency control, metallurgical machinery, electric traction, servo-drive, frequency-conversion domestic electric appliances.
In correlation technique, as shown in Figure 1, the mode adopting high pressure DMOS pipe to connect with NMOS tube bears the high pressure of 600V jointly, reason is, the withstand voltage of high pressure DMOS pipe realizes by forming large-area isolation strip, and it is withstand voltage higher, isolation strip area occupied is larger, the cost of the drive circuit of Intelligent Power Module is higher, and the withstand voltage of NMOS tube is about 30V, therefore high pressure DMOS pipe only needs that 570V's is withstand voltage, thus saves the area of isolation strip to a certain extent, reduces the cost of drive circuit.
But, incomplete same due to the ON time of high pressure DMOS pipe and NMOS tube and conduction threshold, and both temperature characterisitics are not quite similar, therefore, in certain temperature range, easy both appearance ON time significantly asynchronous, thus make high pressure DMOS pipe and NMOS tube will bear the instantaneous pressure exceeding self load.Such as, when the time that high pressure DMOS pipe lags behind NMOS tube conducting is longer, the useful life of drive circuit will be had a strong impact on; Under extreme operating condition, when high pressure DMOS pipe is ahead of NMOS tube conducting, easily causes Intelligent Power Module to be damaged, bring potential safety hazard.
Therefore, need to improve the drive circuit of Intelligent Power Module.
Summary of the invention
Object of the present invention is intended at least solve one of above-mentioned technological deficiency.
For this reason, one object of the present invention is the drive circuit proposing a kind of Intelligent Power Module, can ensure DMOS pipe and triode synchronous conducting in drive circuit, effectively improves useful life and the fail safe of Intelligent Power Module.
Another object of the present invention is to propose a kind of Intelligent Power Module.
For achieving the above object, one aspect of the present invention embodiment proposes a kind of drive circuit of Intelligent Power Module, comprise the first to the 3rd sync level change-over circuit, identical and each sync level change-over circuit of the circuit structure of the described first to the 3rd sync level change-over circuit comprises: dipulse circuit for generating, the power positive end of described dipulse circuit for generating is connected with the low-pressure area power supply anode of described Intelligent Power Module, the power supply negative terminal of described dipulse circuit for generating is connected with the low-pressure area power supply negative terminal of described Intelligent Power Module, the signal input part correspondence of described dipulse circuit for generating and the U of described Intelligent Power Module, V, in W phase, brachium pontis input is connected, first inverter, the input of described first inverter is connected with the first output of described dipulse circuit for generating, first cmos circuit, the first end of described first cmos circuit is connected with the output of described first inverter, second end of described first cmos circuit is connected with the power positive end of described dipulse circuit for generating, and the 3rd end of described first cmos circuit is connected with the power supply negative terminal of described dipulse circuit for generating, first switching circuit, the first end of described first switching circuit is connected with the 4th end of described first cmos circuit, second end of described first switching circuit is connected with the power supply negative terminal of described dipulse circuit for generating, 3rd end correspondence of described first switching circuit is connected with the positive source of U, V, W phase higher-pressure region of described Intelligent Power Module, described first switching circuit comprise the first DMOS pipe and with the first triode of the synchronous turn-on and turn-off of described first DMOS pipe and the second triode, second inverter, the input of described second inverter is connected with the second output of described dipulse circuit for generating, second cmos circuit, the first end of described second cmos circuit is connected with the output of described second inverter, second end of described second cmos circuit is connected with the power positive end of described dipulse circuit for generating, and the 3rd end of described second cmos circuit is connected with the power supply negative terminal of described dipulse circuit for generating, second switch circuit, the first end of described second switch circuit is connected with the 4th end of described second cmos circuit, second end of described second switch circuit is connected with the power supply negative terminal of described dipulse circuit for generating, 3rd end correspondence of described second switch circuit is connected with the positive source of U, V, W phase higher-pressure region of described Intelligent Power Module, described second switch circuit comprise the second DMOS pipe and with the 3rd triode of the synchronous turn-on and turn-off of described second DMOS pipe and the 4th triode, output circuit, the first end of described output circuit is connected with the 4th end of described first switching circuit, second end of described output circuit is connected with the 4th end of described second switch circuit, 3rd end correspondence of described output circuit is connected with the positive source of U, V, W phase higher-pressure region of described Intelligent Power Module, 4th end correspondence of described output circuit is connected with the power cathode of U, V, W phase higher-pressure region of described Intelligent Power Module, and the five terminal correspondence of described output circuit is connected with the output of U, V, W phase higher-pressure region of described Intelligent Power Module.
According to the drive circuit of the Intelligent Power Module of the embodiment of the present invention, when using the DMOS pipe of low cost, by the turn-on and turn-off of Synchronization Control triode and DMOS pipe, ensure within the scope of total temperature, the turn-on and turn-off of DMOS pipe are almost synchronous with the turn-on and turn-off of triode, thus guarantee that the useful life of drive circuit because of the withstand voltage design of superposition of DMOS pipe and triode and the needs produced bear the counter productive of the instantaneous pressure exceeding self load, can not improve useful life and the fail safe of Intelligent Power Module.
According to one embodiment of present invention, a described COMS circuit is identical with the circuit structure of described 2nd COMS circuit, and described first switching circuit is identical with the circuit structure of described second switch circuit.
According to one embodiment of present invention, a described COMS circuit comprises: the first PMOS, the grid of described first PMOS is connected with the output of described first inverter, is connected after the substrate of described first PMOS is connected with the source electrode of described first PMOS with the power positive end of described dipulse circuit for generating; First resistance of series connection and the second resistance, one end of described first resistance is connected with the drain electrode of described first PMOS, and the other end of described first resistance is connected with one end of described second resistance; First NMOS tube, the drain electrode of described first NMOS tube is connected with the other end of described second resistance, the grid of described first NMOS tube is connected with the output of described first inverter, be connected with the power supply negative terminal of described dipulse circuit for generating after the substrate of described first NMOS tube is connected with the source electrode of described first NMOS tube, between the drain electrode of described first NMOS tube and the other end of described second resistance, there is first node.
According to one embodiment of present invention, described first resistance is the resistance of positive temperature coefficient, and described second resistance is the resistance of negative temperature coefficient.
According to one embodiment of present invention, described first switching circuit also comprises the 3rd resistance and the 4th resistance, and wherein, one end of described 3rd resistance is connected with described first node; The collector electrode of described first triode is connected with one end of described 3rd resistance, and the emitter of described first triode is connected with the power supply negative terminal of described dipulse circuit for generating; The collector electrode of described second triode is connected with the base stage of described first triode with the base stage of described second triode respectively, and the emitter of described second triode is connected with the power supply negative terminal of described dipulse circuit for generating; The grid of described first DMOS pipe is connected with the other end of described 3rd resistance, is connected after the substrate of described first DMOS pipe is connected with the source electrode of described first DMOS pipe with the collector electrode of described second triode; One end of described 4th resistance is connected with the drain electrode of described first DMOS pipe, the other end of described 4th resistance is connected with the positive source of the U phase higher-pressure region of described Intelligent Power Module, has Section Point between one end of described 4th resistance and the drain electrode of described first DMOS pipe.
According to one embodiment of present invention, described first triode and described second triode are NPN triode.
According to one embodiment of present invention, described output circuit comprises: the first diode, and the negative electrode of described first diode is connected with the 4th end of described first switching circuit, 3rd inverter, the input of described 3rd inverter is connected with the negative electrode of described first diode, second diode, the negative electrode of described second diode is connected with the 4th end of described second switch circuit, and the anode of described second diode is connected with the anode of described first diode, 4th inverter, the input of described 4th inverter is connected with the negative electrode of described second diode, first high-voltage output circuit, the first end of described first high-voltage output circuit is connected with the output of described 3rd inverter, second end of described first high-voltage output circuit is connected with the output of described 4th inverter, 3rd end correspondence of described first high-voltage output circuit and the U of described Intelligent Power Module, V, the positive source of W phase higher-pressure region is connected, after 4th end of described first high-voltage output end is connected with the anode of described second diode with the anode of described first diode respectively, the U of corresponding and described Intelligent Power Module, V, the power cathode of W phase higher-pressure region is connected, the five terminal correspondence of described first high-voltage output circuit and the U of described Intelligent Power Module, V, the output of W phase higher-pressure region is connected.
In addition, embodiments of the invention also proposed a kind of Intelligent Power Module, and it comprises the drive circuit of above-mentioned Intelligent Power Module.
This Intelligent Power Module, by the drive circuit of above-mentioned Intelligent Power Module, can effectively improve useful life and fail safe.
The aspect that the present invention adds and advantage will part provide in the following description, and part will become obvious from the following description, or be recognized by practice of the present invention.
Accompanying drawing explanation
The present invention above-mentioned and/or additional aspect and advantage will become obvious and easy understand from the following description of the accompanying drawings of embodiments, wherein:
Fig. 1 is the circuit structure diagram of traditional Intelligent Power Module;
Fig. 2 is the circuit structure diagram of the Intelligent Power Module according to the embodiment of the present invention;
Fig. 3 is the electrical block diagram of the sync level change-over circuit according to the embodiment of the present invention; And
Fig. 4 is the circuit diagram of sync level change-over circuit according to an embodiment of the invention.
Embodiment
Be described below in detail embodiments of the invention, the example of described embodiment is shown in the drawings, and wherein same or similar label represents same or similar element or has element that is identical or similar functions from start to finish.Being exemplary below by the embodiment be described with reference to the drawings, only for explaining the present invention, and can not limitation of the present invention being interpreted as.
Disclosing hereafter provides many different embodiments or example is used for realizing different structure of the present invention.Of the present invention open in order to simplify, hereinafter the parts of specific examples and setting are described.Certainly, they are only example, and object does not lie in restriction the present invention.In addition, the present invention can in different example repeat reference numerals and/or letter.This repetition is to simplify and clearly object, itself does not indicate the relation between discussed various embodiment and/or setting.In addition, the various specific technique that the invention provides and the example of material, but those of ordinary skill in the art can recognize the property of can be applicable to of other techniques and/or the use of other materials.In addition, fisrt feature described below second feature it " on " structure can comprise the embodiment that the first and second features are formed as directly contact, also can comprise other feature and be formed in embodiment between the first and second features, such first and second features may not be direct contacts.
In describing the invention, it should be noted that, unless otherwise prescribed and limit, term " installation ", " being connected ", " connection " should be interpreted broadly, such as, can be mechanical connection or electrical connection, also can be the connection of two element internals, can be directly be connected, also indirectly can be connected by intermediary, for the ordinary skill in the art, the concrete meaning of above-mentioned term can be understood as the case may be.
Drive circuit and the Intelligent Power Module of the Intelligent Power Module that the embodiment of the present invention proposes are described with reference to the accompanying drawings.
Fig. 2 is the block diagram of the drive circuit of Intelligent Power Module according to the embodiment of the present invention.As shown in Figure 2, the drive circuit 10 of this Intelligent Power Module comprises the first sync level change-over circuit 11, second sync level change-over circuit 12 and the 3rd sync level change-over circuit 13, further, the first synchronous change-over circuit 11, second sync level change-over circuit 12 is identical with the circuit structure of the 3rd sync level change-over circuit 13.
As shown in Figure 3, each sync level change-over circuit comprises dipulse circuit for generating 101, first inverter NOT1, the first cmos circuit 102, first switching circuit 103, second inverter NOT2, the second cmos circuit 104, second switch circuit 105 and output circuit 106.
Wherein, the power positive end of dipulse circuit for generating 101 is connected with the low-pressure area power supply anode VDD of Intelligent Power Module as the low-pressure area power supply anode VCC of drive circuit 10, the power supply negative terminal of dipulse circuit for generating 101 is connected with the low-pressure area power supply negative terminal COM of Intelligent Power Module as the low-pressure area power supply negative terminal GND of drive circuit 10, the signal input part of dipulse circuit for generating 101 is respectively as the first high-voltage signal input HIN1 of drive circuit 10, second high-voltage signal input HIN2 and third high pressure signal input part HIN3, correspondence and brachium pontis input UHIN in the U phase of Intelligent Power Module, in V phase, brachium pontis input VHIN is connected with brachium pontis input WHIN in W phase.The input of the first inverter NOT1 is connected with the first output of dipulse circuit for generating 101.The first end of the first cmos circuit 102 is connected with the output of the first inverter NOT1, second end of the first cmos circuit 102 is connected with the power positive end of dipulse circuit for generating 101, and the 3rd end of the first cmos circuit 102 is connected with the power supply negative terminal of dipulse circuit for generating 101.The first end of the first switching circuit 103 is connected with the 4th end of the first cmos circuit 102, second end of the first switching circuit 103 is connected with the power supply negative terminal of dipulse circuit for generating 101,3rd end correspondence of the first switching circuit 103 is connected with the positive source VB3 of W phase higher-pressure region with the positive source VB2 of positive source VB1, V phase higher-pressure region of the U phase higher-pressure region of Intelligent Power Module, the first switching circuit 103 comprise the first DMOS pipe and with the first triode of the synchronous turn-on and turn-off of the first DMOS pipe and the second triode.The input of the second inverter NOT2 is connected with the second output of dipulse circuit for generating 101.The first end of the second cmos circuit 104 is connected with the output of the second inverter NOT2, second end of the second cmos circuit 104 is connected with the power positive end of dipulse circuit for generating 101, and the 3rd end of the second cmos circuit 104 is connected with the power supply negative terminal of dipulse circuit for generating 101.The first end of second switch circuit 105 is connected with the 4th end of the second cmos circuit 104, second end of second switch circuit 105 is connected with the power supply negative terminal of dipulse circuit for generating 101,3rd end correspondence of second switch circuit 105 is connected with the positive source VB3 of W phase higher-pressure region with the positive source VB2 of positive source VB1, V phase higher-pressure region of the U phase higher-pressure region of Intelligent Power Module, second switch circuit 105 comprise the second DMOS pipe and with the 3rd triode of the synchronous turn-on and turn-off of the second DMOS pipe and the 4th triode.The first end of output circuit 106 is connected with the 4th end of the first switching circuit 103, second end of output circuit 106 is connected with the 4th end of second switch circuit 105, 3rd end correspondence of output circuit 106 and the positive source VB1 of the U phase higher-pressure region of Intelligent Power Module, the positive source VB2 of V phase higher-pressure region is connected with the positive source VB3 of W phase higher-pressure region, 4th end correspondence of output circuit 106 and the power cathode VS1 of the U phase higher-pressure region of Intelligent Power Module, the power cathode VS2 of V phase higher-pressure region is connected with the power cathode VS3 of W phase higher-pressure region, the five terminal correspondence of output circuit 106 and the output HO1 of the U phase higher-pressure region of Intelligent Power Module, the output HO2 of V phase higher-pressure region is connected with the output HO3 of W phase higher-pressure region.
It should be noted that, adopt the object of dipulse circuit for generating 101 be in order to make the ON time of the first DMOS pipe and the second DMOS pipe short as far as possible, generate heat the least possible, to improve the useful life of drive circuit 10, and then improve the useful life of Intelligent Power Module.
According to one embodiment of present invention, a COMS circuit 102 is identical with the circuit structure of the 2nd COMS circuit 104, and the first switching circuit 103 is identical with the circuit structure of second switch circuit 105.
According to one embodiment of present invention, as shown in Figure 4, one COMS circuit 102 comprises the first PMOS 1021, first resistance R1, second resistance R2 and the first NMOS tube 1022, wherein, the grid of the first PMOS 1021 is connected with the output of the first inverter NOT1, be connected with the power positive end of dipulse circuit for generating 101 after the substrate of the first PMOS 1021 is connected with the source electrode of the first PMOS 1021, first resistance R1 and the second resistance R2 connects, one end of first resistance R1 is connected with the drain electrode of the first PMOS 1021, the other end of the first resistance R1 is connected with one end of the second resistance R2, the drain electrode of the first NMOS tube 1022 is connected with the other end of the second resistance R2, the grid of the first NMOS tube 1022 is connected with the output of the first inverter NOT1, be connected with the power supply negative terminal of dipulse circuit for generating 101 after the substrate of the first NMOS tube 1022 is connected with the source electrode of the first NMOS tube 1022, between the drain electrode of the first NMOS tube 1022 and the other end of the second resistance R2, there is first node J1.
According to one embodiment of present invention, the first resistance R1 is the resistance of positive temperature coefficient, and the second resistance R2 is the resistance of negative temperature coefficient.
According to one embodiment of present invention, as shown in Figure 4, first switching circuit 103 also comprises the 3rd resistance R3 and the 4th resistance R4, wherein, one end of 3rd resistance R3 is connected with first node J1, the collector electrode of the first triode Q1 is connected with one end of the 3rd resistance R3, the emitter of the first triode Q1 is connected with the power supply negative terminal of dipulse circuit for generating 101, the collector electrode of the second triode Q2 is connected with the base stage of the first triode Q1 with the base stage of the second triode Q2 respectively, the emitter of the second triode Q2 is connected with the power supply negative terminal of dipulse circuit for generating 101, the grid of the first DMOS pipe 1031 is connected with the other end of the 3rd resistance R3, be connected with the collector electrode of the second triode Q2 after the substrate of the first DMOS pipe 1031 is connected with the source electrode of the first DMOS pipe 1031, one end of 4th resistance R4 is connected with the drain electrode of the first DMOS pipe 1031, the other end of the 4th resistance R4 is connected with the positive source VB1 of the U phase higher-pressure region of Intelligent Power Module, between one end of 4th resistance R4 and the drain electrode of the first DMOS pipe 1031, there is Section Point J2.
According to one embodiment of present invention, the first triode Q1 and the second triode Q2 is NPN triode.
According to one embodiment of present invention, as shown in Figure 4, output circuit 106 comprises the first diode D1, 3rd inverter NOT3, second diode D2, 4th inverter NOT4 and the first high-voltage output circuit 1061, wherein, the negative electrode of the first diode D1 is connected with the 4th end of the first switching circuit 103, the input of the 3rd inverter NOT3 is connected with the negative electrode of the first diode D1, the negative electrode of the second diode D2 is connected with the 4th end of second switch circuit 105, the anode of the second diode D2 is connected with the anode of the first diode D1, the input of the 4th inverter NOT4 is connected with the negative electrode of the second diode D2, the first end of the first high-voltage output circuit 1061 is connected with the output of the 3rd inverter NOT3, second end of the first high-voltage output circuit 1061 is connected with the output of the 4th inverter NOT4, 3rd end correspondence of the first high-voltage output circuit 1061 and the positive source VB1 of the U phase higher-pressure region of Intelligent Power Module, the positive source VB2 of V phase higher-pressure region, the positive source VB3 of W phase higher-pressure region is connected, after 4th end of the first high-voltage output end 1061 is connected with the anode of the second diode D2 with the anode of the first diode D1 respectively, the corresponding power cathode VS1 with the U phase higher-pressure region of Intelligent Power Module, the power cathode VS2 of V phase higher-pressure region, the power cathode VS3 of W phase higher-pressure region is connected, the five terminal correspondence of the first high-voltage output circuit 1061 and the output HO1 of the U phase higher-pressure region of Intelligent Power Module, the output HO2 of V phase higher-pressure region, the output of the output HO3 of W phase higher-pressure region is connected.
The operation principle of the first sync level change-over circuit 11 is described below in conjunction with Fig. 4.
The pulse signal of the first output output of dipulse circuit for generating 101, after the first inverter NOT1 is anti-phase, controls the first cmos circuit 102.In the first cmos circuit 102, first resistance R1 and the second resistance R2 plays the effect controlling electric current and control conducting speed, and, because the first resistance R1 is that the resistance of positive temperature coefficient is as BASE resistance, second resistance R2 is that the resistance of negative temperature coefficient is as POLY resistance, therefore, when the temperature varies, the regulating action of the first cmos circuit 102 pairs of electric currents and conducting speed remains unchanged substantially.
When the pulse signal that the first output of dipulse circuit for generating 101 exports is rising edge signal, the voltage of the drain electrode of the first NMOS tube 1022 is almost the voltage of the low-pressure area power supply anode VDD of Intelligent Power Module as 15V, under the effect of this voltage, the first DMOS pipe 1031 conducting.After the first DMOS pipe 1031 conducting, electric current flows through the first DMOS pipe 1031, first triode Q1 and the second triode Q2, because the first triode Q1 is all identical with the structure and parameter of the second triode Q2, the electric current therefore flowing through the first triode Q1 is identical with the electric current flowing through the second triode Q2.In addition, due to the existence of the first resistance R1 and the second resistance R2, the collector electrode of the first triode Q1 is made to produce the voltage lower than 15V, this voltage need keep conducting state more than the threshold voltage of the first DMOS pipe 1031 to make the first DMOS pipe 1031, finally makes the drain-source current of the first DMOS pipe 1031 and grid voltage reach balance by this negative feedback.It should be noted that, the withstand voltage of the first DMOS pipe 1031 is 570V, and the withstand voltage of the second triode Q2 is 30V, and when the first DMOS pipe 1031 turns off, the first DMOS pipe 1031 and the second triode Q2 end simultaneously and jointly bear the voltage of 600V, meet requirement of withstand voltage.In addition, when the moment second triode Q2 conducting simultaneously of the first DMOS pipe 1031 conducting generation current, efficiently avoid the nonsynchronous situation of ON time produced by same voltage control two components and parts in correlation technique, improve useful life and the reliability of Intelligent Power Module.
Similarly, the pulse signal of the second output output of dipulse circuit for generating 101, after the second inverter NOT2 is anti-phase, controls the second cmos circuit 104.In the second cmos circuit 104,5th resistance R5 and the 6th resistance R6 plays the effect controlling electric current and control conducting speed, and, because the 5th resistance R5 is that the resistance of positive temperature coefficient is as BASE resistance, 6th resistance R6 is that the resistance of negative temperature coefficient is as POLY resistance, therefore, when the temperature varies, the regulating action of the second cmos circuit 104 pairs of electric currents and conducting speed remains unchanged substantially.
When the pulse signal that the second output of dipulse circuit for generating 101 exports is rising edge signal, the voltage of the drain electrode of the second NMOS tube 1042 is almost the voltage of the low-pressure area power supply anode VDD of Intelligent Power Module as 15V, under the effect of this voltage, the second DMOS pipe 1051 conducting.After the second DMOS pipe 1051 conducting, electric current flows through the second DMOS pipe 1051, the 3rd triode Q3 and the 4th triode Q4, because the 3rd triode Q3 is all identical with the structure and parameter of the 4th triode Q4, the electric current therefore flowing through the 3rd triode Q3 is identical with the electric current flowing through the 4th triode Q4.In addition, due to the existence of the 5th resistance R5 and the 6th resistance R6, the collector electrode of the 3rd triode Q3 is made to produce the voltage lower than 15V, this voltage need keep conducting state more than the threshold voltage of the second DMOS pipe 1051 to make the second DMOS pipe 1051, finally makes the drain-source current of the second DMOS pipe 1051 and grid voltage reach balance by this negative feedback.It should be noted that, the withstand voltage of the second DMOS pipe 1051 is 570V, and the withstand voltage of the 4th triode Q4 is 30V, and when the second DMOS pipe 1051 turns off, the second DMOS pipe 1051 and the 4th triode Q4 end simultaneously and jointly bear the voltage of 600V, meet requirement of withstand voltage.In addition, when moment the 4th triode Q4 conducting simultaneously of the second DMOS pipe 1051 conducting generation current, efficiently avoid the nonsynchronous situation of ON time produced by same voltage control two components and parts in correlation technique, improve useful life and the reliability of Intelligent Power Module.
Under the effect of the pulse signal of dipulse circuit for generating 101 output, the level of the output of the 3rd inverter NOT3 and the output of the 4th inverter NOT4 changes respectively, reintegrate in the first high-voltage output circuit 1061, and form the logic output signal of a VS1-VS1+15V with input signal homophase and relative to the power cathode VS1 of U phase higher-pressure region at the five terminal of the first high-voltage output circuit 1061.
Wherein, the resistance of the 4th resistance R4 and the 8th resistance R8 can be 100k Ω, and the resistance of the first resistance R1, the second resistance R2, the 5th resistance R5 and the 6th resistance R6 can be 5k Ω, and the resistance of the 3rd resistance R3 and the 7th resistance R7 can be 50 Ω.When the first DMOS pipe 1031 is in conducting state, due to the clamping action of the first diode D1, then the electric current of the first DMOS pipe 1031 is 15V/100k Ω=0.15mA, and the grid pressure drop of the first DMOS pipe 1031 is 15V-0.15mA × (5k Ω+5k Ω)=13.5V.Similarly, the grid pressure drop of the second DMOS pipe 1051 is also 13.5V.
Because the first sync level change-over circuit 11, second sync level change-over circuit 12 is identical with the operation principle of the 3rd sync level change-over circuit 13, the operation principle of the second sync level change-over circuit 12 and the 3rd sync level change-over circuit 13 is just no longer described here.
In sum, according to the drive circuit of the Intelligent Power Module of the embodiment of the present invention, when using the DMOS pipe of low cost, by the turn-on and turn-off of Synchronization Control triode and DMOS pipe, ensure within the scope of total temperature, the turn-on and turn-off of DMOS pipe are almost synchronous with the turn-on and turn-off of triode, thus guarantee that the useful life of drive circuit because of the withstand voltage design of superposition of DMOS pipe and triode and the needs produced bear the counter productive of the instantaneous pressure exceeding self load, can not improve useful life and the fail safe of Intelligent Power Module.
In addition, embodiments of the invention also proposed a kind of Intelligent Power Module, and it comprises the drive circuit of above-mentioned Intelligent Power Module.
According to one embodiment of present invention, as shown in Figure 2, Intelligent Power Module comprises drive circuit 10 and switching circuit.
Wherein, first high-voltage signal input HIN1 of drive circuit 10 is as brachium pontis input UHIN in the U phase of Intelligent Power Module, second high-voltage signal input HIN2 of drive circuit 10 is as brachium pontis input VHIN in the V phase of Intelligent Power Module, and the third high pressure signal input part HIN3 of drive circuit 10 is as brachium pontis input WHIN in the W phase of Intelligent Power Module.First low-voltage signal input LIN1 of drive circuit 10 is as brachium pontis input ULIN under the U phase of Intelligent Power Module, second low-voltage signal input LIN2 of drive circuit 10 is as brachium pontis input VLIN under the V phase of Intelligent Power Module, and the 3rd low-voltage signal input LIN3 of drive circuit 10 is as brachium pontis input WLIN under the W phase of Intelligent Power Module.In six road inputs of Intelligent Power Module and U phase, in brachium pontis input UHIN, V phase, in brachium pontis input VHIN, W phase, brachium pontis input WHIN can be 0V or 5V with the input signal of the lower brachium pontis input WLIN of lower brachium pontis input VLIN, W phase of lower brachium pontis input ULIN, V phase of U phase.The low-pressure area power supply anode VCC of drive circuit 10 is as the low-pressure area power supply anode VDD of Intelligent Power Module, and the voltage of the low-pressure area power supply anode VDD of Intelligent Power Module can be 15V.The low-pressure area power supply negative terminal GND of drive circuit 10 is as the low-pressure area power supply negative terminal COM of Intelligent Power Module.The output of drive circuit 10 is corresponding with the input of switching circuit to be connected.
Particularly, as shown in Figure 2, drive circuit 10 comprises the first sync level change-over circuit 11, second sync level change-over circuit 12 and the 3rd sync level change-over circuit 13, wherein, the low-pressure area power supply anode of the first sync level change-over circuit 11, the low-pressure area power supply anode of the second sync level change-over circuit 12 are connected with the low-pressure area power supply anode VCC of drive circuit 10 respectively with the low-pressure area power supply anode of the 3rd sync level change-over circuit 13.The low-pressure area power supply negative terminal of the first sync level change-over circuit 11, the low-pressure area power supply negative terminal of the second sync level change-over circuit 12 are connected with the low-pressure area power supply negative terminal GND of drive circuit 10 respectively with the low-pressure area power supply negative terminal of the 3rd sync level change-over circuit 13.The signal input part of the first sync level change-over circuit 11 is connected with the first high-voltage signal input HIN1 of drive circuit 10, the higher-pressure region power supply anode of the first sync level change-over circuit 11 is connected with the positive pole VB1 of the power supply of the U phase higher-pressure region of drive circuit 10, the higher-pressure region power supply negative terminal of the first sync level change-over circuit 11 is connected with the negative pole VS1 of the power supply of the U phase higher-pressure region of drive circuit 10, and the output of the first sync level change-over circuit 11 is connected with the output HO1 of the U phase higher-pressure region of drive circuit 10.Because the first sync level change-over circuit 11, second sync level change-over circuit 12 is identical with the circuit structure of the 3rd sync level change-over circuit 13, the circuit structure of the second sync level change-over circuit 12 and the 3rd sync level change-over circuit 13 is just no longer described here.
As shown in Figure 2, switching circuit specifically comprises the first power switch pipe IGBT1, 3rd diode D3, second power switch pipe IGBT2, 4th diode D4, 3rd power switch pipe IGBT3, 5th diode D5, 4th power switch pipe IGBT4, 6th diode D6, 5th power switch pipe IGBT5, 7th diode D7, 6th power switch pipe IGBT6, 8th diode D8 and there is the first electric capacity C1 of filter action, second electric capacity C2 and the 3rd electric capacity C3, wherein, the base stage of the first power switch pipe IGBT1 is connected with the output HO1 of the U phase higher-pressure region of drive circuit 10, the collector electrode of the first power switch pipe IGBT1 is connected with the negative electrode of the 3rd diode D3, and as the high voltage input terminal P of Intelligent Power Module, the voltage of high voltage input terminal P can be 300V, be connected with the power cathode VS1 of the U phase higher-pressure region of drive circuit 10 after the emitter of the first power switch pipe IGBT1 is connected with the anode of the 3rd diode D3, and as the U phase high pressure negative output terminal UVS of Intelligent Power Module.The base stage of the second power switch pipe IGBT2 is connected with the output LO1 of the U phase low-pressure area of drive circuit 10, the collector electrode of the second power switch pipe IGBT2 is connected with the power cathode VS1 of the negative electrode of the 4th diode D4, the U phase higher-pressure region of drive circuit 10 respectively, the emitter of the second power switch pipe IGBT2 is connected with the anode of the 4th diode D4, and as the U phase low pressure reference edge UN of Intelligent Power Module.The base stage of the 3rd power switch pipe IGBT3 is connected with the output HO2 of the V phase higher-pressure region of drive circuit 10, the collector electrode of the 3rd power switch pipe IGBT3 is connected with the negative electrode of the 5th diode D5, the high voltage input terminal P of Intelligent Power Module respectively, be connected with the power cathode VS2 of the V phase higher-pressure region of drive circuit 10 after the emitter of the 3rd power switch pipe IGBT3 is connected with the anode of the 5th diode D5, and as the V phase high pressure negative output terminal VVS of Intelligent Power Module.The base stage of the 4th power switch pipe IGBT4 is connected with the output LO2 of the V phase low-pressure area of drive circuit 10, the collector electrode of the 4th power switch pipe IGBT4 is connected with the power cathode VS2 of the negative electrode of the 6th diode D6, the V phase higher-pressure region of drive circuit 10 respectively, the emitter of the 4th power switch pipe IGBT4 is connected with the anode of the 6th diode D6, and as the V phase low pressure reference edge VN of Intelligent Power Module.The base stage of the 5th power switch pipe IGBT5 is connected with the output HO3 of the W phase higher-pressure region of drive circuit 10, the collector electrode of the 5th power switch pipe IGBT5 is connected with the negative electrode of the 7th diode D7, the high voltage input terminal P of Intelligent Power Module respectively, be connected with the power cathode VS3 of the W phase higher-pressure region of drive circuit 10 after the emitter of the 5th power switch pipe IGBT5 is connected with the anode of the 7th diode D7, and as the W phase high pressure negative output terminal WVS of Intelligent Power Module.The base stage of the 6th power switch pipe IGBT6 is connected with the output LO3 of the W phase low-pressure area of drive circuit 10, the collector electrode of the 6th power switch pipe IGBT6 is connected with the power cathode VS3 of the negative electrode of the 8th diode D8, the W phase higher-pressure region of drive circuit 10 respectively, the emitter of the 6th power switch pipe IGBT6 is connected with the anode of the 8th diode D8, and as the W phase low pressure reference edge WN of Intelligent Power Module.And, the first electric capacity C1 is parallel with between U phase high pressure positive output end UVB and U phase high pressure negative output terminal UVS, be parallel with the second electric capacity C2 between V phase high pressure positive output end VVB and V phase high pressure negative output terminal VVS, between W phase high pressure positive output end WVB and W phase high pressure negative output terminal WVS, be parallel with the 3rd electric capacity C3.
Wherein, the input signal of 0V or 5V of the six road inputs (UHIN, VHIN, WHIN and ULIN, VLIN, WLIN) of Intelligent Power Module is transferred to the output LO3 of the output HO3 of output HO2, W phase higher-pressure region of output HO1, V phase higher-pressure region of U phase higher-pressure region and output LO2, W phase low-pressure area of output LO1, V phase low-pressure area of U phase low-pressure area by drive circuit 10 respectively.The output HO1 of U phase higher-pressure region is the logic output signal of the power cathode VS1 of U phase higher-pressure region or the power cathode VS1+15V of U phase higher-pressure region, the output HO2 of V phase higher-pressure region is the logic output signal of the power cathode VS2 of V phase higher-pressure region or the power cathode VS2+15V of V phase higher-pressure region, the output HO3 of W phase higher-pressure region is the logic output signal of the power cathode VS3 of W phase higher-pressure region or the power cathode VS3+15V of W phase higher-pressure region, the output LO1 of U phase low-pressure area, the output LO2 of V phase low-pressure area, the output LO3 of W phase low-pressure area is the logic output signal of 0V or 15V.
It should be noted that, the input signal of same phase can not be high level simultaneously, the i.e. input signal of the lower brachium pontis input ULIN of brachium pontis input UHIN and U phase in U phase, V phase in, in the input signal of brachium pontis input VHIN and the lower brachium pontis input VLIN of V phase and W phase, brachium pontis input WHIN descends the input signal of brachium pontis input WLIN not to be high level with W phase simultaneously.
The operation principle of Intelligent Power Module is described for U phase below.
As shown in Figure 2 and Figure 4, when Intelligent Power Module works on power, the lower brachium pontis input ULIN of U phase, after the lower brachium pontis input VLIN of V phase is converted to the logic output signal of 0-15V with the input signal of the 0-5V of the lower brachium pontis input WLIN of W phase by low voltage level change-over circuit (not specifically illustrating in figure), directly be sent to the output LO1 of U phase low-pressure area, the output LO2 of V phase low-pressure area and the output LO3 of W phase low-pressure area, and brachium pontis input UHIN in U phase, in V phase, brachium pontis input VHIN is with after in W phase, the input signal of the 0-5V of brachium pontis input WHIN enters dipulse circuit for generating 101, at the rising edge of signal, the pulse signal of a 0-15V is exported at the first output of dipulse circuit for generating 101, and at the trailing edge of signal, the pulse signal of a 0-15V is exported at the second output of dipulse circuit for generating 101.
The pulse signal of the first output output of dipulse circuit for generating 101, after the first inverter NOT1 is anti-phase, controls the first cmos circuit 102.In the first cmos circuit 102, first resistance R1 and the second resistance R2 plays the effect controlling electric current and control conducting speed, and, because the first resistance R1 is that the resistance of positive temperature coefficient is as BASE resistance, second resistance R2 is that the resistance of negative temperature coefficient is as POLY resistance, therefore, when the temperature varies, the regulating action of the first cmos circuit 102 pairs of electric currents and conducting speed remains unchanged substantially.
When the pulse signal that the first output of dipulse circuit for generating 101 exports is rising edge signal, the voltage of the drain electrode of the first NMOS tube 1022 is almost the voltage of the low-pressure area power supply anode VDD of Intelligent Power Module as 15V, under the effect of this voltage, the first DMOS pipe 1031 conducting.After the first DMOS pipe 1031 conducting, electric current flows through the first DMOS pipe 1031, first triode Q1 and the second triode Q2, because the first triode Q1 is all identical with the structure and parameter of the second triode Q2, the electric current therefore flowing through the first triode Q1 is identical with the electric current flowing through the second triode Q2.In addition, due to the existence of the first resistance R1 and the second resistance R2, the collector electrode of the first triode Q1 is made to produce the voltage lower than 15V, this voltage need keep conducting state more than the threshold voltage of the first DMOS pipe 1031 to make the first DMOS pipe 1031, finally makes the drain-source current of the first DMOS pipe 1031 and grid voltage reach balance by this negative feedback.It should be noted that, the withstand voltage of the first DMOS pipe 1031 is 570V, and the withstand voltage of the second triode Q2 is 30V, and when the first DMOS pipe 1031 turns off, the first DMOS pipe 1031 and the second triode Q2 end simultaneously and jointly bear the voltage of 600V, meet requirement of withstand voltage.In addition, when the moment second triode Q2 conducting simultaneously of the first DMOS pipe 1031 conducting generation current, efficiently avoid the nonsynchronous situation of ON time produced by same voltage control two components and parts in correlation technique, improve useful life and the reliability of Intelligent Power Module.
Similarly, the pulse signal of the second output output of dipulse circuit for generating 101, after the second inverter NOT2 is anti-phase, controls the second cmos circuit 104.In the second cmos circuit 104,5th resistance R5 and the 6th resistance R6 plays the effect controlling electric current and control conducting speed, and, because the 5th resistance R5 is that the resistance of positive temperature coefficient is as BASE resistance, 6th resistance R6 is that the resistance of negative temperature coefficient is as POLY resistance, therefore, when the temperature varies, the regulating action of the second cmos circuit 104 pairs of electric currents and conducting speed remains unchanged substantially.
When the pulse signal that the second output of dipulse circuit for generating 101 exports is rising edge signal, the voltage of the drain electrode of the second NMOS tube 1042 is almost the voltage of the low-pressure area power supply anode VDD of Intelligent Power Module as 15V, under the effect of this voltage, the second DMOS pipe 1051 conducting.After the second DMOS pipe 1051 conducting, electric current flows through the second DMOS pipe 1051, the 3rd triode Q3 and the 4th triode Q4, because the 3rd triode Q3 is all identical with the structure and parameter of the 4th triode Q4, the electric current therefore flowing through the 3rd triode Q3 is identical with the electric current flowing through the 4th triode Q4.In addition, due to the existence of the 5th resistance R5 and the 6th resistance R6, the collector electrode of the 3rd triode Q3 is made to produce the voltage lower than 15V, this voltage need keep conducting state more than the threshold voltage of the second DMOS pipe 1051 to make the second DMOS pipe 1051, finally makes the drain-source current of the second DMOS pipe 1051 and grid voltage reach balance by this negative feedback.It should be noted that, the withstand voltage of the second DMOS pipe 1051 is 570V, and the withstand voltage of the 4th triode Q4 is 30V, and when the second DMOS pipe 1051 turns off, the second DMOS pipe 1051 and the 4th triode Q4 end simultaneously and jointly bear the voltage of 600V, meet requirement of withstand voltage.In addition, when moment the 4th triode Q4 conducting simultaneously of the second DMOS pipe 1051 conducting generation current, efficiently avoid the nonsynchronous situation of ON time produced by same voltage control two components and parts in correlation technique, improve useful life and the reliability of Intelligent Power Module.
Under the effect of the pulse signal of dipulse circuit for generating 101 output, the level of the output of the 3rd inverter NOT3 and the output of the 4th inverter NOT4 changes respectively, reintegrate in the first high-voltage output circuit 1061, and form the logic output signal of a VS1-VS1+15V with input signal homophase and relative to the power cathode VS1 of U phase higher-pressure region at the five terminal of the first high-voltage output circuit 1061.Wherein, when the voltage of U phase high pressure negative output terminal UVS is close to 0V, the five terminal of the first high-voltage output circuit 1061 forms the logic output signal of 0-15V; When the voltage of U phase high pressure negative output terminal UVS is close to during close to 600V, the five terminal of the first high-voltage output circuit 1061 forms the logic output signal of 600-615V.
Wherein, the resistance of the 4th resistance R4 and the 8th resistance R8 can be 100k Ω, and the resistance of the first resistance R1, the second resistance R2, the 5th resistance R5 and the 6th resistance R6 can be 5k Ω, and the resistance of the 3rd resistance R3 and the 7th resistance R7 can be 50 Ω.When the first DMOS pipe 1031 is in conducting state, due to the clamping action of the first diode D1, then the electric current of the first DMOS pipe 1031 is 15V/100k Ω=0.15mA, and the grid pressure drop of the first DMOS pipe 1031 is 15V-0.15mA × (5k Ω+5k Ω)=13.5V.Similarly, the grid pressure drop of the second DMOS pipe 1051 is also 13.5V.
To sum up, under the prerequisite of the DMOS pipe using the 570V of low cost withstand voltage, by the turn-on and turn-off of the turn-on and turn-off of the withstand voltage triode of Synchronization Control 30V and the withstand voltage DMOS pipe of 570V, ensure within the scope of total temperature, the turn-on and turn-off of the triode that the turn-on and turn-off of the DMOS pipe that 570V is withstand voltage are withstand voltage with 30V are almost synchronous, thus guarantee that the useful life of drive circuit can not because of the withstand voltage design of superposition of the withstand voltage DMOS pipe of 570V and the withstand voltage triode of 30V and the needs produced bear the counter productive of the instantaneous pressure exceeding self load.
This Intelligent Power Module, by the drive circuit of above-mentioned Intelligent Power Module, can effectively improve useful life and fail safe.
Describe and can be understood in flow chart or in this any process otherwise described or method, represent and comprise one or more for realizing the module of the code of the executable instruction of the step of specific logical function or process, fragment or part, and the scope of the preferred embodiment of the present invention comprises other realization, wherein can not according to order that is shown or that discuss, comprise according to involved function by the mode while of basic or by contrary order, carry out n-back test, this should understand by embodiments of the invention person of ordinary skill in the field.
In flow charts represent or in this logic otherwise described and/or step, such as, the sequencing list of the executable instruction for realizing logic function can be considered to, may be embodied in any computer-readable medium, for instruction execution system, device or equipment (as computer based system, comprise the system of processor or other can from instruction execution system, device or equipment instruction fetch and perform the system of instruction) use, or to use in conjunction with these instruction execution systems, device or equipment.With regard to this specification, " computer-readable medium " can be anyly can to comprise, store, communicate, propagate or transmission procedure for instruction execution system, device or equipment or the device that uses in conjunction with these instruction execution systems, device or equipment.The example more specifically (non-exhaustive list) of computer-readable medium comprises following: the electrical connection section (electronic installation) with one or more wiring, portable computer diskette box (magnetic device), random access memory (RAM), read-only memory (ROM), erasablely edit read-only memory (EPROM or flash memory), fiber device, and portable optic disk read-only memory (CDROM).In addition, computer-readable medium can be even paper or other suitable media that can print described program thereon, because can such as by carrying out optical scanner to paper or other media, then carry out editing, decipher or carry out process with other suitable methods if desired and electronically obtain described program, be then stored in computer storage.
Should be appreciated that each several part of the present invention can realize with hardware, software, firmware or their combination.In the above-described embodiment, multiple step or method can with to store in memory and the software performed by suitable instruction execution system or firmware realize.Such as, if realized with hardware, the same in another embodiment, can realize by any one in following technology well known in the art or their combination: the discrete logic with the logic gates for realizing logic function to data-signal, there is the application-specific integrated circuit (ASIC) of suitable combinational logic gate circuit, programmable gate array (PGA), field programmable gate array (FPGA) etc.
Those skilled in the art are appreciated that realizing all or part of step that above-described embodiment method carries is that the hardware that can carry out instruction relevant by program completes, described program can be stored in a kind of computer-readable recording medium, this program perform time, step comprising embodiment of the method one or a combination set of.
In addition, each functional unit in each embodiment of the present invention can be integrated in a processing module, also can be that the independent physics of unit exists, also can be integrated in a module by two or more unit.Above-mentioned integrated module both can adopt the form of hardware to realize, and the form of software function module also can be adopted to realize.If described integrated module using the form of software function module realize and as independently production marketing or use time, also can be stored in a computer read/write memory medium.
The above-mentioned storage medium mentioned can be read-only memory, disk or CD etc.
In the description of this specification, specific features, structure, material or feature that the description of reference term " embodiment ", " some embodiments ", " example ", " concrete example " or " some examples " etc. means to describe in conjunction with this embodiment or example are contained at least one embodiment of the present invention or example.In this manual, identical embodiment or example are not necessarily referred to the schematic representation of above-mentioned term.And the specific features of description, structure, material or feature can combine in an appropriate manner in any one or more embodiment or example.
Although illustrate and describe embodiments of the invention, for the ordinary skill in the art, be appreciated that and can carry out multiple change, amendment, replacement and modification to these embodiments without departing from the principles and spirit of the present invention, scope of the present invention is by claims and equivalency thereof.
Claims (8)
1. a drive circuit for Intelligent Power Module, is characterized in that, comprises the first to the 3rd sync level change-over circuit, and the identical and each sync level change-over circuit of the circuit structure of the described first to the 3rd sync level change-over circuit comprises:
Dipulse circuit for generating, the power positive end of described dipulse circuit for generating is connected with the low-pressure area power supply anode of described Intelligent Power Module, the power supply negative terminal of described dipulse circuit for generating is connected with the low-pressure area power supply negative terminal of described Intelligent Power Module, and the signal input part correspondence of described dipulse circuit for generating is connected with brachium pontis input in U, V, W phase of described Intelligent Power Module;
First inverter, the input of described first inverter is connected with the first output of described dipulse circuit for generating;
First cmos circuit, the first end of described first cmos circuit is connected with the output of described first inverter, second end of described first cmos circuit is connected with the power positive end of described dipulse circuit for generating, and the 3rd end of described first cmos circuit is connected with the power supply negative terminal of described dipulse circuit for generating;
First switching circuit, the first end of described first switching circuit is connected with the 4th end of described first cmos circuit, second end of described first switching circuit is connected with the power supply negative terminal of described dipulse circuit for generating, 3rd end correspondence of described first switching circuit is connected with the positive source of U, V, W phase higher-pressure region of described Intelligent Power Module, described first switching circuit comprise the first DMOS pipe and with the first triode of the synchronous turn-on and turn-off of described first DMOS pipe and the second triode;
Second inverter, the input of described second inverter is connected with the second output of described dipulse circuit for generating;
Second cmos circuit, the first end of described second cmos circuit is connected with the output of described second inverter, second end of described second cmos circuit is connected with the power positive end of described dipulse circuit for generating, and the 3rd end of described second cmos circuit is connected with the power supply negative terminal of described dipulse circuit for generating;
Second switch circuit, the first end of described second switch circuit is connected with the 4th end of described second cmos circuit, second end of described second switch circuit is connected with the power supply negative terminal of described dipulse circuit for generating, 3rd end correspondence of described second switch circuit is connected with the positive source of U, V, W phase higher-pressure region of described Intelligent Power Module, described second switch circuit comprise the second DMOS pipe and with the 3rd triode of the synchronous turn-on and turn-off of described second DMOS pipe and the 4th triode;
Output circuit, the first end of described output circuit is connected with the 4th end of described first switching circuit, second end of described output circuit is connected with the 4th end of described second switch circuit, 3rd end correspondence of described output circuit is connected with the positive source of U, V, W phase higher-pressure region of described Intelligent Power Module, 4th end correspondence of described output circuit is connected with the power cathode of U, V, W phase higher-pressure region of described Intelligent Power Module, and the five terminal correspondence of described output circuit is connected with the output of U, V, W phase higher-pressure region of described Intelligent Power Module.
2. the drive circuit of Intelligent Power Module as claimed in claim 1, it is characterized in that, a described COMS circuit is identical with the circuit structure of described 2nd COMS circuit, and described first switching circuit is identical with the circuit structure of described second switch circuit.
3. the drive circuit of Intelligent Power Module as claimed in claim 1 or 2, it is characterized in that, a described COMS circuit comprises:
First PMOS, the grid of described first PMOS is connected with the output of described first inverter, is connected after the substrate of described first PMOS is connected with the source electrode of described first PMOS with the power positive end of described dipulse circuit for generating;
First resistance of series connection and the second resistance, one end of described first resistance is connected with the drain electrode of described first PMOS, and the other end of described first resistance is connected with one end of described second resistance;
First NMOS tube, the drain electrode of described first NMOS tube is connected with the other end of described second resistance, the grid of described first NMOS tube is connected with the output of described first inverter, be connected with the power supply negative terminal of described dipulse circuit for generating after the substrate of described first NMOS tube is connected with the source electrode of described first NMOS tube, between the drain electrode of described first NMOS tube and the other end of described second resistance, there is first node.
4. the drive circuit of Intelligent Power Module as claimed in claim 3, it is characterized in that, described first resistance is the resistance of positive temperature coefficient, and described second resistance is the resistance of negative temperature coefficient.
5. the drive circuit of Intelligent Power Module as claimed in claim 3, it is characterized in that, described first switching circuit also comprises the 3rd resistance and the 4th resistance, wherein,
One end of described 3rd resistance is connected with described first node;
The collector electrode of described first triode is connected with one end of described 3rd resistance, and the emitter of described first triode is connected with the power supply negative terminal of described dipulse circuit for generating;
The collector electrode of described second triode is connected with the base stage of described first triode with the base stage of described second triode respectively, and the emitter of described second triode is connected with the power supply negative terminal of described dipulse circuit for generating;
The grid of described first DMOS pipe is connected with the other end of described 3rd resistance, is connected after the substrate of described first DMOS pipe is connected with the source electrode of described first DMOS pipe with the collector electrode of described second triode;
One end of described 4th resistance is connected with the drain electrode of described first DMOS pipe, the other end of described 4th resistance is connected with the positive source of the U phase higher-pressure region of described Intelligent Power Module, has Section Point between one end of described 4th resistance and the drain electrode of described first DMOS pipe.
6. the drive circuit of Intelligent Power Module as claimed in claim 5, it is characterized in that, described first triode and described second triode are NPN triode.
7. the drive circuit of Intelligent Power Module as claimed in claim 1, it is characterized in that, described output circuit comprises:
First diode, the negative electrode of described first diode is connected with the 4th end of described first switching circuit;
3rd inverter, the input of described 3rd inverter is connected with the negative electrode of described first diode;
Second diode, the negative electrode of described second diode is connected with the 4th end of described second switch circuit, and the anode of described second diode is connected with the anode of described first diode;
4th inverter, the input of described 4th inverter is connected with the negative electrode of described second diode;
First high-voltage output circuit, the first end of described first high-voltage output circuit is connected with the output of described 3rd inverter, second end of described first high-voltage output circuit is connected with the output of described 4th inverter, 3rd end correspondence of described first high-voltage output circuit and the U of described Intelligent Power Module, V, the positive source of W phase higher-pressure region is connected, after 4th end of described first high-voltage output end is connected with the anode of described second diode with the anode of described first diode respectively, the U of corresponding and described Intelligent Power Module, V, the power cathode of W phase higher-pressure region is connected, the five terminal correspondence of described first high-voltage output circuit and the U of described Intelligent Power Module, V, the output of W phase higher-pressure region is connected.
8. an Intelligent Power Module, is characterized in that, comprises the drive circuit of the Intelligent Power Module according to any one of claim 1-7.
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| CN109495092A (en) * | 2018-11-19 | 2019-03-19 | 深圳市格瑞普智能电子有限公司 | Power switch tube drives circuit and driving method |
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| CN103280949A (en) * | 2011-07-20 | 2013-09-04 | 日银Imp微电子有限公司 | Intelligent power module for three-phase bridge type drive |
| US20130231891A1 (en) * | 2012-03-02 | 2013-09-05 | University Of Nebraska-Lincoln | Drive Systems Including Sliding Mode Observers And Methods Of Controlling The Same |
| US20130320903A1 (en) * | 2012-05-31 | 2013-12-05 | Whitney M. Aalund | Method and controller for an electric motor with switch testing |
| CN104113191A (en) * | 2013-06-05 | 2014-10-22 | 广东美的制冷设备有限公司 | Intelligent power module |
| CN204633585U (en) * | 2015-05-29 | 2015-09-09 | 广东美的制冷设备有限公司 | Intelligent Power Module and drive circuit |
-
2015
- 2015-05-29 CN CN201510288109.4A patent/CN104967291B/en not_active Expired - Fee Related
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103280949A (en) * | 2011-07-20 | 2013-09-04 | 日银Imp微电子有限公司 | Intelligent power module for three-phase bridge type drive |
| US20130231891A1 (en) * | 2012-03-02 | 2013-09-05 | University Of Nebraska-Lincoln | Drive Systems Including Sliding Mode Observers And Methods Of Controlling The Same |
| US20130320903A1 (en) * | 2012-05-31 | 2013-12-05 | Whitney M. Aalund | Method and controller for an electric motor with switch testing |
| CN104113191A (en) * | 2013-06-05 | 2014-10-22 | 广东美的制冷设备有限公司 | Intelligent power module |
| CN204633585U (en) * | 2015-05-29 | 2015-09-09 | 广东美的制冷设备有限公司 | Intelligent Power Module and drive circuit |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109495092A (en) * | 2018-11-19 | 2019-03-19 | 深圳市格瑞普智能电子有限公司 | Power switch tube drives circuit and driving method |
| CN109495092B (en) * | 2018-11-19 | 2024-06-04 | 深圳市格瑞普智能电子有限公司 | Power switch tube driving circuit and driving method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN104967291B (en) | 2017-08-25 |
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