CN104934367A - Preparation method of interconnect copper - Google Patents
Preparation method of interconnect copper Download PDFInfo
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- CN104934367A CN104934367A CN201510198901.0A CN201510198901A CN104934367A CN 104934367 A CN104934367 A CN 104934367A CN 201510198901 A CN201510198901 A CN 201510198901A CN 104934367 A CN104934367 A CN 104934367A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/7684—Smoothing; Planarisation
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Abstract
The invention provides a preparation method of interconnect copper. The top of metal copper is ground to be leveled with a copper seed layer or diffusion barrier layer in a first planarization technology, a doping agent layer formed at the surface of metal copper is annealed to form an alloy copper layer at the top of the metal copper, the doping agent layer is removed, and the copper seed layer or the diffusion barrier layer and the planar alloy copper layer are removed in a second planarization technology. Thus, the diffusion route of doping-agent elements to the copper metal, leveled with the top of a groove, in the annealing process is reduced, the formed alloy metal layer is placed at the surface of the metal copper, the problem that most or even the whole of present alloy metal layer exists in the seed layer and caused increased resistance of the metal copper, and the electromigration performance of the interconnect copper is substantially improved without increase of resistance.
Description
Technical field
The present invention relates to technical field of semiconductors, be specifically related to a kind of preparation method of copper-connection.
Background technology
In integrated circuit fields, in order to improve the electromigration characteristic of copper-connection, the copper wiring technique of industry main flow comprises: step L01: deposition has alloyed copper Seed Layer (alloy seed layer) in the trench; Step L02: carry out copper plating and form metallic copper in the trench; Step L03: also annealing to metallic copper in planarization material copper surface, forms alloy layers of copper on metallic copper top layer; Step L04: overwrite media barrier layer in alloy layers of copper.
In above-mentioned technique, because a large amount of alloying elements has been stayed in Seed Layer, thus significantly can increase the resistance of the copper-connection formed.And the main purpose promoting copper interconnect electromigration rate is the metallic copper upper surface of alloying elements distribution after planarization, that is to say between the interface of metallic copper and dielectric barrier.
In order to promote electromobility, people also been proposed another kind of copper wiring technique, and it comprises: step M01: electro-coppering in the trench, thus form metallic copper at groove and groove outer surface; Step M02: form doped chemical layer at metallic copper upper surface; Step M03: through annealing process, forms alloy layers of copper at copper surface; Step M04: etching removes doped chemical layer, and planarization alloy layers of copper is until flush with groove top; Step M05: overwrite media barrier layer in alloy layers of copper.But, in this technique, before planarization, doped chemical is placed on copper surface, needs heated substrate for a long time, doped chemical could be diffused to the metallic copper position flushed with groove top, which increase heat budget difficulty and the cost of technique.
In addition, also have a kind of copper wiring technique, comprising: step N01: directly fill in the trench containing alloy layers of copper; Step N02: planarization alloy layers of copper surface is until flush with groove top; Step N03: overwrite media barrier layer in alloy layers of copper.Because whole filling metal is all alloyed copper, the resistance of copper-connection also can significantly increase.
Therefore, need to improve existing copper wiring technique, thus prepare the copper-connection of high electromobility, improve the performance of device.
Summary of the invention
In order to overcome above problem, the present invention aims to provide a kind of preparation method of copper-connection, applies dopant layer by copper surface after planarization, makes the dopant element in dopant layer diffuse into copper surface and form alloy layers of copper through annealing.
In order to achieve the above object, the invention provides a kind of preparation method of copper-connection, it comprises the following steps:
Step 01: form groove in semiconductor device substrate, forms copper seed layer in described trenched side-wall and bottom and described groove top surface;
Step 02: form copper metal on described copper seed layer surface, the metal filled full described groove of described copper;
Step 03: through the first flatening process, grinds described copper metal top until to flush with the described copper seed layer top of described groove top surface or higher than described copper seed layer top;
Step 04: form one deck dopant layer on the described copper seed layer surface of described groove top surface and described copper metal top, through annealing process, form alloy layers of copper on described copper metal top top layer;
Step 05: remove described dopant layer; And through the second flatening process, remove the described copper seed layer of described groove top surface, to expose described groove top surface, and remove part described alloy layers of copper until flush with described groove top;
Step 06: at described alloy layers of copper surface and the described groove top surface coverage dielectric barrier that exposes.
Preferably, the dopant element in described dopant layer is metal.
Preferably, the material of described dopant layer is metal simple-substance containing described dopant element or alloy.
Preferably, in described step 04, also comprise: before described annealing process, form protective layer on described dopant layer surface, consume dopant element for the protection of described dopant layer top layer, in described annealing process, oxidation reaction occurs.
Preferably, described annealing process carries out in an inert atmosphere.
Preferably, described inert atmosphere adopts the mist of nitrogen or nitrogen and hydrogen.
Preferably, the temperature that adopts of described annealing process is not higher than 400 DEG C.
Preferably, in described step 05, remove described dopant layer and adopt wet-etching technology or dry etch process.
Preferably, described second flatening process is chemical mechanical milling tech, described step 05 comprises: adopt chemical mechanical milling tech, grind away described dopant layer, and continue described copper seed layer and the described alloy layers of copper of part that downward simultaneous grinding falls described groove top surface.
Preferably, the material of described copper seed layer is fine copper or the alloy content copper lower than 0.5at%.
Preferably, described step 01 is included in semiconductor device substrate and forms groove, forms diffusion impervious layer and copper seed layer successively at the sidewall of described groove, bottom and top surface; Described step 05 comprises: remove described dopant layer; And through the second flatening process, remove the described copper seed layer of described groove top surface and described diffusion impervious layer, to expose described groove top surface, and remove part described alloy layers of copper until flush with described groove top.
In order to achieve the above object, present invention also offers a kind of preparation method of copper-connection, it comprises the following steps:
Step 01: form groove in semiconductor device substrate, forms diffusion impervious layer and copper seed layer successively at the sidewall of described groove, bottom and top surface;
Step 02: form copper metal on described copper seed layer surface, the metal filled full described groove of described copper;
Step 03: through the first flatening process, grinds described copper metal top and described copper seed layer until flush with the described diffusion impervious layer of described groove top surface;
Step 04: form one deck dopant layer on the described diffusion impervious layer surface of described groove top surface and described copper metal top, through annealing process, form alloy layers of copper on described copper metal top top layer;
Step 05: remove described dopant layer; And through the second flatening process, remove the described diffusion impervious layer of described groove top surface, to expose described groove top surface, and remove part described alloy layers of copper until flush with described groove top;
Step 06: at described alloy layers of copper surface and the described groove top surface coverage dielectric barrier that exposes.
The preparation method of copper-connection of the present invention, the first flatening process abrasive metal copper top is adopted to reduce the distance that follow-up dopant element diffuses to the metallic copper position flushed with groove top, the dopant layer being formed at copper surface is utilized to form alloy layers of copper through annealing at metallic copper top, remove dopant layer afterwards, adopt the second flatening process again, remove copper seed layer and smooth alloy layers of copper, thus make formed alloy layers of copper all be positioned at the top layer of metallic copper, overcoming existing alloy layers of copper is present in Seed Layer or entirety is present in metallic copper the problem causing resistance to increase in a large number, the electromigration characteristic of copper-connection is significantly improved while not increasing resistance.
Accompanying drawing explanation
Fig. 1 is the schematic flow sheet of existing copper wiring technique
Fig. 2 is the schematic flow sheet of existing copper wiring technique
Fig. 3 is the schematic flow sheet of existing copper wiring technique
Fig. 4 is the schematic flow sheet of the preparation method of the copper-connection of a preferred embodiment of the present invention
Fig. 5 ~ 10 are each step schematic diagram of the preparation method of the copper-connection of above-mentioned preferred embodiment of the present invention
Embodiment
For making content of the present invention clearly understandable, below in conjunction with Figure of description, content of the present invention is described further.Certain the present invention is not limited to this specific embodiment, and the general replacement known by those skilled in the art is also encompassed in protection scope of the present invention.
The preparation method of copper-connection of the present invention, the first flatening process abrasive metal copper top is adopted to reduce the distance that follow-up dopant element diffuses to the metallic copper position flushed with groove top, the dopant layer being formed at copper surface is utilized to form alloy layers of copper through annealing at metallic copper top, remove dopant layer afterwards, adopt the second flatening process again, remove copper seed layer and smooth alloy layers of copper, thus make formed alloy layers of copper all be positioned at the top layer of metallic copper.
Below in conjunction with accompanying drawing 4 ~ 10 and specific embodiment, the preparation method to copper-connection of the present invention is described in further detail.It should be noted that, accompanying drawing all adopt simplify very much form, use non-ratio accurately, and only in order to object that is convenient, that clearly reach aid illustration the present embodiment.
Refer to Fig. 4, the preparation method of the copper-connection of the present embodiment, comprises the following steps:
Step 01: refer to Fig. 5, forms groove 03 in semiconductor device substrate, forms copper seed layer 04 in groove 03 sidewall and bottom and groove 03 top surface;
Concrete, semiconductor device substrates can be any function element substrate, and in the present embodiment, semiconductor device substrates is included on dielectric layer 01 and is formed with low-k material layer 02, forms groove 03 in low-k material layer 02; After formation groove 03, first can form diffusion impervious layer (not shown) in groove 03 sidewall and bottom and groove 03 top surface, then form copper seed layer 04 on diffusion impervious layer surface.The material of copper seed layer 04 can be fine copper or the alloy content copper lower than 0.5at%.
Step 02: refer to Fig. 6, forms copper metal 05 on copper seed layer 04 surface, and copper metal 05 fills full groove 03;
Concrete, the formation of copper metal 05 can adopt copper electroplating technology, and copper metal 05 fills full groove 03, meanwhile, also inevitably covers on the copper seed layer 04 of groove 03 top surface, and exceeds groove 03 top.
Step 03: refer to Fig. 7, through the first flatening process, grinding copper metal 05 top is until to flush with copper seed layer 04 top of groove 03 top surface or higher than copper seed layer 04 top;
Concrete, adopt chemical mechanical milling tech, planarization copper metal 05 top, copper seed layer 04 top to groove 03 top surface stops, namely to retain the copper seed layer 04 of groove 03 top surface, thus dopant element can be avoided in follow-up annealing process to diffuse into semiconductor device substrates surface that is to say and avoid entering groove 03 top surface; Or also can a little more than copper seed layer 04 top, as long as be unlikely to make follow-up dopant layer oversize at annealing diffusion path.In the present embodiment, owing to also there is diffusion impervious layer, in the first flatening process, namely remain copper seed layer and the diffusion impervious layer of groove top surface, thus dopant element can be avoided in follow-up annealing process to diffuse into semiconductor device substrates surface that is to say and avoid entering groove top surface.
In addition, in other embodiments of the invention, there is diffusion impervious layer when between copper seed layer and groove, also can through the first flatening process, grinding copper metal is to the diffusion impervious layer of groove top surface, and in this process, copper seed layer is also removed.
Step 04: refer to Fig. 8, forms one deck dopant layer 06 on copper seed layer 04 surface of groove 03 top surface and copper metal 05 top, through annealing process, forms alloy layers of copper 07 at copper metal 05 top skin;
Concrete, the dopant element in dopant layer 06 is metal, such as manganese, aluminium, silver etc., and the material of dopant layer 06 is metal simple-substance containing dopant element or alloy; This step 04 also comprises: before annealing process, forms protective layer, consume dopant element for the protection of dopant layer 06 top layer, in annealing process, oxidation reaction occurs on dopant layer 06 surface.Annealing process can carry out in an inert atmosphere, thus avoids dopant layer generation chemical reaction, and preferably, inert atmosphere adopts the mist of nitrogen or nitrogen and hydrogen; The temperature that annealing process adopts is not higher than 400 DEG C, and to avoid, temperature is too high causes damage to semiconductor device.
In other embodiments of the invention, because the copper seed layer of groove top surface being removed, now, form dopant layer on the diffusion impervious layer surface of groove top surface and copper metal top, through annealing process, form alloy layers of copper at statistical number top surface.
Step 05: refer to Fig. 9, removes dopant layer 06; And through the second flatening process, remove the copper seed layer 04 of groove 03 top surface, to expose groove 03 top surface, and removal unit deciliter gold-copper layer 07 is until flush with groove 03 top;
Concrete, remove dopant layer 06 and can adopt wet-etching technology, dry etch process or chemical mechanical milling tech.Such as, wet method or dry etch process can be first adopted to remove dopant layer, then cmp alloy part layers of copper and copper seed layer or cmp alloy part layers of copper and copper seed layer and diffusion impervious layer.Also chemical mechanical milling tech can be adopted to grind away dopant layer, and continue copper seed layer and alloy part layers of copper that downward simultaneous grinding falls groove top surface.
In the present embodiment, second flatening process is chemical mechanical milling tech, can comprise: adopt chemical mechanical milling tech, grind away dopant layer 06, then continue downward simultaneous grinding and fall the copper seed layer 04 of groove 03 top surface, diffusion impervious layer (not shown) and alloy part layers of copper 07 until flush with groove 03 top.
In other embodiments of the invention, copper seed layer is removed in the first flatening process, in this step 05, comprise: remove dopant layer through the second flatening process, remove groove top surface diffusion impervious layer, to expose groove top surface, and removal unit deciliter gold-copper layer is until flush with groove top.
Step 06: refer to Figure 10, alloy layers of copper 07 surface and expose groove 03 top surface overwrite media barrier layer 08.
In sum, the preparation method of copper-connection of the present invention, adopt the first flatening process abrasive metal copper top to flushing with copper seed layer, or diffusion impervious layer flushes, the dopant layer being formed at copper surface is utilized to form alloy layers of copper through annealing at metallic copper top, remove dopant layer afterwards, adopt the second flatening process again, remove copper seed layer or diffusion impervious layer, and planarization alloy layers of copper, thus reduce the distance that dopant element in annealing process diffuses to the copper metal sites flushed with groove top, formed alloy layers of copper is made all to be positioned at the top layer of metallic copper, overcoming existing alloy layers of copper is present in Seed Layer or entirety is present in metallic copper the problem causing resistance to increase in a large number, the electromigration characteristic of copper-connection is significantly improved while not increasing resistance.
Although the present invention discloses as above with preferred embodiment; right described embodiment is citing for convenience of explanation only; and be not used to limit the present invention; those skilled in the art can do some changes and retouching without departing from the spirit and scope of the present invention, and the protection range that the present invention advocates should be as the criterion with described in claims.
Claims (12)
1. a preparation method for copper-connection, is characterized in that, comprises the following steps:
Step 01: form groove in semiconductor device substrate, forms copper seed layer in described trenched side-wall and bottom and described groove top surface;
Step 02: form copper metal on described copper seed layer surface, the metal filled full described groove of described copper;
Step 03: through the first flatening process, grinds described copper metal top until to flush with the described copper seed layer top of described groove top surface or higher than described copper seed layer top;
Step 04: form one deck dopant layer on the described copper seed layer surface of described groove top surface and described copper metal top, through annealing process, form alloy layers of copper on described copper metal top top layer;
Step 05: remove described dopant layer; And through the second flatening process, remove the described copper seed layer of described groove top surface, to expose described groove top surface, and remove part described alloy layers of copper until flush with described groove top;
Step 06: at described alloy layers of copper surface and the described groove top surface coverage dielectric barrier that exposes.
2. the preparation method of copper-connection according to claim 1, is characterized in that, the dopant element in described dopant layer is metal.
3. the preparation method of copper-connection according to claim 2, is characterized in that, the material of described dopant layer is metal simple-substance containing described dopant element or alloy.
4. the preparation method of copper-connection according to claim 1; it is characterized in that; in described step 04; also comprise: before described annealing process; form protective layer on described dopant layer surface, consume dopant element for the protection of described dopant layer top layer, in described annealing process, oxidation reaction occurs.
5. the preparation method of copper-connection according to claim 1, is characterized in that, described annealing process carries out in an inert atmosphere.
6. the preparation method of copper-connection according to claim 5, is characterized in that, described inert atmosphere adopts the mist of nitrogen or nitrogen and hydrogen.
7. the preparation method of copper-connection according to claim 1, is characterized in that, the temperature that described annealing process adopts is not higher than 400 DEG C.
8. the preparation method of copper-connection according to claim 1, is characterized in that, in described step 05, removes described dopant layer and adopts wet-etching technology or dry etch process.
9. the preparation method of copper-connection according to claim 1, it is characterized in that, described second flatening process is chemical mechanical milling tech, described step 05 comprises: adopt chemical mechanical milling tech, grind away described dopant layer, and continue described copper seed layer and the described alloy layers of copper of part that downward simultaneous grinding falls described groove top surface.
10. the preparation method of copper-connection according to claim 1, is characterized in that, the material of described copper seed layer is fine copper or the alloy content copper lower than 0.5at%.
The preparation method of 11. copper-connections according to claim 1, is characterized in that, described step 01 is included in semiconductor device substrate and forms groove, forms diffusion impervious layer and copper seed layer successively at the sidewall of described groove, bottom and top surface; Described step 05 comprises: remove described dopant layer; And through the second flatening process, remove the described copper seed layer of described groove top surface and described diffusion impervious layer, to expose described groove top surface, and remove part described alloy layers of copper until flush with described groove top.
The preparation method of 12. 1 kinds of copper-connections, is characterized in that, comprises the following steps:
Step 01: form groove in semiconductor device substrate, forms diffusion impervious layer and copper seed layer successively at the sidewall of described groove, bottom and top surface;
Step 02: form copper metal on described copper seed layer surface, the metal filled full described groove of described copper;
Step 03: through the first flatening process, grinds described copper metal top and described copper seed layer until flush with the described diffusion impervious layer of described groove top surface;
Step 04: form one deck dopant layer on the described diffusion impervious layer surface of described groove top surface and described copper metal top, through annealing process, form alloy layers of copper on described copper metal top top layer;
Step 05: remove described dopant layer; And through the second flatening process, remove the described diffusion impervious layer of described groove top surface, to expose described groove top surface, and remove part described alloy layers of copper until flush with described groove top;
Step 06: at described alloy layers of copper surface and the described groove top surface coverage dielectric barrier that exposes.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107123505B (en) * | 2017-05-24 | 2019-02-26 | 成都线易科技有限责任公司 | Magnetic induction device and manufacturing method |
| CN112259502A (en) * | 2020-10-23 | 2021-01-22 | 华虹半导体(无锡)有限公司 | Method for manufacturing copper interconnection structure |
| CN114032592A (en) * | 2021-10-21 | 2022-02-11 | 上海华力集成电路制造有限公司 | Method for forming copper interconnection structure |
| CN114664732A (en) * | 2022-05-25 | 2022-06-24 | 合肥晶合集成电路股份有限公司 | Semiconductor integrated device and manufacturing method thereof |
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| CN107123505B (en) * | 2017-05-24 | 2019-02-26 | 成都线易科技有限责任公司 | Magnetic induction device and manufacturing method |
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| CN112259502B (en) * | 2020-10-23 | 2022-08-16 | 华虹半导体(无锡)有限公司 | Method for manufacturing copper interconnection structure |
| CN114032592A (en) * | 2021-10-21 | 2022-02-11 | 上海华力集成电路制造有限公司 | Method for forming copper interconnection structure |
| CN114664732A (en) * | 2022-05-25 | 2022-06-24 | 合肥晶合集成电路股份有限公司 | Semiconductor integrated device and manufacturing method thereof |
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