CN104934367B - A kind of preparation method of copper-connection - Google Patents
A kind of preparation method of copper-connection Download PDFInfo
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- CN104934367B CN104934367B CN201510198901.0A CN201510198901A CN104934367B CN 104934367 B CN104934367 B CN 104934367B CN 201510198901 A CN201510198901 A CN 201510198901A CN 104934367 B CN104934367 B CN 104934367B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/7684—Smoothing; Planarisation
Abstract
The invention provides a kind of preparation method of copper-connection, extremely flushed using the first flatening process abrasive metal copper top with copper seed layer, or diffusion impervious layer flushes, alloy layers of copper is formed at the top of metallic copper using the dopant layer for being formed at copper surface is annealed, dopant layer is removed afterwards, the second flatening process is used again, remove copper seed layer or diffusion impervious layer, and planarization alloy layers of copper, the distance of the copper metal position flushed so as to reduce dopant element in annealing process to diffuse to the top of the groove, so that the alloy layers of copper formed is respectively positioned on the top layer of metallic copper, existing alloy layers of copper is overcome largely to be present in Seed Layer or overall be present in metallic copper the problem of causing resistance increase, so as to significantly improve the electromigration characteristic of copper-connection while resistance is not increased.
Description
Technical field
The present invention relates to technical field of semiconductors, and in particular to a kind of preparation method of copper-connection.
Background technology
In integrated circuit fields, in order to improve the electromigration characteristic of copper-connection, the copper wiring technique of industry main flow includes：Step
Rapid L01：Deposition has alloy copper seed layer (alloy seed layer) in the trench；Step L02：Copper plating is carried out in groove
Middle formation metallic copper；Step L03：Planarization material copper surface is simultaneously annealed to metallic copper, and alloy is formed on metallic copper top layer
Layers of copper；Step L04：In alloy layers of copper overlying lid dielectric barrier.
In above-mentioned technique, because substantial amounts of alloying element has been stayed in Seed Layer, so as to which formed copper can be dramatically increased
The resistance of interconnection.And the main purpose for lifting copper interconnection electromigration rate is on the metallic copper after planarization alloying elements distribution
Surface, it that is to say between the interface of metallic copper and dielectric barrier.
In order to lift electromobility, people have also been proposed another copper wiring technique, and it includes：Step M01：In the trench
Electro-coppering, so as to form metallic copper in groove and groove outer surface；Step M02：Doped chemical layer is formed in metallic copper upper surface；
Step M03：Annealed technique, alloy layers of copper is formed in copper surface；Step M04：Etching removes doped chemical layer, and flat
Chemical combination gold-copper layer with the top of the groove until flush；Step M05：In alloy layers of copper overlying lid dielectric barrier.However, this technique
In, before planarization, doped chemical is placed on copper surface, it is necessary to heat substrate for a long time, could be by doping member
Element diffuses to the metallic copper position flushed with the top of the groove, and which increase the heat budget difficulty and cost of technique.
In addition, also a kind of copper wiring technique, including：Step N01：Layers of copper containing alloy is directly filled in the trench；Step
N02：Planarization alloyed copper layer surface with the top of the groove until flush；Step N03：In alloy layers of copper overlying lid dielectric barrier.
Because whole filling metal is all alloyed copper, the resistance of copper-connection can also dramatically increase.
Therefore, it is necessary to be improved to existing copper wiring technique, so as to prepare the copper-connection of high electromobility, improve
The performance of device.
The content of the invention
In order to overcome problem above, the present invention is intended to provide a kind of preparation method of copper-connection, by after planarization
Copper surface applies dopant layer, and the annealed dopant element made in dopant layer diffuses into copper surface and formed
Alloy layers of copper.
In order to achieve the above object, the invention provides a kind of preparation method of copper-connection, it comprises the following steps：
Step 01：Groove is formed in semiconductor device substrate, in the trenched side-wall and bottom and the trench top
Portion surface forms copper seed layer；
Step 02：Copper metal, the full groove of copper metal filling are formed on the copper seed layer surface；
Step 03：Through the first flatening process, the institute until with the top of the groove surface is ground at the top of the copper metal
State at the top of copper seed layer flush or above at the top of the copper seed layer；
Step 04：One layer is formed at the top of the copper seed layer surface on the top of the groove surface and the copper metal to mix
Miscellaneous oxidant layer, annealed technique, alloy layers of copper is formed in the copper metal top skin；
Step 05：Remove the dopant layer；And through the second flatening process, remove the described of the top of the groove surface
Copper seed layer, to expose the top of the groove surface, and remove the part alloy layers of copper until with the top of the groove
Flush；
Step 06：On the alloyed copper layer surface and the top of the groove surface overwrite media barrier layer of exposure.
Preferably, the dopant element in the dopant layer is metal.
Preferably, the material of the dopant layer is metal simple-substance or alloy containing the dopant element.
Preferably, in the step 04, in addition to：Before the annealing process, formed on the dopant layer surface
Protective layer, dopant member is consumed for protecting the dopant layer top layer that oxidation reaction occurs in the annealing process
Element.
Preferably, the annealing process is carried out in an inert atmosphere.
Preferably, the inert atmosphere uses nitrogen or the mixed gas of nitrogen and hydrogen.
Preferably, temperature is not higher than 400 DEG C used by the annealing process.
Preferably, in the step 05, remove the dopant layer and use wet-etching technology or dry etch process.
Preferably, second flatening process is chemical mechanical milling tech, and the step 05 includes：Using chemical machine
Tool grinding technics, the dopant layer is ground away, and continue the copper kind that downward simultaneous grinding falls the top of the groove surface
Sublayer and part the alloy layers of copper.
Preferably, the material of the copper seed layer is the copper that fine copper or alloy content are less than 0.5at%.
Preferably, the step 01, which is included in semiconductor device substrate, forms groove, side wall, bottom in the groove
Portion and top surface sequentially form diffusion impervious layer and copper seed layer；The step 05 includes：Remove the dopant layer；And pass through
Second flatening process, the copper seed layer on the top of the groove surface and the diffusion impervious layer are removed, to expose
The top of the groove surface is stated, and removes the part alloy layers of copper until being flushed with the top of the groove.
In order to achieve the above object, present invention also offers a kind of preparation method of copper-connection, it comprises the following steps：
Step 01：Form groove in semiconductor device substrate, the side wall of the groove, bottom and top surface according to
Secondary formation diffusion impervious layer and copper seed layer；
Step 02：Copper metal, the full groove of copper metal filling are formed on the copper seed layer surface；
Step 03：Through the first flatening process, grind at the top of the copper metal and the copper seed layer up to the ditch
The diffusion impervious layer of groove top surface flushes；
Step 04：One layer is formed at the top of the diffusion barrier layer surface on the top of the groove surface and the copper metal
Dopant layer, annealed technique, alloy layers of copper is formed in the copper metal top skin；
Step 05：Remove the dopant layer；And through the second flatening process, remove the described of the top of the groove surface
Diffusion impervious layer, to expose the top of the groove surface, and remove the part alloy layers of copper until with the trench top
Portion flushes；
Step 06：On the alloyed copper layer surface and the top of the groove surface overwrite media barrier layer of exposure.
The preparation method of the copper-connection of the present invention, subsequently adulterated using reducing at the top of the first flatening process abrasive metal copper
Agent elements diffusion is passed through to the distance of the metallic copper position flushed with the top of the groove using the dopant layer for being formed at copper surface
Annealing forms alloy layers of copper at the top of metallic copper, removes dopant layer afterwards, then using the second flatening process, remove copper removal seed
Layer and flat alloy layers of copper, so that the alloy layers of copper formed is respectively positioned on the top layer of metallic copper, overcome existing conjunction
Gold-copper layer be largely present in Seed Layer or it is overall be present in metallic copper the problem of causing resistance increase, do not increasing resistance
The electromigration characteristic of copper-connection is significantly improved simultaneously.
Brief description of the drawings
Fig. 1 is the schematic flow sheet of existing copper wiring technique
Fig. 2 is the schematic flow sheet of existing copper wiring technique
Fig. 3 is the schematic flow sheet of existing copper wiring technique
Fig. 4 is the schematic flow sheet of the preparation method of the copper-connection of the preferred embodiment of the present invention
Fig. 5~10 are each step schematic diagram of the preparation method of the copper-connection of the above-mentioned preferred embodiment of the present invention
Embodiment
To make present disclosure more clear understandable, below in conjunction with Figure of description, present disclosure is made into one
Walk explanation.Certainly the invention is not limited in the specific embodiment, the general replacement known to those skilled in the art
Cover within the scope of the present invention.
The preparation method of the copper-connection of the present invention, subsequently adulterated using reducing at the top of the first flatening process abrasive metal copper
Agent elements diffusion is passed through to the distance of the metallic copper position flushed with the top of the groove using the dopant layer for being formed at copper surface
Annealing forms alloy layers of copper at the top of metallic copper, removes dopant layer afterwards, then using the second flatening process, remove copper removal seed
Layer and flat alloy layers of copper, so that the alloy layers of copper formed is respectively positioned on the top layer of metallic copper.
The preparation method of the copper-connection of the present invention is made further specifically below in conjunction with accompanying drawing 4~10 and specific embodiment
It is bright.It should be noted that accompanying drawing is using very simplified form, using non-accurately ratio, and only to it is convenient, clearly reach
To the purpose for aiding in illustrating the present embodiment.
Referring to Fig. 4, the preparation method of the copper-connection of the present embodiment, comprises the following steps：
Step 01：Referring to Fig. 5, form groove 03 in semiconductor device substrate, in the side wall of groove 03 and bottom and
The top surface of groove 03 forms copper seed layer 04；
Specifically, semiconductor device substrates can be any function element substrate, and in the present embodiment, semiconductor device substrates
It is included on dielectric layer 01 formed with low-k material layers 02, groove 03 is formed in low-k material layers 02；Forming groove 03
Afterwards, diffusion impervious layer (not shown) first can be formed in the side wall of groove 03 and bottom and the top surface of groove 03, then expanded
Dissipate barrier layer surface and form copper seed layer 04.The material of copper seed layer 04 can be fine copper or alloy content less than 0.5at%'s
Copper.
Step 02：Referring to Fig. 6, copper metal 05 is formed on the surface of copper seed layer 04, the full groove 03 of the filling of copper metal 05；
Specifically, the formation of copper metal 05 can use copper electroplating technology, copper metal 05 fills full groove 03, meanwhile,
Inevitably it is covered on the copper seed layer 04 of the top surface of groove 03, and is higher by the top of groove 03.
Step 03：Referring to Fig. 7, through the first flatening process, the top of grinding copper metal 05 until with the top table of groove 03
The top of copper seed layer 04 in face is flush or above the top of copper seed layer 04；
Specifically, using chemical mechanical milling tech, the top of planarization copper metal 05, to the copper kind of the top surface of groove 03
The top of sublayer 04 stops, that is, to retain the copper seed layer 04 of the top surface of groove 03, so as in follow-up lehr attendant
Avoid dopant element to diffuse into semiconductor device substrates surface and that is to say in skill and avoid enter into the top surface of groove 03；Or
The top of copper seed layer 04 can also be slightly above, as long as being unlikely to make follow-up dopant layer oversize in annealing diffusion path.
In the present embodiment, due to also having diffusion impervious layer, in the first flatening process, that is, the top of the groove surface is remained
Copper seed layer and diffusion impervious layer, so as to avoid dopant element from diffusing into semiconductor device in follow-up annealing process
Part substrate surface, which that is to say, avoids enter into the top of the groove surface.
In addition, in other embodiments of the invention, in the case of there is diffusion impervious layer between copper seed layer and groove,
Copper metal can be ground to the diffusion impervious layer on the top of the groove surface, during this, copper seed layer through the first flatening process
It is removed.
Step 04：Referring to Fig. 8, form one on the surface of copper seed layer 04 of the top surface of groove 03 and the top of copper metal 05
Layer dopant layer 06, annealed technique, alloy layers of copper 07 is formed in the top skin of copper metal 05；
Specifically, the dopant element in dopant layer 06 is metal, for example, manganese, aluminium, silver etc., the material of dopant layer 06
For metal simple-substance or alloy containing dopant element；This step 04 also includes：Before annealing process, in the table of dopant layer 06
Face forms protective layer, and dopant member is consumed for protecting the top layer of dopant layer 06 that oxidation reaction occurs in annealing process
Element.Annealing process can be carried out in an inert atmosphere, so as to avoid that dopant layer is chemically reacted, preferably, indifferent gas
Atmosphere uses nitrogen or the mixed gas of nitrogen and hydrogen；Temperature is not higher than 400 DEG C used by annealing process, to avoid temperature
Spend height semiconductor devices is caused to damage.
In other embodiments of the invention, because removing the copper seed layer on the top of the groove surface, now, in the top of the groove
Dopant layer is formed at the top of the diffusion barrier layer surface and copper metal on surface, annealed technique, is formed in statistical number top surface
Alloy layers of copper.
Step 05：Referring to Fig. 9, remove dopant layer 06；And through the second flatening process, remove the top surface of groove 03
Copper seed layer 04, to expose the top surface of groove 03, and remove alloy part layers of copper 07 until neat with the top of groove 03
It is flat；
Specifically, wet-etching technology, dry etch process or cmp can be used by removing dopant layer 06
Technique.For example, dopant layer, then cmp alloy part layers of copper first can be removed using wet method or dry etch process
And copper seed layer or cmp alloy part layers of copper and copper seed layer and diffusion impervious layer.It can also use and change
Learn mechanical milling tech and grind away dopant layer, and continue copper seed layer and part that downward simultaneous grinding falls the top of the groove surface
Alloy layers of copper.
In the present embodiment, the second flatening process is chemical mechanical milling tech, can be included：Using cmp
Technique, dopant layer 06 is ground away, be further continued for copper seed layer 04, diffusion barrier that downward simultaneous grinding falls the top surface of groove 03
Layer (not shown) and alloy part layers of copper 07 with the top of groove 03 until flush.
In other embodiments of the invention, copper seed layer removes in the first flatening process, in this step 05,
Including：Remove dopant layer and through the second flatening process, the diffusion impervious layer on removal the top of the groove surface, to expose ditch
Groove top surface, and alloy part layers of copper is removed until being flushed with the top of the groove.
Step 06：Referring to Fig. 10, hindered in the top surface overwrite media of groove 03 of the surface of alloy layers of copper 07 and exposure
Barrier 08.
In summary, the preparation method of copper-connection of the invention, using the first flatening process abrasive metal copper top extremely
Flushed with copper seed layer or diffusion impervious layer flushes, it is annealed in metallic copper using the dopant layer for being formed at copper surface
Alloy layers of copper is formed on top, removes dopant layer afterwards, then using the second flatening process, remove copper seed layer or diffusion barrier
Layer and planarization alloy layers of copper, the copper flushed with the top of the groove is diffused to so as to reduce dopant element in annealing process
The distance of metal sites so that the alloy layers of copper formed is respectively positioned on the top layer of metallic copper, and it is big to overcome existing alloy layers of copper
Amount be present in Seed Layer or it is overall be present in metallic copper the problem of causing resistance increase, it is notable while resistance is not increased
Ground improves the electromigration characteristic of copper-connection.
Although the present invention is disclosed as above with preferred embodiment, the right embodiment illustrated only for the purposes of explanation and
, the present invention is not limited to, if those skilled in the art can make without departing from the spirit and scope of the present invention
Dry change and retouching, the protection domain that the present invention is advocated should be to be defined described in claims.
Claims (11)
1. a kind of preparation method of copper-connection, it is characterised in that comprise the following steps：
Step 01：Groove is formed in semiconductor device substrate, in the trenched side-wall and bottom and the top of the groove table
Face forms copper seed layer；The material of the copper seed layer is the copper that fine copper or alloy content are less than 0.5at%；
Step 02：Copper metal, the full groove of copper metal filling are formed on the copper seed layer surface；
Step 03：Through the first flatening process, the copper until with the top of the groove surface is ground at the top of the copper metal
Flush or above at the top of the copper seed layer at the top of Seed Layer；
Step 04：One layer of dopant is formed at the top of the copper seed layer surface on the top of the groove surface and the copper metal
Layer, annealed technique, alloy layers of copper is formed in the copper metal top skin；
Step 05：Remove the dopant layer；And through the second flatening process, remove the copper kind on the top of the groove surface
Sublayer, to expose the top of the groove surface, and the part alloy layers of copper is removed until being flushed with the top of the groove；
Step 06：On the alloyed copper layer surface and the top of the groove surface overwrite media barrier layer of exposure.
2. the preparation method of copper-connection according to claim 1, it is characterised in that the dopant member in the dopant layer
Element is metal.
3. the preparation method of copper-connection according to claim 2, it is characterised in that the material of the dopant layer be containing
The metal simple-substance or alloy of the dopant element.
4. the preparation method of copper-connection according to claim 1, it is characterised in that in the step 04, in addition to：Institute
Before stating annealing process, protective layer is formed on the dopant layer surface, for protecting the dopant layer top layer to be moved back described
Oxidation reaction occurs in ignition technique and consumes dopant element.
5. the preparation method of copper-connection according to claim 1, it is characterised in that the annealing process is in an inert atmosphere
Carry out.
6. the preparation method of copper-connection according to claim 5, it is characterised in that the inert atmosphere using nitrogen or
The mixed gas of person's nitrogen and hydrogen.
7. the preparation method of copper-connection according to claim 1, it is characterised in that temperature used by the annealing process
Not higher than 400 DEG C.
8. the preparation method of copper-connection according to claim 1, it is characterised in that in the step 05, mixed described in removal
Miscellaneous oxidant layer uses wet-etching technology or dry etch process.
9. the preparation method of copper-connection according to claim 1, it is characterised in that second flatening process is chemistry
Mechanical milling tech, the step 05 include：Using chemical mechanical milling tech, grind away the dopant layer, and continue to
The lower copper seed layer and part the alloy layers of copper for grinding away the top of the groove surface simultaneously.
10. the preparation method of copper-connection according to claim 1, it is characterised in that the step 01 is included in half and led
Groove is formed in body device substrate, diffusion impervious layer and copper kind are sequentially formed in the side wall of the groove, bottom and top surface
Sublayer；The step 05 includes：Remove the dopant layer；And through the second flatening process, remove the top of the groove surface
The copper seed layer and the diffusion impervious layer, to expose the top of the groove surface, and remove the part alloy
Layers of copper with the top of the groove until flush.
11. a kind of preparation method of copper-connection, it is characterised in that comprise the following steps：
Step 01：Groove is formed in semiconductor device substrate, in the side wall of the groove, bottom and top surface successively shape
Into diffusion impervious layer and copper seed layer；The material of copper seed layer is the copper that fine copper or alloy content are less than 0.5at%；
Step 02：Copper metal, the full groove of copper metal filling are formed on the copper seed layer surface；
Step 03：Through the first flatening process, grind at the top of the copper metal and the copper seed layer up to the trench top
The diffusion impervious layer on portion surface flushes；
Step 04：One layer of doping is formed at the top of the diffusion barrier layer surface on the top of the groove surface and the copper metal
Oxidant layer, annealed technique, alloy layers of copper is formed in the copper metal top skin；
Step 05：Remove the dopant layer；And through the second flatening process, remove the diffusion on the top of the groove surface
Barrier layer, to expose the top of the groove surface, and the part alloy layers of copper is removed until neat with the top of the groove
It is flat；
Step 06：On the alloyed copper layer surface and the top of the groove surface overwrite media barrier layer of exposure.
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| CN107123505B (en) * | 2017-05-24 | 2019-02-26 | 成都线易科技有限责任公司 | Magnetic induction device and manufacturing method |
| CN112259502B (en) * | 2020-10-23 | 2022-08-16 | 华虹半导体(无锡)有限公司 | Method for manufacturing copper interconnection structure |
| CN114032592B (en) * | 2021-10-21 | 2023-06-13 | 上海华力集成电路制造有限公司 | Method for forming copper interconnection structure |
| CN114664732B (en) * | 2022-05-25 | 2022-09-16 | 合肥晶合集成电路股份有限公司 | Semiconductor integrated device and manufacturing method thereof |
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| US6181013B1 (en) * | 1999-06-25 | 2001-01-30 | Taiwan Semiconductor Manufacturing Company | Method for selective growth of Cu3Ge or Cu5Si for passivation of damascene copper structures and device manufactured thereby |
| CN102097363A (en) * | 2009-12-15 | 2011-06-15 | 中芯国际集成电路制造(上海)有限公司 | Metal interconnecting method |
| CN102903666A (en) * | 2011-07-25 | 2013-01-30 | 中芯国际集成电路制造(上海)有限公司 | Manufacturing method of semiconductor device |
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| US20090321934A1 (en) * | 2008-06-30 | 2009-12-31 | Lavoie Adrien R | Self-aligned cap and barrier |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6181013B1 (en) * | 1999-06-25 | 2001-01-30 | Taiwan Semiconductor Manufacturing Company | Method for selective growth of Cu3Ge or Cu5Si for passivation of damascene copper structures and device manufactured thereby |
| CN102097363A (en) * | 2009-12-15 | 2011-06-15 | 中芯国际集成电路制造(上海)有限公司 | Metal interconnecting method |
| CN102903666A (en) * | 2011-07-25 | 2013-01-30 | 中芯国际集成电路制造(上海)有限公司 | Manufacturing method of semiconductor device |
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