CN104901702B

CN104901702B - data storage device

Info

Publication number: CN104901702B
Application number: CN201510272221.9A
Authority: CN
Inventors: H·马克拉姆
Original assignee: Ecole Polytechnique Federale de Lausanne EPFL
Current assignee: Ecole Polytechnique Federale de Lausanne EPFL
Priority date: 2009-07-28
Filing date: 2010-07-27
Publication date: 2018-11-30
Anticipated expiration: 2030-07-27
Also published as: WO2011012158A1; WO2011012614A3; JP5848414B2; JP2014209794A; JP2013500660A; KR101734596B1; KR20120046760A; CN102648582A; CN102648582B; WO2011012614A2; JP5587412B2; ES2823253T3; CN104901702A

Abstract

A kind of data storage device, including detectable physical behavior encoded information, wherein the physical behavior be being capable of the structural member detected by data storage device reader, the physical behavior is separated according to encoding scheme, so that the spacing between the physical behavior indicates the content of encoded information.

Description

Data storage device

The application be the applying date be on July 27th, 2010, application No. is 201080042987.3 (international application no PCT/ EP2010/060875), the divisional application of the application for a patent for invention of entitled " coding and decoding information ".

Technical field

This specification is related to coding and decoding information.

Background technique

Encoder is a kind of device that information is converted into the second expression from the first expression (representation).Coding Device can be included in many different systems and device, and the system and device include data communication device, data storage The combination of part, data compression device, data encryption device and these devices and other devices.Encoder can be somebody's turn to do with that can rebuild The decoder of information matches.Encoded information and decoded information can be communicated and/or are stored in data with signal form On memory device.

Biological neuron and other biological nervous system can encode information, and be led to using electrochemistry signaling Letter.For example, biological nervous system can compile information with the action potential (action potentials) of approximately equal amplitude Code.Biological nervous system includes cynapse, is used as the electrochemical transducer that electrochemical signals are converted into conductance variation.It is even single A neuron also can receive thousands of a electrochemical signals as the input in its branch's (referred to as " dendron ").These inputs cause thin The voltage change of after birth two sides, is merged in a manner of Time Dependent.It is (non-thread that the fusion of this input follows passively (linear), active Property), cable (at any time decay) and electrochemistry (diffusion) rule.In some cases, such input can be fused to a column In successive action potential.

Summary of the invention

Present specification describes the technologies information-related with coding and decoding.

Generally, a novel aspects of theme described in this specification can be embodied in the information in encoder into In the method for row coding, this method includes following movement：Receiving indicates information using discrete digital set (collection) Signal；Base code (time-based code) when being converted into received signal by encoder；And base when exporting described Code.Base code is divided into time interval (time intervals) when described.Each time interval of base code corresponds to when described A number in the received signal.Each number of the first state of the received signal is expressed as when described The event that the first moment in the corresponding time interval of base code occurs.Every number of second state of the received signal Word be expressed as the second moment when described in the corresponding time interval of base code generation event, first moment with Second moment is differentiable (distinguishable).The institute of number in the received signal is stateful to be all By it is described when base code in event indicate.

Other embodiments of this aspect include：Corresponding system, device, and be configured as executing and (encode and calculating On machine memory device) computer program of the movement of the method.

Another novel aspects of theme described in this specification can be embodied in following system, which includes：It is defeated Enter, is used to receive the signal for indicating information using discrete digital set；Encoder encodes received signal； And output, it is used for base code when will be described and is provided to another system or device.The encoder includes：State detector, Its state for being configured as detecting the number in the received signal；And translater, it is configured as having received described The state transition Cheng Shiji code of number in signal, base code includes time interval set when described, and each time interval is assigned A respective digital in the received signal, each time interval include event, the thing in each time interval The state of the corresponding distribution number of timing (timing) characterization of part.

Other embodiments of this aspect include：Corresponding method, and be configured as executing and (encode and stored in computer On device) computer program of the movement of the method.

Another novel aspects of theme described in this specification can be embodied in be decoded for clock synchronization base code signal Method in, this method includes following movement：Base code signal when receiving at decoder；Detect the event in the time interval Timing；And following signal is exported, what which indicated to express in base code signal when described using discrete digital set Information.Base code signal is divided into time interval when described, and each time interval of base code includes an event when described, and The information content of base code signal when described in the temporal expression of the event in the time interval.

Another novel aspects of theme described in this specification can be embodied in be decoded for clock synchronization base code signal System in, which includes：Input, base code signal when receiving；Event detector, base code when being configured as detecting described The timing of event in the time interval of signal；Translater is configured as event when will be described in the time interval of base code Timing translate into the state of digital collection；And output, it is configured to supply the signal including the number.When described Base code signal is divided into time interval, when described each time interval of base code signal include an event, and it is described when Between interval in event temporal expression described in when base code signal the information content.

The details of one or more embodiments of theme described in this specification is explained in the the accompanying drawings and the following description It states.From the description, drawings and claims, other features, aspect and the advantage of the theme be will be apparent.

Detailed description of the invention

Figure 1A is schematically showing for an encoder/decoder system.

Figure 1B is the flow chart of a process for being coded and decoded to information.

Fig. 2A be one can schematically showing to the system that information is encoded.

Fig. 2 B is schematically showing for an embodiment of clock coder.

Fig. 3 is schematically showing for a time encoding process.

Fig. 4 is schematically showing for the another embodiment of clock coder.

Fig. 5 be with detection signal in data transmission beginning (beginning) and ending (end) clock coder into Row time encoding is schematically shown.

Fig. 6 is schematically showing for the another embodiment of clock coder.

Fig. 7 is the schematically showing of being encoded of header (header) at the beginning to the data transmission in signal.

Fig. 8 is schematically showing for the another embodiment of clock coder.

Fig. 9 is schematically showing for the time encoding of a signal for including more than two state.

Figure 10 is can schematically showing to an embodiment of the system that information is encoded.

Figure 11 is schematically showing for an embodiment of multi-channel encoder.

Figure 12 is schematically showing for a following system, and information can be encoded, compress and storage/biography within the system It is defeated, it is then acquired/receives, decode and decompress.

Figure 13 is schematically showing for an embodiment of decoder.

Figure 14 is schematically showing for the process being decoded to signal, and information is by time interval in the signal Interior event generation timing sequence encodes.

Figure 15 is schematically showing for the another embodiment of encoder.

Figure 16 is the signal that the decoder at the beginning and ending transmitted with the data in detection signal is decoded signal Property indicate, information is encoded by the event generation timing sequence in time interval in the signal.

Figure 17 and Figure 18 is schematically showing for the other embodiments of decoder.

Figure 19 be to be decoded into come the signal encoded including more by the event generation timing sequence in time interval by wherein information It is schematically shown in the signal of two states.

Figure 20 is schematically showing for an embodiment of decoding system.

Figure 21 is schematically showing for a multi-channel encoder system.

Figure 22 is can schematically showing to an embodiment of the system that information is encoded.

Figure 23 is schematically showing for an embodiment of condensing encoder.

Figure 24, Figure 25, Figure 26, Figure 27 are schematic tables related with the different embodiments of integrator (integrator) Show.

Figure 28 is schematically showing for binary system-simulation (binary-to-analog) converter.

Figure 29 is by the amplitude weighting of the individual events in a time chain of events (a time series of events) It is schematically shown for the function of the timing of other events in the time series.

Figure 30 is schematically showing for an embodiment of the signal that can be exported from condensing encoder.

Figure 31 is schematically showing for a data storage device.

Figure 32 is can schematically showing to an embodiment of the system that information is decoded.

Figure 33 is schematically showing for an embodiment of extension decoder (expanding decoder).

Figure 34 is schematically showing for a weighting device.

It is other events in the time series that Figure 35, which is by the amplitude weighting of the individual events in a time chain of events, The function of timing schematically show.

Figure 36 is schematically showing for a time series scanner.

Figure 37 is schematically showing for an extension decoder.

Figure 38 is can schematically showing to an embodiment of the system that information is coded and decoded.

Figure 39 is one for constructing the flow chart of binary system-analog converter set process.

Figure 40 is the flow chart of a process for calibrating weighting device.

Figure 41 is one for creating encoder/decoder to the process of the process of (encoder/decoder pair) Figure.

Similar reference number and label indicate similar element in each figure.

Specific embodiment

Figure 1A is schematically showing for encoder/decoder system 3.Encoder/decoder 3 is for compiling to information The set of code and decoded component.Encoder/decoder system 3 can be, for example, data communication system, data-storage system, The combination of data compression system, data encryption system or these systems or other systems.Encoder can with can rebuild the information Decoder pairing.Encoded information and decoded information can be communicated and/or are stored in data storage with aspect On part.

Encoder/decoder 3 includes coded transmitter system 6 and decoding receiver system 9.Coded transmitter system 6 is wrapped Include input 8, encoder-compressor 10, transmitter 12 and output 14.The input 8 of coded transmitter system 6 can be coupled to receive Information in signal 21.Input 8 and output 14 are physical structure (physical structure), by them respectively by signal Receive into and pass out coded transmitter system 6.Signal 21 includes information.Encoder-compressor 10 is in signal 21 The component that at least some information are encoded and compressed.

Encoder-compressor 10 include state encoding machine 23, when 25, amplitude base encoder (time based encoder) Weighting block 27 and compressor 29.State encoder 23 be by least some of signal 21 information coding at signal 24 (its with The set expression information of discrete digital) component.Different conditions can be used to indicate information in the number (digit).For example, letter Numbers 24 can indicate to believe with binary digit or position (bit) (that is, using a pair of of state) or with the decimal system (that is, using ten states) Breath.State encoder 23 is connected base encoder 25 when signal 24 being provided to.

When base encoder 25 be base code 26 when being encoded into signal 24 (among it every the temporal representation information of interior event) Component.One or both of state encoder 23 and Shi Ji encoder 25 may include sectionaliser (segmenter), which will Individual signals are divided into the set of small cell.This segmentation as a result, when amplitude weighting component 27 receives base code 26 set. When base encoder 25 be connected with by when base code 26 the set be provided to amplitude weighting component 27.

Amplitude weighting component 27 be such as lower component, be configured as according to it is each when at least some of base code 26 other things The timing of part is weighted the amplitude of event when this in base code 26.In some embodiments, amplitude weighting component 27 can be weighted the amplitude of event according to the timing of leading event (precessor events).Amplitude weighting component 27 Without to when base code 26 add new information, but when can indicate each with another dimension (such as amplitude of event) in base code At least some existing informations.Amplitude weighting component 27 is connected so that the set of base code 28 when amplitude weighting is provided to compressor 29。

The component that the set of base code 28 is compressed when compressor 29 is configured as to amplitude weighting.Compressor 29 can lead to It crosses and base code 28 when amplitude weighting is integrated into (integrate) compresses them to generate one-dimension code 31.One-dimension code 31 can use one Dimension is come at least some of base code 28 information when indicating amplitude weighting.For example, the timing of event can be used to carry out table for one-dimension code 31 Show information.In some embodiments, the integration can be non-linear integration.Compressor 29 is connected to propose one-dimension code 31 It is supplied to transmitter 12.

Transmitter 12 is configured as emitting one-dimension code 31 with signal 30, and signal 30 can be stored or processed.For example, signal 30 can be stored in memory construction (not shown).Alternatively, signal 30 can be transmitted to connects to what the signal was decoded Receive device.In the illustrated embodiment, signal 30 is sent to receiver decoder system 9 from the output 14 of coded transmitter system 6 Input 16.

Receiver decoder system 9 includes input 16, receiver 32, expander-decoder 34 and output 20.Receiver decoder The input 16 of system 9 can be coupled to receive signal 30.Signal 30 includes one-dimension code 31.Input 16 and output 20 are physics knots Signal is received into and is passed out receiver decoder system 9 respectively by them by structure.Receiver 32 is configured as receiving signal 30 and one-dimension code 31 is sent to expander-decoder 34.

Expander-decoder 34 is to be extended at least some of signal 29 information and decoded component.Expander- Decoder 34 include weighting expander 37, magnitude decoder 39, when base code decoder 41 and state decoder 42.Weight expander 37 are configured as one-dimension code 31 being extended to the component of one or more set of weight 43.It can be according to for indicating signal 29 The dimension timing of event (for example, in signal 29) of middle information is closed to generate weight sets.For example, can be according to leading in signal 29 The timing of event generates weight come each event being directed in signal 29.Each event in the one-dimension code can be with each weight sets Single weighted associations in conjunction.In some embodiments, weighting expander 37 is using the weight to the amplitude of each event It is weighted, and exports the amplitude weighting version (amplitude-weighted version) of one-dimension code 31 as weight sets Close 43.In other embodiments, weighting expander 37 exports the ordered list (ordered list) of weight, which abandons For the information in signal 29 to be expressed as the dimension (that is, the timing for having abandoned event in signal 29) that weight sets closes 43.Add Expander 37 is weighed to be connected so that weight set 43 is sent to magnitude decoder 39.

Base code 45 is (among it every interior when magnitude decoder 39 is configured as weight set 43 being decoded into one or more Event temporal representation information) set component.Magnitude decoder 39 is connected to pass base code 45 when one or more Send to when base code decoder 41.When base code decoder 41 be at least some of base code 45 information solution when will be one or more of Code at one or more signals 47 (it indicates information with state set) component.For example, signal 47 can be with binary system (that is, making With a pair of of discrete state) or information indicated with the decimal system (that is, using ten discrete states).When base code decoder 41 be connected with Signal 47 is sent to state decoder 42.State decoder 42 be configured as by signal 47 (its with digital collection indicate letter Breath) it is decoded into the component of signal 50.Signal 50 may include at least some information for including in signal 21.

Magnitude decoder 39, when one or more of base code decoder 41 and state decoder 42 may include polymerizer (aggregator), the polymerizer is by the set assembling (assemble) compared with decimal fractions at a biggish digital collection.For example, In some embodiments, base code polymerizer when magnitude decoder 39 may include, this when base code polymerizer base code character when will be multiple Base code 45 when dressing up single.As one embodiment, in some embodiments, when base code decoder 41 may include polymerizeing as follows Device, the polymerizer will be assembled into multiple signals of discrete digital set expression information with the list of discrete digital set expression information A signal 47.As another embodiment, in some embodiments, state decoder 42 may include following polymerizer, this is poly- Signal is assembled into individual signals 50 by clutch.

Figure 1B is the flow chart of the process 70 for being coded and decoded to information.Process 70 can independently execute or and its He executes activity joint.For example, process 70 can execute in the stage 4130 of process 4100 (Figure 41).Process 3900 can be by encoding Device/decoder system (such as encoder/decoder system 3 (Fig. 1)) executes.

In process 70, data are encoded into digital collection (stage 72), and base code (the rank when number is encoded into Section is 74).This when base code indicate information using the timing of the event in interval.According to the timing of other events when this in base code To be weighted (stage 76) to the amplitude of event when this in base code.For example, can be according to leading event when this in base code Timing is weighted the event.Base code adds new information when amplitude weighting is not necessarily to this, but can use another dimension (such as amplitude of event) is come at least some of base code existing information when indicating this.

Base code can be compressed into one-dimension code (stage 78) when the amplitude weighting.The one-dimension code can with a dimension (for example, Use the timing of event) come at least some of base code information when indicating amplitude weighting.

In receiving device, which can be extended to amplitude set (stage 80).Each event in the one-dimension code It can be with the single weighted associations in each weight set.In some embodiments, the amplitude set can be without any The amplitude list of timing information.In other embodiments, the one-dimension code itself can be weighted by multiple amplitude sets, To generate the multiple amplitude weighting versions for being somebody's turn to do (previously) one-dimension code.

Base code (stage 82) when the amplitude can be decoded into, this when base code and then can be decoded into indicated with digital collection One or more signals (stage 84) of information.It is described to indicate that one or more signals of information itself be solved with digital collection Code is at another expression (stage 86).

Clock coder

Fig. 2A is can schematically showing to the system 100 that information is encoded.System 100 includes clock coder 105, Clock coder 105 includes input 110 and output 115.Input 110 and output 115 are physical structures, respectively will letter by them Number receive into and pass out clock coder 105.Clock coder 105 is such as lower component, by occurring that event defeated Particular moment in the time interval of signal encodes information out.In fact, clock coder 105 can export as follows Format expresses the information content of input signal, in the output format, the temporal representation of the event in the interval input signal The information content.Clock coder 105 can be used in combination with other devices.For example, base is compiled when clock coder 105 is used as Code device 25 (Figure 1A).

The input 110 of clock coder 105 can be connected, to receive from the signal 125 that data communication path receives Information 120.Signal 125 is with orderly limited one group of discrete digital (an ordered, finite set of discrete Digits) information 120 is indicated.For example, in some embodiments, can be expressed as with binary digit by information 120 is inputted A series of high states (i.e. " 1 ") and low state (i.e. " 0 "), as shown.Input 110 can be serial or parallel binary data Port.Signal 125 can be transmitted via wired or wireless data communication path.

The output 115 of clock coder 105 can be connected, by information of the coding in signal 135 be transferred to system or Medium (medium) 140.Information in signal 135 is expressed at the time of occurred in the interval of signal 135 by event.This All information in the temporal representation of event in a little intervals signal 125.For example, as described further below, in the time The event that the first moment in interval occurs can the number with high state in expression signal 125, and in the time interval the The event that two moment occurred can the interior number with low state of expression signal 125.First moment is with second moment It is differentiable.

System that signal 135 is transferred into or medium 140 are according to the running environment (operational of system 100 Context) and different.For example, system or medium 140 may include number if system 100 is a part of data transmission system According to transmitter.As another embodiment, if system 100 is a part of data-storage system, system or medium 140 can Write head (write head) including data storage device can be write information into.

In operation, clock coder 105 receives information 125 in input 110.By expression signal 135, (it is with quilt Timing (timed) be in different interval distinguish the moment generation event) in input information 120, clock coder 105 Information 120 in signal 125 is encoded.To system or 140 output signal 135 of medium, (it includes to clock coder 105 The event of timing).

Fig. 2 B is schematically showing for an embodiment of clock coder 105.Shown clock coder 105 Embodiment includes state detector 205, event-order serie circuit (event timing circuit) 210 and event generating 215.State detector 205 is the component for the digital state that detection indicates in the signal 125 of input information 120.For example, defeated Entering information 120 is so that in a series of those of binary digits expression embodiment, state detector 205 be can be in binary system The bit detector (bit detector) distinguished between one state and " 0 " state.State detector 205 is connected defeated Enter between 110 and event-order serie circuit 210.The mark (indications) 220 of detecting state is transferred into event-order serie electricity Road 210.

Event-order serie circuit 210 is configured as the component of the timing of the event in the interval of output designating signal 135.Thing Part sequence circuit 210 includes clock 225, counter 230, interval restorer (interval reset) 235 and timing selector 240.Clock 225 provides clock output signal 242 to counter 230.Counter 230 is coupled to receive clock output signal 242, and export the dynamic itemset counting (dynamic count) 245 of clock signal.Dynamic itemset counting 245 is coupled to interval and resets Device 235 and timing selector 240.Interval restorer 235 may include comparator (not shown), and the comparator is by the clock signal Dynamic itemset counting is compared with the threshold count for indicating interval duration.When such comparison can determine an interval Pass (pass).Interval restorer 235 provides reset signal 250 in response to passing for interval.Counter 230, which receives, resets letter Numbers 250, and may be in response to the reset signal to reset to the counting of the clock signal.Thus, the reset of counter 230 The interval of the duration of (demarcate) threshold count can be demarcated.

Timing selector 240 had not only received the dynamic itemset counting 245 of clock signal, but also received and detected by state detector 205 State mark 220.Timing selector 240 may include switch 255 and comparator 260.Comparator 260 includes a pair of of input 265,270.Input 265 receives the dynamic itemset counting 245 of the clock signal exported by counter 230.Input 270 is received from switch 255 switch output signal 275.Switch 255 and other switches described herein can be implemented as, for example, electromechanical (electro-mechanical) switch, one or more transistors or machine readable instructions.

Switch 255 includes high reference 280 and low refers to 285.High reference 280 embodies what following event occurred in interval Moment, the number with high state in the event indicating signals 125.Low reference 285 embodies following event and sends out in interval The number with low state at the time of raw, in the event indicating signals 125.The reception of switch 255 is detected by state detector 205 The mark of the state 220 arrived.Mark in response to the state detected by state detector 205, switch 255 is by high reference 280 are applied to the input 270 of comparator 260 and will switch between the low input 270 for being applied to comparator 260 with reference to 285.Especially It has detected that the mark of low state in response to state detector 205, and the switching of switch 255 is to be connected to input with reference to 285 for low 270.The mark of high state is had detected that in response to state detector 205, the switching of switch 255 is defeated high reference 280 to be connected to Enter 270.

Comparator 260 by the counting of the clock signal exported by counter 230 and it is provided it is low refer to 285 or high reference 280 are compared, and export comparison result 290.

Event generating 215 is configured as generating the component of the event in output signal 135.215 quilt of event generating Connection is to receive the comparison result 290 from comparator 260, and result is the generation timing of event based on this comparison.For example, Event generating 215 can be impulse generator, in response to changing in result 290 as caused by following situation (transition) pulse is generated, the situation is：The clock signal transition that counter 230 exports is by given low reference 285 or high reference 280.Thus, generation of such event in the interval demarcated by interval restorer 235 is by timing, with right The state of number in signal 125 is encoded, thus can be referred to " data event ".Event generating 215 will be generated Event 295 is provided to output 115.

Timing selector 240 is also coupled to receive interval reset signal 250.Timing selector 240 can carry to next A number, and the comparison of comparator 260 is resetted in response to reset signal 250.In some embodiments, state Detector 205 is also coupled to receive interval reset signal 250 (see the dotted line (dashed line) for going to state detector 205 Input).State detector 205 can be with for example, select come the mark for the state detected to timing in response to reset signal 250 The offer timing of device 240 is selected, so that carry is to next number.

In operation, clock coder 105 receives signal 125 in input 110.The detection of state detector 205 indicates defeated Enter the state in the number of the signal 125 of information 120, and exports the signals for characterizing these numbers (that is, the mark of state 220).Timing selector 240 receives the signal of these numbers of description, and generating by timing is at corresponding with the state Every the output (that is, generating output 290) of interior generation.In particular, the first state in signal 125 produces the generation in result 290 The transformation at the first moment in corresponding time interval, and the second state in signal 125 produces the generation in result 290 The transformation at the second moment in corresponding time interval.The timing of these transformations is to be arranged by low with reference to 285 and high reference 280 's.

In response to the transformation in result 290, event generating 215 generates the event 295 for being provided to output 115.Institute The timing for stating event follows the timing of the transformation in result 290.Interval restorer 235 has demarcated the interval, so that timing is selected The state that device 240 advances to next number from a digital state in signal 125 is selected, and in generation result 290 The comparison of transformation resetted.Thus, each of signal 125 number (including low " 0 " state) is by right in interval The event of timing is answered to indicate.

Fig. 3 is schematically showing for a time encoding process.Shown time encoding can by clock coder (such as Clock coder 105 (Fig. 1 and Fig. 2)) it executes.In the embodiment as shown, information 120 is expressed as one with binary digit Serial high number 305 and low digital 310.

Base code signal 135 when information 120 is encoded by time encoding.When base code signal 135 include time interval 320 collection It closes, each time interval 320 corresponds to the number 305,310 in signal 125.Each time interval 320 includes a phase The data event 325 answered.The timing of data event 325 in individual time interval 320 is indicated corresponding to the time interval The state of 320 number 305,310.For example, in the embodiment as shown, corresponding in the interval 320 of high state number 305 Data event 325 occur near these 320 beginnings of interval at the time of 330.Interval 320 corresponding to low state number 305 In data event 325 335 at the time of occur near among these intervals 320.Moment 330 is differentiable with the moment 335.

In different embodiments, the different characteristic of event (including data event 325) can be identified and be handled as the thing At the time of part occurs.For example, in the embodiment as shown, data event 325 is from baseline (i.e. " rest (resting) ") shape State 340 changes the pulse that supreme (i.e. " excitation (excited) ") state 345 is then return to baseline resting state 340.Some In embodiment, it can be identified and handle as the generation of data event 325 from baseline state 340 to the initial transition of high state 345 At the time of.In other embodiments, it can be identified and handle as number from high state 345 to the return of baseline state 340 transformation At the time of generation according to event 325.In some embodiments, data event 325 is transient pulse, is initial transition and return Transformation is so close so that they are undistinguishables for such as clock coder 105 in time.Transient data thing Part 325 is identified with return to the apparent of transformation while occurring based on initial transition at the time of generation.

In the embodiment as shown, the shape of different data event 325 is undistinguishable, and different data each other Event 325 can only by means of they timing and be distinguished.In addition, in some embodiments, data event 325 can be " binary event " is that only one of two feasible (possible) moment place in that interval occurs in they.When generation exists When these moment, they are in identical signal level (for example, high), but their timing in the interval are attributed to their tables The state for the number shown.

In the embodiment as shown, all time intervals 320 duration all having the same and in order (sequentially) occur.The sequence of time interval 320 corresponds to the sequence of the corresponding number 305,310 in signal 125.It changes Yan Zhi, when base code signal 135 first time interval 320 (and its event 325) correspond to the first number 305 in signal 125, When base code signal 135 the second time interval 320 (and its data event 325) correspond to the second number 310 in signal 125, The rest may be inferred.This is corresponded to is indicated by dotted arrow (dashed arrow) 350.

Fig. 4 is schematically showing for the another embodiment of clock coder 105.In addition to state detector 205, event Sequence circuit 210 and event generating 215, the embodiment of shown clock coder 105 further include beginning/stopping detection Device 405.Beginning/stop detector 405 is configured as the beginning of the data transmission in detection signal 125 and the component of ending. For example, beginning/stop detector 405 can be with the one or more headers (header) or report foot in discernible signal 125 (footer)。

Beginning/stop detector 405 can be connected to input 110.Beginning/stop detector 405 is by the number in signal 125 It to event generating 215 and is exported to other portions of clock coder 105 according to the beginning of transmission and mark 410 output of ending Divide (for example, exporting to event generating 215).Event generating 215 may be in response to by/and stop detector 405 exports Mark come generate beginning event (beginning event) and ending event (end event) (for example, one as event 295 Part).Beginning event is the event that occurs at the time of the data output in calibration result 290 starts, and allows to determine the The timing at one interval and the first data event.Generation at the time of ending event is the data end of output in calibration result 290 Event.In some embodiments, one or both of beginning event and ending event can be used for Time Dependent process (time-dependent process) is resetted, as described further below.The beginning generated by event generating 215 Event and ending event are outputted as event 295, and are provided to output 115.

By/signal 125 that exports of stop detector 405 in the beginning of data transmission and the mark of ending can be passed Send to other parts of clock coder 105 and for its use, with for event generating 215 to beginning event, ending event and The output timing of data event.For example, the interval with beginning event correlation can be disabled (disable) clock 225, be counted One or more of device 230 and interval restorer 235 (for example, to allow the header in processing/override information 120).As Another embodiment can forbid timing selector 240 from number to digital traveling at the interval with beginning event correlation, Or detection of the illegal state detector 205 to state.

Fig. 5 is that the clock coder at the beginning and ending transmitted with the data in detection signal carries out the signal of time encoding Property indicate.For example, shown time encoding can by clock coder (for example including/time of end detector 405 compiles Code device 105 (Fig. 4)) it executes.In the embodiment as shown, signal 125 includes header 505 (being shown as " X ") and report foot 510 (being shown as " Y ").Thus, header 505 and the information 120 in report 510 framework of foot signal 125.

Base code signal 135 when information 120 is encoded by time encoding, as above with reference to described in Fig. 3.When base code signal 135 include header interval 515 and report foot interval 520.535 generations at the time of header interval 515 includes in header interval 515 Header event 525.Report foot interval 520 includes the 540 report foot event 530 occurred at the time of reporting in foot interval 520.Header interval 515 and the base code signal 135 when having demarcated of header event 525 beginning.Base when report foot interval 520 and report foot event 530 have been demarcated The end of code signal 135.When base code signal 135 the calibration of beginning can be used to determine the first event in the first interval 320 325 timing.For example, first event 325 occurred after the time 545 after header event 525.Using interval 515 it is lasting when Between and the time 545, it may be determined that first interval 320 in first event 325 timing.For example, interval 515 duration with It is spaced in 320 those of identical embodiments, event 525 detects the reset signal for being used as being resetted to interval.

In the embodiment as shown, event 525,530 is to be converted to high state 345 from baseline state 340 then to return To the pulse of baseline state 340.In some embodiments, the shape of event 525,530 can be undistinguishable each other and With the shape undistinguishable of data event 325.In these embodiments, event 325,525,530 can be only by means of them Timing and position and be distinguished.For example, event 525 can be characterized as first event.In some embodiments, interval 515, 520 have the duration mutually the same and identical with time interval 320.

Fig. 6 is schematically showing for the another embodiment of clock coder 105.In addition to state detector 205, event Sequence circuit 210 and event generating 215, the embodiment of shown clock coder 105 further include header/report foot coding Device 605.Header/report foot encoder 605 is configured as the header that will be located in signal 125 at the data transmission beginning and is located at letter Report foot or the two in numbers 125 at data transmission ending encode the component for having information.In some embodiments, header or report The information that foot coding has can be received, such as in the header or report foot of signal 125.For example, header/report foot encoder 605 can Header or report foot coding there is into following information, the signal that information identification receives at input 110, or it is characterized in input 110 The aspect for the signal that place receives.For example, according to such as received signal come source and destination, the info class of received signal Relationship between type and received signal and other signals can recognize the signal received at input 110.Received signal The aspect being characterized include：Position, the numerical symbol in received signal and the error correction of floating-point in received signal Information.By the introducing of one or more events and the associated Header Area of input signal 125 or foot region is reported by triggering, header/ Header/report foot coding can be had such information by report foot encoder 605.

Header/report foot encoder 605 can be connected to input 110.Header/the output of report foot encoder 605 identification or characterization One or more signals 610 of header or the information in report foot, and signal 610 is provided to event generating 215.Event is raw The instruction that 215 may be in response to be exported by header/report foot encoder 605 of growing up to be a useful person to generate be report of the generation in signal 125 by timing Event in head or report foot.The event 295 generated by event generating 215 is provided to output 115.

In some embodiments, the identification in signal 610 or characterization information can also be output to clock coder 105 Other parts.This information can be used in various ways, including, such as：Error correction, and to the calibration at interval carry out triggering and/ Or reset and data event generation.

Fig. 7 is the schematically showing of being encoded of header at the beginning to the data transmission in signal.For example, shown Coding can be executed by clock coder (for example including header/report foot encoder 605 clock coder 105 (Fig. 6)).It can Information is encoded by the one or more events occurred in the header interval 515 of signal 135 or report foot interval 520.

In the embodiment as shown, header interval 515 includes header event 705.Header event 705 occurs between header 710 at the time of in 515.For example, by the time span (time span) between measurement moment 535 and moment 710, it can be true Determine the timing of the header event 705 in header interval 515.

In some embodiments, header interval 515 itself can be divided into multiple sub- intervals (subinterval), often Height interval may include one or more message events.Different son intervals can be assigned to different identification and characterization information It is encoded.For example, the first son interval may include following event, the timing of the event, which indicates, to be coded in signal 135 The symbol of numerical value is just or negative.As another embodiment, a son interval set may include following message event, the information The timing of event indicates position of the information being coded in signal 135 in a biggish information aggregate (for example, dividing After section, as described further below).

In the embodiment as shown, header event 705 is to be converted to high state 345 from baseline state 340 then to return To the pulse of baseline state 340.In some embodiments, the shape of header event 705 can be undistinguishable each other, with The shape undistinguishable of event 525,530 and shape undistinguishable with data event 325.In these embodiments, Event 705,325,525,530 can be distinguished only by means of their timing and position.

In some embodiments, the report foot at the ending of the data transmission in signal can be encoded with one or more letters Breath event.In some embodiments, header and report foot can all be encoded with one or more message events.

Fig. 8 is schematically showing for the another embodiment of clock coder 105.Shown clock coder 105 Embodiment include state detector 205 and event-order serie circuit 210, they are suitable for being run with signal 125, and signal 125 is used Number with more than two able state encodes information.For example, signal 125 can use the quaternary or ten's digit pair Information is encoded.

State detector 205 is configured as the state of the number in detection signal 125, and by the mark of detecting state It is sent to event-order serie circuit 210.Event-order serie circuit 210 include timing selector 240, timing selector 240 be connected with These are received to indicate and respond to configure switch 255.In particular, switch 255 includes the set that more than two refers to 805, each With reference to 805 and corresponding state (that is, at the time of indicating that the event of the corresponding states of the number in signal 125 occurs in interval) Association.For example, first can be associated with reference to 805 with the first moment in interval, second can be with the second moment in interval with reference to 805 Association, and N can be with the N association in time in interval with reference to 805.

Switch 255 is configured as, in response to the mark of the state detected by state detector 205, by suitable ginseng Examine 805 inputs 270 for being applied to comparator 260.The counting for the clock signal that comparator 260 exports counter 230 and suitable Reference 805 be compared, and export comparison result 290.Thus, the various states of the number in signal 125 result in hair The raw transformation for distinguishing the moment in corresponding time interval, the timing of these transformations are by with reference to 805 settings.

Fig. 9 is to carry out schematically showing for time encoding to the signal for including the number with more than two able state. Shown time encoding can be executed by clock coder (such as clock coder 105 (Fig. 8)).In the embodiment shown In, information 120 is that there are four the numbers of different able states to express using tool in signal 125, and four differences can Row state is：Number 905 with first state (i.e. " A "), the number 910 with the second state (i.e. " B ") have third shape The number 915 of state (i.e. " C "), and the number 920 with the 4th state (i.e. " D ").In other embodiments, information 120 Can be with the number with different number of able state express (for example, with decimal system expressing information 120 have ten The number of a difference able state), or with the very able state of big figure or a feasible continuous continuum The number of (continuous continuum) (for example, one of able state continuum close to simulation or simulation) is expressed 's.In some embodiments, having, which can be used for there are four the number of able state, expresses hereditary information, and indicates four seed nucleus Acid.

Base code signal 135 when information 120 is encoded by time encoding.When base code signal 135 include time interval 320 collection It closes, each time interval 320 corresponds to the number 905,910,915,920 in signal 125.Each time interval 320 is wrapped Include a corresponding data event 325.The timing of data event 325 in individual time interval 320 is indicated corresponding to this The state of the number 905,910,915,920 of time interval 320.For example, in the embodiment as shown, corresponding to first state Number 905 interval 320 in data event 325 occur interval 320 end up nearby at the time of 930.Corresponding to the second shape 935 at the time of data event 325 in the interval 320 of the number 910 of state occurs near being spaced among 320.Corresponding to third 940 at the time of data event 325 in the interval 320 of the number 915 of state occurs before being spaced 320 centres.Corresponding to Data event 325 in the interval 320 of the number 920 of four states occurs 945 at the time of being spaced near 320 beginnings.Moment 930,935,940,945 be distinct from each other.

In other embodiments, clock coder can be implemented as digital circuit, receive and come from scheduled one group of symbol Number symbol sebolic addressing (a sequence of symbols) as input, and generation time Encoded output signal (time Encoded output signal) as output, wherein each time interval in the time encoding output signal is at the interval Interior inputted at the time of symbol determines by correspondence includes single pulse.The computer that the digital circuit can have been programmed controls, or Including embedded computer.In some embodiments, each input symbol is mapped to a unique character, unique character With binary digit (that is, position) length N, it is identical as the number of different feasible input symbols, and here other than one All positions be all identical so that this position of idiotope (distinct bit) in the character identifies the character pair The symbol answered.Thus, input symbol sebolic addressing (input sequence of symbols) is mapped to input character sequence (input sequence of characters), which can be input into shift register.The shift LD The output of device is timed (clocked), so that occurring N in each time interval 320.This output is coupled to pulse generation Device, so that the appearance of the idiotope results in the output pulse generated at the output of the clock coder.Some such In embodiment, which includes the circuit that analog input signal is converted into symbol sebolic addressing.If in output signal It expects to have header, report foot and synchronous (synching), then it is right according to agreement that is conventional or being used by encoder and downstream decoder The input symbol answered can be used as prefix or suffix (depending on concrete condition) and be added into actual signal to be transmitted.

Figure 10 is the schematic table of an embodiment (that is, can be to system 1000 that information is encoded) for system 100 Show.System 1000 includes neural processing component 1005, and signal 135 is transmitted to neural processing component 1005 from clock coder 105. Neural processing component 1005 is the component being made of nerve fiber, or with the Design and Features inspiration by nerve fiber The component of design.Thus, it can be used " wet (wet) " nerve and other pars nervosa parts (for example, biological neural network or work are organic The brain of body or other nerve fibers) implement neural processing component 1005 or usable semiconductor devices (for example, as making With hardware or the artificial neural network of software implementation) implement neural processing component 1005.In some embodiments, semiconductor The implementable neural processing component 1005 of the combination of device and wet neural component.

As shown, for clock coder 105 to neural 1005 output signal 135 of processing component, signal 135 includes having matched When event.It in neural processing component 1005 those of is implemented using " wet " neural component in embodiment, the category of signal 135 Property can be customized with compatible with wet neural component.For example, the event in signal 135 can be customized with the amplitude of echomotism current potential And time response.

In some embodiments, neural processing component 1005 may include receiving the multiple element of signal 135.For example, In the neural processing component 1005 for using " wet " neural component to implement, multiple neuro-receptive signals 135.As another implementation Example, in the neural processing component 1005 implemented using semiconductor component, multiple neural networks, which input, can receive signal 135.

In operation, the information 120 in signal 125 can be encoded by neural processing component 1005 by clock coder 105 The form of understanding, that is, having timing is to occur in the interval in intervening sequence (a sequence of intervals) The signal 135 of the event at moment can be distinguished.Thus, clock coder 105 can be used as at binary system (and other) numerical data The interface between statistical disposition and pattern-recognition provided in reason and neural processing component 1005.For example, clock coder 105 can Be included in nerve prosthesis (neural prosthesis), the nerve prosthesis be for example coded in signal 135 can It listens, visual or other sensory informations stimulate nerve.

Figure 11 is an embodiment of system 100 (that is, including that can be to the multi-channel encoder that information is encoded System schematically showing 1100).System 1100 includes：The set of clock coder 105, data sectional device 1105, input 1110 And the set of one or more outputs 1115.

Input 1110 receives the information 120 in signal 125 on data communication path.Input 1110 provides signal 1117, the information in signal 125 is sent to the input 1120 of data sectional device 1105 by signal 1117.Data sectional device 1105 is By a signal segmentation (or " fragment (fragment) ") at the component of small cell.Data sectional device 1105 includes input 1120 And one or more outputs 1125.

Relatively large digital collection in signal 125 is divided into the collection of lesser digital collection by data sectional device 1105 It closes, each lesser digital collection indicates a suitable subset of information 120.In some embodiments, the segment (segment) it can be an adjoining part (contiguous portion) for the number in signal 125.In other embodiment party In formula, the segment may include non-contiguous number.In the embodiment as shown, by 1105 received signal of data sectional device 125 indicate information 120 with orderly limited one group of discrete digital (for example, set of position).Data sectional device 1105 is by signal 125 are divided into the set of smaller fragment, and each smaller fragment indicates one of information 120 with orderly limited one group of discrete digital Suitable subset.Segment 1120 is provided to corresponding clock coder from one or more output 1125 by data sectional device 1105 105 input 110.The event generation timing sequence in time interval that each clock coder 105 passes through corresponding output signal 135 come The information received in segment is encoded.Temporal representation each of the event in interval in each output signal 135 All discrete digitals in section.

Clock coder 105 exports corresponding output signal 135 from the output 1115 of multi-channel encoder 1100.Some In embodiment, output signal 135 is provided to individual system or medium 140 in synchronization.For example, in output signal 135 It is each when base code include the report in corresponding output signal in an embodiment of header interval 515 and header event 525 Same a moment in the time occurs for head event 525.System or medium 140 may include the set of input, and each input is connected to Corresponding output 1115, to receive corresponding output signal 135, as described further below.

In operation, data sectional device 1105 receives signal 125 in input 1120.Data sectional device 1105 is to signal 125 execute data sectional processing, and generate the set of segment.Each segment is input into the one of a clock coder 105 A corresponding input 110.Each clock coder 105 is by being the thing for distinguishing the moment occurred in different interval with timing Part expresses the information in respective segments, to encode to the information in respective segments.Each clock coder 105 exports one Corresponding signal 135, signal 135 is sent to the output 1115 of multi-channel encoder 1100 by it, and is sent to system or medium 140。

Figure 12 shows schematically showing for system 1200, in system 1200, information can be encoded, compresses and store/ Transmission, is then acquired/receives, decodes and decompress.System 1200 may include in the embodiment of system described above 100 One or more, and include with input 1210 and output 1215 decoder 1205.Input 1210 and output 1215 are Signal is received into and is passed out decoder 1205 respectively by them by physical structure.Decoder 1205 is to following signal The component being decoded, information is encoded by the event generation timing sequence in time interval in the signal.In fact, solution Translating into output format, (it is with orderly by time-base signal (among it every the temporal representation information content of interior event) for code device 1205 Limited one group of discrete digital indicates information).

The input 1210 of decoder 1205 can be coupled to receive signal 1220, and information is to pass through the time in signal 1220 Event generation timing sequence in interval and encode.Signal 1220 can be from system or the output to data communication path of medium 140.Through It is depended on by the definite property (exact nature) that signal 1220 is transmitted from system or medium 140 to the information of decoder 1205 The running environment of system 1200.For example, system or medium 140 can if system 1200 is a part of data transmission system Including data transmitter, which exports the data receiver into decoder 1205 for signal 1220.As another A embodiment, if system 1200 is a part of data-storage system, decoder 1205 may include, for example, can be from data The read head (read head) of the reading information of storaging medium 140.Signal 1220 can be for example in wired or wireless data communication path Upper transmission.

After translating into output format, the output of decoder 1205 includes the signal 1230 of decoded information 1225.It has solved Code information 1225 can be to be expressed with orderly limited one group of discrete digital, such as is expressed as with binary digit a series of High state and low state, as shown.The form of output 1215 can be one or more serial or parallel binary data end Mouthful.

In operation, decoder 1205 receives the signal 1220 from system or medium 140 in input 1210.Signal 1220 with timing be that the event for distinguishing the moment in different interval occurs come expressing information.Decoder 1205 is to information 1225 are decoded, and export the signal 1230 including decoded information 1225.

Decoder 1205 can be used in combination with other devices other than system 1200.For example, decoder 1205 is used as When base decoder 41 (Figure 1A).

Figure 13 is schematically showing for an embodiment of decoder 1205.The embodiment party of shown decoder 1205 Formula include event detector 1305, when m- state transition device circuit 1310 and mode selector circuit 1315.Although reference is Circuit, but one or more components of the decoder can be implemented with firmware or software.Event detector 1305 is detectable signal The component of event (and its timing) in 1220.The structure of event detector 1305 can reflect the property of the event in signal 1220 Matter.For example, event detector 1305 can be pulse detector when the event in signal 1220 is pulse.Event detector 1305 are coupled to receive the signal 1220 from input 1210, and indicate interval from interval sequence circuit 1320 The signal of time in 1325.Event detector 1305 is connected in output gap 1325 at the time of detecting event.

Being spaced sequence circuit 1320 includes clock 1330, counter 1335 and interval restorer 1340.Clock 1330 is to meter Number device 1335 provides output clock signal 1345, and counter 1335 generates the dynamic itemset counting 1332 of the clock signal in turn.Dynamically It counts 1332 and is provided to event detector 1305 and interval restorer 1340.Interval restorer 1340 may include comparator (not Show), which is compared the dynamic itemset counting of the clock signal with the threshold count for indicating interval duration.In this way Comparison can determine when an interval passes.Reset signal 1350 is provided to counter as output by interval restorer 1340 1335.Counter 1335 is resetted in response to reset signal 1350.Holding for the threshold count has been demarcated in the reset of counter 1335 The interval of continuous time.

The reset signal 1350 exported by interval restorer 235 can be transferred into the other parts of decoder 1205 and be it It is used, with for for example when m- state transition device 1310 to 1315 pairs of digital selections of translation and mode selector of event and Export timing.For example, when m- state transition device 1310 may include one or more switches, in response to reset signal 1350 The output of translation and translation result is resetted.As another embodiment, mode selector 1315 can trigger reset signal 1350, to ensure that individual digit is selected and exported for each interval.

Mark at the time of detecting event in response to detecting event, in 1305 output gap 1325 of event detector Will.These marks by when m- state transition device 1310 receive.In the shown embodiment, m- state transition device 1310 wraps when High bit detector 1355 and low level detector 1360 are included, high bit detector 1355 and low level detector 1360 are all coupled to receive Mark at the time of detecting event in interval.

In some embodiments, high bit detector 1355 include a pair of of comparator 1356,1358 and with door 1359.Than It is connected compared with device 1356, detecting in interval is compared with first with reference to ref_1 at the time of event.Comparator 1358 It is connected, detecting in interval is compared with second with reference to ref_2 at the time of event.It is with reference to ref_1, ref_2 Threshold value, the detected event that they indicate in interval considered to be in the earliest moment of first state (for example, high-order) Moment the latest.If detecting one after at the time of being indicated by ref_1 and at the time of before at the time of instruction by ref_2 A position, then the output of comparator 1356,1358 is set.1365 (for example, high RSTs) of output are also generated with door 1359, are referred to Show：The timing of the event detected by event detector 1305 is in an interval.

In the embodiment as shown, low level detector 1360 include a pair of of comparator 1361,1363 and with door 1364. Comparator 1361 is connected, and detecting in interval is compared with first with reference to ref_3 at the time of event.Comparator 1363 are connected, and detecting in interval is compared with second with reference to ref_4 at the time of event.With reference to ref_3, ref_ 4 be threshold value, they indicate interval in detected event considered to be in the second state (for example, low level) it is earliest when It carves and the moment the latest.If detected after at the time of being indicated by ref_3 and at the time of before at the time of instruction by ref_4 One event, then the output of comparator 1361,1363 is set.Output 1370, instruction are also provided with door 1364：It is examined by event The timing for the event that device 1305 detects is surveyed in an interval.

Mode selector 1315 is configured as selecting the number for exporting in signal 1230 in output 1215 The component of state.In some embodiments, the number can be binary digit.Mode selector 1315 is coupled to receive The translation (that is, output 1365,1370).Based on received translation, 1315 output state information 1215 of mode selector. The number can concurrently or sequentially mode export.

In operation, event detector 1305 receives signal 1220, and information 1225 is by between the time in signal 1220 It is encoded every interior event generation timing sequence.Event detector 1305 detects the timing of the event in their corresponding interval, and And description of the output to the timing 1325.At the time of by being detected event by event detector 1305 and it is assigned to state At the time of be compared, when m- state transition device circuit 1310 will be spaced at the time of translate into signal 1230 to from decoding The discrete digital that device 1205 exports.In particular, the event detected within the first time limited by reference ref_1, ref_2 Result in the set signal in output 1365.The thing detected in the second time range limited by reference ref_3, ref_4 Part results in the set signal in output 1370.Mode selector circuit 1315 receives these comparison results, and according to this A little results select the state of the number for the output in output 1215.

Figure 14 is schematically showing of being decoded to signal, information is by the event in time interval in the signal Generation timing sequence and encode.The decoding can be executed for example by decoder (such as decoder 1205 (Figure 12)).

Information when being coded in base code signal 1220 is translated into signal 1230 by decoding, and signal 1230 is with orderly limited One group of discrete digital indicate information 1225.In the embodiment as shown, information 1225 is in signal 1230 with binary system It is expressed as a series of high binary digits 1405 (i.e. " 1 ") and low binary digit 1410 (i.e. " 0 ").

When base code signal 1220 include time interval 1420 set, each time interval 1420 corresponds in signal 1230 A number 1405,1410.Each time interval 1420 includes a corresponding data event 1425.Individual time interval The timing of data event 1425 in 1420 indicates the state of the number 1405,1410 corresponding to the time interval 1420.Example Such as, in the shown embodiment, occur corresponding to the data event 1425 in the interval 1420 of high state number 1405 at this 1430 at the time of near 1420 beginnings of a little intervals.It is sent out corresponding to the data event 1425 in the interval 1420 of low state number 1405 1435 at the time of life is near these 1420 centres of intervals.Moment 1430 is differentiable with the moment 1435.

In the embodiment as shown, data event 1425 be (" rest ") from baseline state 2140 change it is supreme (i.e. " excitation ") state 1445 is then return to the pulse of baseline resting state 1440.In some embodiments, from baseline state 2140 to high state 1445 initial transition can be identified and handle for data event 1425 generation at the time of.In other embodiment party In formula, from high state 1445 to baseline state 2140 return transformation can be identified and handle for data event 325 occur when It carves.In some embodiments, data event 1425 is transient pulse, is that initial transition and return transformation are such in time It approaches so that they are undistinguishables for such as clock coder 1205.At the time of data transfer event 1425 occurs It is identified with return to the apparent of transformation while occurring based on initial transition.

In some embodiments, the shape of different data event 1425 can be undistinguishable each other, and different Data event 1425 can only by means of they timing and be distinguished.In addition, in some embodiments, data event 1425 can To be binary event, it is that they go out in only two feasible moment (that is, first moment or the second moment in an interval) It is existing.

In the embodiment as shown, it all time intervals 1420 duration all having the same and sends out in order It is raw.The sequence of time interval 1420 corresponds to the sequence of the corresponding number 1405,1410 in signal 1430.In other words, base code when The first time interval 1420 (and its event 1425) of signal 1220 correspond to signal 1230 in the first number 1405, when base code Second time interval 1420 (and its data event 1425) of signal 1220 corresponds to the second number 1410 in signal 1230, according to This analogizes.The correspondence is indicated by dotted arrow 1450.

Figure 15 is schematically showing for the another embodiment of decoder 1005.In addition to event detector 1305, when it is m- State transition device circuit 1310, mode selector circuit 1315 and interval sequence circuit 1320, shown decoder 1005 Embodiment further includes beginning/stop detector 1505.Beginning/stop detector 1505 is configured as in detection signal 1220 Data transmission beginning and ending one or both of component.For example, beginning/stop detector 1505 can discernible signal 1220 In header event, header interval, report foot event and report one or more of foot interval.

Beginning/stop detector 1505 can be connected to input 1210 to receive signal 1220 (as shown).Some In embodiment, beginning/stop detector 1505 can be detected by beginning event in detection signal 1220 and ending event One or both of the beginning of data transmission in signal 1220 and ending.Beginning/stop detector 1505 will be in signal 1220 The mark 1510 output extremely interval restorer 1340 at the beginning of data transmission and one or both of ending, or export to decoder 1205 other parts.Interval restorer 1340 may be in response to the mark exported by beginning/stop detector 1505 to reset it Itself (and the calibration at interval).To start/stop detector 1505 can make to be spaced in restorer 1340 and signal 1220 The timing synchronization at interval and event.

In some embodiments, by/signal 1220 that exports of stop detector 1505 in data transmission open The mark of end and ending can be transferred into the other parts of decoder 1205 and for its use.For example, in some embodiments, Mode selector 1315 may be in response to by/mark that exports of stop detector 1505, use header event and report foot event Come one or both of beginning and the ending of demarcation signal 1220.

Figure 16 is the signal that the decoder at the beginning and ending transmitted with the data in detection signal is decoded signal Property indicate, information is encoded by the event generation timing sequence in time interval in the signal.For example, shown decoding It can be executed by decoder (for example including beginning/stopping decoder 1505 decoder 1205 (Figure 15)).In the reality shown It applies in mode, signal 1230 includes header 1605 (being shown as " X ") and report foot (being shown as " Y ").Thus, header 1605 and report foot 1610 Framework signal 1230.

Decoding by when base code signal 1220 be decoded into signal 1230, as above with reference to described in Figure 14.When base code signal 1220 include header interval 1615 and report foot interval 1620.1635 at the time of header interval 1615 includes in header interval 1615 The header event 1625 of generation.Report foot interval 1620 includes the 1640 report foot event occurred at the time of reporting in foot interval 1620 1630.The beginning of base code signal 1220 when header interval 1615 and header event 1625 have been demarcated.Report foot interval 1620 and report foot The end of base code signal 1220 when event 1630 has been demarcated.When base code signal 1220 the calibration of beginning can be used to determine first The timing of first event 1625 in interval 1620.For example, the period after header event 1625 occurs for first event 1625 After 1645.Duration and the time 1645 at interval 1615 can be used to determine the first event 1625 in the first interval 1620 Timing.

In the embodiment as shown, event 1625,1630 and 1425 is to be converted to high state from baseline state 1640 1445 are then return to the pulse of baseline state 1640.In some embodiments, the shape of event 1625,1630 can be that This undistinguishable and shape undistinguishable with data event 1425, and event 1425,1625,1630 can be only by means of Their timing and be distinguished.In addition, in some embodiments, interval 1615,1620 has the mutually the same and and time It was spaced for 1420 identical duration.

Figure 17 is schematically showing for the another embodiment of decoder 1205.In addition to event detector 1305, when it is m- State transition device circuit 1310, mode selector circuit 1315, interval sequence circuit 1320 and beginning/stop detector 1305, The embodiment of shown decoder 1005 further includes header/report foot decoder 1705.Header/report foot decoder 1705 be by Be configured to in the header for being coded in signal 1220 information, the information that is coded in the report foot of signal 1220 or compiled The component that information of the code in the two is decoded.

Header/report foot decoder 1705 is connected to input 1210, includes to receive in signal 1220 and signal 1220 Any header event or report foot event.In some embodiments, such as at header interval and the duration for reporting foot interval In embodiment those of identical as the duration at interval 1420, header/report foot decoder 1705 can be coupled to receive pair The beginning of data transmission in signal 1220 and the mark 1510 of one or both of ending, and it is connected to event detector 1305 specify the dynamic itemset counting 1325 of the time in the interval of size with reception to interval restorer.In some embodiments, Such as it at header interval and reports in those of the duration at foot interval and the duration difference at interval 1420 embodiment, report Head/report foot decoder 1705 can be connected to the output of another interval sequence circuit, including internal beginning/stopping test section Part, or determine message event header, report foot or the two in occur at the time of.

Header/report foot decoder 1705 will occur in header or report the mark conduct of the information content of the message event in foot 1710 output of output.Mode selector 1315 can receive the mark, and discrete digital 1015 is exported according to the mark. For example, in some embodiments, following Serial No. (a sequence of digits) may be selected in mode selector 1315, The Serial No. identification signal 1230 comes source and destination, the type of information in signal 1230 and signal 1230 and other Relationship between signal.

In some embodiments, decoder 1205 can be transferred by the mark that header/report foot decoder 1705 exports Other parts and for its use.For example, error correction information can be transferred into the error correction component in decoder 1005 and by the error correction Component uses.As another embodiment, translater circuit can be transferred by the mark that header/report foot decoder 1705 exports 1310, and be used for, for example, the number of setting number to be detected, or the detected event changed in interval are recognized At the time of for corresponding to a certain state.

Figure 18 is schematically showing for the another embodiment of decoder 1205.The implementation of shown decoder 1205 Mode includes translater circuit 1310 and mode selector circuit 1315, they are suitable for information being wherein by time interval Event generation timing sequence be decoded into the signal encoded with the number of more than two able state to information the signal that encodes. For example, decoder 1205 can by when base code signal 1220 be decoded into signal 1230.

Mark at the time of detecting event in response to detecting event, in 1305 output gap of event detector.This A little marks 1325 by when m- state transition device 1310 receive.When m- state transition device 1310 include state detector 1805, 1810,1815,1820 set, these state detectors are all connected, with receive in interval at the time of detecting event Mark.

Each state detector 1805,1810,1815,1820 is connected, will be in interval at the time of detecting event The earliest moment of corresponding states is considered to belong to event detected by the embodiment in interval and the reference at moment the latest carries out Compare.In response to detect the timing of the event in interval in corresponding range, each state detector 1805,1810,1815, 1820 output one mark 1825,1830,1835,1840.Thus, state detector 1805,1810,1815,1820 will be spaced It is translated at the time of interior to one of the state from the number in the signal 1230 that decoder 1005 exports.

Mode selector 1315 is coupled to receive the translation (for example, mark 1825,1830,1835,1840), and Based on received translation, mode selector 1315 has the number of the state to the output of output 1215.

In operation, event detector 1305 receives signal 1220, and information 120 is to pass through time interval in signal 1220 Interior event generation timing sequence and encode.Event detector 1305 detects timing of the event in their corresponding interval, And export the description (for example, mark 1325) to the timing.When m- state transition device circuit 1310 by by event detector 1305 detect and are compared at the time of event at the time of being dispatched to the state, and the time in interval is translated into signal State in 1330 to be exported from decoder 1305.Mode selector circuit 1315 receives these comparison results (for example, mark 1825, the number for output to be supplied to output 1215 is selected 1830,1835,1840), and according to these results State.

Figure 19 is by wherein information be the signal encoded by the event generation timing sequence in time interval be decoded into including The signal of number with more than two able state is schematically shown.For example, shown decoding can by decoder (such as Decoder 1205 shown in Figure 18) it executes.In the embodiment as shown, base code signal 1220 includes time interval when 1420 set, each time interval 1420 correspond to the number 1905,1910,1915,1920 in signal 1230.Each Time interval 1420 includes a corresponding data event 1425.The timing of data event 1425 in individual time interval 1420 Indicate the state of the number 1905,1910,1915,1920 corresponding to the time interval 1420.For example, in the embodiment party shown In formula, occur near interval 1420 ends up corresponding to the data event 1425 in the interval 1420 of the number 1905 of first state At the time of 1930.Occur in interval 1420 corresponding to the data event 1425 in the interval 1420 of the number 1910 of the second state Between nearby at the time of 1935.It is being spaced corresponding to the generation of data event 1425 in the interval 1420 of the number 1925 of the third state 1940 at the time of before among 1420.Data event 1425 in the interval 1420 of number 1905 corresponding to the 4th state occurs 1945 at the time of being spaced near 1420 beginnings.Moment 1930,1935,1940,1945 is distinct from each other.

Decoding by when base code signal 1220 be decoded into signal 1230.Information is that there are four different using tool in signal 1230 The number of discrete potential (potential) state express, that is, number 1905 with first state (i.e. " A ") has The number 1910 of second state (i.e. " B "), the number 1915 with the third state (i.e. " C ") and have the 4th state (i.e. " D ") Number 1920.In other embodiments, signal 1230 can express letter with the number with different number of able state Cease (for example, with number with ten different conditions of decimal system expressing information), or with unusual big figure can Row state or the number of a feasible continuous continuum (for example, one of able state continuum close to simulation or simulation) Come what is expressed.In some embodiments, four different able states (that is, four kinds of nucleic acid) can be used to express for signal 1230 Hereditary information.

In other embodiments, decoder can be implemented as digital circuit, which receives orderly position set As input, (institute's rheme is grouped into the binary-coded character that predetermined length is N number of binary digit (that is, position), wherein only one A position is different from other), and output symbol sequence is generated as output.The computer control that the digital circuit can have been programmed System, or may include embedded computer.In some such embodiments, which includes converting the symbol sebolic addressing At the circuit of analog output signal.

Figure 20 is schematically showing for an embodiment of decoding system 2000.System 2000 can be an independent system A part of system or a larger system (such as system 1200 (Figure 12)).System 2000 includes neural processing component 140,1005, decoder 1205 receives signal 1220 from neural processing component 140,1005.Signal 1220 passes through in time interval Event generation timing sequence information is encoded.In some embodiments, neural processing component 140,1005 may include pair The multiple element that event in signal 1220 contributes.For example, the neural processing component implemented in " wet " the neural component of use 140, in 1005, multiple nerves can contribute to the event in signal 1220.As another embodiment, semiconductor is being used In the neural processing component 140,1005 that device is implemented, multiple neural network outputs can make tribute to the event in signal 1220 It offers.

In operation, signal 1220 can be decoded into signal 1230 by decoder 1205, and signal 1230 is with orderly limited one Group discrete digital carrys out expressing information 1225.Thus, decoder 1205 can be used as in the statistics provided by neural processing component 1205 Processing and the interface between pattern recognition function and binary system (and other) digital data processing devices.For example, decoder 1205 It can be included in motor or other prostheses, the motor or other prostheses are believed with the control being for example coded in signal 1220 Breath or other information come receive nerve electric discharge column (spike train).

Figure 21 is an embodiment (that is, multi-channel encoder system 2100) for the system for being decoded to signal Schematically show, information is encoded by the event generation timing sequence in time interval in the signal.Multichannel solution Code device system 2100 can independently be used in combination using or with other devices.For example, multi-channel encoder system 2100 is used as When base decoder 41 (Figure 1A).

System 2100 includes：The set of decoder 1205, data aggregator 2105, the set for inputting 2110, and output 2115.Base code signal 1220 when input 2110 receives corresponding.It itself includes event that base code signal 1220, which includes one, when each Interval set.The when ordered pair information of event in these intervals is encoded.In some embodiments, different when base code Signal 1220 can all be it is received from same individual system or medium 140, as shown.

When base code signal 1220 the corresponding input 1210 of decoder 1205 is provided to from input 2110.Thus, each solution Base code signal 1220 when code device 1205 is coupled to receive one accordingly.Decoder 1205 carries out the information in signal 1220 Decoding, and export decoded signal 2125.In this decoded signal, at least some information contents of signal 1220 are expressed At orderly limited one group of discrete digital (for example, high-order and low level set).

Decoded signal 2125 is provided to one or more inputs 2130 of data aggregator 2105.Data aggregator 2105 further include output 2135.Data aggregator 2105 is that relatively small digital collection is aggregated into the portion of biggish digital collection Part.In the embodiment as shown, data aggregator 2105 is connected, and received decoded signal is aggregated into output Signal 1230, output signal 1230 carry out expressing information 1225 with orderly limited one group of discrete digital.Output signal 1230 by from The output 2135 of data aggregator 2105 is provided to the output 2115 of system 2100.

In operation, base code signal when each reception of decoder 1,205 one from system or medium 140 is corresponding 1220.Base code signal 1220 is decoded into when decoder 1205 is corresponding by them is expressed with orderly limited one group of discrete digital The signal of the information content.Data aggregator 2105 is connected, to receive signal 1220, polymerize them and in output signal 2145 It is middle to export them.

Figure 22 is can be to the schematic representation of an embodiment of the system 2200 that information is encoded.System 2200 Including multi-channel encoder 1105 and condensing encoder 2205.

Condensing encoder 2205 is the component that multiple input signals are compressed into single output signal 2220.Condensing encoder 2205 include the set and output 2215 of one or more inputs 2210.One or more input 2210 can be connected to receive and From the when base code signal of the output 1115 of multichannel clock coder 1105.Condensing encoder 2205 compresses received when base Code signal, and by the output of compressed signal 2220 to system or medium 140 in output 2215.

System 2200 can independently be used in combination using or with other devices.For example, base code is compiled when system 2200 is used as Code device 25, amplitude weighting component 27 and compressor 29 (Figure 1A).

Figure 23 is schematically showing for an embodiment of condensing encoder 2205.Condensing encoder 2205 is will to come from Wherein information is the information coding of the signal set encoded by the event generation timing sequence in time interval at including timing Sequence of events (a timed series of events) signal (such as signal 2220 (Figure 22)) component.

In the embodiment as shown, encoder 2205 includes：It is the set of different binary system-analog converters 2305, whole Clutch 2310, the set for inputting 2315 and output 2320.Each binary system-analog converter 2305 includes one corresponding defeated Enter 2325 and an output 2330.The input 2325 of each binary system-analog converter 2305 is connected, with from corresponding input 2315 receive a corresponding signal 135 (wherein information is encoded by the event generation timing sequence in time interval).

Each input 2315 and corresponding binary system-analog converter 2305 form an encoding channel 2340 in pairs.Cause And condensing encoder 2205 is the parallel combined of multiple encoding channels 2340.These signals 135 can information having the same, can With the different information contents, or there can be the combination of the identical and different information contents.

Each binary system-analog converter 2305 is one and is configured as an input time chain of events (an input Time series of events) in individual events amplitude weighting be the input time series in other events when The function of sequence.In some embodiments, nonlinear function can be used to weight the event.In some embodiments, it presses Contracting encoder 2205 includes at least two different binary system-analog converters 2305.Different binary system-analog converters 2305 can be used the combination of different time-sensitive parameters, different time sensitivities or these or other factors, to thing Part is weighted.In some embodiments, each binary system-analog converter 2305 in encoder 2205 will differ from compiling Other binary system-analog converters 2305 of each of code device 2205.In some embodiments, two in encoder 2205 into The set of system-analog converter 2305 is the binary system-analog converter constructed using the process of such as process 3900 (Figure 39) Complete or collected works (complete set).Due to such difference, when (wherein information is by the event in time interval to identical signal Generation timing sequence and encode) be entered different binary system-analog converters 2305) when, different binary system-analog converters 2305 will export different signals, and (it includes in the relevant instant of the timing of the unweighted event corresponded in the input signal Weighted events).

(it is defeated corresponding to this for one signal 2345 of output in output 2330 for each binary system-analog converter 2305 The relevant instant for entering the timing of the unweighted event in signal includes weighted events).Signal 2345 is provided to integrator 2310 corresponding input 2350.Implement in those of integrator 2310 embodiment in use " wet " neural component, signal 2345 attribute can be customized to compatible with wet neural component.For example, the event in signal 2345 can be customized with echomotism The amplitude and time response of current potential.

Integrator 2310 includes the set and output 2355 of input 2350.Integrator 2310 is connect at input 2350 The signal received is integrated to generate the component for the signal for being provided to output 2355.These signals are integrated them Group, which merges, is compressed into individual signals.In some embodiments, integrator 2310 can be non-linear integrator, be in difference The different signals received at 2350 are inputted in various degree to contribute to the signal for being provided to output 2355.In some realities It applies in mode, integrator 2310 can be linear integration device, be the unlike signal received at different inputs 2350 with phase It contributes with degree to the signal for being provided to output 2355.In some embodiments, as described further below, it integrates Device 2310 be according in brain or other neuron processor parts one or more neurons or node model.For example, whole The individual signals output 2360 provided in the output 2355 of clutch 2310 can indicate the unlike signal received at input 2350 It is comprehensive interaction (all-to-all interactions).

Output 2355 couples signal 2360 to the output 2320 of condensing encoder 2205.Output 2320 mentions signal 2365 It is supplied to system or medium 140.

Figure 24, Figure 25, Figure 26, Figure 27 are with the different embodiments of integrator 2310 (that is, integrator 2400, integrator 2500, integrator 2600 and integrator 2700) it related schematically shows.Integrator 2400 is a nothing of neural processing system Branch node (non-branched node).Integrator 2500 is a node with multiple branches of neural processing system. Integrator 2600,2700 is the meshed network of neural processing system.Integrator 2400,2500,2600,2700 can be with hard Part is constructed with software, with wet neural component or with the combination of these components.

As shown, integrator 2500 includes the set of branch 2505.In some embodiments, these branches 2505 have There is identical attribute.In other embodiments, different branches 2505 has different attributes.For example, different branches 2505 can have different cables (cable) attribute.

As shown, integrator 2600,2700 respectively includes being gathered by the node 2605 that the set of link 2610 is coupled.Link 2610 may include, for example, fed-forward link, feedback link, recurrence link (recurrent link) or combinations thereof.Integrator 2700 Including a pair of output 2355.The two outputs 2355 provide the knot of combination and the compression of the signal received at input 2350 Fruit.However, generally, output 2355 is generated output by the various combination and compression of the signal received in input 2350 Unlike signal.As a result, two different signals can be exported from condensing encoder, and it is sent to system or medium 140.It can also Parallel memorizing or decoding are carried out to the two unlike signals using described system and technology.Although the parallel memorizing reconciliation Code may reduce the density of data storage or require additional treatments, but can check and mention by comparing the result of parallel decoding High (if necessary) storage and decoded fidelity.

In operation, integrator 2400,2500,2600,2700 can according to one or more models come to input signal into Row integration.For example, in some embodiments, integrator 2400 can be according to an integration-igniting (integrate-and- Fire) model is integrated.Such model includes the capacitor C in parallel with the resistor R driven by electric current I (t), and is mentioned For：

Equation 1

In the model, the signal in input 2350 is by the linear of the amplitude of a moment each signal any in the time (linear summation) (that is, the voltage of each input signal (RxI (t)) is added) is summed come what is integrated.It is described Voltage signal is with timeconstantτ_mExponential damping.A threshold voltage may be selected, (above) can be defeated more than the threshold voltage A binary condition is issued in 2355 out.

In other embodiments, integrator 2400-2700 can be according to one provided by following formula based on conductance (conductance based) integration-igniting neuron models are integrated：

Equation 2

Wherein g_jIt is the conductance of specific ion type (ionic species), V-V_jIt is the Nernstian potential of the conductance (Nernst Potential), and I_extIt is the external electric current applied.

In the model, the signal in input 2350 is by the non-linear of the amplitude of a moment each signal any in the time (non-linear summation) is summed come what is integrated, this is that (it is according in the time by one or more conductance g The total voltage that any moment reaches scales (scale) described signal (I_ext) amplitude) come what is realized.The amplitude of each signal Also with timeconstantτ_mExponential damping, timeconstantτ_mIt can change with the change of conductance.A threshold voltage may be selected, A binary condition signal more than the threshold voltage can be issued in output 2355.

In some embodiments, integrator 2500 can according to following model running, in the model voltage based on electricity The evolution (evolution) led can be expanded to include the voltage attenuation in cable, this telegraph equation being given by (Telegraphers Equation) description：

Equation 3

Wherein λ is the length constant determined by the attribute of the branch, and x is the digitlization list along the length of the branch Member, and V_LVoltage when being balance.

In the model, the signal in input 2350 is using equation 1 above or equation 2 and by further line Property summation integrated, wherein each signal in input 2350 can be propagated to along the physics branch of the system it is all its He inputs 2350.It is propagated although as signal, signal amplitude decays according to length constant λ, but each of in input 2350 Signal contributes to the amplitude at each input 2350 all in a certain degree.Therefore, any one letter at input 2350 Number amplitude be the signal amplitude plus input 2350 on other signals when propagating to the position of exemplary input 2350 The sum of all amplitudes after respectively uniquely decaying.A threshold voltage may be selected, can exported more than the threshold voltage A binary condition signal is issued in 2355.

In some embodiments, integrator 2600,2700 can be run according to following neural network model, in the nerve All nodes are all interconnected directly or by other nodes indirectly in network.In such integrator, any node can be used as defeated Out.In some embodiments, integrator 2600,2700 can be run according to the model being given by：

Equation 4

Wherein I_iIt (t) is the electric current injected by inputting i in moment t, and one of neuron has n input.

In the model, the signal in input 2350 is integrated by network processing element 2605, each net Network processing element 2605 is modeled by equation 1 above, 2 or 3, this establishes additional internal input for each element 2605 2610, so that any non-linear and parallel summation of all inputs 2350 be allowed to generate output 2355.Any one may be selected Processing element 2605 is used as output 2355 to issue the binary condition signal of the network.

Integrator 2400,2500,2600,2700 is used as compressor 29 (Figure 1A).

Figure 28 is schematically showing for binary system-analog converter 2305.Binary system-analog converter 2305 can be used in example In encoder, time series scanner (timer series scanner) or weighting device.Thus, in some embodiments In, binary system-analog converter 2305 can be reference (reference) binary system-analog converter, such as retouch further below It states.

Binary system-analog converter 2305 can be such as lower component, and being configured as will be in an input time chain of events Individual events amplitude weighting at the input time series in other events timing function.In some embodiments In, nonlinear function can be used to be weighted to the event.For example, binary system-analog converter 2305 can be used it is multiple Time-sensitive parameter, to generate the individual power for each individual events based on the timing of the leading event in input signal Weight.Weight generated can be applied to individual events by binary system-analog converter 2305, for example, by multiplying the event Weighted events are exported with the weight and in the relevant instant of the timing of the unweighted event corresponded in the input signal.

Binary system-analog converter 2305 includes input 2325 and output 2330.Input 2325 receives signal 2805, signal 2805 include a time chain of events.For example, base code signal 135 or defeated from condensing encoder 2205 when input 2325 is receivable Signal out.Output 2330 provides signal 2810, signal 2810 the unweighted event corresponded in the input signal when The relevant instant of sequence includes weighted events.

In some embodiments, binary system-analog converter 2305 may include resetting-mechanism, which will be individual The weighting of the amplitude of event is reset to known state.The resetting-mechanism can be triggered, such as the report foot interval for passing through signal 135 The presence of report foot event 530 (Fig. 5) in 520.The evolution of (halt) time-sensitive parameter can be stopped by resetting the weighting, and These parameters are back to given value.In other embodiments, binary system-analog converter 2305 can without triggering the case where Under (such as with the time) quiet (quiesce).

In some embodiments, to may alternatively appear in Time Dependent by the parameter that binary system-analog converter 2305 uses poor Divide in equation (differential equation).For example, three time-sensitives can be used in binary system-analog converter 2305 Parameter (U, τ in following equation_d、τ_f) and a time insensitive parameter (A in following equation) with generate individual power Weight.In some embodiments, event (1 ..., k) is by time (Δ_k,…Δ_k-1) those of separate k-th of event in signal Amplitude A_kIt can be given by：

A_k=Au_k·ψ_kEquation 5

Equation 6

Equation 7

Wherein ψ and μ_kIt is implicit dynamic variable (hidden dynamic variable) (μ ∈ [0,1]；ψ ∈ [0,1]), There is initial value ψ for first event₁=1 and μ₁=U.Variable ψ can be indicated, for example, available resource at the time of each event Part.Variable μ can be indicated, for example, the resource part used by each event.In some embodiments, the two variables can It evolves with each event, and assumes to be different the amplitude of the response of each event in signal and reflect the signal In event time history (temporal history).

The mode of evolution of these dynamic variables and it is each response accumulation about the signal time history information when Between section, depend on described time-sensitive parameter (U, τ_d、τ_f) value.Parameter U can set maximum money available for first event Source, the maximum resource are divided (fractionate) to feasible peak response (being provided by A).Thus A₁=AU.Parameter τ_d It is the time constant for restoring the resource after usage.Parameter τ_fIt is for from μ_kOne division (facilitation) restore the time constant of a certain amount (usually μ).

By for parameter U, τ_d、τ_fDifferent values is distributed, different binary system-analog converters 2305 will be responsive to equally Event list entries generate different amplitude sequences.In some embodiments, parameter τ can be directed to_d、τ_fOne or both of More complicated time sensitivity is realized using second order or higher order index.In some embodiments, the up time is sensitive Function provides τ_d、τ_fOne or both of, and by make U become the stochastic variable that itself is linked with the parameter or function come Realize more complicated time sensitivity.

In some embodiments, binary system-analog converter 2305 can be such as the one or more description in following documents As be carried out：U.S. Patent Publication text 2003/0208451；United States Patent (USP) 5,155,802；United States Patent (USP) 5,537, 512；United States Patent (USP) 6,363,369；And United States Patent (USP) 4,962,342；The content of all these documents is included in a manner of reference Herein.For example, binary system-analog converter 2305 can be implemented as following device, the device include signal processor network (by One or more processing node (junction) interconnection, the node that handles is according to the time style of the event in signal 2805 (temporal pattern) dynamically adjusts response intensity), thus such as United States Patent (USP) 6, it is right described in 363,369 " dynamic synapse " is emulated.The processing node can receive and handle the node of a signal processor in the network Front signal (prejunction signal), to generate following node signal, which causes second in the network Signal (postjunction signal) after the node of signal processor.Each processing node can be configured such that the node is believed Number to the node front signal have dynamic dependency.

Figure 29 is by the amplitude weighting of the individual events in a time chain of events into other events in the time series The function of timing schematically show.Shown weighting can be by binary system-analog converter (for example, binary system-simulation turns Parallel operation 2305 (Figure 28)) it executes.In the embodiment as shown, signal 135 is when being occurred by the event in time interval Sequence is come the when base code signal that is encoded to information.For example, signal 135 can be the when base code signal exported from decoder 105 (Fig. 1,2,4,6,8).Signal 135 is weighted, to form the time signal 2900 weighted.

The time signal 2900 weighted includes time interval sequence 2905, and each time interval includes a corresponding thing Part 2910.2915 at the time of event 2910 occurs in corresponding interval 2905.

In the embodiment as shown, event 2910 be (" rest ") from baseline state 2920 change it is supreme (i.e. " swash Hair ") state 2925 is then return to the pulse of baseline resting state 2920.For different events 2910, high state 2925 Level is different.The level of high state 2925 is the amplitude of event 2910, and is the result of the weighting.The level of high state 2925 (that is, amplitude of each event 2910) embodies other events in the timing and signal 135 of the event 2910 in signal 135 2910 timing.In other words, it is embodied as by the information that the timing of two or more events 2910 in signal 135 encodes In the amplitude of each event 2910.As described above, in some embodiments, the amplitude of each event 2910 can only body The now timing of leading event 2910.

In the embodiment as shown, the weighting of event when in base code signal 135 changes the amplitude of these events, together When remain interval in and signal in timing information.In particular, the shown time signal 2900 weighted is including between the time Every 2905 set, each time interval 2905 corresponds to a corresponding interval 320 in signal 135.The correspondence is by arrow First 2930 indicate.In the embodiment as shown, some events 2910 increases in amplitude relative to corresponding corresponding event 205 Greatly, and some events 2910 reduces in amplitude relative to corresponding corresponding event 205.

Corresponding time interval 2905,320 respectively includes a corresponding event 2910,325 encoded to information.Event 2910,320 position in corresponding corresponding time interval 2905,325 is identical.For example, when an event 320 occurs When the beginning of time interval 325, the event 2910 in corresponding time interval 2905 also occurs in the beginning at the interval.As another A embodiment, when event 2910 of the generation of event 320 at the centre of time interval 325, in corresponding time interval 2905 Also occur in the centre at the interval.In the embodiment as shown, the duration at corresponding interval 2905,325 is identical.This Outside, corresponding interval 2905,325 is relative to the order (order) at other intervals 2905,325 in corresponding signal 2900,135 It is identical.

Figure 30 is schematically showing for an embodiment of signal 2365.Signal 2365 can be from a device (example Such as the transmitter of cellular phone or the head of disk drive) condensing encoder 2205 export.Signal 2365 can be one-dimensional letter Number, and can be one-dimensional signal 29 (Figure 1A).

Signal 2365 includes the sequence of events 3005 of timing.Event 3005 is separated from each other by time span 3010.When Between duration of span 3010 embody the integration of the amplitude sequence including weighted events, such as the time signal weighted 2900。

In the embodiment as shown, event 3005 be (" rest ") from baseline state 3015 change it is supreme (i.e. " swash Hair ") state 3020 is then return to the pulse of baseline resting state 3015.In some embodiments, different event 3005 Shape can be undistinguishable each other, and different event 3005 can only by means of they timing and be distinguished.

It can be selected for the number of the time span 3010 of the Setting signal 2365 in the unit time, it is scheduled to meet Probability distribution.In some embodiments, the probability distribution can be asymmetric and deflection (skewed) (such as into it The left side deflection of centre).In some embodiments, the standard deviation (standard deviation) of the probability distribution can be approximate Equal to the root mean square (square root of the mean) of the probability distribution.For example, in some embodiments, when unit The number of interior time span 3010 can be in Poisson distribution.

In some embodiments, signal 2365 can be added, be superimposed with additional information (superposition) or with Other modes are launched with additional information.For example, event 3005 can be added into a simulation that is brewed or having shifted Or digital signal, to imitate the noise in the signal.Such embodiment especially with hidden (covert) or encryption data It communicates related.For example, event 3005 can be believed with the frequency-modulated analog of not significant (unremarkable) information of itself transmission Number (such as radio broadcasting) is launched together.For uninformed observer, event 3005 will be seemingly in this second signal Noise.Thus, the information content encoded by event 3005 can be pretended.

Figure 31 is schematically showing for data storage device 3100.Data storage device 3100 is such as lower component, wherein Information can be stored and from wherein may have access to stored information.For example, data storage device 3100 can be CD, disk, Tape record disc (record album), card punch, bar coded sticker or other data storage devices.

Data storage device 3100 includes the collection of detectable physical behavior (physical manifestation) 3105 It closes.Physical behavior 3105 is can be by data storage device reader detects or senses structural member.For example, physical table Existing 3105 can be can be by the concave point (pit) or salient point (pump) for the CD that optical-disc reader detects.As another implementation Example, physical behavior 3105 can be the magnetized members of can be magnetized disk or tape that sensor detects.As another reality Example is applied, physical behavior 3105 can be the feature for record disc that can be detected by the stylus (stylus) of disc machine.

Physical behavior 3105 is arranged in sequence along path 3110 and positions.The storage of 3110 pilot data of path and visit It asks, and can be, for example, track, groove, one section of tape or bar code.Along the physical behavior in each path 3110 3105 are separated from each other distance 3115.Distance 3115, which can be corresponding to the time between the event in signal, to be scaled.For example, Distance 3115 can be the duration corresponding to the time span 3010 in signal 2365 (Figure 30) to scale.

During data are written to data storage device 3100, the path 3110 of data storage device 3100 and data storage Time between event in such signal can be converted into physical behavior by the speed of related movement between device writer 3105 along path 3100 position.During reading data from data storage device 3100, the road of data storage device 3100 Speed of related movement between diameter 3110 and data storage device reader can be by physical behavior 3105 along the position in path 3110 Set the time converted back between the event in such signal.In some embodiments, the opposite fortune during reading and writing Dynamic speed is but changeable without constant, such as is changed based on position of the path 3110 on data storage device 3100.

The number of distance 315 in unit length can be selected, to meet scheduled probability distribution.In some embodiments In, which can be asymmetric and deflection (such as central left side deflection to it).In some embodiments, The standard deviation of the probability distribution can be approximately equal to the root mean square of the probability distribution.For example, in some embodiments, unit length The number of interior distance 315 can be in Poisson distribution.

In operation, data storage device writer can receive the signal of the sequence of events of characterization timing, such as believe Numbers 2365.Physics can be written along one or more paths 3110 on data storage device 3100 in data storage device writer Performance 3105, so that distance 3115 time for corresponding between the event in signal scales.Data storage device 3100 It can maintain or " storage " physical behavior 3105 and the distance 3115 for separating physical behavior 3105.

When accessing stored information, data storage device reader can measure distance 3115, and distance 3115 is along number Physical behavior 3105 is separated according to one or more paths 3110 on memory device 3100.The measurement can be converted into characterization The signal of the sequence of events of timing, such as signal 2365 (Figure 30).For example, the exportable signal of data storage device reader 2365, so that the duration of time span 3010 corresponds to distance 3115 to scale.In some embodiments, the number It can be same device according to memory device reader and the data storage device writer.

Figure 32 is can schematically showing to one embodiment (that is, the system 3200) for the system that information is decoded. System 3200 includes multi-channel encoder 2100 and extension decoder 3205.

Extension decoder 3205 is the component that one or more input signals are extended to output signal set.Extension decoding Device 3205 includes the set of input 3210 and one or more outputs 3215.Input 3210, which receives, comes from system or medium 140 Signal 2365.Extension decoder 3205 extends signal 2365, and exports one or more letters to multi-channel encoder 2100 Number set (wherein information is encoded by the event generation timing sequence in the time intervals in one or more outputs 3215 ).

System 3200 can independently be used in combination using or with other devices.For example, system 3200 is used as weighting extension Device 37, magnitude decoder 39 and Shi Ji decoder 41 (Figure 1A).

Figure 33 is schematically showing for an embodiment of extension decoder 3205.Decoder 3205 is will be including having matched When sequence of events signal in information (wherein information is sent out by the event in time interval to base code signal when being decoded into Raw timing and encode) component.Thus, the signal of a such as signal 2365 (Figure 30) can be decoded into one by decoder 3205 The signal of a such as signal 1220 (Figure 12).

In addition to input 3210 and one or more outputs 3215, decoder 3205 further includes weighting device 3310 and time Series scanner 3315.Weighting device 3310 is added for the event in the signal to the sequence of events for including timing The component of power.Time series scanner 3315 is the component of sweep time series, which, which works as, is input into appropriate reference Binary system-analog converter in when (wherein information is by the event generation timing sequence in time interval to base code signal when generating And encode).

The input 3210 of extension decoder 3205 receives signal 2365.Signal 2365 includes the sequence of events of timing. Weighting device 3310 is coupled to input 3210, and further includes output 3335.It is only serial that output 3335 provides amplitude event (net series)3340。

Time series scanner 3315 includes input 3345, and is coupled to the output 3215 of decoder 3305.Input 3345 receive events 3340, and (wherein information is by the event generation timing sequence in time interval to base code signal when exporting Coding).For example, output 3215 can provide signal 135 to system or medium.

Extension decoder can independently be used in combination using or with other devices.For example, extension decoder is used as weighting Expander 37 and magnitude decoder 39 (Figure 1A).

Figure 34 is schematically showing for weighting device 3310.Weighting device 3310 is for a series of including timing The component that event in the signal of event is weighted.For example, weighting device 3310 can to signal 2365 event 3005 (figure 30) it is weighted.As described further below, the weight that weighting device 3310 is weighted the event, which can be, to be based on The successful expression of mathematics or other operations to the signal specific on the input channel 2340 (Figure 23) of compression decoder 2205 comes Selection.For example, in some embodiments, weighting device 3310 can be chosen so as to hold to the weight that the event is weighted It goes one or more of following：Data compression and cryptographic operation to the signal on input channel 2340；To input channel The text-processing of signal on 2340 operates；To the numerical value processing operation of the signal on input channel 2340；To input channel The image processing operations of signal on 2340；And the signal processing operations to the signal on input channel 2340.Weighting device 3310 can be a part of extension decoder 3205 (Figure 33).

Weighting device 3310 includes input 3210, output 3335, the set of binary system-analog converter 2305, multiplier 3440 set, the set of weight 3445 and adder (summer) 3465.Input 3210 receives signal 2365, signal 2365 Sequence of events including timing.Input 3210 distributes signal 2365 to the input of binary system-analog converter 2305 2325.The amplitude weighting of individual events in one input time chain of events is by each simulation-binary translator 2305 should The function of the timing of other events in input time series.For example, each binary system-analog converter 2305 can be used it is multiple Time-sensitive parameter, to generate the individual power for each individual events based on the timing of the leading event in signal 2365 Weight.Generally, weight generated is applied to individual events by each binary system-analog converter 2305, for example, by by institute The relevant instant output for stating timing of the event multiplied by the weight and in the unweighted event corresponded in signal 2365 has added Power event.

In some embodiments, the set of binary system-analog converter 2305, which can be, uses such as process 3900 The process of (Figure 39) constructs.In some embodiments, this group of binary system-analog converter in weighting device 3310 2305 can be binary system-analog converter complete or collected works of the building of use process 3900.

Each binary system-analog converter 2305 includes output 2330, has weighted 3430 quilt of sequence of events of timing Output extremely output 2330.The sequence of events 3430 for having weighted timing is provided as the input of corresponding multiplier 3440.Multiply Musical instruments used in a Buddhist or Taoist mass 3440 is to be configured as the sequence of events by timing has been weighted multiplied by another weight 3445 such as lower component.It is as follows What face further described, weight 3445 can be determined during training process.For example, can be according to corresponding binary system-analog converter The successful expressions of 2305 pairs of signal specifics 135 being input in the channel 2340 of condensing encoder 2205 determines each weight 3445.It, can be according to corresponding binary system-analog converter 2305 to being input to condensing encoder 2205 as another embodiment Successful expressions of the mathematics of signal specific 135 in channel 2340 or other operations determine weight 3445.

Each weight 3445 can be received in corresponding input 3450 by multiplier 3440.Weight 3445 can be stored in example In one or more data storage devices.Multiplier 3440 is scaled and is being inputted according to weight 3445 such as lower component The received sequence of events 3430 for having weighted timing on 3435.Multiplier 3440 can linearly or non-linearly scale timing The sequence of events weighted.For example, in some embodiments, weight 3445 can be used as scaling weight by multiplier 3440 (scalar weight), and by each weighted events matched in time series multiplied by corresponding weight 3445.In some realities It applies in mode, weight 3445 can be used to come non-linearly or otherwise scale each to have matched in time series for multiplier 3440 Each weighted events.

Each multiplier 3440 exports the sequence of events 3445 of timing for having scaled and having weighted in output 3450, Output 3450 is coupled to the input 3460 of adder 3465.Adder 3465 is such as lower component, in the scaling inputted And each moment matched in time series weighted has scaled to these and the event 3455 weighted is summed, to generate width The net series 3470 of degree event.

In some embodiments, adder 3465 may include a dynamic threshold, for generating in net series 3470 Amplitude event.Dynamic threshold is the threshold value of variation.The dynamic threshold can be the lower limit including amplitude event in net series 3470 (lower cutoff).In other words, if the event that the first moment scaled and had weighted summation below the lower limit (below), then the summation is not included in net series 3470, even if the summation is not zero.The dynamic threshold can be changed, To control the number of the amplitude event in net series 3470.For example, the dynamic threshold can be changed, to ensure in net series 3470 Amplitude event number be equal to input signal 2365 in event number.In some embodiments, adder 3465 is first First sum at each moment matched in time series for having scaled and having weighted inputted to the event for having scaled and having weighted, Then the dynamic amplitude is gradually reduced, until the number of the amplitude event in net series 3470 is equal to the event in signal 2365 Number.This allows identical dynamic threshold to be suitable for entire net series 3470.

In the embodiment as shown, the amplitude event in net series 3470 by non-homogeneous (non-uniform) period every It opens.But not necessarily so.Replace, the amplitude event in adder 3465 exportable net serial 3470 and without timing believe Breath.In view of dynamic threshold described above, adder 3465, which can in fact export the list of the amplitude of amplitude peak event, to be made It is net serial 3470, without describing the timing between these events.The order of amplitude in such list can correspond in this way Event occur order.

It is other events in the time series that Figure 35, which is by the amplitude weighting of the individual events in a time chain of events, The function of timing schematically show.Shown weighting can by binary system-analog converter (such as binary system-simulation turn Parallel operation 2305 (Figure 28)) it executes.In the embodiment as shown, signal 2365 includes the sequence of events 3005 of timing, The sequence of events 3005 of timing is separated from each other by time span 3010.The duration of time span 3010 embody including The integration of the amplitude sequence of weighted events.Thus, signal 2365 can be for example from integrator (such as integrator 2310, 2400, output one of 2500,2600,2700).

Signal 2365 is weighted, to form the time signal 3500 weighted.The time signal 3500 weighted includes thing The set of part 3505, event 3505 are separated from each other by time span 3510.

In the embodiment as shown, event 3505 be (" rest ") from baseline state 3520 change it is supreme (i.e. " swash Hair ") state 3525 is then return to the pulse of baseline resting state 3520.For different events 3505, high state 3525 Level is different.The level of high state 3525 is the amplitude of event 3505, and is the result of weighting.The level of high state 3525 (that is, amplitude of each event 3505) embodies in the timing and signal 2365 of the event 3505 in signal 2365 extremely The timing of few some other events 3505.In other words, pass through the timing of two or more events 3505 in signal 2365 The information of coding is embodied in the amplitude of each event 3505.As described above, in some embodiments, each event 3505 amplitude can only embody the timing of leading event 3505.

In the embodiment as shown, some events 3505 increases in amplitude relative to corresponding corresponding event 2365, And some events 3505 reduces in amplitude relative to corresponding corresponding event 2365.

The time span 3510 between the generation of the event 3505 in weight temporal signal 3500 is scaled in 2365 Event 3005 generation between time span 3010.In the embodiment as shown, time span 3510 is by one to one contracting It puts to time span 3010.In other words, the time span 3,010 first pair of event 3005 separated be equal to will correspond to this first The time span 3510 that a pair of of event 3505 of event is separated.

Figure 36 is schematically showing for time series scanner 3315.Time series scanner 3315 is sweep time series Component, base code signal is (wherein when which generates when being input into the binary system-analog converter suitably referred to Information is encoded by the event generation timing sequence in time interval).For example, base when time series scanner 3315 can scan Code signal 135, this when base code signal 135 be input to base code signal when in the channel 2340 of condensing encoder 2205 (Figure 23) 135 is approximate or identical.

Time series scanner 3315 includes input 3345 and output 3215.Input 3345 receives amplitude or amplitude event is net Series 3470.The input 3620 that input 3345 is sent to amplitude buffer 3625 for net serial 3470.Amplitude buffer 3625 is The component being compared for comparator 3635 is buffered to the amplitude in net serial 3470.In some embodiments, width Degree buffer 3625 may include caching or other memories, for storing amplitude or net serial 3470 magnitudes of amplitude event (magnitude).It include in those of timing information embodiment in net series 3470, amplitude buffer 3625 may include being used for Component of the timing information without losing amplitude information is removed from net serial 3470.Amplitude buffer 3615 includes output 3630, The amplitude buffered is provided to the input 3640 of comparator 3635 by output 3630.

Comparator 3635 further includes input 3645 and output 3650.Comparator 3635 is will to input 3640 such as lower component On amplitude be compared with the amplitude in input 3645, and the mark of the comparison result is generated in output 3650.This ratio Relatively result embodies the difference between the amplitude in input 3640,3645.For example, when between the amplitude in input 3640,3645 Difference very hour, export 3650 exportable small signals.

Comparator 3635 by the amplitude buffered in amplitude buffer 3615 with from reference binary system-analog converter 2305 The amplitude of output is compared.Although illustrated as single component, but comparator 3635 may include the set of comparator, these compare Device is connected to compare individual amplitude (such as comparing parallel).In other words, first comparator can will be in amplitude buffer 3625 First amplitude of buffering is compared with the first amplitude exported from reference binary system-analog converter 2305, the second comparator It can be by the second amplitude buffered in amplitude buffer 3625 and the second width exported from reference binary system-analog converter 2305 Degree is compared, and so on.The individual comparison result of such comparator set can be output to one or more outputs Set.

Base code displacer (permuter) 3670 is defeated when one or more outputs 3660 of comparator 3635 are provided to Enter 3665.When base code displacer 3670 be in response to the component of base code when exporting 3660 feedback to replace.In particular, when base code set Base code when parallel operation 3670 is replaced is so that the difference between amplitude in the input 3640,3645 of comparator 3635 minimizes.Shi Ji Code displacer 3670 base code 3675 when exporting output candidate (candidate) on 3680.As described further below, the time When selecting base code be proposed as in the channel 2340 for being input to condensing encoder 2205 when base code signal 135 (Figure 23) make The solution of approximate (approximate).For example, when base code displacer 3670 can be used and approach (successive gradually Approximation) candidate Shi Ji code 3675 is generated.

Code 3675 is provided to the input 2325 with reference to binary system-analog converter 2305.With reference to binary system-analog-converted Device 2305 is such as lower component, can be other in candidate's Shi Ji code by the amplitude weighting of the individual events of candidate's Shi Ji code The function of the timing of event, such as using multiple time-sensitive functions, with the timing based on leading event when this in base code come Individual weight is generated for each individual events.Candidate's Shi Ji code can corresponded to reference to binary system-analog converter 2305 The relevant instant of the timing of interior unweighted event exports weighted events, or without timing information.In other words, reference two into An ordered list (ordered list) for the exportable amplitude weight of system-analog converter 2305 is inputted without description The timing between these events in candidate Shi Ji code.It in some embodiments, can with reference to binary system-analog converter 2305 Including storing the weight or the buffer of the magnitude of weighted amplitude, caching or other memories.

It in some embodiments, can be with the binary system-of condensing encoder 2205 with reference to binary system-analog converter 2305 Analog converter 2305 (Figure 23) is identical.For example, reference binary system-analog converter 2305 in time series scanner 3315 The time-sensitive parameter phase that the time-sensitive parameter used can be used with binary system-analog converter 2305 in channel 2340 Together.

In some embodiments, base code displacer 3670 may also include comparator when, which will be by output 3660 The feedback of offer is compared with following threshold level, which embodies in the input 3640,3645 of comparator 3635 Amplitude between acceptable amount difference (acceptable amount of difference).When base code displacer 3670 can Replace candidate's Shi Ji code, the difference until reaching the acceptable amount.In other words, in those of the extremely important embodiment of fidelity In, which can be tightened up, and is arranged to require between the amplitude in the input 3640,3645 of comparator 3635 Difference it is relatively small or be zero.In this case, base code displacer 3670 will usually execute relatively more displacement when.In fidelity Spend it is less important and in those prior embodiments of the factor such as speed, which can be less stringent, And it is arranged to allow the difference between the amplitude in the input 3640,3645 of comparator 3635 relatively large.In such situation Under, when base code displacer 3670 will usually execute relatively little of displacement.In some cases, than usually require that more or more After few displacement, the difference of the acceptable amount between the amplitude in the input 3640,3645 of comparator 3635 can reach.For example, When base code displacer 3670 can be with by accident, defeated after the considerably less displacement for even meeting very strict threshold level Candidate's Shi Ji code out.In some embodiments, for the operation in varying environment, the stringency of the threshold value can be conditioned, example Such as it is adjusted by the user.

Reach threshold level in response to the feedback from output 3660 or intersect with threshold level, when base code displacer 3670 Selection signal 3685 can be exported in output 3690.Selection signal 3685 indicates：In the input 3640,3645 of comparator 3635 Difference between amplitude has reached an acceptable small level.Selection signal 3685 can be set, to realize closing for switch 3690 It closes, so that output 3215 be connect with code 3675.Candidate Shi Ji code 3675 is sent to output 3215 by this, in signal 135 It is middle to export to system or medium 140.

Figure 37 is schematically showing for multichannel extension decoder 3205 (that is, multichannel extension decoder 3700).Decoding Device 3700 is that (wherein information is to pass through to base code signal when being decoded into the information in the signal of the sequence of events including timing Event generation timing sequence in time interval and encode) component.Thus, decoder 3700 can be by a such as signal 2365 The signal of (Figure 30) is decoded into the set of signal 135.Decoder 3700 can independently be used in combination using or with other devices.Example Such as, decoder 3700 is used as weighting expander 37 and magnitude decoder 39 (Figure 1A).

Decoder 3700 includes：The set of weighting device 3310, the set of time series scanner 3315, input 3710 with And the set of one or more outputs 3715.Each weighting device 3310 time series scanner 3315 corresponding with one is matched It is right.These pairings can form a batch decoding channel 3717 in decoder 3700.Thus, decoder 3700 is multiple decoding channels 3717 the parallel combined, each decoding channel 3717 form a discrete extension decoder 3205.

In decoder 3700, associated one group of binary system-analog converter 2305 is can be used in each weighting device 3310 Event is weighted with associated one group of weight 3445.In some embodiments, at least some binary system-analog-converteds Device 2305, the weight 3345 of at least some different weights devices 3310 or the two will be different.For example, this group two into System-analog converter 2305 is the binary system-analog converter 2305 constructed using the process of such as process 3900 (Figure 39) May include in those of complete or collected works embodiment, in all weighting devices 3310 of multichannel extension decoder 3700 identical two into System-analog converter 2305.However, at least some weights 3445 of different weights device 3310 will be different.For example, one In a little embodiments, many weights 3445 of different weights device 3310 can be zero or near zero, and some weights 3445 will not. Due to these differences, when the sequence of events of identical timing is input into different weighting devices 3310, Mei Gejia It is only serial that power device 3310 will usually export different amplitude events.However not necessarily in this way, because by accident, can lead to not Export that identical amplitude event is only serial with weighting device 3310, even if having different binary system-analog converter 2305 and power Weigh 3445.

In decoder 3700, each time series scanner 3315 can be used different components come base code signal when scanning. For example, each time series scanner 3315 may include a different reference binary system-analog converter 2305.For example, every Reference binary system-analog converter 2305 in a time series scanner 3315 can be with the channel 2340 of condensing encoder 2205 Binary system-analog converter 2305 (Figure 23) it is identical.

Due to the different components in different time series scanner 3315, different time series scanner 3315 is usually exported Different time series, though in response to input 3345 on received identical amplitude event it is only serial.In addition, different time Difference between series scanner 3315 will generate different time series, even if in different time series scanner 3315 by following Ring come export same time series in the case where.Moreover, in response to input 3345 on received different amplitude event be only Column, different time series scanners 3315 can generate identical time series once in a while.

The input 3710 of decoder 3700 receives signal 2365.Signal 2365 includes the sequence of events of timing.Input 3700 are distributed signal 2365 to the input 3210 of weighting device 3310.Thus, identical individual signals 2365 are entered the collection Different weighting device 3310 in conjunction.

Base code signal 3725 when one or more outputs 3215 of each time series scanner 3315 generate, when base code Information is encoded by the event generation timing sequence in time interval in signal 3725.Each signal 3725 is by base code at one It is sent to a corresponding output 3715 of decoder 3700.One or more output 3715 is provided to such as system or medium 140 When base code signal 135, when base code signal 135 in information be to be encoded by the event generation timing sequence in time interval.

Figure 38 is can be to the schematic of an embodiment (that is, system 3800) of the system that information is coded and decoded It indicates.System 3800 includes system 2200 (Figure 22) and system 3200 (Figure 32).System 3800 can be, for example, data store System, communication system and/or data compression system.System 3800 can independently be used in combination using or with other devices.For example, being Base encoder 25, amplitude weighting component 27, compressor 29, weighting expander 37, magnitude decoder 39 when system 3800 is used as With when base decoder 41 (Figure 1A).

In system 3800, multichannel clock coder 1105 receives signal 125, and the base when exporting output on 1115 The set of code signal.Base code signal is received by one or more inputs 2210 of condensing encoder when described, the condensing encoder Base code signal when compressing received, and by the output of compressed signal 2220 to system or medium 140 in output 2215.Expand It opens up decoder 3205 and receives the signal 2365 from system or medium 140 at input 3210.The extension letter of extended coding device 3205 Numbers 2365, and the set of one or more following signals is exported to multi-channel encoder 2100, information is in the signal It is encoded by the event generation timing sequence in the time interval in one or more outputs 3215.Multi-channel encoder 2100 connects Receive the signal, and they decoded and aggregated into output signal 1230, output signal 1230 with orderly limited one group from Scattered number carrys out expressing information.

Figure 39 is the flow chart for constructing binary system-analog converter set process 3900.For example, process 3900 can It is used to construct binary system-analog converter 2305 (Figure 34) in weighting device 3310.As another embodiment, process 3900 can be used for constructing binary system-analog converter (Figure 23) in condensing encoder 2205.As another embodiment, mistake Journey 3900 can be used for constructing reference binary system-analog converter (Figure 26) in time series scanner 3315.Process 3900 It can independently execute or combine execution with other activities.For example, process 3900 can be the mistake for establishing encoder/decoder pair A part of journey 4100 (Figure 41).Process 3900 can be executed by one or more data processing devices.

As described previously, multiple time-sensitive parameters can be used in one group of binary system-analog converter, based on input letter The timing between event in number, to generate the individual weight for the individual events in a time chain of events.In some realities It applies in mode, the weight can be generated based on the timing of the leading event in the input signal.In the stage 3905, for every The feasible value range of a time-sensitive parametric distribution one.For example, the time-sensitive parameter can be constrained on identical normalization In range, such as between zero and one.

Several discrete values in each range can be identified (stage 3910).In some embodiments, the discrete value It can be distributed in each range, so that they all separate single distance with their nearest-neighbors.For example, for being assigned One time-sensitive parameter of the range between 0 and 1 can recognize five discrete values：0,0.25,0.5,0.75 and 1.Some In embodiment, the discrete value is not homogeneously distributed in each range, but according to them in the binary system-analog-converted In device use and be distributed.For example, the value of the time-sensitive parameter occurred in the form of nonlinear function can be according to the time-sensitive Position of the parameter in the nonlinear function and be distributed.In some embodiments, the number of the discrete value in each range can The weighting device 3310 and time series scanner 3315 being selected as in approximately equal to or greater than multichannel extension decoder 3700 Pair number (Figure 37).

Each parameter for using for binary system-analog converter selects one of the identified discrete value (stage 3915).Random process or nonrandom process can be used to select described value.In some embodiments, given parameters can be excluded Selected value by again selection be used for the parameter.In fact, this will require constructed binary system-analog converter for Each parameter has different value.In these embodiments, if in each range of Y different parameters there are it is N number of from Value is dissipated, then N*Y feasible value combinations may be selected.

In some embodiments, same value can be selected multiple times for multiple binary system-analog converters.For example, two System-analog converter can be exhaustive associativity combination (the exhausitive combinatorial using identified value Combination it) constructs.For example, if may be selected in each range of Y different parameters there are N number of discrete value N^YA feasible value combination.

In some embodiments, same value can be selected multiple times for multiple binary system-analog converters, but known The associativity combination of other value needs not to be exhaustion.For example, if there are N number of discrete in each range of Y different parameters Value then may be selected greater than NY but be less than N^YA feasible value combination.

Binary system-analog converter (stage 3920) can be constructed using selected value.It can be checked to determine whether Binary system-analog converter (BAC) (stage 3930) of desired number is constructed.In some embodiments, desired two System-analog converter number will be sufficiently large, so that for series (a single input of single input time of event Time series of time), by a certain of the one or more outputs of binary system-analog converter in the set Linear superposition produces the substantially any feasible weight temporal series for given one group of parameter and its range.If still Binary system-analog converter of unstructured desired number, then the process is returned to select additional parameter value and construct additional Binary system-analog converter (step 3915,3920).If having constructed binary system-analog converter of desired number, Binary system-the analog converter constructed can be used to come assembly device (stage 3935).

Figure 40 is the flow chart for calibrating the process 4000 of (calibrate) weighting device.For example, process 4000 can quilt For calibrating weighting device, such as weighting device 3310 (Figure 34).Process 4000 can independently combine using or with other activities and make With.For example, process 4000 can be a part of the process 4100 (Figure 41) for establishing encoder/decoder pair.Process 4000 can, for example, being executed by one or more digital data processing devices.

Base encoded signal can be input in the channel of multi-channel encoder (stage 4005) when known to one or more. For example, base code signal 135 (Fig. 3) is input to condensing encoder 2205 (Figure 23) when the system can be by known to one or more In input 2315.In some embodiments, it can be input in all channels with a period of time base code signal 135.

The output signal of the multi-channel encoder and amplitude weighting for each channel in the multi-channel encoder Time series can be identified (stage 4010).In some embodiments, system can store to the amplitude weighting time series and The description of the output of the multi-channel encoder.For example, in some embodiments, which can will come from the multi-channel encoder Output signal be stored in data storage device 3100 (Figure 31).

Output signal from the multi-channel encoder can be used as input and be provided to not calibrated (uncalibrated) Multichannel extension decoder (step 4015).The multi-channel encoder be it is not calibrated, be that it is not yet calibrated to and generates The specific output signal multi-channel encoder (that is, in step 4010 output signal received from that multichannel coding Device) combined operating.

It is identified for the net series of amplitude event of each channel of the multichannel extension decoder, and believed with corresponding The amplitude weighting time series in road are compared (stage 4020).In some embodiments, such comparison may include measurement The amplitude of event, but given channel is abandoned when (discarde) for the net series of the amplitude event and the amplitude weighting Between serial event timing.For example, in some embodiments, which can form the thing in the amplitude weighting time series The ordered list of the amplitude of the ordered list of the amplitude of part and the event in the net series of the amplitude event.These lists do not describe The timing of the amplitude weighting time series or the event in the net series of the amplitude event.However, the amplitude in the list can quilt Compare to determine difference.Generally, the comparison result can on by channel basis (on a channel-by- Channel basis) it is expressed.However, in some embodiments, the comparison result can use the multiple channels of embodiment The value that compares is expressed.

In some embodiments, the net series of the amplitude event is held on the amplitude weighting time series of respective channels Capable mathematics or the result of other operations are compared.For example, if a weighting device is to be calibrated for by a specific letter Road is multiplied by two, then the amplitude weighting time series of the channel can be multiplied by two first, and the result of the multiplication by with the amplitude The net series of event is compared.Then, the weight can be used to execute the mathematics or other operations.For example, weight can quilt It selects one or more of following to execute：Data compression and cryptographic operation, text-processing operation, numerical value processing operation, figure As processing operation and signal processing operations.In some embodiments, the different channels in individual devices can be used and execute difference The weight of operation.

Difference between the net series of the amplitude event and the amplitude weighting time series of respective channels it is whether sufficiently small by into Row determines (stage 4025).For example, in some embodiments, which can should on by channel basis The threshold value for the difference that difference embodies acceptable level with one is compared.In some embodiments, in varying environment Operation, the stringency of the threshold value can be conditioned, such as be adjusted by the user.

It is not sufficiently small in response to the difference between the net series of the amplitude event and the amplitude weighting time series of respective channels Judgement, the weight of weighting device is adjusted (stage 4030).In some embodiments, the weight is by by channel basis Upper adjustment.For example, the system can recognize exported by individual binary system-analog converter 320 with the amplitude weighting time series The weight of the most similar sequence of events (weighted timed series of events) for having weighted timing.With this The associated weight 345 of sequence of events for having weighted timing a bit can be increased.As another embodiment, which be can recognize Weighted timing one most different from the amplitude weighting time series exported by individual binary system-analog converter 320 The weight of chain of events.The associated weight 345 of sequence of events for having weighted timing with these can be reduced.

In some embodiments, repeatable to come from the multi-channel encoder after the increasing amount adjustment of the weight Output signal be input in the multi-channel encoder.The amplitude weighting time of successive amplitude event net series and respective channels Comparison result between series is used as a mark, to indicate whether the increasing amount adjustment is suitable.In other words, if the amplitude The net series of event is similar to the amplitude weighting time series for designated channel, then can be considered as to the adjustment of the channel , and further adjustment can be made.For example, can optionally further increase or reduce weight.

On the other hand, right if the difference between the net series of the amplitude event and the amplitude weighting time series increases The adjustment of channel can be considered as bad, and the weight is back to their preceding value, or changes in different directions.Example Such as, the weight that the weight initially increased can reduce, and initially reduce can increase.

It is not sufficiently small in response to the difference between the net series of the amplitude event and the amplitude weighting time series of respective channels Judgement, one or more new when base code signals are selected (stage 4035).In some embodiments, the new when base code Signal can be according to this base code signal when new and it is previous when base code signal between difference and selected.For example, excellent The new when base code signal to differ widely with previous when base code may be selected in selection of land.In other embodiments, the new when base Code signal can be selected at random.The process can continue, and one or more new when base codes are input to the multichannel and are compiled In the channel of code device (stage 4005).

It is sufficiently small in response to the difference between the net series of the amplitude event and the amplitude weighting time series of respective channels Determine, the weight of the weighting device can be fixed (fix) (stage 4040).After the fixation weight, multichannel decoding Device is calibrated, with generate the specific output signal multi-channel encoder (that is, in step 4010 output signal received from That multi-channel encoder) combined operating.

Figure 41 is the flow chart for creating the process 4100 of encoder/decoder pair.Process 4100 can independently use or It is used in combination with other activities.For example, process 4100 may include one in process 3900 (Figure 39) and process 4000 (Figure 40) Or it is multiple.Process 4100 can be executed by one or more digital data processing devices.

Process 4100 starts from building binary system-analog converter set (stage 4105).Binary system-the analog converter It can be and construct with hardware, with software or with the combination of hardware and software.The building of the binary system-analog converter can Process including such as process 3900 (Figure 39).

(stage 4110) is assembled using the encoder of the binary system-analog converter.In some embodiments, institute Each channel of the encoder of assembling may include one different in the binary system-analog converter.

Carry out built-up time series scanner set (stage 4115) using identical binary system-analog converter.Some In embodiment, each time series scanner may include in the binary system-analog converter in the channel of the encoder Binary system-the analog converter occurred.Binary system-analog converter in the time series scanner is used as joining Examine binary system-analog converter.For example, binary system-the analog converter and each time series in the channel of the encoder are swept Retouching the correspondence between binary system-analog converter in device can be noted that and used, for example, in the power of calibration weighting device When weight.

Weighting device set (stage 4120) is assembled using the binary system-analog converter set.In some embodiment party In formula, with identical binary system-analog converter for assembling the encoder and the time series scanner set by with In the assembling weighting device set.In other embodiments, entirely different binary system-analog converter be used to assemble and be somebody's turn to do Weighting device set.In other embodiments, identical and different binary system-analog converter combination can be used for assembling The weighting device set.

In some embodiments, binary system-analog converter (at least initially) can appear in each weighting device.Example Such as, in some embodiments, constructed binary system-analog converter complete or collected works appear in each weighting device.It is as follows What face further described, the weight for being weighted to the output of binary system-analog converter is calibrated to zero, this is in fact Binary system-the analog converter is removed from the weighting device.In hardware embodiment, those outputs are weighted to zero Binary system-analog converter can be removed physically from weighting device.

Weight in the weighting device can be calibrated (stage 4125).The calibration of weight in the weighting device can wrap Include the process of such as process 4000 (Figure 40).

Process 4100 using the encoder, the time series scanner set and the weighting device set come to information into Row coding, compression or storage (stage 4130).

Theme described in this specification and the embodiment of operation can with including structure disclosed in this specification and The Digital Electrical Circuitry or computer software of its equivalent structure, firmware or hardware or combination one or more in them come Implement.

The various aspects of theme described in this specification may be implemented as coding in computer storage media for by Data processing equipment executes or one or more computer programs of the operation for controlling data processing equipment are (that is, calculate One or more modules of machine program instruction).For example, the route or signal of transmission information may be implemented as in computer program The variable or object transmitted between component (for example, computer program, software module, subroutine, process and function).Detection Device, comparator, timer (timer), switch and selector may be implemented as the Computer Program Component that cooperation executes operation.

For example, can be implemented according to instructions by coding/squeeze operation that encoder-compressor 10 (Figure 1A) is executed.

Coding-compression

As another embodiment, basis can be by extension/decoding operate that expander-decoder 34 (Figure 1A) is executed Instructions are implemented.

Extension and decoding

Computer storage media can be or be included in：Computer readable memory devices, computer-readable storage substrate, Random or erial-access storage array or device or combination one or more in them.The computer storage media One or more discrete physical units or medium be can also be or be included in (for example, multiple CD, disk or other memories Part).

Operation described in this specification can be implemented as by data processing equipment to being stored in one or more computers The operation executed in readable memory device or from the received data in other sources.

Term " data processing equipment " covers the device, device and machine for being used to handle data of all kinds, including Such as：Programmable processor, computer, system on chip or it is aforementioned in it is multiple or combination.Described device may include dedicated patrols Collect circuit, such as FPGA (field programmable gate array) or ASIC (specific integrated circuit).In addition to hardware, described device can also be wrapped The code that performing environment is created for the computer program studied is included, such as：Constitute processor firmware, protocol stack, data depositary management The combined code of reason system, operating system, cross-platform runtime environment, virtual machine or one or more of which. Described device and performing environment can realize a variety of different computation model frameworks, such as network services, distributed computing are applied and net Lattice computing architecture.

Computer program (also referred to as program, software, software application, script or code) can use any type of programming language Speech (including language that is compiled or having explained, statement type or process-type language) is write, and can with any form (including As free-standing program, or as module, component, subroutine, object, or it is suitble to other lists used in a computing environment Member) it disposes.Computer program can with but not necessarily correspond to the file in file system.Program, which can be stored in, saves other journeys In a part (for example, the one or more scripts stored in marking language document) of the file of sequence or data, it is stored in specially In single file for the program studied, or multiple coordinated files are stored in (for example, those storages are one or more The file of module, subprogram or code section) in.Computer program can be deployed as executing on a computer, Huo Zhe Positioned at one place or it is distributed in multiple places and by executing on multiple computers of interconnection of telecommunication network.

Process and logic flow described in this specification can be executed by one or more programmable processors, and described one A or multiple programmable processors run one or more computer programs to hold by operation input data and generation output Action is made.The process and logic flow can also be executed by dedicated logic circuit, and described device can also be implemented as specially With logic circuit, the dedicated logic circuit is, for example, FPGA (field programmable gate array) or ASIC (specific integrated circuit).

It executes the processor of computer program of the movement in process described herein suitable for running and includes, such as：It is general And any one or more processors of special microprocessor and any kind of digital computer.In general, processor will be from Read-only memory or random access storage device or the two receive instruction and data.The primary element of computer is：Processor is used In executing movement according to instruction；And one or more memory devices, for storing instruction and data.In general, computer is also It will include one or more mass storage devices for storing data, or be operatively coupled to one or more for storing The mass storage device of data is therefrom to receive data or transmit data to it, or haves both at the same time, the mass storage Part is, for example, disk, magneto-optic disk or CD.However, device as computer need not have.In addition, computer can be embedded into separately One device, such as：Mobile phone, personal digital assistant (PDA), Mobile audio frequency or video player, game console, the whole world Positioning system (GPS) receiver or portable storage device (such as universal serial bus (USB) flash drive), are only lifted several A example.Device suitable for storing computer program instructions and data include the nonvolatile memory of form of ownership, medium and Memory device, including for example：Semiconductor storage unit (such as EPROM, EEPROM and flush memory device)；Disk (such as it is internal hard Disk or moveable magnetic disc)；Magneto-optic disk；And CD-ROM and DVD-ROM disk.The processor and memory can be by special logic electricity Road supplements, or is incorporated in dedicated logic circuit.

Although this specification includes many specific implementation details, these be not necessarily to be construed as to the scope of the present invention or Person can advocate the limitation of range, but should be interpreted the description of the specific features to specific embodiment of the present invention.This explanation Implement in a single embodiment in book with certain features of discrete embodiment description are also combinable.Conversely, individually to implement The various features of scheme description can also discretely or with any suitable sub-portfolio be implemented in various embodiments.In addition, Although can be described feature as above with certain combinations to work, or even it is exactly initially to advocate in this way, comes from institute The combination that the combined one or more features of opinion can be removed from the combination in some cases, and be advocated can be with It is directed toward the variant of sub-portfolio or sub-portfolio.

Similarly, it is executed although being portrayed as operation in attached drawing with certain order, this is understood not to, it is desirable that this The operation of sample is all executable to implement with shown certain order or with sequential order execution or shown all operations Desired result.In some cases, multitask and parallel processing can be advantageous.In addition, embodiment described above In the discrete of various system units be understood not to require in all embodiments such discrete, but should manage Solution, described program element and system usually can be integrated together in single software product or be packaged into multiple softwares Product.

Embodiment

(including calculating is coded in as described herein for the mthods, systems and devices coded and decoded to information Computer program in machine storaging medium) it can be embodied in one or more of following embodiment.

Embodiment 1.A kind of statistical disposition and pattern-recognition provided in Digital data processing and neural processing component Between carry out interface and the method that is encoded in the encoder to information, including：It receives and carrys out table using discrete digital set Show the signal of information；Base code when being converted into received signal by encoder, wherein base code was divided between the time when described Every each time interval of base code corresponds to a number in the received signal when described, the received signal Each number of first state is expressed as occurring the event at the first moment in the correspondence time interval of base code when described, institute State the second state of received signal each number be expressed as occurring in the correspondence time interval of base code when described The event at two moment, first moment and second moment are undistinguishables, and the number in the received signal Word it is stateful be all by it is described when base code in event indicate；And base code is exported to the mind when will be described Through processing component.Embodiment 2.Method described in embodiment 1, wherein：The received signal be the information two into Tabulation is shown；And the number of the received signal includes the position in the binary representation.Embodiment 3.Embodiment 1 To the method any in 2, wherein：Each number of the first state of the binary representation is expressed as occurring described When base code correspondence time interval centre an event；And each number of the second state of the binary representation It is expressed as occurring the beginning of the correspondence time interval of base code when described or an event of one of ending.Embodiment 4.It is real Any method in scheme 1 to 3 is applied, wherein expressing the thing of the number of the first state other than at the time of generation Part and the event for expressing the number of second state are undistinguishables.Embodiment 5.It is any described in embodiment 1 to 4 Method, wherein each event includes from down to height and from high to low a pair of transformation.Embodiment 6.Embodiment 1 To the method any in 5, wherein the event is binary.Embodiment 7.It is any described in embodiment 1 to 6 Method, wherein base code includes when exporting described：Base code is exported to the neural processing unit for using wet neural component to implement when will be described Part, wherein the attribute of base code is customized with compatible with the wet neural component when described.Embodiment 8.In embodiment 1 to 7 Any method, wherein base code includes when the received signal is converted into described：To it is described when base code addition start Header (start header), the beginning for starting base code when header has demarcated described, and letter has been received corresponding to described Header in number.Embodiment 9.Any method in embodiment 1 to 8, wherein the received signal is converted into Base code includes when described：To it is described when the addition of base code stop report foot (stop footer), when stoppings reports footnote to determine described The end of base code, and correspond to the report foot in the received signal.Embodiment 10.It is any described in embodiment 1 to 9 Method, wherein the time interval belongs to the single duration.Embodiment 11.Any institute in embodiment 1 to 10 The method stated, wherein the time interval with the identical sequence of corresponding number in the received signal to be ordered in a series. Embodiment 12.Any method in embodiment 1 to 11, wherein base code when the received signal is converted into described Including：Each number of the first state of the received signal is converted into the event occurred at first moment；And Each number of second state of the binary representation is converted into the event occurred at second moment.

Embodiment 13.A kind of statistical disposition and mode for being provided in Digital data processing and neural processing component The system that interface is carried out between identification, the system include：Input, being used to receive indicates information using discrete digital set Signal；Encoder encodes received signal, and the encoder includes that (it is configured as detection institute to state detector State in received signal number state) and translater (its be configured as by the received signal number shape Base code when state is translated into), base code includes time interval set when described, and the received signal is assigned in each time interval In a respective digital, each time interval includes an event, and the timing characterization of the event in each time interval is corresponding Distribute the state of number；Output is used for base code when will be described and is provided to another system or device；And neural processing unit Part, base code when being coupled to receive described.Embodiment 14.System described in embodiment 13, wherein the nerve processing Component be implemented using wet neural component, and it is described when base code attribute be customized with simultaneous with the wet neural component Hold.Embodiment 15.Any system in embodiment 13 to 14, wherein：The received signal includes binary system letter Number；And the state detector includes bit detector, which is configured as detecting the position in the binary signal State.Embodiment 16.Any system in embodiment 13 to 15, wherein the translater includes event Device, the event of base code when which is configured and connects to generate described.Embodiment 17.Described in embodiment 16 System, wherein the event generator includes impulse generator, wherein the shape and expression second of the pulse of expression first state The shape of the pulse of state is undistinguishable.Embodiment 18.System described in embodiment 16, wherein the event occurs Device is configured to generate header event, the beginning of base code when which has demarcated described, and corresponds to described Header in received signal.Embodiment 19.Any system in embodiment 13 to 18, further comprise start/ Stop detector, this starts/and stop detector is configured and connects to detect the beginning of the received signal and ending.Implement Scheme 20.Any system in embodiment 13 to 19 further comprises interval sequential part, the interval sequential part The time interval of base code passes (passing) when having demarcated described.Embodiment 21.System described in embodiment 20, Described in interval sequential part be configured as demarcating passing for the time interval of single duration.

Embodiment 22.It is a kind of in the statistical disposition and pattern recognition function that are provided by neural processing component and number The method that progress interface and clock synchronization base code signal are decoded between data processing device, this method include：At decoder The when base code signal from neuron processor part is received, wherein base code signal is divided into time interval when described, base when described Each time interval of code signal includes an event, and base code when described in the temporal expression of the event in the time interval The information content of signal；Detect the timing of the event in the time interval；And export following signal, the signal use from Scattered digital collection indicates the information expressed in base code signal when described.Embodiment 23.Method described in embodiment 22, Further comprise：The event occurred within the scope of the first time at the interval of base code signal when described is converted into the output letter The discrete digital of first state in number；And it will occur in second time range at the interval of base code signal when described Event is converted into the discrete digital of the second state in the output signal.Embodiment 24.Method described in embodiment 23, Wherein the output signal includes binary signal.Embodiment 25.Any method in embodiment 22 to 24, into one Step includes：The beginning of the data content of base code signal when detecting described.Embodiment 26.Method described in embodiment 25, The middle detection data content start include：The header event of base code signal when detecting described.Embodiment 27.Embodiment Method described in 26 further comprises：Determine between the first event after the header event and the header event when Between.Embodiment 28.Method described in embodiment 25 further comprises：Make the event generation time in the time interval Detection with it is described when base code signal data content start it is synchronous.Embodiment 29.Any institute in embodiment 22 to 28 The method stated, wherein base code signal includes when receiving described：Institute is received from the neuron processor part for using wet neural component to implement Base code signal when stating.Embodiment 30.Any method in embodiment 22 to 29 further comprises：In the second decoding Base code signal when receiving second at device, wherein base code signal is divided into time interval when described second, base code when described second Each time interval of signal includes an event, and base when second described in the temporal expression of the event in the time interval The information content of code signal；The timing of the event in the time interval is detected at second decoder；And from described Second decoder exports following signal, the signal indicated using the second discrete digital set this second when base code signal in table The information reached；And the discrete digital set and the second discrete digital set are aggregated into second signal.Embodiment 31.Any method in embodiment 22 to 30, wherein the event of base code signal has the shape of undistinguishable when described.

Embodiment 32.It is a kind of in the statistical disposition and pattern recognition function that are provided by neural processing component and number The system that progress interface and clock synchronization base code signal are decoded between data processing device, the system include：Neural processing unit Part；Input, base code signal when being connected to the neural processing component and receiving, wherein base code signal is divided into when described Time interval, each time interval of base code signal includes event when described, and the event in the time interval The information content of base code signal when described in temporal expression；Event detector, when being configured as detecting described base code signal when Between interval in event timing；Translater, the timing for being configured as event when will be described in the time interval of base code are turned over It is translated into the state of digital collection；And output, it is configured to supply the signal including the number.Embodiment 33.Implement System described in scheme 32 receives the timing of the event detected wherein the translater includes comparator set, and And the timing of the event detected is compared with the time range in the interval.Embodiment 34.Embodiment Any system in 32 to 33, wherein the nerve processing component is implemented using wet neural component.Embodiment 35.Any system in embodiment 32 to 34, wherein the translater was configured as when will be described between the time of base code Binary signal is translated into every interior event.Embodiment 36.Any system in embodiment 32 to 35, wherein described Event detector includes pulse detector.Embodiment 37.Any system in embodiment 32 to 36 further comprises It is spaced sequential part, the time interval of base code passes when which has demarcated described.Embodiment 38.Embodiment party System described in case 37, wherein the interval sequential part includes comparator, which is configured as time counting and ginseng It examines and is compared.Embodiment 39.System described in embodiment 38, wherein the reference is constant, and between the time Every being all same single length.Embodiment 40.System described in embodiment 37 further comprises starting detector, This starts the beginning of base code signal when detector is configured as detecting described.Embodiment 41.It is any in embodiment 32 to 40 The system, wherein the beginning detector is coupled to the interval sequential part, and to the interval sequential part Reset signal is provided, which resets the calibration of the time interval passed.

In this way, it has been described that specific embodiment of the invention.Other embodiments fall in the range of following claims It is interior.In some cases, the movement recorded in claim can be executed with different order and still realize desired result.Separately Outside, the process described in attached drawing not necessarily requires shown certain order or sequential order to realize desired result.? In certain embodiments, multitask and parallel processing can be advantageous.

Claims

1. a kind of data storage device, including detectable physical behavior encoded information, wherein the physical behavior is can be by Structural member detected by data storage device reader, the physical behavior are separated according to encoding scheme, from And the spacing between the physical behavior indicates the content of encoded information, wherein the spacing between physical behavior is scaled to letter The time between event in number, wherein the content of the encoded information of temporal representation of the event in the signal.

2. data storage device according to claim 1, the spacing between the physical behavior meets scheduled probability point Cloth.

3. data storage device according to claim 2, wherein the probability distribution is asymmetric and deflection.

4. data storage device according to claim 3, wherein the probability distribution is to the center of the probability distribution Left side deflection.

5. data storage device according to claim 4, wherein the standard deviation of the probability distribution is equal to the probability point The root mean square of cloth.

6. data storage device according to claim 5, wherein the probability distribution is Poisson distribution.

7. data storage device according to claim 1, wherein other than the spacing between the physical behavior, institute Stating physical behavior is undistinguishable each other.

8. data storage device according to claim 1, wherein the number of physical behavior, which is equal to, is stored in the data and deposits The number of position on memory device.

9. data storage device according to claim 1, wherein each physical behavior includes a pair of of transformation, the first transformation is From first state to the second state, and the second transformation is to return to the first state from second state.