CN104901684B - A kind of frequency dividing circuit and its control method - Google Patents
A kind of frequency dividing circuit and its control method Download PDFInfo
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- CN104901684B CN104901684B CN201510199882.3A CN201510199882A CN104901684B CN 104901684 B CN104901684 B CN 104901684B CN 201510199882 A CN201510199882 A CN 201510199882A CN 104901684 B CN104901684 B CN 104901684B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K21/00—Details of pulse counters or frequency dividers
- H03K21/38—Starting, stopping or resetting the counter
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
- H03K23/40—Gating or clocking signals applied to all stages, i.e. synchronous counters
- H03K23/48—Gating or clocking signals applied to all stages, i.e. synchronous counters with a base or radix other than a power of two
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Abstract
Input circuit is divided the present invention relates to a kind of novel low-cost frequency dividing circuit and its control method, in the circuit respectively with the first counting circuit and count digit set chain to be connected；First counting circuit is also connected with the second counting circuit, the first comparison circuit, first threshold input circuit and count digit set chain；Second counting circuit is also connected with count digit set chain, Second Threshold input circuit, the second comparison circuit；First comparison circuit is also connected with first threshold circuit and the second comparison circuit；Second Threshold input circuit is connected with the second comparison circuit；Second comparison circuit is also connected with count digit set chain.This method combines the output input characteristics of comparator and counter by setting two threshold values, realizes frequency dividing.A kind of novel low-cost frequency dividing circuit proposed by the invention and its control method, realize frequency dividing multiple and could be arranged to any integer, and only can be achieved by changing toggle switch, it is not necessary to make the modification of any hardware circuit, simple efficient.
Description
Technical field
The present invention relates to a kind of frequency dividing circuit and its control method.
Background technology
Traditional frequency dividing circuit conventional at present realizes division function as shown in figure 1, passing through the series connection of T triggers, its
Shortcoming is：Frequency dividing speed need to such as be changed in use, it is necessary to change the hardware connection of the circuit, and to increase correlation
Necessary element number, it is relatively complicated, and modification adds unnecessary cost；In addition, the frequency dividing multiple of this kind of frequency dividing circuit
Only 2 multiple, such as 2,8,16, it is impossible to realize the frequency dividing of any multiple, this causes this kind of frequency circuit property easy to use by very
Big influence；And the generality that it is applied due to frequency dividing circuit, it is 2, cost in the urgent need to proposing that one kind is not limited to basic multiple
Relatively low and simple efficient frequency dividing circuit.
The content of the invention
It is an object of the invention to provide a kind of frequency dividing circuit and its control method, lacked with overcoming to exist in the prior art
Fall into, realize the setting of any frequency dividing multiple.
To achieve the above object, the technical scheme is that：A kind of frequency dividing circuit, including a frequency dividing input module；Should
The first end of frequency dividing input module is connected with the first end of one first counting module；The second end and one of first counting module
The first end of first threshold input module is connected, the 3rd end of first counting module and the first end of one first comparison module
It is connected, the 4th end of first counting module is connected with the first end of one second counting module；The first threshold inputs mould
Second end of block is connected with the second end of first comparison module；Second end of second counting module and a Second Threshold
The first end of input module is connected, and the 3rd end of second counting module is connected with the first end of one second comparison module；Institute
Two ends for stating Second Threshold input module are connected with the second end of second comparison module；The 3rd of second comparison module
End is connected with the 3rd end of first comparison module；4th end of second comparison module is used as the defeated of the frequency dividing circuit
Go out end, and access a first end for counting set module；Second end for counting set module and the frequency dividing input module
The second end be connected, the 3rd end the 5th end and described second respectively with first counting module for counting set module
4th end of counting module is connected.
In an embodiment of the present invention, the frequency dividing input module includes the first NAND gate circuit and the second NAND gate electricity
Road；The first input end input of first NAND gate circuit subtracts pulse signal；First input of second NAND gate circuit
End input plus pulse signal；Second input of the second input of first NAND gate circuit and second NAND gate circuit
End is connected, and is used as the second end of the frequency dividing input module；The output end of first NAND gate circuit with described second with
The output end of not circuit is respectively connecting to first counting module.
In an embodiment of the present invention, first counting module includes one first counter 40193；Described first counts
The CP+ ends of device 40193 are connected with the output end of second NAND gate circuit；The CP- ends of first counter 40193 and institute
The output end for stating the first NAND gate circuit is connected；The R ends of first counter 40193 are used as the of first counting module
Five ends.
In an embodiment of the present invention, first comparison module includes a first comparator 4585；Described first compares
A0 ends, A1 ends, A2 ends and the A3 ends of device 4585 correspond to respectively with the Q1 ends of first counter 40193, Q2 ends, Q3 ends with
And Q4 ends are connected；The A of the first comparator 4585>B IN ends and A=B IN termination high level, A<B IN ends are grounded.
In an embodiment of the present invention, the first threshold input module includes one first toggle switch S1；Described first
Toggle switch S1 first input end to the 4th input connects high level respectively；The first output end of the first toggle switch S1
Correspond to and be connected with the DP1 ends of first counter 40193, DP2 ends, DP3 ends and DP4 ends respectively to the 4th output end；Institute
The first toggle switch S1 the first output end is stated also through the 4th resistance（R4）One end be connected to the first comparator 4585
B3 ends, the second output end is also through 3rd resistor（R3）One end be connected to the B2 ends of the first comparator 4585, the 3rd output
End is also through second resistance（R2）One end be connected to the B1 ends of the first comparator 4585, the 4th output end is also through first resistor
（R1）One end be connected to the B0 ends of the first comparator 4585, and the first resistor（R1）The other end, described second
Resistance（R2）The other end, the 3rd resistor（R3）The other end and the 4th resistance（R4）The other end be connected and connect
Ground.
In an embodiment of the present invention, second counting module includes one second counter 40193；Described second counts
The CP+ ends of device 40193 and first counter 40193End is connected；The CP- ends of second counter 40193 and institute
State the first counter 40193End is connected；The R ends of second counter 40193 are used as second counting module
4th end；Second counter 40193End respectively with first counter 40193End and described second
Counter 40193End is connected.
In an embodiment of the present invention, second comparison module includes one second comparator 4585；Described second compares
A0 ends, A1 ends, A2 ends and the A3 ends of device 4585 correspond to respectively with the Q1 ends of second counter 40193, Q2 ends, Q3 ends with
And Q4 ends are connected；The A of second comparator 4585>B IN terminate high level；A=B IN ends of second comparator 4585
It is connected with A=B OUT terminals of the first comparator 4585；The A of second comparator 4585<Compare with described first at B IN ends
Compared with the A of device 4585<B OUT terminals are connected；；The A of second comparator 4585>B OUT terminals are used as second comparison module
4th end；
In an embodiment of the present invention, the Second Threshold input module includes one second toggle switch S2；Described second
Toggle switch S2 first input end to the 4th input connects high level respectively；The first output end of the second toggle switch S2
Correspond to and be connected with the DP1 ends of second counter 40193, DP2 ends, DP3 ends and DP4 ends respectively to the 4th output end；Institute
The second toggle switch S2 the first output end is stated also through the 8th resistance（R8）One end be connected to second comparator 4585
B3 ends, the second output end is also through the 7th resistance（R7）One end be connected to the B2 ends of second comparator 4585, the 3rd output
End is also through the 6th resistance（R6）One end be connected to the B1 ends of second comparator 4585, the 4th output end is also through the 5th resistance
（R5）One end be connected to the B0 ends of second comparator 4585, and the 5th resistance（R5）The other end, the described 6th
Resistance（R6）The other end, the 7th resistance（R7）The other end and the 8th resistance（R8）The other end be connected and connect
Ground.
In an embodiment of the present invention, the counting set module includes one the 3rd NAND gate circuit and a not circuit；
The first input end of 3rd NAND gate circuit is used as second end for counting set module；3rd NAND gate circuit
The second input be used as it is described count set module first end；The output end of 3rd NAND gate circuit and the NOT gate
The input of circuit is connected；The output end of the not circuit is used as the 3rd end for counting set module.
Further, a kind of control method of frequency dividing circuit is also provided, it is characterised in that：Mould is inputted by first threshold
The first toggle switch sets first threshold N in block, and Second Threshold is set by the second toggle switch in Second Threshold input module
M；Electric on modules in frequency dividing circuit after being provided with, frequency dividing input module inputs sub-frequency signal to the first counting module
In the first counter 40193 CP+ ends, described first counter, 40193 pairs of sub-frequency signals count；First compares
First comparator 4585 receives the first counting output value of the terminal count output of the first counter 40193 in module, and with warp
The first threshold N that first toggle switch keys in first comparator 4585 compares, and when first counting output value is equal to institute
When stating first threshold N, first counter 40193End one pulse of output；First counter 40193 should
Pulse is transferred to the CP+ ends of the second counter 40193 in the second counting module, and described second counter, 40193 pairs of pulses are entered
Row is counted；The second comparator 4585 receives the second meter of the terminal count output of the second counter 40193 in second comparison module
Number output valve, and compared with the Second Threshold M of the second comparator 4585 is keyed in through the second toggle switch, and when the described second meter
When number output valve is equal to the Second Threshold M, the A of the second comparator 4585>B OUT terminal output frequency division pulse signals, realization pair
The N*M frequency dividings of sub-frequency signal, and the first counter 40193 and second is inputted respectively through counting set module with the divided pulse
The R ends of counter 40193 are zeroed out, and are started counting up again；Wherein, N or M is the positive integer more than or equal to 1.
Compared to prior art, the invention has the advantages that：A kind of frequency dividing circuit proposed by the invention and its
Control method, by setting the counter of series connection and the comparator of cascade, and provides frequency dividing threshold value input module, with reference to counting
The input-output characteristic of device and comparator, the frequency dividing multiple realized can be any integer, be not restricted to existing frequency dividing electricity
It is only the frequency dividing mode of 2 multiple in road, and is that can be achieved to divide only by the change of toggle switch in threshold setting module
The modification or setting of frequency multiple, it is not necessary to make the modification of any hardware circuit, it is simple to operate succinct, and efficient stable, do not have
By programmable logical device or micro-control processor, cost is significantly reduced.
Brief description of the drawings
Fig. 1 is the circuit diagram of the frequency dividing circuit used in routine techniques.
Fig. 2 is the circuit theory diagrams of frequency dividing circuit in one embodiment of the invention.
Fig. 3 is the circuit connection diagram of frequency dividing circuit in one embodiment of the invention.
Embodiment
Below in conjunction with the accompanying drawings, technical scheme is specifically described.
The present invention provides a kind of frequency dividing circuit, as shown in Fig. 2 including a frequency dividing input module；The frequency dividing input module
First end is connected with the first end of one first counting module；Second end of first counting module inputs mould with a first threshold
The first end of block is connected, and the 3rd end of first counting module is connected with the first end of one first comparison module, and described first
4th end of counting module is connected with the first end of one second counting module；Second end of the first threshold input module and institute
The second end for stating the first comparison module is connected；Second end of second counting module and the first of a Second Threshold input module
End is connected, and the 3rd end of second counting module is connected with the first end of one second comparison module；The Second Threshold input
Two ends of module are connected with the second end of second comparison module；Compare with described first at 3rd end of second comparison module
The 3rd end compared with module is connected；4th end of second comparison module as the frequency division module output end, and access one
Count the first end of set module；Second end for counting set module is connected with the second end of the frequency dividing input module,
The 3rd end for counting set module respectively with the 5th end of first counting module and second counting module the
Four ends are connected.
Further, in the present embodiment, as shown in figure 3, the frequency dividing input module includes the first NAND gate circuit U1
With the second NAND gate circuit U2；The first input end input of the first NAND gate circuit U1 subtracts pulse signal；Described second with
Not circuit U2 first input end input plus pulse signal；Second input on the first NAND gate electricity U1 roads and described the
Two NAND gate circuit U2 the second input is connected, and as the second end of the frequency dividing input module, is connected to counting set
3rd NAND gate U4 first input end in module；The output end of the first NAND gate circuit U1 and second NAND gate electricity
Road U2 output end is respectively connecting to first counting module.
Further, in the present embodiment, as shown in figure 3, first counting module includes one first counter
40193；It is described to be connected to the output end for counting NOT gate U3 in set module.
Further, in the present embodiment, the 5th end of the CP+ ends of the first counter 40193 as shown in Figure 3, the i.e. device,
It is connected with the output end of the second NAND gate circuit U2；The 4th of the CP- ends, the i.e. chip of first counter 40193
End, is connected with the output end of the first NAND gate circuit U1；The 14th of the R ends, the i.e. chip of first counter 40193
End, as the 5th end of first counting module, first comparison module includes a first comparator 4585；Described
The A0 ends of one comparator 4585, A1 ends, the 10th end, the 7th end, the 2nd end and the 15th end of A2 ends and A3 ends, the i.e. chip,
Correspond to respectively the 3rd end with the Q1 ends of first counter 40193, Q2 ends, Q3 ends and Q4 ends, the i.e. chip, the 2nd end,
6th end and the 7th end are connected；The A of the first comparator 4585>B IN ends and A=B IN termination high level, A<B IN ends
Ground connection, i.e. the 4th end of the chip and the 6th termination 5V high level, the 5th end ground connection.
Further, in the present embodiment, as shown in figure 3, the first threshold input module is opened including one first dial-up
S1 is closed, the toggle switch is one 4 toggle switch；First input end to the 4th input of the first toggle switch S1 is distinguished
Connect 5V high level；The first output end to the 4th output end of the first toggle switch S1 is corresponded to and first counter respectively
40193 DP1 ends, DP2 ends, D3 ends and DP4 ends is connected, i.e. the 15th end, the 1st end, the 10th end and the 9th end with the chip
It is connected；The first output end of the first toggle switch S1 is also through the 4th resistance（R4）One end be connected to the first comparator
4585 B3 ends, the second output end is also through 3rd resistor（R3）One end be connected to the B2 ends of the first comparator 4585,
Three output ends are also through second resistance（R2）One end be connected to the B1 ends of the first comparator 4585, the 4th output end is also through
One resistance（R1）One end be connected to the B0 ends of the first comparator 4585, i.e., respectively with the first comparator 4585
14,1,9,11 ends are connected, and the first resistor（R1）The other end, the second resistance（R2）The other end, the described 3rd
Resistance（R3）The other end and the 4th resistance（R4）The other end be connected and be grounded.
Further, in the present embodiment, as shown in figure 3, second counting module includes one second counter
40193；The CP+ ends of second counter 40193 and first counter 40193End is connected, i.e. the second counter
40193 the 5th end is connected with the 12nd end of the first counter 40193；The CP- ends of second counter 40193 and described the
One counter 40193End is connected, i.e. the 4th end of the second counter 40193 and the 13rd end phase of the first counter 40193
Even；The R ends of second counter 40193 are as the 4th end of second counting module, i.e., the 14th end of the chip is with counting
NOT gate U3 output end is connected in number set module；Second counter 40193End respectively with first counter
40193End and second counter 40193End is connected, i.e. the 12nd end difference of the second counter 40193
It is connected with the 11st end of the first counter 40193 and the 11st end of the second counter 40193.
Further, in the present embodiment, as shown in figure 3, second comparison module includes one second comparator 4585；
A0 ends, A1 ends, A2 ends and the A3 ends of second comparator 4585 correspond to the Q1 with second counter 40193 respectively
End, Q2 ends, Q3 ends and Q4 ends are connected, i.e., the 10th end, the 7th end, the 2nd end and the 1st end of the second comparator 4585 respectively with
The 3rd end, the 2nd end, the 6th end and the 7th end of second counter 40193 are connected；Second comparator 4585（A>B）IN ends
Connect the 4th termination 5V high level of high level, the i.e. chip；Compared with described first at A=B IN ends of second comparator 4585
A=B OUT terminals of device 4585 are connected, i.e. the 3rd end of the 6th termination first comparator 4585 of the second comparator 4585；Described second
The A of comparator 4585<B IN ends and the A of the first comparator 4585<B OUT terminals are connected, i.e. the 6th of the second comparator 4585
End is connected with the 12nd end of first comparator 4585；The A of second comparator 4585>B OUT terminals compare as described second
13rd end at the 4th end of module, the i.e. chip and the second input phase of the 3rd NAND gate U4 in the counting set module
Even.
Further, in the present embodiment, as shown in figure 3, the Second Threshold input module is opened including one second dial-up
S2 is closed, and second toggle switch S2 is one 4 toggle switch；The first input end of the second toggle switch S2 is to the 4th defeated
Enter end and connect high level respectively；The first output end to the 4th output end of the second toggle switch S2 is corresponded to and described second respectively
The DP1 ends of counter 40193, DP2 ends, DP3 ends and DP4 ends are connected, i.e., the 15th end respectively with the second counter 40193,
1st end, the 10th end and the 9th end；The first output end of the second toggle switch S2 is also through the 8th resistance（R8）One end connect
The B3 ends of second comparator 4585 are connected to, the second output end is also through the 7th resistance（R7）One end be connected to it is described second ratio
Compared with the B2 ends of device 4585, the 3rd output end is also through the 6th resistance（R6）One end be connected to the B1 of second comparator 4585
End, the 4th output end is also through the 5th resistance（R5）One end be connected to the B0 ends of second comparator 4585, i.e., with the second ratio
The 14th, 1,9,11 end compared with device 4585 is connected, and the 5th resistance（R5）The other end, the 6th resistance（R6）It is another
End, the 7th resistance（R7）The other end and the 8th resistance（R8）The other end be connected and be grounded.
Further, in the present embodiment, as shown in figure 3, the counting set module includes one the 3rd NAND gate circuit
A U4 and not circuit U3；The first input end of the 3rd NAND gate circuit U4 is used as the second of the counting set module
End, i.e., be connected with the first NAND gate circuit U1 the second input and the second NAND gate circuit U2 the second input respectively；Institute
The 3rd NAND gate circuit U4 the second input is stated as the first end of the counting set module, i.e., with the second comparator 4585
's（A>B）OUT terminal is connected；The output end of the 3rd NAND gate circuit U4 is connected with the input of the not circuit U3；Institute
Not circuit U3 output end is stated as the 3rd end of the counting set module, respectively with the R ends of the first counter 40193 and
The R ends of second counter 40193 are connected.
In order to allow those skilled in the art to further appreciate that a kind of frequency dividing circuit proposed by the invention, with reference to the electricity
The control method on road is specifically described.
Further, in the present embodiment, a kind of control method of frequency dividing circuit is also provided, mould is inputted by first threshold
The first toggle switch sets first threshold N in block, and Second Threshold is set by the second toggle switch in Second Threshold input module
M；Electric on modules in frequency dividing circuit after being provided with, frequency dividing input module inputs sub-frequency signal to the first counting module
In the first counter 40193 CP+ ends, described first counter, 40193 pairs of sub-frequency signals count；First compares
First comparator 4585 receives the first counting output value of the terminal count output of the first counter 40193 in module, i.e., through
The Q1 ends of one counter 40193 ~ Q4 ends obtain the first counting output value, and with keying in first comparator through the first toggle switch
4585 first threshold N compares, and when first counting output value is equal to the first threshold N, described first counts
Device 40193End one pulse of output；First counter 40193 is transmitted the pulse in the second counting module
The CP+ ends of two counters 40193, described second counter, 40193 pairs of pulses are counted；Second ratio in second comparison module
Compared with the second counting output value that device 4585 receives the terminal count output of the second counter 40193, i.e., through and counter 40193
Q1 ends ~ Q4 ends obtain the and counting output value, and with keying in the Second Threshold M of the second comparator 4585 through the second toggle switch
Compare, and when second counting output value is equal to the Second Threshold M, the A of the second comparator 4585>B OUT terminals are defeated
Go out divided pulse signal, realize and the M*16+N of sub-frequency signal is divided, and distinguished with the divided pulse through counting set module
The R ends for inputting the first counter 40193 and the second counter 40193 are zeroed out, and are started counting up again；Wherein, N or M are
Positive integer more than or equal to 1.
In the present embodiment, the comparator 4585 of first comparator 4585 and second is 4 binary comparators, and it the 10th
End, the 7th end, the 2nd end, and the Q phases that the P values of the 15th end input and the 11st end, the 9th end, the 1st end and the 14th end generation input
Compare, if P>Q, the 13rd end output high level, if P=Q is equal, the 3rd end output high level, if P<Q, the high electricity of the 12nd end output
It is flat.
In the present embodiment, the first counter 40193 and the second counter 40193 are 4 up/down binary counters, its
When 5th end is rising edge, counter adds 1, and when the 4th end is rising edge, counter subtracts 1, but the 4th end can not be with the 5th end simultaneously
For rising edge, it is simultaneously such as rising edge, then can not counts；And first counter 40193 and the second counter 40193 will can count
Value is exported by the end of pin the 3rd, the 2nd end, the 6th end and the 7th end.
Above is presently preferred embodiments of the present invention, all changes made according to technical solution of the present invention, produced function is made
During with scope without departing from technical solution of the present invention, protection scope of the present invention is belonged to.
Claims (10)
1. a kind of frequency dividing circuit, it is characterised in that including a frequency dividing input module；The first end of the frequency dividing input module and one the
The first end of one counting module is connected；Second end of first counting module and the first end phase of a first threshold input module
Even, the 3rd end of first counting module is connected with the first end of one first comparison module, and the of first counting module
Four ends are connected with the first end of one second counting module；Compared mould with described first in second end of the first threshold input module
Second end of block is connected；Second end of second counting module is connected with the first end of a Second Threshold input module, described
3rd end of the second counting module is connected with the first end of one second comparison module；Two ends of the Second Threshold input module with
Second end of second comparison module is connected；3rd end of second comparison module and the 3rd of first comparison module the
End is connected；4th end of second comparison module as the frequency dividing circuit output end, and access one count set module
First end；Second end for counting set module is connected with the second end of the frequency dividing input module, the counting set
3rd end of module is connected with the 5th end of first counting module and the 4th end of second counting module respectively.
2. a kind of frequency dividing circuit according to claim 1, it is characterised in that：It is described frequency dividing input module include first with it is non-
Gate circuit and the second NAND gate circuit；The first input end input of first NAND gate circuit subtracts pulse signal；Described second
The first input end input of NAND gate circuit plus pulse signal；Second input of first NAND gate circuit and described second
Second input of NAND gate circuit is connected, and is used as the second end of the frequency dividing input module；First NAND gate circuit
The output end of output end and second NAND gate circuit be respectively connecting to first counting module.
3. a kind of frequency dividing circuit according to claim 2, it is characterised in that：First counting module includes one first meter
Number device 40193；The CP+ ends of first counter 40193 are connected with the output end of second NAND gate circuit；Described first
The CP- ends of counter 40193 are connected with the output end of first NAND gate circuit；Make at the R ends of first counter 40193
For the 5th end of first counting module.
4. a kind of frequency dividing circuit according to claim 3, it is characterised in that：First comparison module includes one first ratio
Compared with device 4585；A0 ends, A1 ends, A2 ends and the A3 ends of the first comparator 4585 are corresponded to and first counter respectively
40193 Q1 ends, Q2 ends, Q3 ends and Q4 ends is connected；The A of the first comparator 4585>B IN ends and A=B IN terminations
High level, A<B IN ends are grounded.
5. a kind of frequency dividing circuit according to claim 3 or 4, it is characterised in that：The first threshold input module includes
One first toggle switch S1；First input end to the 4th input of the first toggle switch S1 connects high level respectively；It is described
First toggle switch S1 the first output end corresponded to respectively to the 4th output end with the DP1 ends of first counter 40193,
DP2 ends, DP3 ends and DP4 ends are connected；The first output end of the first toggle switch S1 is also through the 4th resistance（R4）One end
The B3 ends of the first comparator 4585 are connected to, the second output end is also through 3rd resistor（R3）One end be connected to described first
The B2 ends of comparator 4585, the 3rd output end is also through second resistance（R2）One end be connected to the B1 of the first comparator 4585
End, the 4th output end is also through first resistor（R1）One end be connected to the B0 ends of the first comparator 4585, and described first
Resistance（R1）The other end, the second resistance（R2）The other end, the 3rd resistor（R3）The other end and described
Four resistance（R4）The other end be connected and be grounded.
6. a kind of frequency dividing circuit according to claim 3, it is characterised in that：Second counting module includes one second meter
Number device 40193；The CP+ ends of second counter 40193 and first counter 40193End is connected；Described second
The CP- ends of counter 40193 and first counter 40193End is connected；The R ends of second counter 40193
It is used as the 4th end of second counting module；Second counter 40193End respectively with first counter
40193End and second counter 40193End is connected.
7. a kind of frequency dividing circuit according to claim 4 or 6, it is characterised in that：Second comparison module includes one the
Two comparators 4585；A0 ends, A1 ends, A2 ends and the A3 ends of second comparator 4585 correspond to counted with described second respectively
Q1 ends, Q2 ends, Q3 ends and the Q4 ends of device 40193 are connected；The A of second comparator 4585>B IN terminate high level；It is described
A=B IN ends of second comparator 4585 are connected with A=B OUT terminals of the first comparator 4585；Second comparator
4585 A<B IN ends and the A of the first comparator 4585<B OUT terminals are connected；The A of second comparator 4585>B OUT
Hold the 4th end as second comparison module.
8. a kind of frequency dividing circuit according to claim 7, it is characterised in that：The Second Threshold input module includes one the
Two toggle switch S2；First input end to the 4th input of the second toggle switch S2 connects high level respectively；Described second
Toggle switch S2 the first output end corresponded to respectively to the 4th output end with the DP1 ends of second counter 40193, DP2 ends,
DP3 ends and DP4 ends are connected；The first output end of the second toggle switch S2 is also through the 8th resistance（R8）One end be connected to
The B3 ends of second comparator 4585, the second output end is also through the 7th resistance（R7）One end be connected to second comparator
4585 B2 ends, the 3rd output end is also through the 6th resistance（R6）One end be connected to the B1 ends of second comparator 4585,
Four output ends are also through the 5th resistance（R5）One end be connected to the B0 ends of second comparator 4585, and the 5th resistance
（R5）The other end, the 6th resistance（R6）The other end, the 7th resistance（R7）The other end and it is described 8th electricity
Resistance（R8）The other end be connected and be grounded.
9. a kind of frequency dividing circuit according to claim 1,3 or 6, it is characterised in that：The counting set module includes one
3rd NAND gate circuit and a not circuit；The first input end of 3rd NAND gate circuit is used as the counting set module
The second end；Second input of the 3rd NAND gate circuit is used as the first end for counting set module；Described 3rd
The output end of NAND gate circuit is connected with the input of the not circuit；The output end of the not circuit is counted as described
3rd end of set module.
10. a kind of a kind of control method of frequency dividing circuit according to any one of claim 1 ~ 9, it is characterised in that：Pass through
The first toggle switch sets first threshold N in first threshold input module, is opened by the second dial-up in Second Threshold input module
Close and Second Threshold M is set；It is electric on modules in frequency dividing circuit after being provided with, frequency dividing input module input sub-frequency signal
The CP+ ends of the first counter 40193 into the first counting module, described first counter, 40193 pairs of sub-frequency signals enter
Row is counted；First comparator 4585 receives the first meter of the terminal count output of the first counter 40193 in first comparison module
Number output valve, and compared with the first threshold N of first comparator 4585 is keyed in through the first toggle switch, and when the described first meter
When number output valve is equal to the first threshold N, first counter 40193End one pulse of output；Described first
Counter 40193 transmits the pulse to the CP+ ends of the second counter 40193 in the second counting module, second counter
40193 pairs of pulses are counted；The second comparator 4585 receives second counter 40193 and counted in second comparison module
Second counting output value of output end, and compared with the Second Threshold M of the second comparator 4585 is keyed in through the second toggle switch,
And when second counting output value is equal to the Second Threshold M, the A of the second comparator 4585>B OUT terminal output frequency division arteries and veins
Signal is rushed, realizes and the M*16+N of sub-frequency signal is divided, and first is inputted respectively through counting set module with the divided pulse
The R ends of the counter 40193 of counter 40193 and second are zeroed out, and are started counting up again；Wherein, N or M is more than or equal to 1
Positive integer.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510199882.3A CN104901684B (en) | 2015-04-25 | 2015-04-25 | A kind of frequency dividing circuit and its control method |
| NL2016141A NL2016141B1 (en) | 2015-04-25 | 2016-01-22 | A new low cost frequency dividing circuit and its control method. |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510199882.3A CN104901684B (en) | 2015-04-25 | 2015-04-25 | A kind of frequency dividing circuit and its control method |
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| Publication Number | Publication Date |
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| CN104901684A CN104901684A (en) | 2015-09-09 |
| CN104901684B true CN104901684B (en) | 2017-10-20 |
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| CN201510199882.3A Expired - Fee Related CN104901684B (en) | 2015-04-25 | 2015-04-25 | A kind of frequency dividing circuit and its control method |
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| CN (1) | CN104901684B (en) |
| NL (1) | NL2016141B1 (en) |
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| CN107861597A (en) * | 2017-11-30 | 2018-03-30 | 无锡中微爱芯电子有限公司 | A kind of Anti-interference Design method being applied in MCU reset systems |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1005164A1 (en) * | 1996-01-09 | 2000-05-31 | SANYO ELECTRIC Co., Ltd. | Variable frequency divider |
| CN102102997A (en) * | 2010-12-28 | 2011-06-22 | 威海华东电源有限公司 | Random frequency division device for orthogonal serial output rotary encoder and implementation method thereof |
| CN204559543U (en) * | 2015-04-25 | 2015-08-12 | 福州大学 | A kind of novel low-cost frequency dividing circuit |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2451271C2 (en) * | 1974-10-29 | 1982-06-03 | Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt | "Circuit arrangement for the pulse value converter of an electronic electricity meter" |
| GB8914936D0 (en) * | 1989-06-29 | 1989-08-23 | Birt Electronic Systems Ltd | Binary counter |
| JPH04150226A (en) * | 1990-10-09 | 1992-05-22 | Mitsubishi Electric Corp | Semiconductor integrated circuit |
-
2015
- 2015-04-25 CN CN201510199882.3A patent/CN104901684B/en not_active Expired - Fee Related
-
2016
- 2016-01-22 NL NL2016141A patent/NL2016141B1/en not_active IP Right Cessation
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1005164A1 (en) * | 1996-01-09 | 2000-05-31 | SANYO ELECTRIC Co., Ltd. | Variable frequency divider |
| CN102102997A (en) * | 2010-12-28 | 2011-06-22 | 威海华东电源有限公司 | Random frequency division device for orthogonal serial output rotary encoder and implementation method thereof |
| CN204559543U (en) * | 2015-04-25 | 2015-08-12 | 福州大学 | A kind of novel low-cost frequency dividing circuit |
Non-Patent Citations (1)
| Title |
|---|
| 一种基于FPGA的任意锁相倍频算法;孙文胜等;《电讯技术》;20071231;第47卷(第6期);第148-151页 * |
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| Publication number | Publication date |
|---|---|
| NL2016141B1 (en) | 2017-05-29 |
| CN104901684A (en) | 2015-09-09 |
| NL2016141A (en) | 2017-01-20 |
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