CN104899552B - A kind of fingerprint recognition system based on saturation type triggers circuit - Google Patents
A kind of fingerprint recognition system based on saturation type triggers circuit Download PDFInfo
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- CN104899552B CN104899552B CN201510217923.7A CN201510217923A CN104899552B CN 104899552 B CN104899552 B CN 104899552B CN 201510217923 A CN201510217923 A CN 201510217923A CN 104899552 B CN104899552 B CN 104899552B
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- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
- G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
- G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
- G06V40/12—Fingerprints or palmprints
- G06V40/13—Sensors therefor
- G06V40/1318—Sensors therefor using electro-optical elements or layers, e.g. electroluminescent sensing
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Abstract
The invention discloses a kind of fingerprint recognition system based on saturation type triggers circuit, by single-chip microcomputer（1）, fingerprint signal acquisition module（6）, with fingerprint signal acquisition module（6）The logic enhanced processing module being connected（9）, with single-chip microcomputer（1）The pre-stored module being connected（2）, wireless transmitter module（3）, video camera（4）, alarm（5）, triode bias processing module（8）, and with triode bias processing module（8）The power module being connected（7）Composition；It is characterized in that：In logic enhanced processing module（9）With single-chip microcomputer（1）Between be additionally provided with saturation type triggers circuit（10）；The present invention can accelerate the processing to signal, make the recognition speed of fingerprint recognition system faster.
Description
Technical field
The present invention relates to fingerprint recognition field, in particular to a kind of fingerprint recognition system based on saturation type triggers circuit.
Background technology
Traditional identity identifying method includes identity article identification (such as key, certificate, atm card) and identity
Knowledge identifies (such as username and password).But above-mentioned authentication method is mainly by external thing, once prove the marking articles of identity
It is stolen or forgets with mark knowledge, its identity is easy for being pretended to be or being substituted by other people.In order to solve this problem, biological identification technology
Just arise at the historic moment, it passes through the high-tech means such as computer and optics, acoustics, biology sensor and biostatistics principle is close
Combination is cut, the identification of personal identification is carried out using the intrinsic physiological property of human body and behavioral trait.Particularly, fingerprint recognition obtains
Widest application is arrived.
Fingerprint recognition analyzes fingerprint characteristic indeed through specific mathematical algorithm, and judges two groups of fingerprint characteristics
Similarity, it includes two big processes of fingerprint characteristic analysis and matching.Fingerprint image is more complicated, and it has many to be different from it
The feature of its image.Therefore, it is necessary to carry out substantial amounts of data operation and data storage in identification process, its place to processor
Reason function and running environment have very high requirement.Its identification process of traditional fingerprint recognition system is slow, can not meet people
Fast pace demand.
The content of the invention
The defects of it is an object of the invention to overcome its recognition speed of traditional fingerprint recognition system slow, there is provided one kind is based on
The fingerprint recognition system of saturation type triggers circuit.
The purpose of the present invention is achieved through the following technical solutions：A kind of fingerprint recognition system based on saturation type triggers circuit
System, mainly by single-chip microcomputer, fingerprint signal acquisition module, the logic enhanced processing module being connected with fingerprint signal acquisition module,
Pre-stored module, wireless transmitter module, video camera, alarm, the triode bias processing module being connected with single-chip microcomputer, with three
The power module composition that pole pipe bias processing module is connected, is additionally provided with full between logic enhanced processing module and single-chip microcomputer
With formula triggers circuit；Described saturation type triggers circuit is by flip chip U1, NAND gate A1, NAND gate A2, unidirectional thyristor
D15, resistance R17, polar capacitor C13, polar capacitor C14, resistance R19, P pole is connected with flip chip U1 Q2 pins, N poles
The diode D13 being then sequentially connected after resistance R17 and polar capacitor C13 with flip chip U1 EN pins, is serially connected in tactile
The diode D12 between chip U1 VSS pins and Q1 pins is sent out, one end is connected with flip chip U1 Q2 pins, is another
Resistance R18, the N pole that end is then connected with unidirectional thyristor D15 N poles is connected with flip chip U1 R pins, P poles then pass through
The diode D14 being grounded after polar capacitor C14, negative pole is connected with unidirectional thyristor D15 control pole, positive pole is then through resistance
The polar capacitor C16 being connected after R19 with NAND gate A1 negative pole, positive pole is connected with flip chip U1 CP pins, negative pole
The polar capacitor C15 being then connected with NAND gate A2 positive pole, and be serially connected in flip chip U1 VDD pins and CP pins it
Between resistance R16 composition；The positive pole of the NAND gate A1 is connected with flip chip U1 R pins, its output end then with unidirectionally
IGCT D15 P poles are connected；The positive pole of the NAND gate A2 is connected with NAND gate A1 positive pole, its negative pole then with it is non-
Door A1 output end is connected；The N poles of the unidirectional thyristor D15 are connected with polar capacitor C16 positive pole.
Further, described logic enhanced processing module is by amplifier P1, amplifier P2, triode VT3, resistance R12,
Polar capacitor C11, polar capacitor C12, negative pole is connected after resistance R12 with amplifier P1 positive pole, positive pole then conduct this patrol
Collect the polar capacitor C10 of an input pole of enhanced processing module, the electricity being serially connected between amplifier P1 positive pole and output end
Hinder R13, diode D11, the N poles that P poles are connected with amplifier P1 positive pole, N poles are then connected with triode VT3 emitter stage
It is connected with amplifier P1 negative pole, diode D9, N pole that P poles are then grounded after polar capacitor C11 is after polar capacitor C12
It is connected with amplifier P1 output end, the diode D10 of P poles ground connection, one end is connected with amplifier P1 output end, is another
Hold the resistance R14 being then connected with amplifier P2 positive pole, and the electricity being serially connected between amplifier P2 positive pole and output end
Hinder R15 compositions；The base stage of the triode VT3 is connected with amplifier P1 output end, its colelctor electrode is then with amplifier P2's
Output end is connected；P pole of the negative pole of the amplifier P2 respectively with diode D9 and diode D10 is connected.Two pole
Another input pole of pipe D9 P poles as the logic enhanced processing module 9, and its shape together with polar capacitor C10 positive pole
Into the input of the logic enhanced processing module 9；The emitter stage of the triode VT3 then shape together with amplifier P2 output end
Into the output end of the logic enhanced processing module 9.
Described triode bias processing module is by voltage detecting circuit, the bias processing being connected with voltage detecting circuit
Circuit, and formed with the transforming circuit that bias process circuit is connected.
Described voltage detecting circuit is by FET Q, resistance R4, resistance R1, and resistance R2, negative pole is with FET Q's
Grid is connected, positive pole then inputs the polar capacitor C1 of pole, negative pole and bias processing electricity as one of the voltage detecting circuit
The polar capacitor C2 that road is connected, positive pole is then sequentially connected after resistance R4 and resistance R1 with FET Q grid, positive pole
It is connected with FET Q source electrode, the polar capacitor C3 that negative pole is then connected after resistance R2 with FET Q grid,
The resistance R3 being in parallel with resistance R2, one end is connected with FET Q source electrode, the resistance R5 compositions of other end ground connection；Institute
The tie point for stating resistance R1 and resistance R4 is connected with bias process circuit, and FET Q drain electrode and polar capacitor C2 are just
Pole is connected, and polar capacitor C3 negative pole is also connected with bias process circuit.Meanwhile polar capacitor C3 negative pole is used as and is somebody's turn to do
Another input pole of voltage detecting circuit, and it forms the input of the voltage detecting circuit together with polar capacitor C1 positive pole
End.
Described bias process circuit by process chip U, triode VT1, triode VT2, resistance R9, polar capacitor C6,
Polar capacitor C5, the pole that positive pole is connected with process chip U HIN pins, negative pole is then connected with process chip U SD pins
Property electric capacity C4, one end is connected with process chip U LIN pins, the electricity that the other end is then connected with polar capacitor C3 negative pole
Hinder R6, the diode D1, N that N poles are connected with process chip U SD pins, P poles are then connected with process chip U COM pins
The voltage-regulator diode that pole is connected after resistance R9 with process chip U VCC pins, P poles are then connected with diode D1 P poles
D2, the polar capacitor C7 that positive pole is connected with voltage-regulator diode D2 N poles, negative pole is then connected with triode VT2 colelctor electrode,
Resistance R8, the N pole and three that one end is connected with process chip U LO pins, the other end is then connected with triode VT2 base stage
Pole pipe VT1 emitter stage is connected, P poles then sequentially VB pins after polar capacitor C6 and polar capacitor C5 with process chip U
The diode D3 being connected, one end is connected with process chip U HO pins, base stage of the other end then with triode VT1 is connected
The resistance R7 connect, and N poles are connected with process chip U VB pins, P poles are then connected with triode VT1 colelctor electrode
Diode D4 is formed；The VDD pins of the process chip U are connected with resistance R1 and resistance R4 tie point, its HIN pin then
It is connected with polar capacitor C2 negative pole, VSS pins are connected with diode D1 N poles, VS pins then P poles with diode D3
It is connected, HO pins are connected with polar capacitor C6 and polar capacitor C5 tie point；The colelctor electrode of the triode VT1 and change
Volt circuit is connected, emitter stage of its emitter stage then with triode VT2 is connected；The colelctor electrode of the triode VT2 respectively with
Voltage-regulator diode D2 P poles and transforming circuit are connected.
Described transforming circuit by transformer T, unidirectional thyristor D5, unidirectional thyristor D7, resistance R10, polar capacitor C8,
Voltage-regulator diode D8, N pole is connected with unidirectional thyristor D5 control pole, P poles are then sequentially after resistance R10 and polar capacitor C8
The diode D6 being connected with unidirectional thyristor D5 P poles, one end is connected with unidirectional thyristor D5 P poles, the other end then with
The resistance R11 that unidirectional brilliant lock D7 P poles are connected, and positive pole be connected with transformer T secondary inductance coils L2 Same Name of Ends,
The polar capacitor C9 groups that negative pole is then connected after voltage-regulator diode D8 with transformer T secondary inductance coils L3 non-same polarity
Into；The P poles of the unidirectional thyristor D5 are connected with diode D4 P poles, its N pole ground connection, and unidirectional thyristor D7 N poles connect
Ground, control pole are connected with polar capacitor C8 and resistance R10 tie point；The P poles of the diode D6 and diode D1 P poles
It is connected；The Same Name of Ends of the transformer T primary side inductance coils L1 is connected with unidirectional thyristor D5 P poles, its non-same polarity
Then it is connected with diode D6 P poles, transformer T secondary inductance coils L2 non-same polarity and transformer T secondary inductance coils
L3 Same Name of Ends is connected.
Described process chip U is IR2110 integrated circuits.
The triode VT1 and triode VT2 are negative-positive-negative transistor, and flip chip U1 is then CD4017 collection
Into circuit.
The present invention compared with the prior art, has advantages below and beneficial effect：
(1) triode of the invention bias processing module can carry out bias processing to the operating voltage of identifying system, from
And improve the accuracy of identification of the present invention.
(2) using IR2110 integrated circuits as process chip, it is used in conjunction with the present invention with reference to triode, makes at bias
The speed of reason is faster.
(3) present invention can carry out logic enhanced processing to the fingerprint signal collected, therefore, even if fingerprint signal gathers
The fingerprint signal that module is collected is weaker, and accurately fingerprint signal can also be identified for fingerprint recognition system.
(4) present invention can accelerate the processing to signal, make the recognition speed of fingerprint recognition system faster.
Brief description of the drawings
Fig. 1 is the overall structure diagram of the present invention；
The triode that Fig. 2 is the present invention biases processing module electrical block diagram；
Fig. 3 is the logic enhanced processing modular circuit structural representation of the present invention；
Fig. 4 is the saturation type trigger circuit structure schematic diagram of the present invention.
Reference in the figures above is entitled：
1-single-chip microcomputer, 2-it is pre-stored module, 3-wireless transmitter module, 4-video camera, 5-alarm, 6-fingerprint letter
Number acquisition module, 7-power module, 8-triode bias processing module, 81-voltage detecting circuit, 82-bias processing electricity
Road, 83-transforming circuit, 9-logic enhanced processing module, 10-saturation type triggers circuit.
Embodiment
The present invention is described in further detail with reference to embodiment, but embodiments of the present invention are not limited to
This.
Embodiment
As shown in figure 1, the present invention by single-chip microcomputer 1, the pre-stored module 2 being connected with single-chip microcomputer 1, wireless transmitter module 3,
Video camera 4, alarm 5, triode bias processing module 8, saturation type triggers circuit 10, the phase of processing module 8 is biased with triode
The power module 7 of connection, the logic enhanced processing module 9 being connected with saturation type triggers circuit 10 and with logic amplification
The fingerprint signal acquisition module 6 that reason module 9 is connected forms.
Wherein, control centre of the single-chip microcomputer 1 as fingerprint recognition system, pre-stored module 2 are used to store normally to go out in advance
Enter the fingerprint signal of personnel.Fingerprint signal acquisition module 6 is used for the fingerprint signal for gathering discrepancy personnel, logic enhanced processing module
9 fingerprint signals for being used to fingerprint signal acquisition module 6 be collected carry out logic enhanced processing, the fingerprint signal after processing
Become apparent from.And power module 7 is then used to provide power supply to fingerprint recognition system, the power supply biases processing module 8 through triode
Single-chip microcomputer 1 is conveyed to after doing bias processing.
During work, as long as discrepancy personnel are placed on its finger on fingerprint signal acquisition module 6, fingerprint signal acquisition module 6
Its fingerprint signal can be then acquired automatically and be sent to single-chip microcomputer 1.If the hand of the personnel of discrepancy is wet, at this moment fingerprint is believed
The fingerprint signal that number acquisition module 6 is collected is then weaker, and at this moment logic enhanced processing module 9 can be then patrolled fingerprint signal
Enhanced processing is collected, becomes apparent from fingerprint signal.Fingerprint signal is then sent to pre-stored module 2 by single-chip microcomputer 1, is pre-stored module
2 fingerprint signals that fingerprint signal is internal with having previously been stored in it are matched, the fingerprint recognition success if successful matching.Such as
Fruit pairing is unsuccessful, and pre-stored module 2 then sends a signal to single-chip microcomputer 1, and start video camera 4 by single-chip microcomputer 1 enters to disengaging personnel
Row shooting, while start alarm 5 and alarm, and wireless transmitter module 3 is then sent to disengaging personnel's image by wireless network
The computer of rear end is stored, if the image storage of same personnel must be more, targetedly the personnel can be carried out
Pay close attention to.
The fingerprint signal acquisition module 6 is preferentially from the FL-727-FV types of Shanghai Ferly Digital Technologies Co., Ltd.'s production
Fingerprint acquisition instrument, it has good applicability to wet finger, dirty finger, damaged finger.It is and power module 7, single-chip microcomputer meeting, pre-
Memory module 2, wireless transmitter module 3, video camera 4 and alarm 5 can be achieved using prior art.And saturation type triggers
Circuit 10 is then the emphasis of the present invention, and it further to fingerprint signal can be handled, to improve the knowledge of fingerprint recognition system
Other speed.
As shown in Fig. 2 triode biases processing module 8 by voltage detecting circuit 81, it is connected with voltage detecting circuit 81
Bias process circuit 82, and formed with the transforming circuit 83 that is connected of bias process circuit 82.
Voltage detecting circuit 81 therein is by FET Q, resistance R4, resistance R1, resistance R2, negative pole and FET Q
Grid be connected, positive pole then as one of the voltage detecting circuit 81 polar capacitor C1 for inputting pole, negative pole with bias
Reason circuit 82 is connected, the polar capacitor that positive pole is then sequentially connected after resistance R4 and resistance R1 with FET Q grid
C2, the polarity that positive pole is connected with FET Q source electrode, negative pole is then connected after resistance R2 with FET Q grid
Electric capacity C3, the resistance R3 being in parallel with resistance R2, one end is connected with FET Q source electrode, the resistance R5 of other end ground connection
Composition.The tie point of the resistance R1 and resistance R4 are connected with bias process circuit 82, FET Q drain electrode and polarity electricity
The positive pole for holding C2 is connected, and polar capacitor C3 negative pole is also connected with bias process circuit 82.Meanwhile polar capacitor C3
Another input pole of negative pole as the voltage detecting circuit 81, and it forms voltage inspection together with polar capacitor C1 positive pole
The input of slowdown monitoring circuit 81.
Described bias process circuit 82 is then by process chip U, triode VT1, triode VT2, resistance R9, polar capacitor
C6, polar capacitor C5, positive pole is connected with process chip U HIN pins, negative pole is then connected with process chip U SD pins
Polar capacitor C4, one end is connected with process chip U LIN pins, negative pole of the other end then with polar capacitor C3 is connected
Resistance R6, N pole be connected with process chip U SD pins, the diode that P poles are then connected with process chip U COM pins
The voltage stabilizing two that D1, N pole are connected after resistance R9 with process chip U VCC pins, P poles are then connected with diode D1 P poles
Pole pipe D2, the polarity electricity that positive pole is connected with voltage-regulator diode D2 N poles, negative pole is then connected with triode VT2 colelctor electrode
Hold C7, the resistance R8, N that one end is connected with process chip U LO pins, the other end is then connected with triode VT2 base stage
Pole is connected with triode VT1 emitter stage, P poles are then sequentially after polar capacitor C6 and polar capacitor C5 with process chip U's
The diode D3 that VB pins are connected, one end is connected with process chip U HO pins, the other end then base with triode VT1
The resistance R7 that pole is connected, and N poles are connected with process chip U VB pins, the P poles then colelctor electrode phase with triode VT1
The diode D4 compositions of connection；The VDD pins of the process chip U are connected with resistance R1 and resistance R4 tie point, its HIN
Pin is then connected with polar capacitor C2 negative pole, VSS pins are connected with diode D1 N poles, VS pins then with diode
D3 P poles are connected, HO pins are connected with polar capacitor C6 and polar capacitor C5 tie point.The collection of the triode VT1
Electrode is connected with transforming circuit 83, emitter stage of its emitter stage then with triode VT2 is connected.The collection of the triode VT2
Electrode is connected with voltage-regulator diode D2 P poles and transforming circuit 83 respectively.In order to ensure the implementation result of the present invention, at this
Reason chip U is preferentially realized using IR2110 integrated circuits, and triode VT1 and triode VT2 then preferentially use NPN type crystal
Triode is realized.
Described transforming circuit 83 is by transformer T, unidirectional thyristor D5, unidirectional thyristor D7, resistance R10, polar capacitor
C8, voltage-regulator diode D8, N pole is connected with unidirectional thyristor D5 control pole, P poles are then sequentially through resistance R10 and polar capacitor
The diode D6 being connected after C8 with unidirectional thyristor D5 P poles, one end is connected with unidirectional thyristor D5 P poles, the other end
The resistance R11 being then connected with unidirectional brilliant lock D7 P poles, and the Same Name of Ends phase of positive pole and transformer T secondary inductance coils L2
The polar capacitor that connection, negative pole are then connected after voltage-regulator diode D8 with transformer T secondary inductance coils L3 non-same polarity
C9 is formed.The P poles of the unidirectional thyristor D5 are connected with diode D4 P poles, its N pole ground connection, unidirectional thyristor D7 N poles
Ground connection, control pole are connected with polar capacitor C8 and resistance R10 tie point；The P poles of the diode D6 and diode D1 P
Pole is connected；The Same Name of Ends of the transformer T primary side inductance coils L1 is connected with unidirectional thyristor D5 P poles, its is non-of the same name
End is then connected with diode D6 P poles, transformer T secondary inductance coils L2 non-same polarity and transformer T secondary inductance lines
Circle L3 Same Name of Ends is connected.Output end of the positive pole and negative pole of the polar capacitor C9 together as circuit.
As shown in figure 3, logic enhanced processing module 9 is by amplifier P1, amplifier P2, triode VT3, resistance R12, polarity
Electric capacity C11, polar capacitor C12, negative pole is connected after resistance R12 with amplifier P1 positive pole, positive pole is then put as the logic
The polar capacitor C10 of one input pole of big processing module 9, the resistance being serially connected between amplifier P1 positive pole and output end
R13, P pole are connected with amplifier P1 positive pole, N poles are then connected with triode VT3 emitter stage diode D11, N pole with
Diode D9, the N pole that amplifier P1 negative pole is connected, P poles are then grounded after polar capacitor C11 after polar capacitor C12 with
Amplifier P1 output end is connected, the diode D10 of P poles ground connection, and one end is connected with amplifier P1 output end, the other end
The resistance R14 being then connected with amplifier P2 positive pole, and the resistance being serially connected between amplifier P2 positive pole and output end
R15 is formed；The base stage of the triode VT3 is connected with amplifier P1 output end, its colelctor electrode is then defeated with amplifier P2
Go out end to be connected.P pole of the negative pole of the amplifier P2 respectively with diode D9 and diode D10 is connected.The diode
Another input pole of D9 P poles as the logic enhanced processing module 9, and it is formed together with polar capacitor C10 positive pole
The input of the logic enhanced processing module 9；The emitter stage of the triode VT3 is then formed with together with amplifier P2 output end
The output end of the logic enhanced processing module 9.
As shown in figure 4, saturation type triggers circuit 10 is by flip chip U1, NAND gate A1, NAND gate A2, unidirectional thyristor
D15, resistance R17, polar capacitor C13, polar capacitor C14, resistance R19, P pole is connected with flip chip U1 Q2 pins, N poles
The diode D13 being then sequentially connected after resistance R17 and polar capacitor C13 with flip chip U1 EN pins, is serially connected in tactile
The diode D12 between chip U1 VSS pins and Q1 pins is sent out, one end is connected with flip chip U1 Q2 pins, is another
Resistance R18, the N pole that end is then connected with unidirectional thyristor D15 N poles is connected with flip chip U1 R pins, P poles then pass through
The diode D14 being grounded after polar capacitor C14, negative pole is connected with unidirectional thyristor D15 control pole, positive pole is then through resistance
The polar capacitor C16 being connected after R19 with NAND gate A1 negative pole, positive pole is connected with flip chip U1 CP pins, negative pole
The polar capacitor C15 being then connected with NAND gate A2 positive pole, and be serially connected in flip chip U1 VDD pins and CP pins it
Between resistance R16 composition；The positive pole of the NAND gate A1 is connected with flip chip U1 R pins, its output end then with unidirectionally
IGCT D15 P poles are connected；The positive pole of the NAND gate A2 is connected with NAND gate A1 positive pole, its negative pole then with it is non-
Door A1 output end is connected；The N poles of the unidirectional thyristor D15 are connected with polar capacitor C16 positive pole.In order to ensure this
The implementation result of invention, flip chip U1 are preferably CD4017 integrated circuits to realize.
As described above, the present invention can be realized well.
Claims (9)
- A kind of 1. fingerprint recognition system based on saturation type triggers circuit, mainly by single-chip microcomputer (1), fingerprint signal acquisition module (6) the logic enhanced processing module (9), being connected with fingerprint signal acquisition module (6), prestores with what single-chip microcomputer (1) was connected Module (2), wireless transmitter module (3), video camera (4), alarm (5), triode bias processing module (8) are stored up, and with three Power module (7) composition that pole pipe bias processing module (8) is connected；It is characterized in that：Logic enhanced processing module (9) with Saturation type triggers circuit (10) is additionally provided between single-chip microcomputer (1)；Described saturation type triggers circuit (10) by flip chip U1, NAND gate A1, NAND gate A2, unidirectional thyristor D15, resistance R17, polar capacitor C13, polar capacitor C14, resistance R19, P pole with Flip chip U1 Q2 pins are connected, EN of the N poles then sequentially with flip chip U1 after resistance R17 and polar capacitor C13 is managed The diode D13 that pin is connected, the diode D12 being serially connected between flip chip U1 VSS pins and Q1 pins, one end is with touching Resistance R18, the N pole that hair chip U1 Q2 pins are connected, the other end is then connected with unidirectional thyristor D15 N poles and triggering The diode D14 that chip U1 R pins are connected, P poles are then grounded after polar capacitor C14, negative pole is with unidirectional thyristor D15's The polar capacitor C16 that control pole is connected, positive pole is then connected after resistance R19 with NAND gate A1 negative pole, positive pole and triggering The polar capacitor C15 that chip U1 CP pins are connected, negative pole is then connected with NAND gate A2 positive pole, and it is serially connected in triggering Resistance R16 compositions between chip U1 VDD pins and CP pins；The positive pole of the NAND gate A1 is managed with flip chip U1 R Pin is connected, its output end is then connected with unidirectional thyristor D15 P poles；The positive pole of the NAND gate A2 is with NAND gate A1's Positive pole is connected, output end of its negative pole then with NAND gate A1 is connected；The N poles of the unidirectional thyristor D15 and polar capacitor C16 positive pole is connected.
- A kind of 2. fingerprint recognition system based on saturation type triggers circuit according to claim 1, it is characterised in that：It is described Logic enhanced processing module (9) by amplifier P1, amplifier P2, triode VT3, resistance R12, polar capacitor C11, polarity electricity Hold C12, negative pole is connected after resistance R12 with amplifier P1 positive pole, positive pole is then as the logic enhanced processing module (9) The polar capacitor C10 of one input pole, resistance R13, P pole and the amplifier being serially connected between amplifier P1 positive pole and output end Diode D11, the N pole that P1 positive pole is connected, N poles are then connected with triode VT3 emitter stage and amplifier P1 negative pole It is connected, the output of diode D9, N pole that P poles are then grounded after polar capacitor C11 after polar capacitor C12 with amplifier P1 End is connected, the diode D10 of P poles ground connection, and one end is connected with amplifier P1 output end, the other end is then with amplifier P2's The resistance R14 that positive pole is connected, and the resistance R15 compositions being serially connected between amplifier P2 positive pole and output end；Described three Pole pipe VT3 base stage is connected with amplifier P1 output end, output end of its colelctor electrode then with amplifier P2 is connected；It is described P pole of the amplifier P2 negative pole respectively with diode D9 and diode D10 is connected；The P poles of the diode D9 are patrolled as this Another input pole of enhanced processing module (9) is collected, and it forms the logic enhanced processing together with polar capacitor C10 positive pole The input of module (9)；The emitter stage of the triode VT3 is then formed at the logic amplification together with amplifier P2 output end Manage the output end of module (9).
- A kind of 3. fingerprint recognition system based on saturation type triggers circuit according to claim 2, it is characterised in that：It is described Triode bias processing module (8) by voltage detecting circuit (81), the bias processing that is connected with voltage detecting circuit (81) Circuit (82), and the transforming circuit (83) being connected with bias process circuit (82) form.
- A kind of 4. fingerprint recognition system based on saturation type triggers circuit according to claim 3, it is characterised in that：It is described Voltage detecting circuit (81) be connected by FET Q, resistance R4, resistance R1, resistance R2, negative pole with FET Q grid Connect, positive pole then inputs the polar capacitor C1 of pole, negative pole and bias process circuit as one of the voltage detecting circuit (81) (82) it is connected, the polar capacitor C2 that positive pole is then sequentially connected after resistance R4 and resistance R1 with FET Q grid, just The polar capacitor that pole is connected with FET Q source electrode, negative pole is then connected after resistance R2 with FET Q grid C3, the resistance R3 being in parallel with resistance R2, one end is connected with FET Q source electrode, the resistance R5 compositions of other end ground connection； The tie point of the resistance R1 and resistance R4 are connected with bias process circuit (82), FET Q drain electrode and polar capacitor C2 positive pole is connected, and polar capacitor C3 negative pole is also connected with bias process circuit (82)；Meanwhile polar capacitor C3 Another input pole of negative pole as the voltage detecting circuit (81), and it forms the voltage together with polar capacitor C1 positive pole Detect the input of circuit (81).
- A kind of 5. fingerprint recognition system based on saturation type triggers circuit according to claim 4, it is characterised in that：It is described Bias process circuit (82) by process chip U, triode VT1, triode VT2, resistance R9, polar capacitor C6, polar capacitor C5, the polar capacitor that positive pole is connected with process chip U HIN pins, negative pole is then connected with process chip U SD pins C4, the resistance R6, N that one end is connected with process chip U LIN pins, the other end is then connected with polar capacitor C3 negative pole Diode D1, the N poles that pole is connected with process chip U SD pins, P poles are then connected with process chip U COM pins are through electricity It is connected after resistance R9 with process chip U VCC pins, the voltage-regulator diode D2 that P poles are then connected with diode D1 P poles, just The polar capacitor C7 that pole is connected with voltage-regulator diode D2 N poles, negative pole is then connected with triode VT2 colelctor electrode, one end It is connected with process chip U LO pins, resistance R8, the N pole that the other end is then connected with triode VT2 base stage and triode VT1 emitter stage is connected, P poles are then sequentially connected after polar capacitor C6 and polar capacitor C5 with process chip U VB pins The diode D3 connect, one end is connected with process chip U HO pins, the other end is then connected with triode VT1 base stage Resistance R7, and two poles that N poles are connected with process chip U VB pins, P poles are then connected with triode VT1 colelctor electrode Pipe D4 is formed；The VDD pins of the process chip U are connected with resistance R1 and resistance R4 tie point, its HIN pin then with pole Property electric capacity C2 negative pole is connected, VSS pins are connected with diode D1 N poles, VS pins are then extremely connected with diode D3 P Connect, HO pins are connected with polar capacitor C6 and polar capacitor C5 tie point；The colelctor electrode of the triode VT1 is with becoming piezoelectricity Road (83) is connected, emitter stage of its emitter stage then with triode VT2 is connected；The colelctor electrode of the triode VT2 respectively with Voltage-regulator diode D2 P poles and transforming circuit (83) are connected.
- A kind of 6. fingerprint recognition system based on saturation type triggers circuit according to claim 5, it is characterised in that：It is described Transforming circuit (83) by transformer T, unidirectional thyristor D5, unidirectional thyristor D7, resistance R10, polar capacitor C8, the pole of voltage stabilizing two Pipe D8, N pole is connected with unidirectional thyristor D5 control pole, P poles are then sequentially after resistance R10 and polar capacitor C8 and unidirectional brilliant The diode D6 that brake tube D5 P poles are connected, one end is connected with unidirectional thyristor D5 P poles, the other end then with unidirectional brilliant lock The resistance R11 that D7 P poles are connected, and positive pole is connected with transformer T secondary inductance coils L2 Same Name of Ends, negative pole then passes through The polar capacitor C9 compositions being connected after voltage-regulator diode D8 with transformer T secondary inductance coils L3 non-same polarity；The list Be connected to IGCT D5 P poles with diode D4 P poles, its N pole ground connection, unidirectional thyristor D7 N poles ground connection, control pole with Polar capacitor C8 is connected with resistance R10 tie point；The P poles of the diode D6 are connected with diode D1 P poles；It is described Transformer T primary side inductance coils L1 Same Name of Ends is connected with unidirectional thyristor D5 P poles, its non-same polarity then with diode D6 P poles be connected, the Same Name of Ends phase of transformer T secondary inductance coils L2 non-same polarity and transformer T secondary inductance coils L3 Connection.
- A kind of 7. fingerprint recognition system based on saturation type triggers circuit according to claim 6, it is characterised in that：It is described Process chip U be IR2110 integrated circuits.
- A kind of 8. fingerprint recognition system based on saturation type triggers circuit according to claim 6, it is characterised in that：It is described Triode VT1 and triode VT2 is negative-positive-negative transistor.
- 9. a kind of fingerprint recognition system based on saturation type triggers circuit according to any one of claim 1~6, its feature It is：Described flip chip U1 is CD4017 integrated circuits.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101074589A (en) * | 2006-05-16 | 2007-11-21 | 广东科学技术职业学院 | Fingerprint safe, its controlling system and method |
| CN104102901A (en) * | 2014-07-03 | 2014-10-15 | 宁波摩米创新工场电子科技有限公司 | High-precision fingerprint identification system |
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| CN1987832B (en) * | 2005-12-20 | 2012-03-14 | 鸿富锦精密工业（深圳）有限公司 | Input device with finger print identifying function and its finger print identifying method |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101074589A (en) * | 2006-05-16 | 2007-11-21 | 广东科学技术职业学院 | Fingerprint safe, its controlling system and method |
| CN104102901A (en) * | 2014-07-03 | 2014-10-15 | 宁波摩米创新工场电子科技有限公司 | High-precision fingerprint identification system |
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