CN104899552A - Fingerprint recognition system based on saturation type triggering circuit - Google Patents
Fingerprint recognition system based on saturation type triggering circuit Download PDFInfo
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- CN104899552A CN104899552A CN201510217923.7A CN201510217923A CN104899552A CN 104899552 A CN104899552 A CN 104899552A CN 201510217923 A CN201510217923 A CN 201510217923A CN 104899552 A CN104899552 A CN 104899552A
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
- G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
- G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
- G06V40/12—Fingerprints or palmprints
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Abstract
The present invention discloses a fingerprint recognition system based on a saturation type triggering circuit. The fingerprint recognition system consists of a single chip microcomputer (1), a fingerprint signal collecting module (6), a logic amplification processing module (9) connected with the logic amplification processing module (6), a pre-storing module (2) connected with the single chip microcomputer (1), a wireless transmitting module (3), a video camera (4), an alarm (5), a triode biasing processing module (8), and a power module (7) connected with the triode biasing processing module (8). The saturation type triggering circuit is characterized in that the saturation type triggering circuit (10) is further arranged between the logic amplification processing module (9) and the single chip microcomputer (1). By virtue of the fingerprint recognition system based on the saturation type triggering circuit, the processing of the signal can be accelerated and the recognizable speed of the fingerprint recognition system is faster.
Description
Technical field
The present invention relates to fingerprint recognition field, specifically refer to a kind of fingerprint recognition system based on saturation type trigger circuit.
Background technology
Traditional identity identifying method comprises identify label article qualification (as key, certificate, atm card etc.) and identify label knowledge qualification (as username and password).But above-mentioned authentication method is mainly by external thing, once prove the marking articles of identity and mark knowledge stolen or forget, its identity is just easily pretended to be by other people or is replaced.In order to head it off, biological identification technology just arises at the historic moment, it is by being closely combined high-tech means such as computing machine and optics, acoustics, biology sensor and biostatistics principles, and the physiological property utilizing human body intrinsic and behavioral trait are to carry out the qualification of personal identification.Especially, fingerprint recognition obtains and applies the most widely.
Fingerprint recognition analyzes fingerprint characteristic indeed through specific mathematical algorithm, and judges the similarity of two groups of fingerprint characteristics, and it comprises fingerprint characteristic analysis and coupling two large processes.Fingerprint image is more complicated, and it has many features being different from other image.Therefore, in identifying, need to carry out a large amount of data operations and data storage, it has very high requirement to the processing capacity of processor and running environment.Its identifying of traditional fingerprint recognition system is slow, can not meet the fast pace demand of people.
Summary of the invention
The object of the invention is to overcome the slow defect of its recognition speed of traditional fingerprint recognition system, a kind of fingerprint recognition system based on saturation type trigger circuit is provided.
Object of the present invention is achieved through the following technical solutions: a kind of fingerprint recognition system based on saturation type trigger circuit, by single-chip microcomputer, fingerprint signal acquisition module, the logic be connected with fingerprint signal acquisition module amplifies processing module, the pre-stored module be connected with single-chip microcomputer, wireless transmitter module, video camera, alarm, triode bias voltage processing module, the power module be connected with triode bias voltage processing module, amplifies between processing module and single-chip microcomputer in logic and is also provided with saturation type trigger circuit, described saturation type trigger circuit are by flip chip U1, Sheffer stroke gate A1, Sheffer stroke gate A2, unidirectional thyristor D15, P pole is connected with the Q2 pin of flip chip U1, N pole is then in turn through diode D13 that resistance R17 is connected with the EN pin of flip chip U1 after polar capacitor C13, be serially connected in the diode D12 between the VSS pin of flip chip U1 and Q1 pin, one end is connected with the Q2 pin of flip chip U1, the resistance R18 that the other end is then connected with the N pole of unidirectional thyristor D15, N pole is connected with the R pin of flip chip U1, P pole is the diode D14 of ground connection after polar capacitor C14 then, negative pole is connected with the control pole of unidirectional thyristor D15, the polar capacitor C16 that positive pole is then connected with the negative pole of Sheffer stroke gate A1 after resistance R19, positive pole is connected with the CP pin of flip chip U1, the polar capacitor C15 that negative pole is then connected with the positive pole of Sheffer stroke gate A2, and the resistance R16 be serially connected between the VDD pin of flip chip U1 and CP pin forms, the positive pole of described Sheffer stroke gate A1 is connected with the R pin of flip chip U1, its output terminal is then connected with the P pole of unidirectional thyristor D15, the positive pole of described Sheffer stroke gate A2 is connected with the positive pole of Sheffer stroke gate A1, its negative pole is then connected with the output terminal of Sheffer stroke gate A1, the N pole of described unidirectional thyristor D15 is connected with the positive pole of polar capacitor C16.
Further, described logic amplifies processing module by amplifier P1, amplifier P2, triode VT3, negative pole is connected with the positive pole of amplifier P1 after resistance R12, positive pole then amplifies the polar capacitor C10 of an input pole of processing module as this logic, be serially connected in the resistance R13 between the positive pole of amplifier P1 and output terminal, P pole is connected with the positive pole of amplifier P1, the diode D11 that N pole is then connected with the emitter of triode VT3, N pole is connected with the negative pole of amplifier P1, P pole is the diode D9 of ground connection after polar capacitor C11 then, N pole is connected with the output terminal of amplifier P1 after polar capacitor C12, the diode D10 of P pole ground connection, one end is connected with the output terminal of amplifier P1, the resistance R14 that the other end is then connected with the positive pole of amplifier P2, and the resistance R15 be serially connected between the positive pole of amplifier P2 and output terminal forms, the base stage of described triode VT3 is connected with the output terminal of amplifier P1, its collector is then connected with the output terminal of amplifier P2, the negative pole of described amplifier P2 is connected with the P pole of diode D10 with diode D9 respectively.Another input pole of processing module 9 is amplified in the P pole of described diode D9 as this logic, and it forms the input end that this logic amplifies processing module 9 together with the positive pole of polar capacitor C10; The emitter of described triode VT3 then forms the output terminal that this logic amplifies processing module 9 together with the output terminal of amplifier P2.
Described triode bias voltage processing module by voltage detecting circuit, the bias voltage treatment circuit be connected with voltage detecting circuit, and the transforming circuit be connected with bias voltage treatment circuit forms.
Described voltage detecting circuit is by field effect transistor Q, negative pole is connected with the grid of field effect transistor Q, positive pole is then as the polar capacitor C1 of an input pole of this voltage detecting circuit, negative pole is connected with bias voltage treatment circuit, positive pole is then in turn through polar capacitor C2 that resistance R4 is connected with the grid of field effect transistor Q after resistance R1, positive pole is connected with the source electrode of field effect transistor Q, the polar capacitor C3 that negative pole is then connected with the grid of field effect transistor Q after resistance R2, the resistance R3 be in parallel with resistance R2, one end is connected with the source electrode of field effect transistor Q, the resistance R5 of other end ground connection forms, described resistance R1 is connected with bias voltage treatment circuit with the tie point of resistance R4, and the drain electrode of field effect transistor Q is connected with the positive pole of polar capacitor C2, and the negative pole of polar capacitor C3 is also connected with bias voltage treatment circuit.Meanwhile, the negative pole of this polar capacitor C3 is as another input pole of this voltage detecting circuit, and it forms the input end of this voltage detecting circuit together with the positive pole of polar capacitor C1.
Described bias voltage treatment circuit is by process chip U, triode VT1, triode VT2, positive pole is connected with the HIN pin of process chip U, the polar capacitor C4 that negative pole is then connected with the SD pin of process chip U, one end is connected with the LIN pin of process chip U, the resistance R6 that the other end is then connected with the negative pole of polar capacitor C3, N pole is connected with the SD pin of process chip U, the diode D1 that P pole is then connected with the COM pin of process chip U, N pole is connected with the VCC pin of process chip U after resistance R9, the voltage stabilizing diode D2 that P pole is then connected with the P pole of diode D1, positive pole is connected with the N pole of voltage stabilizing diode D2, the polar capacitor C7 that negative pole is then connected with the collector of triode VT2, one end is connected with the LO pin of process chip U, the resistance R8 that the other end is then connected with the base stage of triode VT2, N pole is connected with the emitter of triode VT1, P pole is then in turn through diode D3 that polar capacitor C6 is connected with the VB pin of process chip U after polar capacitor C5, one end is connected with the HO pin of process chip U, the resistance R7 that the other end is then connected with the base stage of triode VT1, and N pole is connected with the VB pin of process chip U, the diode D4 that P pole is then connected with the collector of triode VT1 forms, the VDD pin of described process chip U is connected with the tie point of resistance R4 with resistance R1, its HIN pin is then connected with the negative pole of polar capacitor C2, VSS pin is connected with the N pole of diode D1, VS pin is then connected with the P pole of diode D3, HO pin is connected with the tie point of polar capacitor C5 with polar capacitor C6, the collector of described triode VT1 is connected with transforming circuit, its emitter is then connected with the emitter of triode VT2, the collector of described triode VT2 is connected with the P pole of voltage stabilizing diode D2 and transforming circuit respectively.
Described transforming circuit is by transformer T, unidirectional thyristor D5, unidirectional thyristor D7, N pole is connected with the control pole of unidirectional thyristor D5, P pole is then in turn through diode D6 that resistance R10 is connected with the P pole of unidirectional thyristor D5 after polar capacitor C8, one end is connected with the P pole of unidirectional thyristor D5, the resistance R11 that the other end is then connected with the P pole of unidirectional brilliant lock D7, and positive pole is connected with the Same Name of Ends of transformer T secondary inductance coil L2, the polar capacitor C9 that negative pole is then connected with the non-same polarity of transformer T secondary inductance coil L3 after voltage stabilizing diode D8 forms, the P pole of described unidirectional thyristor D5 is connected with the P pole of diode D4, its N pole ground connection, and N pole ground connection, the control pole of unidirectional thyristor D7 are connected with the tie point of resistance R10 with polar capacitor C8, the P pole of described diode D6 is connected with the P pole of diode D1, the Same Name of Ends of described transformer T former limit telefault L1 is connected with the P pole of unidirectional thyristor D5, its non-same polarity is then connected with the P pole of diode D6, the non-same polarity of transformer T secondary inductance coil L2 is connected with the Same Name of Ends of transformer T secondary inductance coil L3.
Described process chip U is IR2110 integrated circuit.
Described triode VT1 and triode VT2 is negative-positive-negative transistor, and flip chip U1 is then CD4017 integrated circuit.
The present invention comparatively prior art compares, and has the following advantages and beneficial effect:
(1) triode bias voltage processing module of the present invention can carry out bias voltage process to the operating voltage of recognition system, thus improves accuracy of identification of the present invention.
(2) the present invention adopts IR2110 integrated circuit as process chip, and it uses jointly in conjunction with triode, makes the speed of bias voltage process faster.
(3) the present invention can carry out logic to the fingerprint signal collected and amplify process, and therefore, even if the fingerprint signal that fingerprint signal acquisition module collects is more weak, fingerprint recognition system also can identify fingerprint signal accurately.
(4) the present invention can accelerate the process to signal, makes the recognition speed of fingerprint recognition system faster.
Accompanying drawing explanation
Fig. 1 is one-piece construction schematic diagram of the present invention;
Fig. 2 is triode bias voltage processing module electrical block diagram of the present invention;
Fig. 3 is that logic of the present invention amplifies processing module electrical block diagram;
Fig. 4 is saturation type trigger circuit structure schematic diagram of the present invention.
Reference numeral name in above accompanying drawing is called:
1-single-chip microcomputer, 2-pre-stored module, 3-wireless transmitter module, 4-video camera, 5-alarm, 6-fingerprint signal acquisition module, 7-power module, 8-triode bias voltage processing module, 81-voltage detecting circuit, 82-bias voltage treatment circuit, 83-transforming circuit, 9-logic amplifies processing module, 10-saturation type trigger circuit.
Embodiment
Below in conjunction with embodiment, the present invention is described in further detail, but embodiments of the present invention are not limited to this.
Embodiment
As shown in Figure 1, the present invention is by single-chip microcomputer 1, the pre-stored module 2 be connected with single-chip microcomputer 1, wireless transmitter module 3, video camera 4, alarm 5, triode bias voltage processing module 8, saturation type trigger circuit 10, the power module 7 be connected with triode bias voltage processing module 8, the logic be connected with saturation type trigger circuit 10 is amplified processing module 9 and is amplified with logic the fingerprint signal acquisition module 6 that processing module 9 is connected and forms.
Wherein, single-chip microcomputer 1 is as the control center of fingerprint recognition system, and pre-stored module 2 is for storing the fingerprint signal of normal discrepancy personnel in advance.Fingerprint signal acquisition module 6 is for gathering the fingerprint signal of discrepancy personnel, and logic is amplified processing module 9 and carried out logic amplification process for the fingerprint signal that fingerprint signal acquisition module 6 is collected, and the fingerprint signal after process is more clear.Power module 7 is then for providing power supply to fingerprint recognition system, and this power supply flows to single-chip microcomputer 1 after triode bias voltage processing module 8 does bias voltage process.
During work, as long as discrepancy personnel are placed on its finger on fingerprint signal acquisition module 6, fingerprint signal acquisition module 6 can automatically gather its fingerprint signal and send to single-chip microcomputer 1.If come in and gone out, the hand of personnel is wet, and at this moment the fingerprint signal that collects of fingerprint signal acquisition module 6 is then more weak, and at this moment logic is amplified processing module 9 and can be carried out logic to fingerprint signal and amplify process, makes fingerprint signal more clear.Single-chip microcomputer 1 sends to pre-stored module 2 fingerprint signal, and pre-stored module 2 matches fingerprint signal and the fingerprint signal stored therein in advance, as successful matching then fingerprint recognition success.If match unsuccessful, pre-stored module 2 sends a signal to single-chip microcomputer 1, start video camera 4 by single-chip microcomputer 1 to make a video recording to turnover personnel, start alarm 5 to report to the police simultaneously, wireless transmitter module 3 then sends to the computing machine of rear end to store by wireless network turnover personnel image, if the image storage of same personnel must be more, then can pay close attention to these personnel targetedly.
The FL-727-FV type fingerprint acquisition instrument that this fingerprint signal acquisition module 6 preferentially selects Shanghai Ferly Digital Technologies Co., Ltd. to produce, it all has good applicability to wet finger, dirty finger, damaged finger.And power module 7, single-chip microcomputer meeting, pre-stored module 2, wireless transmitter module 3, video camera 4 and alarm 5 all adopt prior art to realize.Saturation type trigger circuit 10 are then emphasis of the present invention, and it can do further process to fingerprint signal, to improve the recognition speed of fingerprint recognition system.
As shown in Figure 2, triode bias voltage processing module 8 by voltage detecting circuit 81, the bias voltage treatment circuit 82 be connected with voltage detecting circuit 81, and the transforming circuit 83 be connected with bias voltage treatment circuit 82 forms.
Voltage detecting circuit 81 is wherein by field effect transistor Q, negative pole is connected with the grid of field effect transistor Q, positive pole is then as the polar capacitor C1 of an input pole of this voltage detecting circuit 81, negative pole is connected with bias voltage treatment circuit 82, positive pole is then in turn through polar capacitor C2 that resistance R4 is connected with the grid of field effect transistor Q after resistance R1, positive pole is connected with the source electrode of field effect transistor Q, the polar capacitor C3 that negative pole is then connected with the grid of field effect transistor Q after resistance R2, the resistance R3 be in parallel with resistance R2, one end is connected with the source electrode of field effect transistor Q, the resistance R5 of other end ground connection forms.Described resistance R1 is connected with bias voltage treatment circuit 82 with the tie point of resistance R4, and the drain electrode of field effect transistor Q is connected with the positive pole of polar capacitor C2, and the negative pole of polar capacitor C3 is also connected with bias voltage treatment circuit 82.Meanwhile, the negative pole of this polar capacitor C3 is as another input pole of this voltage detecting circuit 81, and it forms the input end of this voltage detecting circuit 81 together with the positive pole of polar capacitor C1.
Described bias voltage treatment circuit 82 is by process chip U, triode VT1, triode VT2, positive pole is connected with the HIN pin of process chip U, the polar capacitor C4 that negative pole is then connected with the SD pin of process chip U, one end is connected with the LIN pin of process chip U, the resistance R6 that the other end is then connected with the negative pole of polar capacitor C3, N pole is connected with the SD pin of process chip U, the diode D1 that P pole is then connected with the COM pin of process chip U, N pole is connected with the VCC pin of process chip U after resistance R9, the voltage stabilizing diode D2 that P pole is then connected with the P pole of diode D1, positive pole is connected with the N pole of voltage stabilizing diode D2, the polar capacitor C7 that negative pole is then connected with the collector of triode VT2, one end is connected with the LO pin of process chip U, the resistance R8 that the other end is then connected with the base stage of triode VT2, N pole is connected with the emitter of triode VT1, P pole is then in turn through diode D3 that polar capacitor C6 is connected with the VB pin of process chip U after polar capacitor C5, one end is connected with the HO pin of process chip U, the resistance R7 that the other end is then connected with the base stage of triode VT1, and N pole is connected with the VB pin of process chip U, the diode D4 that P pole is then connected with the collector of triode VT1 forms, the VDD pin of described process chip U is connected with the tie point of resistance R4 with resistance R1, its HIN pin is then connected with the negative pole of polar capacitor C2, VSS pin is connected with the N pole of diode D1, VS pin is then connected with the P pole of diode D3, HO pin is connected with the tie point of polar capacitor C5 with polar capacitor C6.The collector of described triode VT1 is connected with transforming circuit 83, its emitter is then connected with the emitter of triode VT2.The collector of described triode VT2 is connected with the P pole of voltage stabilizing diode D2 and transforming circuit 83 respectively.In order to ensure implementation result of the present invention, this process chip U preferentially adopts IR2110 integrated circuit to realize, and triode VT1 and triode VT2 then preferentially adopts negative-positive-negative transistor to realize.
Described transforming circuit 83 is by transformer T, unidirectional thyristor D5, unidirectional thyristor D7, N pole is connected with the control pole of unidirectional thyristor D5, P pole is then in turn through diode D6 that resistance R10 is connected with the P pole of unidirectional thyristor D5 after polar capacitor C8, one end is connected with the P pole of unidirectional thyristor D5, the resistance R11 that the other end is then connected with the P pole of unidirectional brilliant lock D7, and positive pole is connected with the Same Name of Ends of transformer T secondary inductance coil L2, the polar capacitor C9 that negative pole is then connected with the non-same polarity of transformer T secondary inductance coil L3 after voltage stabilizing diode D8 forms.The P pole of described unidirectional thyristor D5 is connected with the P pole of diode D4, its N pole ground connection, and N pole ground connection, the control pole of unidirectional thyristor D7 are connected with the tie point of resistance R10 with polar capacitor C8; The P pole of described diode D6 is connected with the P pole of diode D1; The Same Name of Ends of described transformer T former limit telefault L1 is connected with the P pole of unidirectional thyristor D5, its non-same polarity is then connected with the P pole of diode D6, the non-same polarity of transformer T secondary inductance coil L2 is connected with the Same Name of Ends of transformer T secondary inductance coil L3.The positive pole of described polar capacitor C9 together with negative pole as the output terminal of circuit.
As shown in Figure 3, logic amplifies processing module 9 by amplifier P1, amplifier P2, triode VT3, negative pole is connected with the positive pole of amplifier P1 after resistance R12, positive pole then amplifies the polar capacitor C10 of an input pole of processing module 9 as this logic, be serially connected in the resistance R13 between the positive pole of amplifier P1 and output terminal, P pole is connected with the positive pole of amplifier P1, the diode D11 that N pole is then connected with the emitter of triode VT3, N pole is connected with the negative pole of amplifier P1, P pole is the diode D9 of ground connection after polar capacitor C11 then, N pole is connected with the output terminal of amplifier P1 after polar capacitor C12, the diode D10 of P pole ground connection, one end is connected with the output terminal of amplifier P1, the resistance R14 that the other end is then connected with the positive pole of amplifier P2, and the resistance R15 be serially connected between the positive pole of amplifier P2 and output terminal forms, the base stage of described triode VT3 is connected with the output terminal of amplifier P1, its collector is then connected with the output terminal of amplifier P2.The negative pole of described amplifier P2 is connected with the P pole of diode D10 with diode D9 respectively.Another input pole of processing module 9 is amplified in the P pole of described diode D9 as this logic, and it forms the input end that this logic amplifies processing module 9 together with the positive pole of polar capacitor C10; The emitter of described triode VT3 then forms the output terminal that this logic amplifies processing module 9 together with the output terminal of amplifier P2.
As shown in Figure 4, saturation type trigger circuit 10 are by flip chip U1, Sheffer stroke gate A1, Sheffer stroke gate A2, unidirectional thyristor D15, P pole is connected with the Q2 pin of flip chip U1, N pole is then in turn through diode D13 that resistance R17 is connected with the EN pin of flip chip U1 after polar capacitor C13, be serially connected in the diode D12 between the VSS pin of flip chip U1 and Q1 pin, one end is connected with the Q2 pin of flip chip U1, the resistance R18 that the other end is then connected with the N pole of unidirectional thyristor D15, N pole is connected with the R pin of flip chip U1, P pole is the diode D14 of ground connection after polar capacitor C14 then, negative pole is connected with the control pole of unidirectional thyristor D15, the polar capacitor C16 that positive pole is then connected with the negative pole of Sheffer stroke gate A1 after resistance R19, positive pole is connected with the CP pin of flip chip U1, the polar capacitor C15 that negative pole is then connected with the positive pole of Sheffer stroke gate A2, and the resistance R16 be serially connected between the VDD pin of flip chip U1 and CP pin forms, the positive pole of described Sheffer stroke gate A1 is connected with the R pin of flip chip U1, its output terminal is then connected with the P pole of unidirectional thyristor D15, the positive pole of described Sheffer stroke gate A2 is connected with the positive pole of Sheffer stroke gate A1, its negative pole is then connected with the output terminal of Sheffer stroke gate A1, the N pole of described unidirectional thyristor D15 is connected with the positive pole of polar capacitor C16.In order to ensure implementation result of the present invention, this flip chip U1 is preferably CD4017 integrated circuit to realize.
As mentioned above, just well the present invention can be realized.
Claims (9)
1. the fingerprint recognition system based on saturation type trigger circuit, by single-chip microcomputer (1), fingerprint signal acquisition module (6), the logic be connected with fingerprint signal acquisition module (6) amplifies processing module (9), the pre-stored module (2) be connected with single-chip microcomputer (1), wireless transmitter module (3), video camera (4), alarm (5), triode bias voltage processing module (8), and the power module (7) be connected with triode bias voltage processing module (8) forms, it is characterized in that: amplify between processing module (9) and single-chip microcomputer (1) in logic and be also provided with saturation type trigger circuit (10), described saturation type trigger circuit (10) are by flip chip U1, Sheffer stroke gate A1, Sheffer stroke gate A2, unidirectional thyristor D15, P pole is connected with the Q2 pin of flip chip U1, N pole is then in turn through diode D13 that resistance R17 is connected with the EN pin of flip chip U1 after polar capacitor C13, be serially connected in the diode D12 between the VSS pin of flip chip U1 and Q1 pin, one end is connected with the Q2 pin of flip chip U1, the resistance R18 that the other end is then connected with the N pole of unidirectional thyristor D15, N pole is connected with the R pin of flip chip U1, P pole is the diode D14 of ground connection after polar capacitor C14 then, negative pole is connected with the control pole of unidirectional thyristor D15, the polar capacitor C16 that positive pole is then connected with the negative pole of Sheffer stroke gate A1 after resistance R19, positive pole is connected with the CP pin of flip chip U1, the polar capacitor C15 that negative pole is then connected with the positive pole of Sheffer stroke gate A2, and the resistance R16 be serially connected between the VDD pin of flip chip U1 and CP pin forms, the positive pole of described Sheffer stroke gate A1 is connected with the R pin of flip chip U1, its output terminal is then connected with the P pole of unidirectional thyristor D15, the positive pole of described Sheffer stroke gate A2 is connected with the positive pole of Sheffer stroke gate A1, its negative pole is then connected with the output terminal of Sheffer stroke gate A1, the N pole of described unidirectional thyristor D15 is connected with the positive pole of polar capacitor C16.
2. a kind of fingerprint recognition system based on saturation type trigger circuit according to claim 1, it is characterized in that: described logic amplifies processing module (9) by amplifier P1, amplifier P2, triode VT3, negative pole is connected with the positive pole of amplifier P1 after resistance R12, positive pole then amplifies the polar capacitor C10 of an input pole of processing module (9) as this logic, be serially connected in the resistance R13 between the positive pole of amplifier P1 and output terminal, P pole is connected with the positive pole of amplifier P1, the diode D11 that N pole is then connected with the emitter of triode VT3, N pole is connected with the negative pole of amplifier P1, P pole is the diode D9 of ground connection after polar capacitor C11 then, N pole is connected with the output terminal of amplifier P1 after polar capacitor C12, the diode D10 of P pole ground connection, one end is connected with the output terminal of amplifier P1, the resistance R14 that the other end is then connected with the positive pole of amplifier P2, and the resistance R15 be serially connected between the positive pole of amplifier P2 and output terminal forms, the base stage of described triode VT3 is connected with the output terminal of amplifier P1, its collector is then connected with the output terminal of amplifier P2, the negative pole of described amplifier P2 is connected with the P pole of diode D10 with diode D9 respectively, another input pole of processing module (9) is amplified in the P pole of described diode D9 as this logic, and it forms the input end that this logic amplifies processing module (9) together with the positive pole of polar capacitor C10, the emitter of described triode VT3 then forms the output terminal that this logic amplifies processing module (9) together with the output terminal of amplifier P2.
3. a kind of fingerprint recognition system based on saturation type trigger circuit according to claim 2, it is characterized in that: described triode bias voltage processing module (8) is by voltage detecting circuit (81), the bias voltage treatment circuit (82) be connected with voltage detecting circuit (81), and the transforming circuit (83) be connected with bias voltage treatment circuit (82) forms.
4. a kind of fingerprint recognition system based on saturation type trigger circuit according to claim 3, it is characterized in that: described voltage detecting circuit (81) is by field effect transistor Q, negative pole is connected with the grid of field effect transistor Q, positive pole is then as the polar capacitor C1 of an input pole of this voltage detecting circuit (81), negative pole is connected with bias voltage treatment circuit (82), positive pole is then in turn through polar capacitor C2 that resistance R4 is connected with the grid of field effect transistor Q after resistance R1, positive pole is connected with the source electrode of field effect transistor Q, the polar capacitor C3 that negative pole is then connected with the grid of field effect transistor Q after resistance R2, the resistance R3 be in parallel with resistance R2, one end is connected with the source electrode of field effect transistor Q, the resistance R5 of other end ground connection forms, described resistance R1 is connected with bias voltage treatment circuit (82) with the tie point of resistance R4, and the drain electrode of field effect transistor Q is connected with the positive pole of polar capacitor C2, and the negative pole of polar capacitor C3 is also connected with bias voltage treatment circuit (82), meanwhile, the negative pole of this polar capacitor C3 is as another input pole of this voltage detecting circuit (81), and it forms the input end of this voltage detecting circuit (81) together with the positive pole of polar capacitor C1.
5. a kind of fingerprint recognition system based on saturation type trigger circuit according to claim 4, it is characterized in that: described bias voltage treatment circuit (82) is by process chip U, triode VT1, triode VT2, positive pole is connected with the HIN pin of process chip U, the polar capacitor C4 that negative pole is then connected with the SD pin of process chip U, one end is connected with the LIN pin of process chip U, the resistance R6 that the other end is then connected with the negative pole of polar capacitor C3, N pole is connected with the SD pin of process chip U, the diode D1 that P pole is then connected with the COM pin of process chip U, N pole is connected with the VCC pin of process chip U after resistance R9, the voltage stabilizing diode D2 that P pole is then connected with the P pole of diode D1, positive pole is connected with the N pole of voltage stabilizing diode D2, the polar capacitor C7 that negative pole is then connected with the collector of triode VT2, one end is connected with the LO pin of process chip U, the resistance R8 that the other end is then connected with the base stage of triode VT2, N pole is connected with the emitter of triode VT1, P pole is then in turn through diode D3 that polar capacitor C6 is connected with the VB pin of process chip U after polar capacitor C5, one end is connected with the HO pin of process chip U, the resistance R7 that the other end is then connected with the base stage of triode VT1, and N pole is connected with the VB pin of process chip U, the diode D4 that P pole is then connected with the collector of triode VT1 forms, the VDD pin of described process chip U is connected with the tie point of resistance R4 with resistance R1, its HIN pin is then connected with the negative pole of polar capacitor C2, VSS pin is connected with the N pole of diode D1, VS pin is then connected with the P pole of diode D3, HO pin is connected with the tie point of polar capacitor C5 with polar capacitor C6, the collector of described triode VT1 is connected with transforming circuit (83), its emitter is then connected with the emitter of triode VT2, the collector of described triode VT2 is connected with the P pole of voltage stabilizing diode D2 and transforming circuit (83) respectively.
6. a kind of fingerprint recognition system based on saturation type trigger circuit according to claim 5, it is characterized in that: described transforming circuit (83) is by transformer T, unidirectional thyristor D5, unidirectional thyristor D7, N pole is connected with the control pole of unidirectional thyristor D5, P pole is then in turn through diode D6 that resistance R10 is connected with the P pole of unidirectional thyristor D5 after polar capacitor C8, one end is connected with the P pole of unidirectional thyristor D5, the resistance R11 that the other end is then connected with the P pole of unidirectional brilliant lock D7, and positive pole is connected with the Same Name of Ends of transformer T secondary inductance coil L2, the polar capacitor C9 that negative pole is then connected with the non-same polarity of transformer T secondary inductance coil L3 after voltage stabilizing diode D8 forms, the P pole of described unidirectional thyristor D5 is connected with the P pole of diode D4, its N pole ground connection, and N pole ground connection, the control pole of unidirectional thyristor D7 are connected with the tie point of resistance R10 with polar capacitor C8, the P pole of described diode D6 is connected with the P pole of diode D1, the Same Name of Ends of described transformer T former limit telefault L1 is connected with the P pole of unidirectional thyristor D5, its non-same polarity is then connected with the P pole of diode D6, the non-same polarity of transformer T secondary inductance coil L2 is connected with the Same Name of Ends of transformer T secondary inductance coil L3.
7. a kind of fingerprint recognition system based on saturation type trigger circuit according to claim 6, is characterized in that: described process chip U is IR2110 integrated circuit.
8. a kind of fingerprint recognition system based on saturation type trigger circuit according to claim 6, is characterized in that: described triode VT1 and triode VT2 is negative-positive-negative transistor.
9. a kind of fingerprint recognition system based on saturation type trigger circuit according to any one of claim 1 ~ 6, is characterized in that: described flip chip U1 is CD4017 integrated circuit.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US20070140533A1 (en) * | 2005-12-20 | 2007-06-21 | Hon Hai Precision Industry Co., Ltd. | Input device with a fingerprint recognizing mechanism |
| CN101074589A (en) * | 2006-05-16 | 2007-11-21 | 广东科学技术职业学院 | Fingerprint safe, its controlling system and method |
| CN104102901A (en) * | 2014-07-03 | 2014-10-15 | 宁波摩米创新工场电子科技有限公司 | High-precision fingerprint identification system |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070140533A1 (en) * | 2005-12-20 | 2007-06-21 | Hon Hai Precision Industry Co., Ltd. | Input device with a fingerprint recognizing mechanism |
| CN101074589A (en) * | 2006-05-16 | 2007-11-21 | 广东科学技术职业学院 | Fingerprint safe, its controlling system and method |
| CN104102901A (en) * | 2014-07-03 | 2014-10-15 | 宁波摩米创新工场电子科技有限公司 | High-precision fingerprint identification system |
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