CN104867905B - A kind of semiconductor structure comprising silicon hole and its manufacture method - Google Patents
A kind of semiconductor structure comprising silicon hole and its manufacture method Download PDFInfo
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- CN104867905B CN104867905B CN201510138166.4A CN201510138166A CN104867905B CN 104867905 B CN104867905 B CN 104867905B CN 201510138166 A CN201510138166 A CN 201510138166A CN 104867905 B CN104867905 B CN 104867905B
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Abstract
The invention discloses a kind of semiconductor structure comprising silicon hole and its manufacture method, the semiconductor structure includes substrate, signal via and ground through hole, and wherein substrate is p-type background doped；The through hole is the through hole filled by polysilicon；The signal via is n-type doping；Described ground through hole adulterates for p-type.This method is：1) multiple deep holes are etched on the first surface of substrate；2) photopolymer layer is adhered on substrate first surface, graphical photopolymer layer makes photopolymer layer form opening on a part of deep hole；3) adulterate the polysilicon of the first conductive type impurity to the deep hole filling for having opening on photopolymer layer, removes dry film；4) polysilicon of the second conductive type impurity of doping is filled into remaining deep hole.For high speed/radio frequency system, original silicon hole placement-and-routing and domain need not be adjusted using the structure, the lifting of signal integrity and Power Integrity can be obtained.The present invention has technique simple simultaneously, and cost is low, the good advantage of effect.
Description
Technical field
The present invention relates to a kind of semiconductor structure of use interconnecting silicon through holes and its manufacture method.
Background technology
Three-dimensional integration technology is the important support technology of Future high-density integrated system, special by reducing compared to traditional
The Planar integration scheme that size obtains bigger integrated level is levied, three-dimensional integration technology provides a kind of technology way for surmounting Moore's Law
Footpath, can realize more high integration on the basis of original integrated level, more low power consumption and more inexpensive.Either in three-dimensionally integrated electricity
Road (3D-IC) or the system in package system (3D-SiP) in tape relay plate, silicon hole (TSV) is essential pass all the time
Key member, its effect is the perpendicular interconnection passage of electric signal.Generally there are three kinds of interconnection lines in circuit system, be electricity respectively
Source line, ground wire and signal wire.In conventional three-dimensional integrated system, three kinds of interconnection lines often use through-silicon via structure of the same race；Portion
In the case of point, in order to reduce resistance, current density is reduced, to power supply and ground wire using multigroup silicon hole framework in parallel.But
For high frequency/High Speed System, due to the presence of the larger capacitive dielectric layer of signal via so that the impedance between signal wire is with frequency
Rise and constantly decline, so as to cause crosstalk to strengthen；Simultaneously because between ground through hole and substrate insulating barrier presence, reduce ground through hole
Noise shielding effect.
The content of the invention
The purpose of the present invention is to provide a kind of semiconductor structure comprising silicon hole and its manufacture for three-dimensionally integrated system
Method, so as to meet the transmission demand of different electrical signals in system.For high speed/radio frequency system in order to strengthen signal silicon hole
Efficiency of transmission, the crosstalk between reduction reaches often through the parasitic capacitance between reduction signal wire, or increase shielding earth
To effect.To realize so design, often require that corresponding through-silicon via structure or layout change, such as thickening insulation thickness
Degree reduces parasitic capacitance, or the insertion ground silicon hole between signal silicon hole.
According to an aspect of the present invention there is provided a kind of semiconductor structure with through hole, including substrate, signal via,
Power vias and ground through hole, it is characterised in that the signal via, power vias are to be filled by the polysilicon of n-type doping
Through hole, and there is no insulating barrier between the substrate；Described ground through hole is the through hole for the polysilicon filling adulterated by p-type, and
And there is no insulating barrier between the substrate；The substrate adulterates for p-type.
There is provided a kind of manufacture method of the semiconductor structure with through hole, 1 according to another aspect of the present invention) in lining
Multiple deep holes are etched on the first surface at bottom；Wherein described substrate has relative first surface and second surface；2) institute
State and a photopolymer layer is adhered on substrate first surface, the graphical photopolymer layer makes photopolymer layer form opening on a part of deep hole；
3) into the deep hole for having opening on photopolymer layer, filling is adulterated the polysilicon of the first conductive type impurity, removes the photopolymer layer；
4) polysilicon of the second conductive type impurity of doping is filled into remaining deep hole；5) second surface of the substrate is thinned, exposes
The bottom of deep hole；Wherein, as the polysilicon that n-type doping is filled in signal via, the deep hole of power vias, as ground through hole
The polysilicon of filling p-type doping in deep hole, the substrate adulterates for p-type.
, it is necessary to which after etched substrate formation deep hole, CVD fillings are more in the through-silicon via structure preparation flow of prior art
Crystal silicon is to before deep hole, deposit or the layer insulating structure of thermal oxide one, thus prevent silicon hole conductor and silicon substrate occur it is short
Road.And in fact, for ground silicon hole, remove insulating barrier is good to it, because can be tighter with earth potential by substrate
Close connection, so that absorption of noise, improves shield effectiveness.But for signal silicon hole and power supply silicon hole, insulation layer structure is must
Standby, so that with substrate short circuit occurs for anti-stop signal silicon hole and power supply silicon hole.
Compared with prior art, the positive effect of the present invention is：
Using the substrate of p-type background doped, by the use of p-type heavily doped silicon through hole as ground wire, silicon hole and surrounding substrate it
Between form Ohmic contact, so that substrate potential is more fixed on into earth potential, be conducive to strengthening the noise shielding effect of substrate
Really；By the use of N-type heavily doped silicon through hole as signal wire, reverse biased pn junction structure will be automatically formed between silicon hole and surrounding substrate,
So as to prevent signal wire from occurring short circuit with substrate, reverse biased pn junction capacitance size will be determined by signal wire potential in addition, but its value one
As will be less than traditional silicon hole capacitive dielectric layer value, so as to be conducive to reducing the crosstalk between signal wire.While N-type heavily doped silicon
Through hole is also suitable for power line, and principle is similar with signal wire situation with effect.The considerable advantage of this structure is, for height
Speed/radio frequency system, need not be adjusted using the structure to original silicon hole placement-and-routing and domain, it is only necessary to original
Ground silicon hole and signal in system/power supply silicon hole carry out corresponding construction replacement, can obtain signal integrity and power supply is complete
The lifting of whole property.Except the improvement in terms of signal/Power Integrity, insulating barrier of the present invention due to eliminating traditional silicon hole,
Simplified technique is reached, the purpose of cost is reduced.And realize two kinds using dry film method in manufacture method proposed by the invention
The making respectively of through-silicon via structure, low with cost compared to the method for conventionally employed mask, the good advantage of effect.
Brief description of the drawings
Fig. 1 is in 0.1-50GHz frequency ranges, for noise coupling between active device and signal silicon hole, active
Between device and signal silicon hole after insertion ground silicon hole, using proposed by the present invention ground silicon hole and traditionally silicon hole is not
With noise coupling index contrast figure.
Fig. 2 is in 0.1-50GHz frequency ranges, for noise coupling between active device and signal silicon hole, using this
Invent the signal/power supply silicon hole proposed and classical signal silicon hole noise coupling index contrast figure.
Fig. 3 is the vertical cross-section diagram of first embodiment of the invention.
Embodiment
Embodiments of the invention are described below in detail, the example of the embodiment is shown in the drawings.Below with reference to
The embodiment of accompanying drawing description is exemplary, is only used for explaining the present invention, and is not construed as limiting the claims.
Following disclosure provides many different embodiments or example is used for realizing the different structure of the present invention.For letter
Change disclosure of the invention, hereinafter the part and setting of specific examples are described.Certainly, they are only merely illustrative, and
Purpose does not lie in the limitation present invention.In addition, the present invention can in different examples repeat reference numerals and/or letter.It is this heavy
It is the relation between itself not indicating discussed various embodiments and/or setting for purposes of simplicity and clarity again.This
Outside, the invention provides various specific techniques and the example of material, but skilled person realizes that other works
The use of the applicability and/or other materials of skill.It should be noted that part illustrated in the accompanying drawings is painted not necessarily to scale
System.Present invention omits the description to known assemblies and treatment technology and process to avoid being unnecessarily limiting the present invention.
The semiconductor structure of the present invention is suitably applied in the three-dimensionally integrated system with silicon hole (TSV) structure, and it is led
It is a kind of semiconductor structure with through hole to want structure, it is characterised in that the semiconductor structure includes substrate, signal via and ground
Through hole, wherein：The substrate adulterates for p-type；The substrate has relative first surface and second surface；The through hole, be
The through hole filled by polysilicon；The signal via is n-type doping；Described ground through hole adulterates for p-type.The structure is included more than two kinds
Crystal silicon silicon hole type, is N-type silicon hole and P-type silicon through hole respectively.The structure is led to the silicon inside conventional three-dimensional integrated system
The considerable advantage that pore structure is compared is that the structure does not have insulation layer structure.Adulterated additionally, due to substrate for p-type, utilize P
Type heavily doped silicon through hole forms Ohmic contact as ground wire between silicon hole and surrounding substrate, so that by substrate potential more great Cheng
Degree is fixed on earth potential, is conducive to strengthening the noise shielding effect of substrate；Signal wire, silicon are used as by the use of N-type heavily doped silicon through hole
Reverse biased pn junction structure will be automatically formed between through hole and surrounding substrate, reverse biased pn junction capacitance size will be determined by signal wire potential,
But its value will typically be less than traditional silicon hole capacitive dielectric layer value, therefore be conducive to reducing the crosstalk between signal wire.While N-type
Heavily doped silicon through hole is also suitable for power line, and principle is similar with signal wire situation with effect.Therefore this structure another is excellent
Gesture is, for high speed/radio frequency system, original silicon hole placement-and-routing and domain need not be adjusted using the structure
It is whole, the lifting of signal integrity and Power Integrity can be obtained, as shown in Figure 1, 2.
Present invention is alternatively directed to the semiconductor structure, corresponding manufacture method is proposed, this method comprises the following steps：1) institute
State and multiple deep holes are etched on the first surface of substrate；2) photopolymer layer, graphical institute are adhered on the substrate first surface
Photopolymer layer is stated, photopolymer layer is formed opening on a part of deep hole；3) to the deep hole filling doping for having opening on photopolymer layer the
The polysilicon of one conductive type impurity, removes the dry film；4) the second conductive type impurity of filling doping into remaining deep hole
Polysilicon.The manufacture method has two advantages compared with traditional silicon method of preparing through holes, and first, it is many that this method eliminates tradition
Insulation layer structure in crystal silicon silicon hole manufacturing process, so as to simplify technique, reduces cost；Second, this method uses dry film side
Method realizes the making respectively of two kinds of through-silicon via structures, low with cost, the good advantage of effect.
The first embodiment of the present invention is described with reference to Fig. 3；
First, there is provided Semiconductor substrate 100 as shown in Figure 3.Its material is preferably silicon, or germanium, SiGe are closed
Gold, silicon-carbon alloy, GaAs, indium arsenide, indium phosphide, etc. other compound semiconductor materials.Semiconductor substrate 100 can be doped with
P type impurity, concentration of dopant can be 1.0 × 1014/cm3To 1.0 × 1018/cm3。
Secondly Semiconductor substrate 100 be internally formed vertically through conductive structure 200,210.Conductive structure 200 is to mix
The polysilicon structure of miscellaneous N-type impurity, doping concentration is more than 1.0 × 1017/cm3；Conductive structure 210 is the polycrystalline of doped p-type impurity
Silicon structure, doping concentration is more than 1.0 × 1017.Before conductive structure 200,210 is formed, often firstly the need of in Semiconductor substrate
Surface spin coating photoresist, exposure forms mask, then forms hole on a semiconductor substrate 100 using means such as etchings, also may be used
Directly directly to form hole on a semiconductor substrate 100 using laser means, form dry on the surface of Semiconductor substrate 100 afterwards
Membrane structure, expose portion hole opening, shelters remaining hole, then using the polysilicon material of chemical vapor deposition impurity
Material, fills some perforations, dry film is removed afterwards, the polycrystalline for the impurity of opposite conductivity property that adulterated again using chemical vapor deposition
Silicon materials, the remaining hole of filling.Then cmp method is used, substrate surface excess stock is removed.Last double
Conductor substrate carries out thermal anneal process, and activator impurity ion discharges residual stress.
Finally, conductive structure 200 is connected to signal driver and power supply, the width of space-charge region 220 can be with signal
Actuator voltage changes and respective change；Conductive structure 210 is connected to the ground.
Claims (10)
1. a kind of semiconductor structure for including silicon hole, including substrate, signal via, power vias and ground through hole, its feature exist
In the signal via, power vias are the through hole filled by the polysilicon of n-type doping, and are not had between the substrate
There is insulating barrier；Described ground through hole is the through hole for the polysilicon filling adulterated by p-type, and is not insulated between the substrate
Layer；The substrate adulterates for p-type.
2. semiconductor structure as claimed in claim 1, it is characterised in that the doping concentration of the through hole is more than the substrate
Doping concentration.
3. semiconductor structure as claimed in claim 1 or 2, it is characterised in that the substrate is the of nude film or the substrate
There are the one or more in having structure on one surface and/or second surface：Semiconductor devices, electricity interlinkage layer, micro sensing
Device structure, pad and passivation layer.
4. semiconductor structure as claimed in claim 1 or 2, it is characterised in that the substrate have relative first surface and
Second surface, wherein being bonded with a secondary wafer on the first surface.
5. semiconductor structure as claimed in claim 1 or 2, it is characterised in that the semiconductor structure includes re-wiring layer
And metal salient point, the metal salient point is located on re-wiring layer to be electrically connected with re-wiring layer, the re-wiring layer and institute
State through hole electrical connection.
6. a kind of semiconductor structure manufacture method comprising silicon hole, its step is：
1) multiple deep holes are etched on the first surface of substrate；Wherein described substrate has relative first surface and the second table
Face；
2) photopolymer layer is adhered on the substrate first surface, the graphical photopolymer layer makes photopolymer layer in a part of deep hole
It is upper to form opening；
3) into the deep hole for having opening on photopolymer layer, filling is adulterated the polysilicon of the first conductive type impurity, removes the dry film
Layer；
4) polysilicon of the second conductive type impurity of doping is filled into remaining deep hole；
5) second surface of the substrate is thinned, exposes the bottom of deep hole；
Wherein, as the polysilicon that n-type doping is filled in signal via, the deep hole of power vias, in the deep hole as ground through hole
The polysilicon of p-type doping is filled, the substrate adulterates for p-type.
7. method as claimed in claim 6, it is characterised in that the doping that the doping concentration of the through hole is more than the substrate is dense
Degree.
8. method as claimed in claims 6 or 7, it is characterised in that the first surface of the polishing substrate, by excess polysilicon
Material is removed, and then the substrate is annealed, and activates impurity ion.
9. method as claimed in claims 6 or 7, it is characterised in that the lithographic method of the deep hole is：
1) one layer of mask layer is formed on the substrate first surface, the mask layer is patterned, multiple openings are formed；
2) substrate is performed etching according to the opening on mask layer, etches multiple deep holes.
10. method as claimed in claims 6 or 7, it is characterised in that before the substrate thinning, the substrate bonding is arrived
On one secondary wafer.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201510138166.4A CN104867905B (en) | 2015-03-26 | 2015-03-26 | A kind of semiconductor structure comprising silicon hole and its manufacture method |
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| CN201510138166.4A CN104867905B (en) | 2015-03-26 | 2015-03-26 | A kind of semiconductor structure comprising silicon hole and its manufacture method |
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| CN104867905B true CN104867905B (en) | 2017-10-10 |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105336727B (en) * | 2015-10-13 | 2017-10-17 | 北京信息科技大学 | A kind of benzenoid form substrate through-hole transmission structure and substrate through-hole vertical transfer structure |
| WO2018040100A1 (en) * | 2016-09-05 | 2018-03-08 | 飞昂通讯科技南通有限公司 | Anti-interference semiconductor device for optical transceiver |
| US11062977B2 (en) | 2019-05-31 | 2021-07-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Shield structure for backside through substrate vias (TSVs) |
| CN118073333A (en) * | 2022-11-24 | 2024-05-24 | 华为技术有限公司 | Integrated device, packaging structure and electronic equipment |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4775881A (en) * | 1984-05-30 | 1988-10-04 | Max-Planck-Gesellschaft Zur Forderung Der Wissenschaften E.V. | Semiconductor device for detecting electromagnetic radiation or particles |
| CN102214723A (en) * | 2011-06-01 | 2011-10-12 | 北京大学 | Semiconductor radiation sensing device and manufacturing method thereof |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US8546953B2 (en) * | 2011-12-13 | 2013-10-01 | Taiwan Semiconductor Manufacturing Co., Ltd. | Through silicon via (TSV) isolation structures for noise reduction in 3D integrated circuit |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4775881A (en) * | 1984-05-30 | 1988-10-04 | Max-Planck-Gesellschaft Zur Forderung Der Wissenschaften E.V. | Semiconductor device for detecting electromagnetic radiation or particles |
| CN102214723A (en) * | 2011-06-01 | 2011-10-12 | 北京大学 | Semiconductor radiation sensing device and manufacturing method thereof |
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