CN104836565A - Output buffer capable of rapidly switching grid potential and electrostatic protection circuit - Google Patents
Output buffer capable of rapidly switching grid potential and electrostatic protection circuit Download PDFInfo
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- CN104836565A CN104836565A CN201410119384.9A CN201410119384A CN104836565A CN 104836565 A CN104836565 A CN 104836565A CN 201410119384 A CN201410119384 A CN 201410119384A CN 104836565 A CN104836565 A CN 104836565A
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- 230000002159 abnormal effect Effects 0.000 claims abstract description 59
- 230000003068 static effect Effects 0.000 claims abstract description 7
- 238000001514 detection method Methods 0.000 claims abstract 4
- 230000003071 parasitic effect Effects 0.000 claims description 13
- 239000004065 semiconductor Substances 0.000 claims description 7
- 230000001681 protective effect Effects 0.000 claims description 6
- 230000008859 change Effects 0.000 abstract description 3
- 230000005611 electricity Effects 0.000 abstract 1
- 230000006378 damage Effects 0.000 description 8
- 239000013078 crystal Substances 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 230000015556 catabolic process Effects 0.000 description 3
- 241000580063 Ipomopsis rubra Species 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000005421 electrostatic potential Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000008676 import Effects 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 239000000725 suspension Substances 0.000 description 2
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Abstract
The invention relates to an output buffer capable of rapidly switching grid potential and an electrostatic protection circuit thereof, wherein the output buffer comprises an abnormal potential detection unit, a grid potential switching unit and an output buffer unit; the output buffer unit is connected with a corresponding signal end of an internal circuit of an integrated circuit through the abnormal potential detection unit and the grid potential switching unit, and uses a direct current power supply with the same group, when the potential of the direct current power supply rises abnormally and steeply (for example, when static electricity enters an output pad), the grid potential switching unit is started to quickly switch the grid potentials of a PMOS transistor element and an NMOS transistor element of the output buffer unit to a high potential end and a low potential end of the corresponding direct current power supply after being detected by the abnormal potential detection unit, and the MOS transistor element with the grid floating potential state unknown of the output buffer unit is prevented from being damaged due to abnormal sudden potential change.
Description
Technical field
The present invention relates to a kind of integrated circuit and export buffer, particularly relate to a kind of output buffer and the electrostatic discharge protection circuit thereof that can switch grid potential fast.
Background technology
Refer to shown in Fig. 4, generally there is the integrated circuit 50 at digital import and export interface, understand between each signal output part of circuit 51 therein and corresponding output pad 53 and add an output buffer 52, guarantee that its output signal current potential is high potential or electronegative potential.With the integrated circuit 50 of common 5V or 3.3V operation DC voltage, it exports pad 53 or power end V
dD, V
sSeasy raw electrostatic V
eSD, therefore, by the PMOS transistor element of output buffer 52 or the parasitic forward diode D1 of NMOS transistor element and parasitic backward diode D2, by positive electrostatic or negative electrostatic V
eSDimport the hot end V of DC power supply
dDor cold end V
sS, because the electrostatic of high pressure can directly punch internal circuit 51.To this, this output buffer 52 usually can be made to be connected with an electrostatic discharge protection circuit (not shown) again, with at electrostatic V
eSDduring generation, formation one discharge path over the ground, makes electrostatic induced current I
eSDdischarge over the ground fast, avoid the semiconductor electronic component undermining internal circuit 51.
In fact, although add electrostatic discharge protection circuit can guarantee that the internal circuit 51 of integrated circuit does not damage by electrostatic induced current, but subject to electrostatic damage at internal circuit 51 and the output buffer 52 exported between pad 53, trace it to its cause and be: when internal circuit 51 be in normally run time, its output signal can determine the grid potential of this output buffer 52, control PMOS or NMOS transistor element PM1, PN1 conducting, and certainly export pad 53 and record voltage quasi position; When internal circuit 51 is when running interval or dormancy, internal circuit 51 can't output signal to this output buffer 52, and now the grid potential of this output buffer 52 is failed to understand, being commonly referred to as grid suspension joint, may be high potential, also may be electronegative potential.Just because of this, when electrostatic produces, as just there being this output buffer arbitrary PMOS or NMOS electric crystal MP1, MN1 conducting, then have little time to trigger star t-up discharge mechanism at electrostatic discharge protection circuit, the MOS electric crystal of conducting has been electrostatic V
eSDone optimal discharge path is provided, and allows large electrostatic induced current circulate instantaneously and to damage.
Therefore, the output buffer for integrated circuit is necessary further improvement, in order to avoid damaged because electrostatic occurs.
Summary of the invention
In order to solve the problem, main purpose of the present invention is to provide a kind of output buffer and the electrostatic discharge protection circuit that can switch grid potential fast, guarantee, when electrostatic produces, the grid potential of output buffer to be switched fast, make its MOS transistor element end not conducting.
In order to achieve the above object, technical way used in the present invention is that this output buffer that can switch grid potential is fast comprised:
One abnormal potential detecting unit, it is serially connected with a DC power supply, to produce triggering signal when detecting DC power supply potential anomalies;
One grid potential switch unit, it is serially connected with this DC power supply and is connected to this abnormal potential detecting unit, and receives this triggering signal and trigger, to export two grid potential switching signals; And
One exports buffer cell, it is serially connected with this DC power supply, and comprise a PMOS transistor element and a NMOS transistor element, wherein two grids of this PMOS transistor element and NMOS transistor element are connected to this grid potential switch unit respectively, determine its grid potential by this grid potential switch unit.
Preferably, this abnormal potential detecting unit comprises:
Zener diode, its negative electrode is connected to the hot end of this DC power supply, and the puncture voltage of this Zener diode is greater than the normal running current potential of this DC power supply; And
One resistance, it is serially connected with between the anode of this Zener diode and the cold end of this DC power supply.
Preferably, this grid potential switch unit comprises:
One the 2nd PMOS transistor element, its source electrode is connected to the hot end of this DC power supply, and its drain electrode is connected to the grid of this output buffer cell the one PMOS transistor element; And
One the 2nd NMOS transistor element, its source electrode is then connected to the cold end of this DC power supply, and its drain electrode is connected to the grid of this output buffer cell the one NMOS transistor element; And the 2nd the grid of NMOS transistor element be connected to the grid of a PMOS transistor element by an inverter, and be connected to this abnormal potential and detect single Zener diode and the tandem node of resistance.
Preferably, drain electrode to the source electrode of a PMOS transistor element of this output buffer cell is connected with a parasitic forward diode, and drain electrode to the source electrode of a NMOS transistor element is connected to a parasitic backward diode.
Preferably, the 2nd PMOS transistor element of this grid potential switch unit and the 2nd NMOS transistor element are low pressure or high-voltage semiconductor element.
The invention described above is connected with the respective signal end of a lsi internal circuit by this abnormal potential detecting unit and this grid potential switch unit primarily of this output buffer cell, and use with it with organizing DC power supply, be subject to electrostatic when DC power supply current potential and extremely skyrocket, after first being detected by this abnormal potential detecting unit, trigger and start grid potential that this grid potential switch unit switches the PMOS transistor element of this output buffer cell and NMOS transistor element fast to the hot end of corresponding DC power supply and cold end, PMOS and NMOS transistor element is made to end not conducting, skyrocket to avoid potential anomalies or suddenly fall and damage PMOS or the NMOS transistor element because of Floating gate.
In order to achieve the above object, technical way used in the present invention is that this electrostatic discharge protection circuit is comprised:
One abnormal potential detecting unit, it is serially connected with a DC power supply, to produce triggering signal when detecting DC power supply potential anomalies;
One grid potential switch unit, it is serially connected with this DC power supply and is connected to this abnormal potential detecting unit, and receives this triggering signal and trigger, to export two grid potential switching signals;
One exports buffer cell, it is serially connected with this DC power supply, and comprise a PMOS transistor element, output pad that a NMOS transistor element and is connected to this PMOS and NMOS transistor element, wherein two grids of this PMOS transistor element and NMOS transistor element are connected to this grid potential switch unit respectively, determine its grid potential by this grid potential switch unit; And
One static protective unit, it is connected to the output pad of this output buffer cell, to detect the abnormal potential because electrostatic produces, and forms the discharge path to the electronegative potential of DC power supply when detecting and having abnormal potential; Wherein this electrostatic discharge protection circuit is detected as abnormal potential, the abnormal potential of this abnormal potential for detecting higher than this abnormal potential detecting unit.
Preferably, this abnormal potential detecting unit comprises:
Zener diode, its negative electrode is connected to the hot end of this DC power supply, and the puncture voltage of this Zener diode is greater than the normal running current potential of this DC power supply; And
One resistance, it is serially connected with between the anode of this Zener diode and the cold end of this DC power supply.
Preferably, this grid potential switch unit comprises:
One the 2nd PMOS transistor element, its source electrode is connected to the hot end of this DC power supply, and its drain electrode is connected to the grid of this output buffer cell the one PMOS transistor element; And
One the 2nd NMOS transistor element, its source electrode is then connected to the cold end of this DC power supply, and its drain electrode is connected to the grid of this output buffer cell the one NMOS transistor element; And the 2nd the grid of NMOS transistor element be connected to the grid of a PMOS transistor element by an inverter, and be connected to the Zener diode of this abnormal potential detecting unit and the tandem node of resistance.
Preferably, drain electrode to the source electrode of a PMOS transistor element of this output buffer cell is connected with a parasitic forward diode, and drain electrode to the source electrode of a NMOS transistor element is connected to a parasitic backward diode.
Preferably, the 2nd PMOS transistor element of this grid potential switch unit and the 2nd NMOS transistor element are low pressure or high-voltage semiconductor element.
The electrostatic discharge protection circuit of the invention described above adds a static protective unit to this output buffer cell, when detecting the abnormal potential that electrostatic causes, quick formation discharge path, imports the electronegative potential of DC power supply fast by electrostatic induced current, avoid the internal circuit that recharges to integrated circuit and cause damage.
Accompanying drawing explanation
Fig. 1 is the detailed circuit diagram of the electrostatic discharge protection circuit of output buffer of the present invention.
Fig. 2 A is the circuit operation figure of Fig. 1 under abnormal potential state.
Fig. 2 B is the circuit operation figure of Fig. 1 under normal potential state.
Fig. 3 is the detailed circuit diagram of electrostatic discharge protection circuit of the present invention.
Fig. 4 is the output-stage circuit schematic diagram of an existing integrated circuit.
Symbol description:
10 output buffer 11 abnormal potential detecting units
12 grid potential switch units 13 export buffer cell
21 internal circuits 22 export pad
30 electrostatic discharge protection circuit 31 static protective unit
50 integrated circuit 51 internal circuits
52 output buffer 53 output sockets.
Embodiment
The output-stage circuit that the present invention is directed to integrated circuit is easily subject to abnormal potential to produce damage because of Floating gate, therefore proposes following solution.
First referring to shown in Fig. 1, is the detailed circuit diagram of a preferred embodiment of output buffer 10 of the present invention, and this output buffer 10 comprises abnormal potential detecting unit 11, grid potential switch unit 12 and and exports buffer cell 13.Wherein this output buffer cell 13 comprises one the one PMOS transistor element MP1, one the one NMOS transistor element MN1 and an output pad 22, wherein two grid G of a PMOS transistor element MP1 and a NMOS transistor element MN1 are connected with this grid potential switch unit 12 respectively, determine its grid G current potential by this grid potential switch unit 12.And the one drain D to the source S of PMOS transistor element MP1 be connected with a parasitic forward diode D1, and drain D to the source S of the 2nd NMOS transistor element MN1 is connected with a parasitic backward diode D2.This output pad 22 is connected to the tandem node of a PMOS transistor element MP1 and a NMOS transistor element MN1.
Above-mentioned abnormal potential detecting unit 11 is serially connected with the high and low potential end V of a DC power supply
dD, V
sSbetween, to detect when electrostatic enters input pad 22, make the potential anomalies of DC power supply, and provide a triggering signal when abnormal potential produces.In the present embodiment, this abnormal potential detecting unit 11 comprises:
Zener diode Z1, its negative electrode is connected to the hot end V of this DC power supply
dDthe puncture voltage of this Zener diode Z1 is greater than the normal running current potential of this DC power supply, the integrated circuit of 5V is used for direct current power source voltage, the Zener diode Z1 that puncture voltage is more than 7V can be adopted, guarantee not enter breakdown conditions when the normal current potential of DC power supply, according to the Zener diode Z1 of 7V puncture voltage, representing this abnormal potential detecting unit, to preset abnormal potential be more than 7V; And
One resistance R1, it is serially connected with the anode of this Zener diode Z1 and the cold end V of this DC power supply
sSbetween.
Again please refer to Fig. 2 A, suppose positive electrostatic V
eSDelectric current I
eSDexport pad 22 from one of integrated circuit to input, the hot end V of DC power supply can be flowed into by the parasitic forward diode D1 exporting a PMOS transistor element MP1 of buffer cell 13
dD, its potential anomalies is skyrocketed, and when exceeding the puncture voltage of Zener diode Z1, namely this Zener diode Z1 punctures and generation one punctures electric current I z simultaneously, flows through this resistance R1, and form a pressure drop V on this resistance R1
r; Otherwise if DC power supply maintains normal running current potential, then Zener diode Z1 can not enter breakdown conditions, this resistance does not also have pressure drop and produce, as shown in Figure 2 B.
Grid potential switch unit 12 as the present embodiment includes one the 2nd PMOS transistor element MP2 and the 2nd NMOS transistor element MN2.The source S of above-mentioned 2nd PMOS transistor element MP2 is connected to the hot end V of this DC power supply
dD, drain D is then in order to be connected to the grid G of this output buffer cell 13 the one PMOS transistor element MP1; The source S of the 2nd NMOS transistor element MN2 is then connected to the cold end V of this DC power supply
sS, drain D is in order to be connected to the grid G of this output buffer cell 13 the one NMOS transistor element MN1.In addition, the grid G of the 2nd NMOS transistor element MN2 is connected to the grid G of the 2nd PMOS transistor element MP2 further by an inverter INV, and is connected to the Zener diode Z1 of this abnormal potential detecting unit 11 and tandem node N1 of resistance R1.
So, when resistance R1 flows through produced pressure drop V because being subject to this Zener breakdown electric current I Z
r, the 2nd NMOS transistor element MN2 grid, forward bias+V between source electrode G, S can be provided as
gS, and make the 2nd NMOS transistor element MN2 conducting, because this inverter INV input is connected to the grid G of the 2nd PMOS transistor element MP2, therefore provide the grid G one forward bias+V of the 2nd NMOS transistor element NM2 at this resistance R1
gSwhile, this reverser INV can export a relative electronegative potential to the grid G of the 2nd PMOS transistor element MP2; And be connected to the hot end V of this DC power supply because of the source S of the 2nd PMOS transistor element MP2
dD, therefore the 2nd PMOS transistor element MP2 is when reverser INV can export a relative electronegative potential, its grid, source electrode obtain revers voltage-V
gSand conducting.
As shown in the above description, when abnormal potential higher than Zener diode Z1 puncture voltage appears in DC power supply, the 2nd PMOS and NMOS transistor element all can conducting; Now, because two drain D of the 2nd PMOS and NMOS transistor element MP2, MN2 of conducting are connected with two grid G of PMOS and NMOS transistor element MP1, MN1 for this output buffer cell 13 respectively, therefore the grid G of a PMOS transistor element MP1 can be connected to the hot end V of this DC power supply by conducting the 2nd PMOS transistor element MP2
dD, the grid G of a NMOS transistor element MN1 then can be connected to the cold end V of this DC power supply by the 2nd NMOS transistor element MN2 of this conducting
sSto guarantee PMOS and NMOS electric crystal MP1, MN1 not conducting, two grid G making PMOS and NMOS transistor element MP1, MN1 for this output buffer cell 13 are no longer failed to understand because of suspension joint current potential, and may be subject to electrostatic and enter produced abnormal potential and damage.
Please refer to Fig. 2 B, the internal circuit 21 that abnormal potential detecting unit 11 of the present invention and grid potential switch unit 12 do not affect integrated circuit outputs signal the normal switching action at PMOS and NMOS electric crystal MP1, the MP2 exporting buffer cell 13.Because DC power supply is when normal running, the Zener diode Z1 of this abnormal potential detecting unit 11 can not puncture generation and puncture big current, therefore resistance R1 does not have pressure drop generation, is not enough to make the 2nd PMOS and NMOS transistor element MP2, MN2 conducting of this grid potential switch unit 12 and changes two grid potentials exporting buffer cell 13.Moreover, because two grid G of the 2nd PMOS and NMOS transistor element MP2, MN2 of this grid potential switch unit 12 are connected to this abnormal potential detecting unit 11 jointly, and two grid G of this output buffer cell 13 are only connected to respectively with two drain D, therefore internal circuit 21 signal that exports high and low current potential is to when exporting two grid G of buffer cell 13, and the 2nd PMOS and NMOS transistor element MP2, MN2 conducting can't be made to change two the grid G current potentials exporting buffer cell 13.
The circuits improvement done for the output buffer that the present invention is directed to general integrated circuit above and circuit operation explanation, below further illustrate the present invention to be arranged between the high and low potential end of DC power supply of the internal circuit of this integrated circuit, or the electrostatic discharge protection circuit between internal circuit and output pad.
One preferred embodiment of electrostatic discharge protection circuit of the present invention as shown in Figure 3, this electrostatic discharge protection circuit 30 comprises above-mentioned output buffer 10 and a static protective unit 31, this static protective unit 31 can detect the abnormal potential because electrostatic produces, and forms the electronegative potential V to DC power supply when detecting and having abnormal potential
sSdischarge path; Wherein this electrostatic discharge protection circuit 31 is detected as abnormal potential, and this abnormal potential is the abnormal potential detected higher than this abnormal potential detecting unit 11, such as, adopt the thyristor being less than 30V low trigger voltage, be namely greater than the Zener diode Z1 of 7V puncture voltage.Electrostatic discharge protection circuit of the present invention is thyristor and the function similar elements thereof of low trigger voltage, therefore is not limited with thyristor.
In the present embodiment, when electrostatic produces VESD, this thyristor can when electrostatic potential is greater than 30V triggering and conducting, namely the grid G current potential of PMOS and NMOS transistor element MP1, the MN1 exporting buffer cell 13 is first controlled, it is made really to end not conducting, treat that electrostatic potential increases to over 30V, namely start this thyristor, and rapidly by electrostatic induced current I
sEDbypass, treat the hot end V of DC power supply
dDcurrent potential decline be less than 7V, then the grid potential switch unit 12 of this output buffer 10 no longer controls the grid G current potential of PMOS and NMOS transistor element MP1, MN1 for this output buffer cell 13.
As shown in the above description, the present invention is exporting the abnormal potential detecting unit set up of buffer cell and grid potential switch unit, really before electrostatic discharge protection circuit not yet triggers startup, can first end the transistor element of this output buffer cell, guarantee it not by the destruction of weak electrostatic; Therefore electrostatic discharge protection circuit of the present invention has the protection of the relatively high and low abnormal potential of twice really, increase IC semiconductor element to electrostatic protection effect.
Above lift use 5V DC power supply integrated circuit its be low-voltage ic illustration, the present invention also can for high voltage integrated circuit, but the Zener diode of this abnormal potential detecting unit, resistance, and the high pressure range that namely PMOS, NMOS transistor element of this grid potential switch unit uses according to integrated circuit is selected; Therefore, PMOS, NMOS transistor element of grid potential switch unit of the present invention can be low pressure or high-voltage semiconductor element.
The above is only preferred embodiment of the present invention, not any pro forma restriction is done to the present invention, although the present invention discloses as above with preferred embodiment, but and be not used to limit the present invention, any those skilled in the art, not departing from the scope of technical solution of the present invention, make a little change when the technology contents of above-mentioned announcement can be utilized or be modified to the Equivalent embodiments of equivalent variations, in every case be the content not departing from technical solution of the present invention, according to any simple modification that technical spirit of the present invention is done above embodiment, equivalent variations and modification, all still belong in the scope of technical solution of the present invention.
Claims (10)
1. can switch an output buffer for grid potential fast, comprise:
One abnormal potential detecting unit, it is serially connected with a DC power supply, to produce triggering signal when detecting DC power supply potential anomalies;
One grid potential switch unit, it is serially connected with this DC power supply and is connected to this abnormal potential detecting unit, and receives this triggering signal and trigger, to export two grid potential switching signals; And
One exports buffer cell, it is serially connected with this DC power supply, and comprise one the one PMOS transistor element and one the one NMOS transistor element, wherein two grids of this PMOS transistor element and NMOS transistor element are connected with grid potential switch unit respectively, determine its grid potential by this grid potential switch unit.
2. the output buffer that can switch grid potential fast according to claim 1, wherein this abnormal potential detecting unit comprises:
Zener diode, its negative electrode is connected to the hot end of this DC power supply, and the puncture voltage of this Zener diode is greater than the normal running current potential of this DC power supply; And
One resistance, it is serially connected with between the anode of this Zener diode and the cold end of this DC power supply.
3. the output buffer that can switch grid potential fast according to claim 2, wherein this grid potential switch unit comprises:
One the 2nd PMOS transistor element, its source electrode is connected to the hot end of this DC power supply, and its drain electrode is connected to the grid of this output buffer cell the one PMOS transistor element; And
One the 2nd NMOS transistor element, its source electrode is then connected to the cold end of this DC power supply, and its drain electrode is connected to the grid of this output buffer cell the one NMOS transistor element; And the 2nd the grid of NMOS transistor element be connected to the grid of a PMOS transistor element by an inverter, and be connected to this abnormal potential and detect single Zener diode and the tandem node of resistance.
4. the output buffer that can switch grid potential fast according to any one of claim 1 to 3, wherein drain electrode to the source electrode of a PMOS transistor element of this output buffer cell is connected with a parasitic forward diode, and drain electrode to the source electrode of a NMOS transistor element is connected to a parasitic backward diode.
5. the output buffer that can switch grid potential fast according to claim 4, wherein the 2nd PMOS transistor element of this grid potential switch unit and the 2nd NMOS transistor element are low pressure or high-voltage semiconductor element.
6. an electrostatic discharge protection circuit, comprising:
One abnormal potential detecting unit, it is serially connected with a DC power supply, to produce triggering signal when detecting DC power supply potential anomalies;
One grid potential switch unit, it is serially connected with this DC power supply and is connected to this abnormal potential detecting unit, and receives this triggering signal and trigger, to export two grid potential switching signals;
One exports buffer cell, it is serially connected with this DC power supply, and comprise one the one PMOS transistor element, output pad that one the one NMOS transistor element and is connected to a PMOS transistor element and a NMOS transistor element, wherein two grids of this PMOS transistor element and NMOS transistor element are connected with grid potential switch unit respectively, determine its grid potential by this grid potential switch unit; And
One static protective unit, it is connected to this output buffer cell, to detect the abnormal potential because electrostatic produces, and has the discharge path of the electronegative potential forming a pair DC power supply during abnormal potential in detection; Wherein this electrostatic discharge protection circuit is detected as abnormal potential, and this abnormal potential is the abnormal potential detected higher than this abnormal potential detecting unit.
7. electrostatic discharge protection circuit according to claim 6, wherein this abnormal potential detecting unit comprises:
Zener diode, its negative electrode is connected to the hot end of this DC power supply, and the puncture voltage of this Zener diode is greater than the normal running current potential of this DC power supply; And
One resistance, it is serially connected with between the anode of this Zener diode and the cold end of this DC power supply.
8. electrostatic discharge protection circuit according to claim 7, wherein this grid potential switch unit comprises:
One the 2nd PMOS transistor element, its source electrode is connected to the hot end of this DC power supply, and its drain electrode is connected to the grid of this output buffer cell the one PMOS transistor element; And
One the 2nd NMOS transistor element, its source electrode is then connected to the cold end of this DC power supply, and its drain electrode is connected to the grid of this output buffer cell the one NMOS transistor element; And the 2nd the grid of NMOS transistor element be connected to the grid of a PMOS transistor element by an inverter, and be connected to the Zener diode of this abnormal potential detecting unit and the tandem node of resistance.
9. the electrostatic discharge protection circuit according to any one of claim 6 to 8, wherein drain electrode to the source electrode of a PMOS transistor element of this output buffer cell is connected with a parasitic forward diode, and drain electrode to the source electrode of a NMOS transistor element is connected to a parasitic backward diode.
10. electrostatic discharge protection circuit according to claim 9, wherein the 2nd PMOS transistor element of this grid potential switch unit and the 2nd NMOS transistor element are low pressure or high-voltage semiconductor element.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW103104381A TW201532386A (en) | 2014-02-11 | 2014-02-11 | Output buffer capable of rapidly switching gate potential and electrostatic protection circuit |
| TW103104381 | 2014-02-11 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN104836565A true CN104836565A (en) | 2015-08-12 |
Family
ID=53814240
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201410119384.9A Pending CN104836565A (en) | 2014-02-11 | 2014-03-27 | Output buffer capable of rapidly switching grid potential and electrostatic protection circuit |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN104836565A (en) |
| TW (1) | TW201532386A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107306129A (en) * | 2016-04-18 | 2017-10-31 | 台湾类比科技股份有限公司 | The output-stage circuit of integrated circuit |
| CN108028530A (en) * | 2016-07-12 | 2018-05-11 | 深圳市汇顶科技股份有限公司 | ESD detection devices, integrated circuit and method applied to digital integrated electronic circuit |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108306273A (en) * | 2018-01-30 | 2018-07-20 | 广东美的制冷设备有限公司 | Circuit, high voltage integrated circuit and the air conditioner of static electrification safeguard function |
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| USRE43215E1 (en) * | 2001-02-02 | 2012-02-28 | Ming-Dou Ker | ESD protection design with turn-on restraining method and structures |
| US6728086B2 (en) * | 2001-09-03 | 2004-04-27 | Faraday Technology Corp. | Power-rail electrostatic discharge protection circuit with a dual trigger design |
| CN1447427A (en) * | 2002-03-26 | 2003-10-08 | 华邦电子股份有限公司 | Electrostatic discharge protection circuit |
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| CN107306129A (en) * | 2016-04-18 | 2017-10-31 | 台湾类比科技股份有限公司 | The output-stage circuit of integrated circuit |
| CN107306129B (en) * | 2016-04-18 | 2020-09-29 | 台湾类比科技股份有限公司 | Output stage circuit of integrated circuit |
| CN108028530A (en) * | 2016-07-12 | 2018-05-11 | 深圳市汇顶科技股份有限公司 | ESD detection devices, integrated circuit and method applied to digital integrated electronic circuit |
| US10359460B2 (en) | 2016-07-12 | 2019-07-23 | Shenzhen GOODIX Technology Co., Ltd. | ESD detection apparatus and method applied to digital integrated circuit, and integrated circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| TW201532386A (en) | 2015-08-16 |
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