CN104796120A

CN104796120A - Time delay circuit

Info

Publication number: CN104796120A
Application number: CN201510135761.2A
Authority: CN
Inventors: 蒋丽
Original assignee: Individual
Current assignee: Individual
Priority date: 2015-03-26
Filing date: 2015-03-26
Publication date: 2015-07-22

Abstract

The invention provides a time delay circuit. The time delay circuit comprises an RC charging and discharging circuit unit, a first switch unit and a second switch unit. The first switch unit comprises a triode. The second switch unit comprises an MOS pipe. The RC charging and discharging circuit unit is connected with a power input end and a signal input end. The base and the transmitter of the triode are connected with the RC charging and discharging circuit. The transmitter of the triode is connected with the ground end. The collector of the triode is connected with the grid of the MOS pipe. The source of the MOS pipe is connected with the signal input end. The drain of the MOS pipe is connected with the signal output end. By means of the time delay circuit, the circuit structure is simplified, the product cost is reduced, and accuracy is high.

Description

Delay circuit

Technical field

The application relates to technical field of integrated circuits, particularly relates to a kind of delay circuit.

Background technology

In the market, needing to carry out in the control circuit of delays time to control, great majority adopt mechanical type timing unit or digital timing unit, as 555 timers.The digital timing unit be particularly made up of single-chip microcomputer or Programmable Logic Controller, because its timing is accurate, timing is arranged conveniently, is widely used in the control circuit of various accurate timing.But, these have mechanical type timing unit or the digital timing unit of long-time time delay, due to its complex structure, cost is higher, comparatively being applicable in the higher long-time delay control circuit of timing accuracy requirement, if the delay circuit for not growing delay time, is then both uneconomical, uneconomical, more unnecessary yet.

Summary of the invention

It is simple that the technical problem that the application need solve is to provide a kind of structure, and cost is low, accurately high delay circuit.

For solving above-mentioned technical problem, the application devises a kind of delay circuit, it comprises RC charge-discharge circuit unit, first switch element and second switch unit, described first switch element comprises triode, second switch unit comprises MOS pipe, RC charge-discharge circuit unit is connected with power input and signal input part, the base stage of triode is connected with RC charge-discharge circuit unit with emitter, the emitter also earth terminal of triode, the collector electrode of triode is connected with the grid of MOS pipe, the source electrode of MOS pipe is connected with signal input part, the drain electrode of MOS pipe is connected with signal output part.

Improve further as the application, described RC charge-discharge circuit unit comprises the first resistance, the second resistance, the 3rd resistance, the first electric capacity and the second electric capacity, the first end of the first resistance is connected with power input, second end of the first resistance is connected with the first end of the first electric capacity and the first end of the second electric capacity respectively, the first end of the second resistance is connected with the second end of the first resistance, second end of the second resistance is connected with the base stage of triode, the first end of the 3rd resistance is connected with the second end of the second resistance, second end of the 3rd resistance is connected with the emitter of triode, the first end of the first electric capacity and first end series connection the 4th resistance of the second electric capacity are to be connected with signal input part, second end of the first electric capacity and the second end of the second electric capacity earth terminal respectively, second end of the first resistance also connects the 5th resistance with earth terminal.

Improve further as the application, described delay circuit also comprises filter circuit, and described filter circuit comprises at least one filter capacitor, and the first end of filter capacitor is connected with the drain electrode of signal output part and MOS pipe, the second end earth terminal of filter capacitor.

Improve further as the application, described delay circuit also comprises on-off circuit, described on-off circuit comprises the 6th resistance and the 3rd electric capacity, the first end of the 6th resistance and the first end of the 3rd electric capacity are connected with the source electrode of MOS pipe, and the second end of the 6th resistance and the second end of the 3rd electric capacity are connected with the grid of MOS pipe.

Compared with prior art, the application's delay circuit structure is simple, and cost is low, and accuracy is also high.

Accompanying drawing explanation

Fig. 1 is the frame assumption diagram of the application's delay circuit;

Fig. 2 is the circuit connecting relation figure of the application's delay circuit.

Embodiment

In order to the technical scheme making relevant technical staff in the field understand the application better, below in conjunction with the accompanying drawing of the application's execution mode, technical scheme in the application's execution mode is clearly and completely described, obviously, described execution mode is only the application's part execution mode, instead of whole execution modes.

The application provides a kind of delay circuit, and this delay circuit simplifies circuit structure, reduces product cost.

As shown in Fig. 1, the second switch unit that this delay circuit comprises RC charge-discharge circuit unit, the first switch element be connected with RC charge-discharge circuit unit and is connected with the first switch element.RC charge-discharge circuit unit after charging a period of time, when electric capacity both end voltage is wherein enough to make the first switching means conductive, the first switching means conductive, and drive second switch cell conduction.Its charging interval is enough to make the time of the first switching means conductive be delay time.

As shown in Fig. 2, in the present embodiment, RC charge-discharge circuit unit comprises the first resistance R1, the second resistance R2, the 3rd resistance R3, the first electric capacity C1 and the second electric capacity C2.Wherein, the first resistance R1, the first electric capacity C1 and the second electric capacity C2 form charging circuit; Second resistance R2, the 3rd resistance R3, the first electric capacity C1 and the second electric capacity C2 form discharge circuit.First switch element comprises triode Q1.Second switch unit comprises MOS pipe Q2.

The first end of the first resistance R1 is connected with power input VDD, second end of the first resistance R1 is connected with the first end of the first electric capacity C1 and the first end of the second electric capacity C2 respectively, the first end of the second resistance R2 is connected with second end of the first resistance R1, second end of the second resistance R2 is connected with the base stage of triode Q1, the first end of the 3rd resistance R3 is connected with second end of the second resistance R2, second end of the 3rd resistance R3 is connected with the emitter of triode Q1, the first end of the first electric capacity C1 and first end series connection the 4th resistance R4 of the second electric capacity C2 are to be connected with signal input part D, second end of the first electric capacity C1 and second end of the second electric capacity C2 earth terminal respectively, second end of the first resistance R1 also connects the 5th resistance R5 with earth terminal.The application RC charge-discharge circuit unit utilizes capacitor charging, makes its both end voltage rise to the first switching means conductive.

It should be noted that, the application RC charge-discharge circuit unit is not limited to the structure of the present embodiment, and other utilize the RC charge-discharge circuit of its principle all to belong to the application's scope.

The collector electrode of triode Q1 is connected with the grid of MOS pipe Q2, the grounded emitter end of triode Q1, the source electrode of MOS pipe Q2 is connected with signal input part D, the drain electrode of MOS pipe Q2 is connected with signal output part OUT, and also can connect one the 7th resistance R7 between the collector electrode and the grid of MOS pipe Q2 of triode Q1.

Described delay circuit also comprises on-off circuit, on-off circuit comprises the 6th resistance R6 and the 3rd electric capacity C3, the first end of the 6th resistance R6 and the first end of the 3rd electric capacity C3 are connected with the source electrode of MOS pipe Q2, and second end of the 6th resistance R6 and second end of the 3rd electric capacity C3 are connected with the grid of MOS pipe Q2.

More optimizedly, the present embodiment delay circuit also comprises filter circuit, described filter circuit comprises three filter capacitor C4, C5, C6 in parallel, and the first end of three filter capacitor C4, C5, C6 in parallel is connected with the drain electrode of signal output part and MOS pipe Q2, its second end earth terminal.

The operation principle of the application's delay circuit is: when power input VDD switches on power, start the first electric capacity C1, 2nd C2 charging, as charging a period of time t to the first electric capacity C1, when 2nd C2 both end voltage is enough to make triode Q1 conducting, triode Q1 conducting, transistor collector had both been low level, that is to say that MOS pipe Q2 grid voltage is low level, now, Q2 source electrode is connected with signal input part, the voltage of signal input part is 3.3V, the voltage of Q2 source electrode is high (3.3V), grid voltage low (being similar to 0V), grid source both end voltage UGS is negative, and lower than the threshold voltage vt h of MOS pipe Q1, MOS pipe Q1 conducting, thus the voltage VDD_3P3=3.3V of output signal input.

When conducting voltage lower than triode Q1 of the first electric capacity C1, the second electric capacity C2 both end voltage, triode Q1 is in cut-off state, triode Q1 current collection very high level, that is to say that MOS pipe Q2 grid voltage is high level, now, MOS pipe Q2 source voltage is 3.3V, grid voltage high (being similar to infinity), grid source both end voltage UGS is just, far above the threshold voltage vt h of MOS pipe Q2, MOS pipe Q2 ends, thus output voltage VDD_3P3=0V.

The application's delay circuit triode Q1 conducting, MOS pipe Q2 then conducting; Triode Q1 ends, and MOS pipe Q2 then ends, and is equivalent to triode Q1 driven MOS pipe Q2 conducting.Delay time t is the time that RC charge-discharge circuit unit charging circuit is enough to make triode Q1 conducting, and delay time t is determined by RC charge-discharge circuit.

The application's delay circuit structure is simple, and cost is low, and accuracy is also high.

Claims

1. a delay circuit, it is characterized in that, comprise RC charge-discharge circuit unit, the first switch element and second switch unit, described first switch element comprises triode, second switch unit comprises MOS pipe, RC charge-discharge circuit unit is connected with power input and signal input part, the base stage of triode is connected with RC charge-discharge circuit unit with emitter, the emitter also earth terminal of triode, the collector electrode of triode is connected with the grid of MOS pipe, the source electrode of MOS pipe is connected with signal input part, and the drain electrode of metal-oxide-semiconductor is connected with signal output part.

2. according to the delay circuit described in claim 1, it is characterized in that: described RC charge-discharge circuit unit comprises the first resistance, the second resistance, the 3rd resistance, the first electric capacity and the second electric capacity, the first end of the first resistance is connected with power input, second end of the first resistance is connected with the first end of the first electric capacity and the first end of the second electric capacity respectively, the first end of the second resistance is connected with the second end of the first resistance, second end of the second resistance is connected with the base stage of triode, the first end of the 3rd resistance is connected with the second end of the second resistance, second end of the 3rd resistance is connected with the emitter of triode, the first end of the first electric capacity and first end series connection the 4th resistance of the second electric capacity are to be connected with signal input part, second end of the first electric capacity and the second end of the second electric capacity earth terminal respectively, second end of the first resistance also connects the 5th resistance with earth terminal.

3. according to the delay circuit described in claim 1, it is characterized in that: described delay circuit also comprises filter circuit, described filter circuit comprises at least one filter capacitor, and the first end of filter capacitor is connected with the drain electrode of signal output part and MOS pipe, the second end earth terminal of filter capacitor.

4. according to the delay circuit described in claim 1, it is characterized in that: described delay circuit also comprises on-off circuit, described on-off circuit comprises the 6th resistance and the 3rd electric capacity, the first end of the 6th resistance and the first end of the 3rd electric capacity are connected with the source electrode of MOS pipe, and the second end of the 6th resistance and the second end of the 3rd electric capacity are connected with the grid of MOS pipe.