CN104792584A - Preparation method of TEM sample - Google Patents
Preparation method of TEM sample Download PDFInfo
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- CN104792584A CN104792584A CN201410023148.7A CN201410023148A CN104792584A CN 104792584 A CN104792584 A CN 104792584A CN 201410023148 A CN201410023148 A CN 201410023148A CN 104792584 A CN104792584 A CN 104792584A
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Abstract
The invention provides a preparation method of a TEM sample. the preparation method comprises the following steps: S1, a wafer containing several TSV blind holes is provided, at least two TSV blind holes are found through an optical microscope and marked, and a semiconductor sample containing the at least two TSV blind holes is obtained through scribing; S2, the semiconductor sample which is right side up is fixed on a substrate having an inclined surface; S3, the substrate is fixed upside down above a millstone and the surface of the semiconductor sample is contacted with the millstone; S4, rotational speed of the millstone is gradually increased until rotational speed is uniform and stable, and the surface of the semiconductor sample is ground; and S5, according to preset time interval, shapes of adjacent two TSV blind holes in view are observed under an optical microscope until projected area of one TSV blind hole on the horizontal plane is greater than projected area of the other TSV blind hole, and grinding of the semiconductor sample is stopped so as to obtain a TEM sample. According to the invention, a position which needs to be analyzed can be accurately controlled and determined. The method provided by the invention is simple and effective.
Description
Technical field
The invention belongs to field of semiconductor manufacture, relate to a kind of preparation method of TEM sample.
Background technology
Adopt the 3D integrated approach of silicon through hole (TSV) technology can improve the exchanges data speed of device, reduce the performance of the aspect such as power consumption and raising input/output terminal density.The manufacturer of memory device adopts the TSV integrated technology of homologous series chip to produce the dynamic RAM part (DRAM) of chip-stacked type, can improve the device memory capacity on unit circuit plate area/volume.This method can reduce the delay of Signal transmissions between memory chip and processor chips and can increase bandwidth.Carrying out integrated main application to different series chip is imageing sensor in mobile device and communication chip.Adopt TSV technology also can improve the yield of device, because large size chip can be divided into the chip (small-size chips has higher yield of devices) of several functional module, again they are carried out mutually stacking Vertical collection, or they are carried out Planar integration adjacent one another are on same insertion intermediary layer.
The technical process of TSV comprises: (1) etches TSV blind hole in wafer side; (2) depositing insulating layer on the hole wall etched; (3) deposit diffusion barriers on the insulating layer; (4) Cu Seed Layer is deposited on the diffusion barrier; (5) by electrochemical plating Cu be filled into TSV hole and anneal; (6) unnecessary Cu is removed in chemically mechanical polishing; (7) wafer is thinning from opposite side, make TSV blind hole become TSV through hole.
TSV production technology is still in development, the such as TSV etching of its critical process, Seed Layer grows, the plating of TSV copper, the grinding (TSV-CMP) of TSV surface copper although etc. make a breakthrough, but still come with some shortcomings, especially comprise the defect problem that some are caused by production technology deficiency.For these defects, we need by failure analysis (FailureAnalysis, FA) means carry out the analysis of qualitative, quantitative, such as say the pattern of TSV etching through hole (etch Via), the thickness of separation layer (Isolation) and stop Seed Layer (barrier seed), after plating, via clearance fills the quality of (Via gap fill) etc.And wherein, the thickness on restraining barrier and continuity are for most important TSV technology, and its quality directly affects the reliability of TSV product, stability.
But because TSV has very high depth-to-width ratio, the stepcoverage (step coverage) of PVD board only has about 7%, so the restraining barrier of TSV blind via bottom is very thin, it is the place of most fragile, in R&D process, need the analysis to carrying out FA bottom TSV, by TEM mode detect thickness, observe restraining barrier whether continuous.
Tem analysis requires that sample will have suitable size, is generally 5 microns * 10 microns.And the size of TSV is very large, be huge monster for TEM, and TSV blind via bottom is the place of most fragile, only analyze for TSV blind via bottom so general, and this demand is a challenge to TEM sample preparation.Current method for making sample can not control accurately and determine the position that will analyze.
Therefore, provide a kind of preparation method that can accurately control and determine the TEM sample of wanted analysis position, be necessary with the problem solving TSV blind hole tem analysis sample preparation difficulty.
Summary of the invention
The shortcoming of prior art in view of the above, the object of the present invention is to provide a kind of preparation method of TEM sample, for solving the tem analysis sample preparation difficulty of TSV blind hole in prior art, can not accurately control and determine the problem of the position that will analyze.
For achieving the above object and other relevant objects, the invention provides a kind of preparation method of TEM sample, the preparation method of described TEM sample at least comprises the following steps:
S1: provide the wafer that comprises some TSV blind holes, find at least two TSV blind holes under an optical microscope and mark, scribing obtains the semiconductor samples comprising these at least two TSV blind holes;
S2: being faced up by described semiconductor samples is fixed on one and has on the substrate of inclined surface;
S3: described substrate is inverted and is fixed on above a mill, and described semiconductor samples surface is contacted with described mill;
S4: progressively improve the rotational speed of described mill until rotational speed is uniform and stable, grinds described semiconductor samples surface;
S5: according to prefixed time interval, the pattern of adjacent two TSV blind holes in field of view under an optical microscope, until one of them TSV blind hole projected area is in the horizontal plane greater than another TSV blind hole projected area in the horizontal plane, stop the grinding to described semiconductor samples, obtain TEM sample.
Alternatively, described inclined surface is clinoplane.
Alternatively, the inclination angle of described clinoplane is less than 30 °.
Alternatively, described inclined surface is inclination cambered surface.
Alternatively, described inclination cambered surface is inclination arc surface, inclined ellipse cambered surface or tilted parabola cambered surface.
Alternatively, the angle of bend of described inclination arc surface is less than 10 °.
Alternatively, the distance between described adjacent two TSV blind holes is 50 ~ 100 microns.
Alternatively, the diameter of described TSV blind hole is 5 ~ 15 microns.
Alternatively, in described step S4, the rotational speed of described mill is uniform and stable at 2500 ~ 3500 revs/min.
Alternatively, described prefixed time interval is 10 ~ 60 seconds.
As mentioned above, the preparation method of TEM sample of the present invention, there is following beneficial effect: have on the substrate of inclined surface by being fixed on by semiconductor samples, when being ground to close to TSV blind via bottom, owing to having angle of inclination, the size of the lapped face of adjacent two TSV blind holes will difference to some extent, can determine to have arrived the position that will analyze, completing the preparation of TEM sample when observing small one and large one two TSV blind hole surface topographies under an optical microscope.The preparation method of TEM sample of the present invention accurately locates mutually the position of wanted tem analysis as object of reference by adjacent TSV blind hole, method is simply effective, and the inclined-plane of different angles, the TSV blind hole of different distance can be designed, obtain with TSV bottom the tem analysis point of different distance.
Accompanying drawing explanation
Fig. 1 is shown as the process chart of the preparation method of TEM sample of the present invention.
Fig. 2 is shown as the structural representation of semiconductor samples in the preparation method of TEM sample of the present invention.
Fig. 3 is shown as in the preparation method of TEM sample of the present invention the schematic diagram be fixed on by semiconductor samples on the surperficial substrate being inclination cambered surface.
Fig. 4 is shown as in the preparation method of TEM sample of the present invention the schematic diagram be fixed on by semiconductor samples on the surperficial substrate being clinoplane.
Fig. 5 is shown as in the preparation method of TEM sample of the present invention and substrate shown in Fig. 3 is inverted the schematic diagram be fixed on above mill.
Fig. 6 is shown as in the preparation method of TEM sample of the present invention and substrate shown in Fig. 4 is inverted the schematic diagram be fixed on above mill.
Fig. 7 is shown as the theoretical analysis figure of the preparation method of TEM sample of the present invention.
The preparation method that Fig. 8 is shown as TEM sample of the present invention determines the theoretical analysis figure of different tem analysis points by adjustment inclination angle of inclined plane or TSV blind hole spacing.
Fig. 9 is shown as in the preparation method of TEM sample of the present invention the photo observing several groups of small one and large one two TSV blind hole xsects under an optical microscope.
Figure 10 is shown as the TEM photo of the TEM sample made by the preparation method of TEM sample of the present invention.
Element numbers explanation
S1 ~ S5 step
1 TSV blind hole
2 semiconductor samples
3 substrates
4 mills
5 TSV blind holes projected area in the horizontal plane
Distance sum between the diameter of X, X1, X2 TSV blind hole and adjacent two TSV blind holes
The point of Y, Y1, Y2 tem analysis is relative to the distance of TSV blind via bottom
θ inclination angle of inclined plane
Embodiment
Below by way of specific instantiation, embodiments of the present invention are described, those skilled in the art the content disclosed by this instructions can understand other advantages of the present invention and effect easily.The present invention can also be implemented or be applied by embodiments different in addition, and the every details in this instructions also can based on different viewpoints and application, carries out various modification or change not deviating under spirit of the present invention.
Refer to Fig. 1 to Figure 10.It should be noted that, the diagram provided in the present embodiment only illustrates basic conception of the present invention in a schematic way, then only the assembly relevant with the present invention is shown in graphic but not component count, shape and size when implementing according to reality is drawn, it is actual when implementing, and the kenel of each assembly, quantity and ratio can be a kind of change arbitrarily, and its assembly layout kenel also may be more complicated.
The invention provides a kind of preparation method of TEM sample, refer to Fig. 1, be shown as the process chart of the preparation method of TEM sample of the present invention, at least comprise the following steps:
Step S1: provide the wafer that comprises some TSV blind holes, find at least two TSV blind holes under an optical microscope and mark, scribing obtains the semiconductor samples comprising these at least two TSV blind holes;
Step S2: being faced up by described semiconductor samples is fixed on one and has on the substrate of inclined surface;
Step S3: described substrate is inverted and is fixed on above a mill, and described semiconductor samples surface is contacted with described mill;
Step S4: progressively improve the rotational speed of described mill until rotational speed is uniform and stable, grinds described semiconductor samples surface;
Step S5: according to prefixed time interval, the pattern of adjacent two TSV blind holes in field of view under an optical microscope, until one of them TSV blind hole projected area is in the horizontal plane greater than another TSV blind hole projected area in the horizontal plane, stop the grinding to described semiconductor samples, obtain TEM sample.
First refer to Fig. 1, perform step S1: provide the wafer that comprises some TSV blind holes, find at least two TSV blind holes under an optical microscope and mark, scribing obtains the semiconductor samples 2 comprising these at least two TSV blind holes 1.
Concrete, the distance between described adjacent two TSV blind holes is 50 ~ 100 microns, and the distance between TSV blind hole can adjust when making TSV blind hole.In theory, the bottom of described TSV blind hole is plane, but due to the restriction of technique, the bottom of described TSV blind hole presents arc usually.The diameter of described TSV blind hole is 5 ~ 15 microns, and depth-to-width ratio is 2 ~ 10.Be filled with conducting metal as Cu, Al etc. in described TSV blind hole, comprise insulation course, diffusion impervious layer, Seed Layer etc. between conducting metal and blind hole sidewall, this is the common practise of this area, repeats no more herein.Because TSV blind hole is comparatively dark, the restraining barrier bottom it etc. are very thin, more fragile, need to carry out failure analysis to bottom TSV, and whether thickness, observation restraining barrier as measured each layer by TEM mode be continuous, guarantees to meet performance requirement with product.
Then refer to Fig. 2 or Fig. 3, perform step S2: being faced up by described semiconductor samples 2 is fixed on one and has on the substrate 3 of inclined surface.
Concrete, described inclined surface can be clinoplane, also can be inclination cambered surface.Described semiconductor samples 2 is fixed on the inclined surface of substrate by bonding mode.Fig. 2 be shown as described semiconductor samples 2 be fixed on surface for inclination cambered surface substrate 3 on schematic diagram, Fig. 3 be shown as described semiconductor samples 2 be fixed on surface for clinoplane substrate 3 on schematic diagram.
Concrete, for clinoplane, described semiconductor samples 2 is fixed thereon can not there is deformation, and the inclination angle of described clinoplane is preferably less than 30 °.For inclination cambered surface, can be inclination arc surface, inclined ellipse cambered surface, tilted parabola cambered surface or other inclination cambered surface.Because described semiconductor samples 2 is fixed on deformation that described inclination cambered surface will bend, therefore in described inclination cambered surface, the curvature of each point can not be excessive, otherwise the semiconductor samples 2 be fixed thereon will produce defect or destroyed because stress is excessive.For inclination arc surface, the angle of bend of described inclination arc surface is preferably less than 10 °, and the central angle namely corresponding to whole inclination arc surface should be less than 10 °.
Then refer to Fig. 5 or Fig. 6, perform step S3: described substrate 3 is inverted and is fixed on above a mill 4, and described semiconductor samples 2 surface is contacted with described mill 4.
Wherein, substrate shown in Fig. 3 is inverted the schematic diagram be fixed on above mill by Fig. 5 display, and Fig. 6 is shown as and substrate shown in Fig. 4 is inverted the schematic diagram be fixed on above mill.
Perform step S4 again: the rotational speed progressively improving described mill 4, until rotational speed is uniform and stable, is ground described semiconductor samples 2 surface;
Concrete, described semiconductor samples 2 surface is contacted with described mill 4 and keeps certain contact, described mill 4 is ground described semiconductor samples 2 surface.In process of lapping, substrate 3 can be kept motionless, and the mill that progressively rises.The rotational speed of described mill is uniform and stable at 2500 ~ 3500 revs/min.Rotational speed is too high, and process of lapping is wayward, is easy to honed; Be preferably in the present embodiment and grind under slower rotating speed (2500 ~ 3500 revs/min), and add lapping liquid, process of lapping more easily controls, and reduces grinding damage.
Finally refer to Fig. 7 to Fig. 9, perform step S5: according to prefixed time interval, the pattern of adjacent two TSV blind holes in field of view under an optical microscope, until one of them TSV blind hole projected area is in the horizontal plane greater than another TSV blind hole projected area in the horizontal plane, stop the grinding to described semiconductor samples, obtain TEM sample.
Concrete, described prefixed time interval is 10 ~ 60 seconds, is preferably 30 seconds in the present embodiment, namely often grinds and described substrate is departed from mill in 30 seconds, and observe the pattern of TSV blind hole under an optical microscope.Because described substrate 3 surface tilts, the diametric plane of abrasive surface and described TSV blind hole 1 presents certain angle, for described substrate 2 surface be the situation of clinoplane, the angle of the diametric plane of described abrasive surface and described TSV blind hole 1 equals the inclination angle of described clinoplane.
The surface of substrate 2 described in the present embodiment is described for the principle of clinoplane to the preparation method of TEM sample of the present invention.As shown in Figure 7, dash area is the part be worn away, and wherein, blind via bottom can be cambered surface shown in Fig. 7, also can be plane.When abrasive surface arrives one of them TSV blind via bottom, abrasive surface does not arrive another TSV blind via bottom adjacent with this TSV blind hole yet, along with proceeding of grinding, two TSV blind holes projected area 5 in the horizontal plane starts to occur difference, presents small one and large one.Therefore, when in field of view under an optical microscope there is small one and large one in the pattern of adjacent two TSV blind holes, as shown in Figure 9, illustrate that abrasive surface has arrived one of them TSV blind via bottom part, namely grinding can be stopped, the semiconductor samples ground is separated with substrate, completes the preparation of TEM sample.
In Fig. 7, X is the distance sum between the diameter of TSV blind hole and adjacent two TSV blind holes, and Y can be defined as the distance of point relative to TSV blind via bottom of tem analysis, and θ is inclination angle of inclined plane.When known X and θ, calculate the distance between tem analysis point and TSV blind via bottom by formula Y=X*tan θ.When carrying out tem analysis, can observe two TSV blind holes respectively, one of them can observe the pattern of blind via bottom, and another can observe blind hole sidewall profile, thus has a complete comprehensive analysis to TSV blind via bottom part.
In the preparation method of TEM sample of the present invention, the size of θ can also be changed by designing the inclined-plane with different angle, design the size that different TSV blind hole distances changes X, thus obtain different Y, to meet the analysis demand with the position at TSV blind via bottom different distance place.Fig. 8 is shown as the theoretical analysis figure being determined different tem analysis points by adjustment inclination angle of inclined plane or TSV blind hole spacing, as shown in the figure, when distance sum between the diameter of TSV blind hole and adjacent two TSV blind holes is X1, the point of the tem analysis that the TEM sample prepared can be observed is Y1 relative to the distance of TSV blind via bottom, when distance sum between the diameter and adjacent two TSV blind holes of TSV blind hole is X2, the point of the tem analysis that the TEM sample of preparation can be observed is Y2 relative to the distance of TSV blind via bottom.
Surface for described substrate 2 is the situation of inclination cambered surface, and its theoretical analysis and substrate surface are that the situation of clinoplane is similar, repeat no more herein.
Refer to Figure 10, be shown as the TEM photo of the TEM sample produced by the preparation method of TEM sample of the present invention, clearly can see the pattern of conducting metal, restraining barrier, insulation course etc. in TSV blind hole.
In sum, the preparation method of TEM sample of the present invention has on the substrate of inclined surface by being fixed on by semiconductor samples, when being ground to close to TSV blind via bottom, owing to having angle of inclination, the size of the lapped face of adjacent two TSV blind holes will difference to some extent, can determine to have arrived the position that will analyze when observing small one and large one two TSV blind hole surface topographies under an optical microscope, completing the preparation of TEM sample.The preparation method of TEM sample of the present invention accurately locates mutually the position of wanted tem analysis as object of reference by adjacent TSV blind hole, method is simply effective, and the inclined-plane of different angles, the TSV blind hole of different distance can be designed, obtain with TSV bottom the tem analysis point of different distance.So the present invention effectively overcomes various shortcoming of the prior art and tool high industrial utilization.
Above-described embodiment is illustrative principle of the present invention and effect thereof only, but not for limiting the present invention.Any person skilled in the art scholar all without prejudice under spirit of the present invention and category, can modify above-described embodiment or changes.Therefore, such as have in art usually know the knowledgeable do not depart from complete under disclosed spirit and technological thought all equivalence modify or change, must be contained by claim of the present invention.
Claims (10)
1. a preparation method for TEM sample, is characterized in that, the preparation method of described TEM sample at least comprises the following steps:
S1: provide the wafer that comprises some TSV blind holes, find at least two TSV blind holes under an optical microscope and mark, scribing obtains the semiconductor samples comprising these at least two TSV blind holes;
S2: being faced up by described semiconductor samples is fixed on one and has on the substrate of inclined surface;
S3: described substrate is inverted and is fixed on above a mill, and described semiconductor samples surface is contacted with described mill;
S4: progressively improve the rotational speed of described mill until rotational speed is uniform and stable, grinds described semiconductor samples surface;
S5: according to prefixed time interval, the pattern of adjacent two TSV blind holes in field of view under an optical microscope, until one of them TSV blind hole projected area is in the horizontal plane greater than another TSV blind hole projected area in the horizontal plane, stop the grinding to described semiconductor samples, obtain TEM sample.
2. the preparation method of TEM sample according to claim 1, is characterized in that: described inclined surface is clinoplane.
3. the preparation method of TEM sample according to claim 2, is characterized in that: the inclination angle of described clinoplane is less than 30 °.
4. the preparation method of TEM sample according to claim 1, is characterized in that: described inclined surface is inclination cambered surface.
5. the preparation method of TEM sample according to claim 4, is characterized in that: described inclination cambered surface is inclination arc surface, inclined ellipse cambered surface or tilted parabola cambered surface.
6. the preparation method of TEM sample according to claim 4, is characterized in that: the angle of bend of described inclination arc surface is less than 10 °.
7. the preparation method of TEM sample according to claim 1, is characterized in that: the distance between described adjacent two TSV blind holes is 50 ~ 100 microns.
8. the preparation method of TEM sample according to claim 1, is characterized in that: the diameter of described TSV blind hole is 5 ~ 15 microns.
9. the preparation method of TEM sample according to claim 1, is characterized in that: in described step S4, and the rotational speed of described mill is uniform and stable at 2500 ~ 3500 revs/min.
10. the preparation method of TEM sample according to claim 1, is characterized in that: described prefixed time interval is 10 ~ 60 seconds.
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CN108663387A (en) * | 2018-05-16 | 2018-10-16 | 国家纳米科学中心 | A kind of method that wet etching prepares nano particle TEM sample |
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CN105158516A (en) * | 2015-08-20 | 2015-12-16 | 上海华力微电子有限公司 | Preparation method of planar transmission electron microscope sample in integrated circuit analysis |
CN105158516B (en) * | 2015-08-20 | 2018-10-16 | 上海华力微电子有限公司 | The preparation method of transmission electron microscope planar sample in a kind of Integrated circuit analysis |
CN108663387A (en) * | 2018-05-16 | 2018-10-16 | 国家纳米科学中心 | A kind of method that wet etching prepares nano particle TEM sample |
CN108663387B (en) * | 2018-05-16 | 2021-11-09 | 国家纳米科学中心 | Method for preparing nano-particle TEM sample by wet etching |
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