CN104779327A - Photoelectric element and manufacturing method thereof - Google Patents

Photoelectric element and manufacturing method thereof Download PDF

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Publication number
CN104779327A
CN104779327A CN201410011326.4A CN201410011326A CN104779327A CN 104779327 A CN104779327 A CN 104779327A CN 201410011326 A CN201410011326 A CN 201410011326A CN 104779327 A CN104779327 A CN 104779327A
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Prior art keywords
semiconductor layer
layer
electrode
insulating barrier
semiconductor
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CN104779327B (en
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王佳琨
陈昭兴
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Epistar Corp
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Epistar Corp
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Priority to CN201410011326.4A priority patent/CN104779327B/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40—Materials therefor
    • H01L33/405—Reflective materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/64—Heat extraction or cooling elements

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

The invention discloses a photoelectric element, which comprises a semiconductor lamination, a first electrode and an insulated layer, wherein the semiconductor lamination comprises a first semiconductor layer, a light emitting layer located above the first semiconductor layer, and a second semiconductor layer located above the light emitting layer; the first electrode is located above the second semiconductor layer, and the first electrode also comprises a reflection layer; and the insulated layer is formed above the second semiconductor layer, and a gap is formed between the first electrode and the insulated layer.

Description

Photoelectric cell and manufacture method thereof
Technical field
The present invention relates to a kind of photoelectric cell, especially relate to a kind of electrode design of photoelectric cell.
Background technology
Light-emitting diode (light-emitting diode, LED) principle of luminosity is the energy difference utilizing electronics movement between n-type semiconductor and p-type semiconductor, in the form of light by fault offset, such principle of luminosity is different from the principle of luminosity of incandescent lamp heating, and therefore light-emitting diode is called as cold light source.In addition, light-emitting diode has the advantages such as high-durability, the life-span is long, light and handy, power consumption is low, therefore illumination market is now placed high hopes for light-emitting diode, be regarded as the illuminations of a new generation, replace conventional light source gradually, and be applied to various field, as traffic sign, backlight module, street lighting, Medical Devices etc.
Figure 1A is existing light emitting element structure schematic diagram, as shown in Figure 1A, existing light-emitting component 100, include a transparency carrier 10, and be positioned at semiconductor laminated 12 on transparency carrier 10, and at least one electrode 14 is positioned on above-mentioned semiconductor laminated 12, wherein above-mentioned semiconductor laminated 12 from top to bottom at least comprise one first conductive-type semiconductor layer 120, active layer 122, and one second conductive-type semiconductor layer 124.
Figure 1B is existing light-emitting element electrode structural representation, as shown in Figure 1B, existing light-emitting component 100 ', include a transparency carrier 10, and be positioned at semiconductor laminated 12 on transparency carrier 10, and at least one electrode 14 is positioned on above-mentioned semiconductor laminated 12, wherein electrode 14 can comprise reflecting electrode 141 and a diffused barrier layer 142.But because diffused barrier layer 142 possibly cannot printing opacity, and reduce the light extraction efficiency of light-emitting component 100.
In addition, above-mentioned light-emitting component 100 can also be connected with other elements combinations to form a light-emitting device (light-emitting apparatus) further.Fig. 2 is existing luminous device structure schematic diagram, and as shown in Figure 2, a light-emitting device 200 comprises the secondary carrier (sub-mount) 20 that has at least one circuit 202; At least one solder (solder) 22 is positioned on above-mentioned carrier 20, to be cohered by above-mentioned light-emitting component 100 to be fixed on time carrier 20 and the substrate 10 of light-emitting component 100 is formed with the circuit 202 on secondary carrier 20 to be electrically connected by this solder 22; And an electric connection structure 24, to be electrically connected the electrode 14 of light-emitting component 100 and the circuit 202 on time carrier 20; Wherein, above-mentioned secondary carrier 20 can be that lead frame (lead frame) or large scale inlay substrate (mounting substrate), plans and improve its radiating effect to facilitate the circuit of light-emitting device 200.
Summary of the invention
For solving the problem, the present invention discloses a photoelectric cell, and it comprises: semiconductor lamination, and wherein this semiconductor laminatedly comprises one first semiconductor layer, and a luminescent layer is positioned at this first semiconductor layer, and one second semiconductor layer is positioned on this luminescent layer; One first electrode is positioned at this second semiconductor layer, and wherein this first electrode also comprises a reflector; And one insulating barrier be formed at this second semiconductor layer, and this first electrode and this insulating barrier have a spacing.
Accompanying drawing explanation
Figure 1A-Figure 1B is a structure chart, display one existing array light-emitting diode component side TV structure figure;
Fig. 2 is a schematic diagram, display one existing luminous device structure schematic diagram;
Fig. 3 A-Fig. 3 E is embodiment of the present invention manufacturing process structural representation;
Fig. 4 A to Fig. 4 C shows a light emitting module schematic diagram;
Fig. 5 A-Fig. 5 B shows a light-source generation device schematic diagram; And
Fig. 6 is a bulb schematic diagram.
Embodiment
The present invention discloses a kind of light-emitting component and manufacture method thereof, in order to make of the present inventionly to describe more detailed and complete, please refer to following description and coordinating the diagram of Fig. 3 A to Fig. 6.
Fig. 3 A to Fig. 3 E is embodiment of the present invention manufacturing process structural representation, as shown in Figure 3A, one substrate 30 is provided, then semiconductor extension lamination 32 is formed on this substrate 30, wherein semiconductor epitaxial lamination 32 from bottom to top comprises one first conductive-type semiconductor layer 321, active layer 322, and one second conductive-type semiconductor layer 323.
Then, form an insulating barrier 34 on semiconductor epitaxial lamination 32, and directly contact with the first surface 3211 of the first conductive-type semiconductor layer 321 and the first surface 3231 of the second conductive-type semiconductor layer 323.Afterwards, form a patterning photoresist oxidant layer 36 on the first surface 34S of insulating barrier 34, and expose the insulating barrier first surface 34S of part.
As shown in Figure 3 B, an etching process is carried out by above-mentioned patterning photoresist oxidant layer 36 pairs of insulating barriers 34, the insulating barrier 34 of part is removed, and expose the first surface 3211 of the first conductive-type semiconductor layer 321 and the part first surface 3231 of the second conductive-type semiconductor layer 323 of part, to form one first insulating barrier 341 on the part first surface 3211 of the first conductive-type semiconductor layer 321, one second insulating barrier 342 is on the part first surface 3231 of the second conductive-type semiconductor layer 323, and one the 3rd insulating barrier 343 on the part first surface 3231 of the second conductive-type semiconductor layer 323 and on the part first surface 3211 of the first conductive-type semiconductor layer 321.
In one embodiment, side etching process is carried out by patterning photoresist oxidant layer 36 pairs of insulating barriers 34, the part insulating barrier 34 be positioned under patterning photoresist oxidant layer 36 is also etched, even if also above-mentioned first insulating barrier 341 of part and the second insulating barrier 342 have a undercutting (undercut) shape relative to patterning photoresist oxidant layer 36.The edge that therefore patterning photoresist oxidant layer 36 can be projected on semiconductor epitaxial lamination 32 surface with the first insulating barrier 341 and the second insulating barrier 342 in the edge being projected on semiconductor epitaxial lamination 32 surface has a spacing G.In one embodiment, above-mentioned spacing G can be less than 3 μm.In one embodiment, above-mentioned lateral erosion is carved and be can be a Wet-type etching.
Then, as shown in Figure 3 C, form the first metal layer 382,1 second metal level 381 and a temporary transient metal level 383 with physical vapour deposition (PVD) simultaneously.Wherein the first metal layer 382 is formed on the part first surface 3231 that the second conductive-type semiconductor layer 323 exposes; Second metal level 381 is formed on the part first surface 3211 that the first conductive-type semiconductor layer 321 exposes; And temporarily metal level 383 is formed on patterning photoresist oxidant layer 36, and the upper surface of coverage diagram patterning photoresist layer 36.In one embodiment, above-mentioned physical vapour deposition (PVD) can be vacuum evaporation (Vacuum Evaporation), sputter (Sputtering), electron beam evaporation plating (Electron Beam Evaporation) or ion plating (Ion Plating).
In one embodiment, because patterning photoresist oxidant layer 36 has a undercutting (undercut) shape, therefore the sidewall of the first metal layer 382 directly can not contact with the sidewall of above-mentioned first insulating barrier 341 and the second insulating barrier 342, and the sidewall of the second metal level 381 directly can not contact with the sidewall of above-mentioned first insulating barrier 341.
In one embodiment, the first metal layer 382 can be more than one lamination, and can comprise a reflector, the material that the optional self-reflection rate of material in this reflector is greater than 90%.The material in the reflector in one embodiment in the first metal layer can be selected from the metal materials such as chromium (Cr), titanium (Ti), nickel (Ni), platinum (Pt), copper (Cu), gold (Au), aluminium (Al), tungsten (W), tin (Sn) or silver (Ag).
Then, as shown in Figure 3 D, remove patterning photoresist oxidant layer 36 and on temporary transient metal level 383.In one embodiment, as shown in Figure 3 D, the first surface 3211 of the second metal level 381 to the first conductive-type semiconductor layer 321 can have a height h1, and the first surface 3211 of the first insulating barrier 341 to the first conductive-type semiconductor layer 321 can have a height h2, by above-mentioned manufacture craft of the present invention, the difference in thickness that the second metal level 381 and the first insulating barrier 341 can have close thickness or the second metal level 381 and the first insulating barrier 341 is less than 1 μm.In one embodiment, the second metal level 381 and the first insulating barrier 341 can have a spacing d1, and this spacing d1 is less than 3 μm, and/or the second metal level 381 and the 3rd insulating barrier 343 can have a spacing d2, and this spacing d2 is less than 3 μm.In one embodiment, d1 and d2 can have identical value.
In another embodiment, the first surface 3231 of the first metal layer 382 to the second conductive-type semiconductor layer 323 can have a height h3, and the first surface 3231 of the second insulating barrier 342 to the second conductive-type semiconductor layer 323 can have a height h4, by the manufacture craft that above-described embodiment discloses, the difference in height that the first metal layer 382 and the second insulating barrier 342 can have close height or the first metal layer 382 and the second insulating barrier 342 is less than 1 μm.In one embodiment, the first metal layer 382 and the second insulating barrier 342 can have a spacing d3, and this spacing d3 is less than 3 μm, and/or the first metal layer 382 and the 3rd insulating barrier 343 can have a spacing d4, and this spacing d4 is less than 3 μm.In one embodiment, d3 and d4 can have identical value.In another embodiment, d1, d2, d3 and d4 can have identical value.
Finally, as shown in FIGURE 3 E, form one the 3rd metal level 42 on the first metal layer 382, and form one the 4th metal level 40 on the second metal level 381 to complete photoelectric cell 300 of the present invention.In one embodiment, part the 4th metal level 40 directly contacts with the first surface 3211 of the first conductive-type semiconductor layer 321, or part the 3rd metal level 42 directly contacts with the first surface 3231 of the second conductive-type semiconductor layer 323.In one embodiment, there is the second insulating barrier 342 hardly below above-mentioned 3rd metal level 42.In another example, the top of the 3rd metal level 42 and the second surface 3212 of the first semiconductor layer 321 have a beeline d6, and the 4th metal level 40 top and the second surface 3212 of the first semiconductor layer 321 there is a beeline d5, and the difference of d6 and d5 is less than 1 μm.In one embodiment, above-mentioned 3rd metal level 42 and the 4th metal level 40 can have close area in the projection of vertical substrate 30 normal direction.
In one embodiment, after the above-mentioned Fig. 3 D or Fig. 3 E that continues, substrate 30 can be removed and the portion second surface 3212 exposing the first conductive-type semiconductor layer 321 to form a diaphragm type upside-down mounting (thin-film flip chip).In one embodiment, continue after above-mentioned Fig. 3 D or Fig. 3 E, photoelectric cell 300 of the present invention can be connected to a support plate (not shown) to form a flip-chip packaged (flip chippackage) by the first metal layer 382 and the second metal level 381 or the 3rd metal level 42 and the 4th metal level 40.The first metal layer 382 in one embodiment, second metal level 381, the material of the 3rd metal level 42 or the 4th metal level 40 is including but not limited to copper (Cu), aluminium (Al), indium (In), tin (Sn), gold (Au), platinum (Pt), zinc (Zn), silver (Ag), titanium (Ti), nickel (Ni), plumbous (Pb), palladium (Pd), germanium (Ge), chromium (Cr), cadmium (Cd), cobalt (Co), manganese (Mn), antimony (Sb), bismuth (Bi), gallium (Ga), thallium (Tl), polonium (Po), iridium (Ir), rhenium (Re), rhodium (Rh), osmium (Os), tungsten (W), lithium (Li), sodium (Na), potassium (K), beryllium (Be), magnesium (Mg), calcium (Ca), strontium (Sr), barium (Ba), zirconium (Zr), molybdenum (Mo), sodium (La), silver-titanium (Ag-Ti), copper-Xi (Cu-Sn), copper-zinc (Cu-Zn), copper-cadmium (Cu-Cd), tin-lead-antimony (Sn-Pb-Sb), tin-lead-zinc (Sn-Pb-Zn), nickel-Xi (Ni-Sn), nickel-cobalt (Ni-Co), billon (Au alloy), or the metal material such as germanium-Jin-nickel (Ge-Au-Ni).
Fig. 4 A to Fig. 4 C shows a light emitting module schematic diagram, and Fig. 4 A shows a light emitting module external perspective view, and a light emitting module 500 can comprise a carrier 502, multiple lens 504,506,508 and 510, and two power supplys supply terminal 512 and 514.
4B-4C figure shows a light emitting module profile, and wherein Fig. 4 C is the enlarged drawing in the E district of Fig. 4 B.Carrier 502 can comprise carrier 503 and lower carrier 501 on one, wherein descends a surface of carrier 501 can contact with upper carrier 503.Lens 504 and 508 are formed on carrier 503.Upper carrier 503 can form at least one through hole 515, and can be formed in above-mentioned through hole 515 and with lower carrier 501 contact according to the light-emitting diode 300 that the embodiment of the present invention is formed, and is surrounded by glue material 521.There are on glue material 521 lens 508.
As shown in Figure 4 C, in one embodiment, a reflector 519 can be formed to increase light extraction efficiency on the two side of through hole 515; The lower surface of lower carrier 501 can form a metal level 517 with enhancing radiating efficiency.
Fig. 5 A-Fig. 5 B shows a light-source generation device schematic diagram 600, one light-source generation device 600 can comprise light emitting module 500, shell 540, power system (not shown) to supply light emitting module 600 1 electric current and a control element (not shown), in order to control power system (not shown).Light-source generation device 600 can be a lighting device, such as street lamp, car light or room lighting light source, also can be a back light of backlight module in traffic sign or a flat-panel screens.
Fig. 6 illustrates a bulb schematic diagram.Bulb 700 comprises a shell 921, lens 922, lighting module 924, support 925, radiator 926, serial connection portion 927 and an electricity serial connection device 928.Wherein lighting module 924 comprises a carrier 923, and on carrier 923, comprise the light-emitting diode 300 at least one above-described embodiment.
Specifically, photoelectric cell 300 to comprise in light-emitting diode (LED), photodiode (photodiode), photo resistance (photoresister), laser (laser), infrared emitter (infrared emitter), Organic Light Emitting Diode (organic light-emitting diode) and solar cell (solar cell) at least one.Substrate 30 is a growth and/or carrying basis.Candidate material can comprise electrically-conductive backing plate or non-conductive substrate, transparent substrates or light tight substrate.Wherein electrically-conductive backing plate material one can be germanium (Ge), GaAs (GaAs), indium phosphorus (InP), carborundum (SiC), silicon (Si), lithium aluminate (LiAlO2), zinc oxide (ZnO), gallium nitride (GaN), aluminium nitride (AlN), metal.Transparent substrates material one can be sapphire (Sapphire), lithium aluminate (LiAlO2), zinc oxide (ZnO), gallium nitride (GaN), glass, diamond, CVD diamond, bores carbon (Diamond-LikeCarbon with class; DLC), spinelle (spinel, MgAl2O4), aluminium oxide (Al2O3), silica (SiOX) and lithium gallium oxide (LiGaO2).
Above-mentioned first conductive-type semiconductor layer 321 and the second conductive-type semiconductor layer 323 be electrically, polarity or alloy different, in order to provide the semiconductor material monolayer of electronics and hole or sandwich construction, (" multilayer " refers to two layers or more, as follows respectively.) it electrically selects can be the two combination at least any in p-type, N-shaped and i type.Active layer 322 above-mentioned two parts electrical, polarity or alloy is different or respectively in order to provide between electronics and the semi-conducting material in hole, may change for electric energy and luminous energy or be induced the region of changing.Converting electric energy or bring out light able one as light-emitting diode, liquid crystal display, Organic Light Emitting Diode; Luminous energy changes or brings out electric able one as solar cell, photodiode.The element that above-mentioned its material of semiconductor epitaxial lamination 32 comprises one or more be selected from gallium (Ga), aluminium (Al), indium (In), arsenic (As), phosphorus (P), nitrogen (N) and silicon (Si) form group.Conventional material is as the group III-nitride such as AlGaInP (AlGaInP) series, aluminum indium gallium nitride (AlGaInN) series, zinc oxide (ZnO) series etc.The structure of active layer 322 is as single heterojunction structure (singleheterostructure; SH), double-heterostructure (double heterostructure; DH), bilateral double-heterostructure (double-side double heterostructure; Or multi layer quantum well (multi-quantum well DDH); MQW) structure.When photoelectric cell 300 is a light-emitting diode, its luminous frequency spectrum can be adjusted by the physics or tincture changing semiconductor monolayer or multilayer.Moreover the logarithm of adjustment quantum well also can change emission wavelength.
In one embodiment of this invention, a resilient coating (buffer layer, does not show) is still optionally comprised between semiconductor epitaxial lamination 32 and substrate 30.This resilient coating, between two kinds of material systems, makes the material system of material system " transition " to semiconductor system of substrate.For the structure of light-emitting diode, on the one hand, resilient coating is in order to reduce by two kinds of unmatched material layers of storeroom lattice.On the other hand, resilient coating also can be in conjunction with the individual layer of two kinds of materials or two isolating constructions, multilayer or structure, and its available material is as organic material, inorganic material, metal and semiconductor etc.; Its available structure is as reflector, heat-conducting layer, conductive layer, ohmic contact (ohmic contact) layer, anti-deformation layer, Stress Release (stress release) layer, Stress relief (stress adjustment) layer, joint (bonding) layer, wavelength conversion layer and mechanical fixture construction etc.
Semiconductor epitaxial lamination 32 also optionally forms a contact layer (not shown).Contact layer is arranged at the side of semiconductor epitaxial lamination 32 away from substrate 30.Specifically, contact layer can be optical layers, electrical layer or the combination both it.Optical layers can change the electromagnetic radiation or light that come from or enter active layer." change " alleged by this refers at least one optical characteristics changing electromagnetic radiation or light, and afore-mentioned characteristics is including but not limited to frequency, wavelength, intensity, flux, efficiency, colour temperature, color rendering (rendering index), light field (light field) and angle of visibility (angle of view).Electrical layer can make the numerical value of at least one in the voltage between arbitrary group of opposite side of contact layer, resistance, electric current, electric capacity, density, distribution changes or has the trend changed.The constituent material of contact layer to comprise in oxide, conductive oxide, transparent oxide, the oxide with 50% or more penetrance, metal, relatively transparent metal, the metal with 50% or more penetrance, organic matter, inanimate matter, fluorescent thing, phosphorescence thing, pottery, semiconductor, the semiconductor of doping and undoped semiconductor at least one.In some application, the material of contact layer be tin indium oxide, cadmium tin, antimony tin, indium zinc oxide, zinc oxide aluminum, with at least one in zinc-tin oxide.If transparent metal relatively, its thickness is preferably about 0.005 μm-0.6 μm.In one embodiment, because contact layer has preferably transverse current diffusion rate, evenly can be diffused among semiconductor epitaxial lamination 32 in order to assist current.Generally speaking, different with the mode of manufacture craft and change to some extent according to the impurity of contact layer blending, the width of its band gap can between 0.5eV to 5eV.
Though above each graphic with explanation only respectively corresponding specific embodiment, but, in each embodiment illustrated or the element, execution mode, design criterion and the know-why that disclose except aobviously each other conflicting mutually, contradiction or be difficult to except common implementing, when can according to needed for it arbitrarily with reference to, exchange, collocation, to coordinate or merging.Although be explained above the present invention, but the scope that it is not intended to limiting the invention, enforcement order or the material used and process for making.The various modification that the present invention is done and change, neither de-spirit of the present invention and scope.

Claims (10)

1. a photoelectric cell, comprises:
Semiconductor laminated, wherein this semiconductor laminatedly comprises the first semiconductor layer, and luminescent layer is positioned at this first semiconductor layer, and the second semiconductor layer is positioned on this luminescent layer;
First electrode, is positioned at this second semiconductor layer, and wherein this first electrode also comprises reflector; And
Insulating barrier, is formed at this second semiconductor layer, and this first electrode and this insulating barrier have a spacing.
2. photoelectric cell as claimed in claim 1, wherein this first electrode to this second semiconductor layer have one first height and this insulating barrier to this second semiconductor layer have one second height, and this first height with this second highly close or this first height with this second height difference be less than 1 μm.
3. photoelectric cell as claimed in claim 1, wherein also comprises the second electrode, be formed on this first electrode, and this second electrode covers this insulating barrier hardly.
4. photoelectric cell as claimed in claim 3, wherein also comprise third electrode, be formed at this first semiconductor layer, and wherein the top of this second electrode and the bottom of this first semiconductor layer have a beeline h1, and the bottom of the top of this third electrode and this first semiconductor layer has a beeline h2, and the difference of h1 and h2 is less than 1 μm.
5. photoelectric cell as claimed in claim 1, wherein this spacing is less than 3 μm.
6. manufacture a method for a photoelectric cell, comprise the following step:
There is provided semiconductor lamination, wherein this semiconductor laminatedly comprises one first semiconductor layer, and a luminescent layer is formed at this first semiconductor layer, and one second semiconductor layer is formed on this luminescent layer;
Etch this semiconductor laminated to expose this first semiconductor layer of part;
Form this semiconductor layer of an insulating barrier;
Form a photoresist oxidant layer on this insulating barrier;
By this this insulating barrier of photoresist oxidant layer etching part to expose this first semiconductor layer of part and this second semiconductor layer; And
Form one first electrode in this second semiconductor layer by this photoresist oxidant layer, and this first electrode and this insulating barrier have a spacing, wherein this first electrode also comprises a reflector.
7. method as claimed in claim 6, wherein this photoresist oxidant layer also comprises side to the etching of this insulating barrier and is etched with and defines this spacing.
8. method as claimed in claim 6, wherein this first electrode to this second semiconductor layer have one first height and this insulating barrier to this second semiconductor layer have one second height, and this first height with this second highly close or this first height with this second height difference be less than 1 μm.
9. method as claimed in claim 6, wherein also comprise formation one second electrode on this first electrode, and this second electrode covers this insulating barrier hardly.
10. method as claimed in claim 9, wherein also comprise formation one third electrode in this first semiconductor layer, and wherein the top of this second electrode and the bottom of this first semiconductor layer have a beeline h1, and the bottom of the top of this third electrode and this first semiconductor layer has a beeline h2, and the difference of h1 and h2 is less than 1 μm.
CN201410011326.4A 2014-01-10 2014-01-10 Photoelectric cell and its manufacturing method Active CN104779327B (en)

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