CN104730573A - Acquisition method and device for micro-seismic signals within large dynamic range - Google Patents

Acquisition method and device for micro-seismic signals within large dynamic range Download PDF

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CN104730573A
CN104730573A CN201510120663.1A CN201510120663A CN104730573A CN 104730573 A CN104730573 A CN 104730573A CN 201510120663 A CN201510120663 A CN 201510120663A CN 104730573 A CN104730573 A CN 104730573A
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signal
voltage
fpga
dynamic range
data
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CN104730573B (en
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张法全
李宗敏
王国富
叶金才
张海如
庞成
韦秦明
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LIUZHOU YUANCHUANG EFI TECHNOLOGY Co.,Ltd.
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Guilin University of Electronic Technology
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Abstract

The invention discloses an acquisition method and device for micro-seismic signals within the large dynamic range. The device comprises a signal processing part, an FPGA processing part, a power source part and an output part. The signal processing part is connected with the FPGA processing part and the power source part. The FPGA processing part is connected with the power source part and the output part. The method is suitable for acquiring the micro-seismic signals within the large dynamic range, the high resolution is acquired, the micro-seismic signals of different intensity degrees can be sampled without distortion, accuracy is high, stability is good, the dynamic range is large, and the method and device are suitable for acquiring the micro-seismic signals of different intensity degrees and have the high resolution for weak signals. For random and variable micro-seismic signals, a system can adjust the gains of an amplifier in time, and the signals can be acquired without distortion. The device is high in accuracy, good in stability and low in price.

Description

A kind of microseismic signals acquisition method of high dynamic range and equipment
Technical field
The present invention relates to micro seismic monitoring field, be specifically related to a kind of microseismic signals acquisition method and equipment of high dynamic range.
Background technology
Along with fast development that is economic and science and technology, microseismic detection technology is widely used in safety in production monitoring, and Microseismic monitoring system is ingredient indispensable in mining safety management.Microseismic detection system mainly utilizes the data analysis of microseismic detection, judges the geographic position that microseism occurs, and therefore the quality of microseismic detection system data acquisition directly affects the accuracy of monitoring.In Microseismic monitoring system, adopt microseism wave detector to pick up microseismic signals, and convert electric signal to.Due to the size of front end signal amplitude can not be pre-determined, so a suitable amplifier gain cannot be set, signal is amplified.Simultaneously microseismic signals also can along with various interference, even microseismic signals flood by the noise of surrounding environment.So the signal to noise ratio (S/N ratio) of the dynamic range and raising signal that how to improve signals collecting becomes the key issue of microseismic detection system.
At present, the dynamic range of collection and the usual method of sampling precision that improve microseismic signals have: (1) selects the A/D converter of seniority, but this device price is very expensive.(2) carry out logarithm operation to signal, namely compress the dynamic range of signal, then sample to signal, the shortcoming of this method reduces the precision of signals collecting.(3), by processing accordingly the data of sampling before, the gain of adjustment amplifier, but for signal changeable at random, this method is difficult to adapt to.
Summary of the invention
The object of the invention is for the deficiencies in the prior art, and a kind of microseismic signals acquisition method and equipment of high dynamic range are provided, the method is applicable to the microseismic signals collection of great dynamic range, there is higher resolution simultaneously, the microseismic signals different to power can carry out undistorted sampling, this equipment precision is high, good stability, cheap.
Realize the technical scheme of the object of the invention,
A microseismic signals acquisition method for high dynamic range, comprises the steps:
1) microseismic sensors is adopted the microseismic signals of machinery to be converted to the electric signal of simulation;
2) electric signal obtained is carried out preliminary amplification and filtering by pre-process circuit;
3) will compare through pretreated signal and voltage, determine the scope of signal amplitude;
4) enlargement factor of the code adjustment gain-controlled amplifier adopting voltage comparator to obtain, adjusts to applicable A/D sample range by signal;
5) signal to be sampled and original signal value is reduced;
6) filtering process is carried out to signal, the interference outside filter out-band, reduce the impact of noise, obtain high resolving power, high s/n ratio, the microseismic signals of high dynamic range.
Step 3) will compare through pretreated signal and known voltage, determine the scope of signal amplitude.Pretreated signal is divided into two-way, and a road input programmable amplifier, another road inputs the dual comparator circuit be made up of two comparers.Signal after filtering and amplifying circuit two paths of signals after taking absolute value is inputted by the end of oppisite phase of comparer, when the voltage of input signal is greater than the reference voltage of homophase, output terminal by output low level, otherwise, be then high level.Then the value obtained according to dual comparator circuit selects the enlargement factor of PGA (Programmable Gain Amplifier, programmable gain amplifier).Two comparers export 3 kinds of possible results:
Work as V i> V htime, namely after pre-service, the magnitude of voltage of signal, higher than the maximal value of reference voltage, exports as PC1=0, PC2=0.
Work as V h> V i> V ltime, namely after pre-service, the magnitude of voltage of signal, between two reference voltages, exports as PC1=0, PC2=1.
Work as V i< V ltime, namely after pre-service, the magnitude of voltage of signal is less than the minimum value of reference voltage, exports as PC1=1, PC2=1.Wherein, V ifor the absolute value voltage of input signal, V hthe maximal value of dual comparator circuit reference voltage, V lfor the minimum value of dual comparator circuit reference voltage, PC1, PC2 are low level and the high position of the output of twin voltage comparer.
Step 4) enlargement factor of code adjustment gain-controlled amplifier that obtains according to dual comparator circuit, signal is adjusted to applicable A/D sample range.The gain amplifier of programmable amplifier arranges regular as follows:
As PC1=0, PC2=0, because magnitude of voltage is now greater than two reference voltages, signal is stronger, in order to prevent the input range exceeding A/D, therefore the enlargement factor of programmable amplifier is selected to be 1 by FPGA (Field-Programmable Gate Array, field programmable gate array);
As PC1=0, PC2=1, because magnitude of voltage is now between two reference voltages, therefore the enlargement factor of programmable amplifier is selected to be 10 by FPGA;
As PC1=1, PC2=1, because magnitude of voltage is now less than two reference voltages, signal voltage is very faint, now selects the enlargement factor of programmable amplifier to be 100 by FPGA.
Step 5) signal is sampled and original signal value is reduced.A/D conversion is started after signal is amplified to applicable scope, because the data after A/D changes are serial data, so first serial data will be converted to parallel data, and each sampled value is the point after amplifying, so need to reduce to each sampled value.
The coding that data processor can be produced by comparator circuit to reduce to data gain.When collection is carried out, the enlargement factor of each sampling number certificate is that two binary codings reading comparator circuit generation by I/O mouth by FPGA control.Gain due to prime amplifier is setting in advance, so can carry out data gain reduction by data processor, namely
u i = u 0 A 1 A 2 - - - ( 1 )
Wherein, u ifor microseism original signal, u 0for the magnitude of voltage obtained of sampling, A 1for pregain, A 2for programmable amplifier gain.
Thus obtain the actual value of original signal.
Step 6) filtering process is carried out to signal, the interference outside filter out-band, reduce the impact of noise; The signal that data after A/D changes directly collect into microseismic sensors, these signals are in the process of simulation process end merely through active low-pass filter, filter effect is undesirable, in order to improve the precision that microseismic signals detects, reduce noise to the interference of system, needed to carry out a data filtering to data before input data buffer storage.When realizing by the fdatool instrument in Matlab to design the parameter of FIR filter, adopt parallel distributed pipeline organization to realize 16 rank low-pass filters.Full parellel FIR filter adopts multiple delay unit, and multiple multiplier and totalizer press parallel organization work, can improve the throughput of computing.
Length is that the cause and effect finite impulse response filter of M is described by transition function H (z):
H ( z ) = &Sigma; k = 0 M - 1 h ( k ) z - k - - - ( 2 )
A polynomial expression of its to be number of times be z-1 of M-1.In the time domain, the input/output relation of above-mentioned finite impulse response filter is:
y ( n ) = &Sigma; k = 0 M - 1 h ( k ) x ( n - k ) - - - ( 3 )
Wherein y (n) and x (n) exports and list entries, and h (k) is system function, and k is constant.
According to the feature of microseismic signals, the cutoff frequency of low-pass filter is set to 500Hz, sample frequency is 10KHz, intercepts with the Blackman window on 32 rank.Produce filter coefficient with fdatool design tool, then it is normalized, is quantified as the signed fixed-point number of 12.Utilize symmetry or the antisymmetry character of Linear Phase FIR Filter, the multiplier total amount needed for the Direct-type of transition function can being realized reduces half.
A microseismic signals collecting device for high dynamic range, is characterized in that, comprising:
Signal processing, carries out preliminary amplification, filtering, amplitude adjusted to electric signal, simulating signal is converted to digital signal;
FPGA processing section, in order to the input range making the amplitude of signal meet A/D, selects the enlargement factor of programmable amplifier by FPGA;
Power unit, power unit is that equipment is powered;
The data collected are transferred to PC by output, the convenient preservation to signal and process;
Signal processing is connected with FPGA processing section, power unit, and FPGA processing section is connected with power unit, output.
Described signal processing comprises prime pre-service, gain-programmed amplifier, frequency overlapped-resistable filter, A/D change-over circuit, absolute value circuit, dual comparator circuit, described prime pre-service is connected with gain-programmed amplifier, absolute value circuit, dual comparator circuit is connected with absolute value circuit, gain-programmed amplifier is connected with frequency overlapped-resistable filter, and frequency overlapped-resistable filter is connected with A/D change-over circuit;
Dual comparator circuit is connected with the FPGA processor of FPGA processing section, and A/D converter is connected with the FPGA processor of FPGA processing section.
Described FPGA processing section comprises FPGA processor, and FPGA processor is connected with the RS422 interface circuit of output.
Described power unit comprises one-level voltage stabilizer, second level voltage stabilizer, comparator voltage benchmark, reversal of poles, and one-level voltage stabilizer is connected with second level voltage stabilizer, and second level voltage stabilizer is connected with reversal of poles, comparator voltage benchmark;
Comparator voltage benchmark is connected with the dual comparator circuit of signal processing.
Described output comprises RS422 interface circuit, and RS422 interface circuit is connected with the FPGA processor of FPGA processing section.
During the work of microseism acquisition system, microseismic sensors (wave detector) converts electric signal to microseismic signals, realize the elementary amplification filtering of signal after the preposition instrument amplifier of high precision after, signal is divided into two-way, one road input gain programmable amplifier, another road input dual comparator circuit, FPGA carries out according to the coding that dual comparator circuit obtains the enlargement factor adjusting gain-controlled amplifier, signal is amplified to applicable A/D sample range, then A/D sample circuit is inputted, through data processor, the voltage of signal is reduced, then exported by RS422 interface circuit after filtering process being done to microseismic signals, host computer also by this interface signal and can send instruction.
The invention has the beneficial effects as follows:
The method is applicable to the microseismic signals collection of great dynamic range, there is higher resolution simultaneously, the microseismic signals different to power can carry out undistorted sampling, precision is high, good stability, compared with traditional microseism acquisition system, when the A/D sampling of identical figure place, there is higher sampling precision, thus reduce the requirement to expensive high-order A/D converter.
Dynamic range is large, and can be applicable to strong and weak different microseismic signals collections, for weak signal, the method also has very high resolution.
For microseismic signals changeable at random, system can adjust amplifier gain in time, makes the undistorted collection of signal energy.
This equipment precision is high, good stability, cheap.
Accompanying drawing explanation
Fig. 1 is high dynamically micro-seismic signal collection system block diagram.
In figure, 1. signal processing 2. power unit 3.FPGA processing section 4. output 1-1. prime pre-service 1-2. gain-programmed amplifier 1-3. frequency overlapped-resistable filter 1-4.A/D converter 1-5. absolute value circuit 1-6. dual comparator circuit 3-1.FPGA processor 2-1. power supply one-level voltage stabilizer 2-2. power supply second level voltage stabilizer 2-3. reversal of poles 2-4. comparator voltage benchmark 4-1.RS422 interface circuit.
Embodiment
Below in conjunction with embodiment and accompanying drawing, content of the present invention is further described, but is not limitation of the invention.
Embodiment:
A microseismic signals acquisition method for high dynamic range, comprises the steps:
1) microseismic sensors is adopted the microseismic signals of machinery to be converted to the electric signal of simulation;
2) electric signal obtained is carried out preliminary amplification and filtering by pre-process circuit;
3) will compare through pretreated signal and voltage, determine the scope of signal amplitude;
4) enlargement factor of the code adjustment gain-controlled amplifier adopting voltage comparator to obtain, adjusts to applicable A/D sample range by signal;
5) signal to be sampled and original signal value is reduced;
6) filtering process is carried out to signal, the interference outside filter out-band, reduce the impact of noise, obtain high resolving power, high s/n ratio, the microseismic signals of high dynamic range.
Step 3) will compare through pretreated signal and known voltage, determine the scope of signal amplitude.Pretreated signal is divided into two-way, and a road input programmable amplifier, another road inputs the dual comparator circuit be made up of two comparers.Signal after filtering and amplifying circuit two paths of signals after taking absolute value inputs by the end of oppisite phase of comparer, when the voltage of input signal is greater than the reference voltage of homophase, output terminal by output low level, otherwise, be then high level.Then the value obtained according to dual comparator circuit selects the enlargement factor of PGA (Programmable Gain Amplifier, programmable gain amplifier).Two comparers export 3 kinds of possible results:
Work as V i> V htime, namely after pre-service, the magnitude of voltage of signal, higher than the maximal value of reference voltage, exports as PC1=0, PC2=0;
Work as V h> V i> V ltime, namely after pre-service, the magnitude of voltage of signal, between two reference voltages, exports as PC1=0, PC2=1;
Work as V i< V ltime, namely after pre-service, the magnitude of voltage of signal is less than the minimum value of reference voltage, exports as PC1=1, PC2=1.
Wherein, V ifor the absolute value voltage of input signal, V hthe maximal value of dual comparator circuit reference voltage, V lfor the minimum value of dual comparator circuit reference voltage, PC1, PC2 are low level and the high position of the output of twin voltage comparer.
Step 4) enlargement factor of code adjustment gain-controlled amplifier that obtains according to dual comparator circuit, signal is adjusted to applicable A/D sample range.The gain amplifier of programmable amplifier arranges regular as follows:
As PC1=0, PC2=0, because magnitude of voltage is now greater than two reference voltages, signal is stronger, in order to prevent the input range exceeding A/D, therefore the enlargement factor of programmable amplifier is selected to be 1 by FPGA (Field-Programmable Gate Array, field programmable gate array);
As PC1=0, PC2=1, because magnitude of voltage is now between two reference voltages, therefore the enlargement factor of programmable amplifier is selected to be 10 by FPGA;
As PC1=1, PC2=1, because magnitude of voltage is now less than two reference voltages, signal voltage is very faint, now selects the enlargement factor of programmable amplifier to be 100 by FPGA.
Step 5) signal is sampled and original signal value is reduced.A/D conversion is started after signal is amplified to applicable scope, because the data after A/D changes are serial data, so first serial data will be converted to parallel data, and each sampled value is the point after amplifying, so need to reduce to each sampled value.
The coding that data processor can be produced by comparator circuit to reduce to data gain.When collection is carried out, the enlargement factor of each sampling number certificate is that two binary codings reading comparator circuit generation by I/O mouth by FPGA control.Gain due to prime amplifier is setting in advance, so can carry out data gain reduction by data processor, namely
u i = u 0 A 1 A 2 - - - ( 1 )
Wherein, u ifor microseism original signal, u 0for the magnitude of voltage obtained of sampling, A 1for pregain, A 2for programmable amplifier gain.
Thus obtain the actual value of original signal.
Step 6) filtering process is carried out to signal, the interference outside filter out-band, reduce the impact of noise; The signal that data after A/D changes directly collect into microseismic sensors, these signals are in the process of simulation process end merely through active low-pass filter, filter effect is undesirable, in order to improve the precision that microseismic signals detects, reduce noise to the interference of system, needed to carry out a data filtering to data before input data buffer storage.When realizing by the fdatool instrument in Matlab to design the parameter of FIR filter, adopt parallel distributed pipeline organization to realize 16 rank low-pass filters.Full parellel FIR filter adopts multiple delay unit, and multiple multiplier and totalizer press parallel organization work, can improve the throughput of computing.
Length is that the cause and effect finite impulse response filter of M is described by transition function H (z):
H ( z ) = &Sigma; k = 0 M - 1 h ( k ) z - k - - - ( 2 )
A polynomial expression of its to be number of times be z-1 of M-1.In the time domain, the input/output relation of above-mentioned finite impulse response filter is:
y ( n ) = &Sigma; k = 0 M - 1 h ( k ) x ( n - k ) - - - ( 3 )
Wherein y (n) and x (n) exports and list entries, and h (k) is system function, and k is constant.
According to the feature of microseismic signals, the cutoff frequency of low-pass filter is set to 500Hz, sample frequency is 10KHz, intercepts with the Blackman window on 32 rank.Produce filter coefficient with fdatool design tool, then it is normalized, is quantified as the signed fixed-point number of 12.Utilize symmetry (or antisymmetry) character of Linear Phase FIR Filter, the multiplier total amount needed for the Direct-type of transition function can being realized reduces half.
As shown in Figure 1, a kind of microseismic signals collecting device of high dynamic range, comprising:
Signal processing 1, carries out preliminary amplification, filtering, amplitude adjusted to electric signal, simulating signal is converted to digital signal;
FPGA processing section 3, in order to the input range making the amplitude of signal meet A/D, selects the enlargement factor of programmable amplifier by FPGA;
Power unit 2, power unit is that equipment is powered;
The data collected are transferred to PC by output 4, the convenient preservation to signal and process;
Signal processing 1 is connected with FPGA processing section 3, power unit 2, and FPGA processing section 3 is connected with power unit 2, output 4.
Described signal processing 1 comprises prime pre-service 1-1, gain-programmed amplifier 1-2, frequency overlapped-resistable filter 1-3, A/D change-over circuit 1-4, absolute value circuit 1-5, dual comparator circuit 1-6, described prime pre-service 1-1 is connected with gain-programmed amplifier 1-2, absolute value circuit 1-5, dual comparator circuit 1-6 is connected with absolute value circuit 1-5, gain-programmed amplifier 1-2 is connected with frequency overlapped-resistable filter 1-3, and frequency overlapped-resistable filter 1-3 is connected with A/D change-over circuit 1-4;
Dual comparator circuit 1-6 is connected with the FPGA processor 3-1 of FPGA processing section 3, and A/D converter 1-4 is connected with the FPGA processor 3-1 of FPGA processing section 3.
Described FPGA processing section 3 comprises FPGA processor 3-1, and FPGA processor 3-1 is connected with the RS422 interface circuit 4-1 of output 4.
Described power unit 2 comprises one-level voltage stabilizer 2-1, second level voltage stabilizer 2-2, comparator voltage benchmark 2-4, reversal of poles 2-3, one-level voltage stabilizer 2-1 is connected with second level voltage stabilizer 2-2, and second level voltage stabilizer 2-2 is connected with reversal of poles 2-3, comparator voltage benchmark 2-4;
Comparator voltage benchmark 2-4 is connected with the dual comparator circuit 1-6 of signal processing 1.
Described output 4 comprises RS422 interface circuit 4-1, and RS422 interface circuit 4-1 is connected with the FPGA processor 3-1 of FPGA processing section 3.
PC end is transferred data to, the convenient process to data and storage by RS422 interface circuit 4-1.FIFO is a kind of storage array of first in first out, is used in and needs to produce the part of data-interface, is used for storing, is buffered in data transmission between two asynchronous clocks.The data obtained after FIR filtering are carried out data buffer storage by fifo module, in case data frame losing, and fifo module is as the bridge of FIR filtration module and RS422 interface, the asserts signal that FIR filtration module has provided a frame data transmission without the need to RS422 interface carries out the computing of next frame data again, RS422 transmission also need not wait for that the asserts signal provided after FIR filtration module calculates frame data works again, substantially increases the efficiency of work like this.
The dual port RAM that three inner width are 8bit by configuring, the degree of depth is 1024 realizes the FIFO cache module that width is 24bit, total volume is 3KB.The data first write in FIFO first read, and read after the data then write.After system works, by the data after digital filtering first stored in FIFO, have data not for time empty when detecting in FIFO, the data that RS422 transport module can read in FIFO are transmitted, and suspend data transmission when data in FIFO are empty.

Claims (10)

1. a microseismic signals acquisition method for high dynamic range, is characterized in that, comprise the steps:
1) microseismic sensors is adopted the microseismic signals of machinery to be converted to the electric signal of simulation;
2) electric signal obtained is carried out preliminary amplification and filtering by pre-process circuit;
3) will compare through pretreated signal and voltage, determine the scope of signal amplitude;
4) enlargement factor of the code adjustment gain-controlled amplifier adopting voltage comparator to obtain, adjusts to applicable A/D sample range by signal;
5) signal to be sampled and original signal value is reduced;
6) filtering process is carried out to signal, the interference outside filter out-band, reduce the impact of noise, obtain high resolving power, high s/n ratio, the microseismic signals of high dynamic range.
2. the microseismic signals acquisition method of high dynamic range according to claim 1, it is characterized in that, step 3) in, to compare through pretreated signal and known voltage, determine the scope of signal amplitude, pretreated signal is divided into two-way, and a road input programmable amplifier, another road inputs the dual comparator circuit be made up of two comparers.Signal after filtering and amplifying circuit two paths of signals after taking absolute value inputs by the end of oppisite phase of comparer, when the voltage of input signal is greater than the reference voltage of homophase, output terminal is by output low level, otherwise, it is then high level, then the value obtained according to dual comparator circuit selects the enlargement factor of PGA, and two comparers export 3 kinds of possible results:
Work as V i> V htime, namely after pre-service, the magnitude of voltage of signal, higher than the maximal value of reference voltage, exports as PC1=0, PC2=0;
Work as V h> V i> V ltime, namely after pre-service, the magnitude of voltage of signal, between two reference voltages, exports as PC1=0, PC2=1;
Work as V i< V ltime, namely after pre-service, the magnitude of voltage of signal is less than the minimum value of reference voltage, exports as PC1=1, PC2=1;
Wherein, V ifor the absolute value voltage of input signal, V hthe maximal value of dual comparator circuit reference voltage, V lfor the minimum value of dual comparator circuit reference voltage, PC1, PC2 are low level and the high position of the output of twin voltage comparer.
3. the microseismic signals acquisition method of high dynamic range according to claim 1, it is characterized in that, step 4) in the enlargement factor of code adjustment gain-controlled amplifier that obtains according to dual comparator circuit, signal is adjusted to applicable A/D sample range, the gain amplifier of programmable amplifier arranges regular as follows:
As PC1=0, PC2=0, because magnitude of voltage is now greater than two reference voltages, signal is comparatively strong, in order to prevent the input range exceeding A/D, therefore selects the enlargement factor of programmable amplifier to be 1 by FPGA;
As PC1=0, PC2=1, because magnitude of voltage is now between two reference voltages, therefore the enlargement factor of programmable amplifier is selected to be 10 by FPGA;
As PC1=1, PC2=1, because magnitude of voltage is now less than two reference voltages, signal voltage is very faint, now selects the enlargement factor of programmable amplifier to be 100 by FPGA.
4. the microseismic signals acquisition method of high dynamic range according to claim 1, it is characterized in that, step 5) in signal is sampled and original signal value is reduced, A/D conversion is started after signal is amplified to applicable scope, because the data after A/D changes are serial data, so first serial data will be converted to parallel data, and each sampled value is the point after amplifying, so need to reduce to each sampled value;
The coding that data processor can be produced by comparator circuit comes data gain reduction, and when collection is carried out, the enlargement factor of each sampling number certificate is that two binary codings reading comparator circuit generation by I/O mouth by FPGA control.Gain due to prime amplifier is setting in advance, so can carry out data gain reduction by data processor, namely
u i = u 0 A 1 A 2 - - - ( 1 )
Wherein, u ifor microseism original signal, u 0for the magnitude of voltage obtained of sampling, A 1for pregain, A 2for programmable amplifier gain;
Thus obtain the actual value of original signal.
5. the microseismic signals acquisition method of high dynamic range according to claim 1, is characterized in that, step 6) in filtering process is carried out to signal, the interference outside filter out-band, reduce the impact of noise; The signal that data after A/D changes directly collect into microseismic sensors, these signals are in the process of simulation process end merely through active low-pass filter, filter effect is undesirable, in order to improve the precision that microseismic signals detects, reduce noise to the interference of system, needed to carry out a data filtering to data before input data buffer storage, when realizing by the fdatool instrument in Matlab to design the parameter of FIR filter, adopt parallel distributed pipeline organization to realize 16 rank low-pass filters.Full parellel FIR filter adopts multiple delay unit, and multiple multiplier and totalizer press parallel organization work, can improve the throughput of computing;
Length is that the cause and effect finite impulse response filter of M is described by transition function H (z):
H ( z ) = &Sigma; k = 0 M - 1 h ( k ) z - k - - - ( 2 )
A polynomial expression of its to be number of times be z-1 of M-1.In the time domain, the input/output relation of above-mentioned finite impulse response filter is:
y ( n ) = &Sigma; k = 0 M - 1 h ( k ) x ( n - k ) - - - ( 3 )
Wherein y (n) and x (n) exports and list entries, and h (k) is system function, and k is constant;
According to the feature of microseismic signals, the cutoff frequency of low-pass filter is set to 500Hz, sample frequency is 10KH, intercept with the Blackman window on 32 rank, produce filter coefficient with fdatool design tool, then it is normalized, is quantified as the signed fixed-point number of 12, utilize symmetry or the antisymmetry character of Linear Phase FIR Filter, the multiplier total amount needed for the Direct-type of transition function can being realized reduces half.
6. a microseismic signals collecting device for high dynamic range, is characterized in that, comprise
Signal processing, carries out preliminary amplification, filtering, amplitude adjusted to electric signal, simulating signal is converted to digital signal;
FPGA processing section, in order to the input range making the amplitude of signal meet A/D, selects the enlargement factor of programmable amplifier by FPGA;
Power unit, power unit is that equipment is powered;
The data collected are transferred to PC by output, the convenient preservation to signal and process;
Signal processing is connected with FPGA processing section, power unit, and FPGA processing section is connected with power unit, output.
7. the microseismic signals collecting device of high dynamic range according to claim 6, it is characterized in that, described signal processing comprises prime pre-service, gain-programmed amplifier, frequency overlapped-resistable filter, A/D change-over circuit, absolute value circuit, dual comparator circuit, described prime pre-service is connected with gain-programmed amplifier, absolute value circuit, dual comparator circuit is connected with absolute value circuit, and gain-programmed amplifier is connected with frequency overlapped-resistable filter, and frequency overlapped-resistable filter is connected with A/D change-over circuit;
Dual comparator circuit is connected with the FPGA processor of FPGA processing section, and frequency overlapped-resistable filter is connected with the FPGA processor of FPGA processing section, and A/D converter is connected with the FPGA processor of FPGA processing section.
8. the microseismic signals collecting device of high dynamic range according to claim 6, is characterized in that, described FPGA processing section comprises FPGA processor, and FPGA processor is connected with the RS422 interface circuit of output.
9. the microseismic signals collecting device of high dynamic range according to claim 6, it is characterized in that, described power unit comprises one-level voltage stabilizer, second level voltage stabilizer, comparator voltage benchmark, reversal of poles, one-level voltage stabilizer is connected with second level voltage stabilizer, and second level voltage stabilizer is connected with reversal of poles, comparator voltage benchmark;
Comparator voltage benchmark is connected with the dual comparator circuit of signal processing.
10. the microseismic signals collecting device of high dynamic range according to claim 6, is characterized in that, described output comprises RS422 interface circuit, and RS422 interface circuit is connected with the FPGA processor of FPGA processing section.
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Cited By (11)

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CN106448189A (en) * 2016-11-02 2017-02-22 南京慧尔视智能科技有限公司 Multilane speed measuring and block port triggering method and device based on microwaves
CN106646287A (en) * 2016-12-20 2017-05-10 中国科学院上海微系统与信息技术研究所 Trend elimination based large dynamic range data acquisition device and method
CN106646287B (en) * 2016-12-20 2019-02-26 中国科学院上海微系统与信息技术研究所 A kind of Larger Dynamic range data acquisition device and method based on trend elimination
CN106770660A (en) * 2017-01-20 2017-05-31 桂林电子科技大学 A kind of high-precision stress wave signal acquisition method and equipment
CN107066235B (en) * 2017-04-24 2021-05-14 北京华大信安科技有限公司 Calculation method and device
CN107066235A (en) * 2017-04-24 2017-08-18 北京华大信安科技有限公司 Computational methods and device
CN108111170A (en) * 2017-12-06 2018-06-01 电子科技大学 A kind of Larger Dynamic range signal harvester
CN111238632A (en) * 2020-01-15 2020-06-05 西安交通大学 High-precision vibration signal acquisition and processing system
CN111327328A (en) * 2020-03-04 2020-06-23 武汉中科牛津波谱技术有限公司 Nuclear magnetic resonance data acquisition method and system based on multiple ADCs
CN111327328B (en) * 2020-03-04 2023-05-09 武汉中科牛津波谱技术有限公司 Nuclear magnetic resonance data acquisition method and system based on multiple ADC
CN111638669A (en) * 2020-05-25 2020-09-08 上海海事大学 Signal acquisition system and acquisition method for abnormal monitoring signals
CN112327368A (en) * 2020-10-29 2021-02-05 电子科技大学 Ultra-deep metal pipeline buried depth detection equipment and use method thereof
CN112688687A (en) * 2020-12-09 2021-04-20 南方电网数字电网研究院有限公司 Method and device for acquiring physical information to be tested, computer equipment and storage medium
CN112902991A (en) * 2021-01-25 2021-06-04 上海兰宝传感科技股份有限公司 Electromagnetic coding measurement method with automatic gain adjustment function

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