CN104716204A

CN104716204A - Structure and manufacturing method of SONOS storage device

Info

Publication number: CN104716204A
Application number: CN201310689298.7A
Authority: CN
Inventors: 刘冬华; 钱文生; 石晶
Original assignee: Shanghai Huahong Grace Semiconductor Manufacturing Corp
Current assignee: Shanghai Huahong Grace Semiconductor Manufacturing Corp
Priority date: 2013-12-16
Filing date: 2013-12-16
Publication date: 2015-06-17

Abstract

The invention discloses a manufacturing method of an SONOS storage device. The method includes the steps that firstly, a bottom-layer oxidation film, silicon nitride, thin polycrystalline silicon and a top-layer oxidation film sequentially grow on a silicon substrate; secondly, a window is etched in the top-layer oxidation film; thirdly, a thin silicon oxide layer grows to form an erasure window; fourthly, control grid polycrystalline silicon is deposited; fifthly, a control grid and a grid isolation side wall are formed, light-doped source and drain injection and source and drain injection are conducted, and therefore the SONOS storage device is manufactured. The invention further discloses a structure of the SONOS storage device manufactured through the method. The erasure window is formed in the top-layer oxidation film of the SONOS storage device. A floating gate top oxidation layer is prepared through the polycrystalline silicon self-oxidation technology, so that information of the SONOS storage device is written in and erased from different oxidation layers of the bottom layer of a floating gate and the top layer of the floating gate, and therefore under the condition that the erasure speed of the device is not reduced, the reliability of repeated write-in and erasure operation of the device is improved.

Description

The structure of SONOS memory and manufacture method

Technical field

The present invention relates to IC manufacturing field, particularly relate to structure and the process implementation method thereof of SONOS memory.

Background technology

SONOS memory, owing to having the advantage such as high density, Large Copacity, has become one of current main flow flash type, has been widely used in the electronic product such as digital camera, smart mobile phone.

Along with the raising of SONOS memory span, the size of device is more and more less, and the electric charge stored inside floating grid is also fewer and feweri, adds the extensive use of MLC, requires more and more higher to the data boiling characteristics of SONOS memory.But traditional SONOS memory limits the further raising of its reliability in this respect in the methods of erasable operating aspect.

Traditional SONOS memory be by the FN tunnelling of channel region carry out erasing and HCI channel hot electron injection carry out information write.This mode of operation, electronics and hole be all by floating grid below tunnel oxide turnover floating boom, therefore between tunnel oxide and substrate, the interfacial state at interface can worsen rapidly, and after erasing write operation repeatedly, the data retention of SONOS storage component part can reduce greatly.

Meanwhile, one of shortcoming that FN tunnelling is erasable is that speed is slower.But possess high-octane feature because hot electron when information writes injects, in order to suppress the penalty of oxide layer in write operation process, it must keep certain thickness.Therefore, in order to reach the erasing speed of needs, voltage during information erasing cannot reduce, and this also makes tunnel oxide cannot alleviate its penalty by reducing operating voltage.

Summary of the invention

One of the technical problem to be solved in the present invention is to provide a kind of manufacture method of SONOS memory, and it under the condition not reducing erasable speed, can improve the reliability of SONOS memory.

For solving the problems of the technologies described above, the manufacture method of SONOS memory of the present invention, step comprises:

1) underlying oxide film, silicon nitride, thin polysilicon and top layer oxide-film is grown on a silicon substrate successively;

2) on top layer oxide-film, window is etched;

3) grow one deck thin silicon oxide, form erasing window;

4) deposit control gate polysilicon;

5) with common process etching formation control grid, then form gate isolation side wall, and carry out lightly-doped source leakage injection and source and drain injection, complete the making of SONOS memory.

Two of the technical problem to be solved in the present invention is to provide the structure of the SONOS memory manufactured with said method.This SONOS memory comprises underlying oxide film, silicon nitride, top layer oxide-film, control gate, grid curb wall, light dope source and drain and source and drain, described top layer oxide-film has an erasing window.

The present invention is by polysilicon autoxidation technology, prepare floating boom top oxide layer, the information of SONOS memory is write carry out respectively by the different oxide layers of floating boom bottom and top layer from erasing, thus under the condition of erasable speed not reducing device, improve the reliability of device write and erasing repeatable operation.

Accompanying drawing explanation

Fig. 1 is the structural representation of traditional SONOS memory.

Fig. 2 ~ Fig. 6 is the manufacturing process flow schematic diagram of the SONOS memory of the embodiment of the present invention.Wherein, Fig. 6 is again the structural representation of the SONOS memory that the embodiment of the present invention manufactures.

In figure, description of reference numerals is as follows:

1: silicon substrate

2: underlying oxide film (tunnel oxide)

3: silicon nitride (floating grid)

4: top layer oxide-film (barrier oxide layer)

5: erasing window

6: control gate polysilicon

7: light dope source and drain

8: gate isolation side wall

9: source and drain

10: polysilicon

Embodiment

Understand more specifically for having technology contents of the present invention, feature and effect, now by reference to the accompanying drawings, details are as follows:

The manufacture method of SONOS memory of the present invention, its concrete technology performing step is as follows:

Step 1, use conventional thermal oxidation technique, silicon substrate 1 grows the underlying oxide film 2 that a layer thickness is 90 ~ 180 Ethylmercurichlorendimides, then on underlying oxide film 2 successively deposition thickness be the silicon nitride 3 of 80 ~ 120 Ethylmercurichlorendimides, the thickness polysilicon 10 that is 30 ~ 50 Ethylmercurichlorendimides, the thickness top layer oxide-film 4 that is 40 ~ 100 Ethylmercurichlorendimides, as shown in Figure 2.

Step 2, top layer oxide-film 4 etches the wicket that is of a size of 0.1 ~ 0.2 micron, as shown in Figure 3.

Step 3, growth thickness is the silica of 60 ~ 80 Ethylmercurichlorendimides, as shown in Figure 4.This step growth of silicon oxide can consume that layer of thin polysilicon 10 above silicon nitride 3.Top layer oxide-film 4 becomes thicker along with the growth of silica, final thickness is 150 ~ 260 Ethylmercurichlorendimides.Silicon oxide thickness in wicket is 60 ~ 80 Ethylmercurichlorendimides, and this wicket is as erasing window 5.

Step 4, deposit control gate polysilicon 6, as shown in Figure 5.

Step 5, forms gate polysilicon electrode by common process etching, forms gate isolation side wall 8, carry out the injection of device N-type light dope source and drain and the injection of N-type source and drain, the final SONOS memory formed as shown in Figure 6.

In this SONOS memory, thick silicon nitride 3 is charge retention layer, as floating grid.Underlying oxide film 2 below silicon nitride 3 is electric charge tunnel layer, for realizing the write operation of information.Thickness 90 ~ 180 Ethylmercurichlorendimide of this layer of underlying oxide film 2, thicker than traditional structure, about the underlying oxide film thickness of traditional structure generally only has 70 Ethylmercurichlorendimides.The top layer oxide-film 4 at silicon nitride 3 top is electric charge barrier layer, for realizing the high speed erase operation of device.Top layer oxide-film 4 has erasing window 5.

The information write of this SONOS memory remains hot electron method for implanting, but method for deleting has then become unique gate electrode erasing.Device is in erasable operating process, and electronics enters floating boom respectively by bottom oxide layer, extracts floating boom by top layer oxide layer, so significantly reduces the damage suffered by bottom oxide layer.Meanwhile, because between control gate and channeled substrate, the integral thickness of dielectric layer is thinning, during gate electrode erasing, its operating voltage occurred needed for FN tunnelling can reduce.Both combine, and just reduce further the damage of SONOS storage component part suffered by the erasable process of information, thus improve the charge maintenance capability of SONOS storage component part, improve it and repeatedly wipe the reliability with data volatilization.

Claims

The manufacture method of 1.SONOS memory, is characterized in that, step comprises:

1) underlying oxide film, silicon nitride, thin polysilicon and top layer oxide-film is grown on a silicon substrate successively;

2) on top layer oxide-film, window is etched;

3) grow one deck thin silicon oxide, form erasing window;

4) deposit control gate polysilicon;

5) with common process etching formation control grid, then form gate isolation side wall, and carry out lightly-doped source leakage injection and source and drain injection, complete the making of SONOS memory.
2. method according to claim 1, is characterized in that, step 1), and the thickness of described underlying oxide film is 90 ~ 180 Ethylmercurichlorendimides.
3. method according to claim 1, is characterized in that, step 1), and the thickness of described silicon nitride is 80 ~ 120 Ethylmercurichlorendimides.
4. method according to claim 1, is characterized in that, step 1), and the thickness of described thin polysilicon is 30 ~ 50 Ethylmercurichlorendimides.
5. method according to claim 1, is characterized in that, step 1), and the thickness of described top layer oxide-film is 40 ~ 100 Ethylmercurichlorendimides.
6. method according to claim 1, is characterized in that, step 2), described window is of a size of 0.1 ~ 0.2 micron.
7. method according to claim 1, is characterized in that, step 3), and the thickness of described thin silicon oxide is 60 ~ 80 Ethylmercurichlorendimides.
The structure of 8.SONOS memory, comprises underlying oxide film, silicon nitride, top layer oxide-film, control gate, grid curb wall, light dope source and drain and source and drain, it is characterized in that, described top layer oxide-film has an erasing window.
9. structure according to claim 8, is characterized in that, the silicon oxide thickness at described erasing window place is 60 ~ 80 Ethylmercurichlorendimides.
10. structure according to claim 8 or claim 9, it is characterized in that, the thickness of described underlying oxide film is 90 ~ 180 Ethylmercurichlorendimides.