CN104703094B - Utter long and high-pitched sounds detection suppression system and its control method based on MAX262 and FPGA - Google Patents

Utter long and high-pitched sounds detection suppression system and its control method based on MAX262 and FPGA Download PDF

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CN104703094B
CN104703094B CN201410831312.7A CN201410831312A CN104703094B CN 104703094 B CN104703094 B CN 104703094B CN 201410831312 A CN201410831312 A CN 201410831312A CN 104703094 B CN104703094 B CN 104703094B
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pitched sounds
fpga
frequency
long
amplitude
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CN104703094A (en
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张秀再
陈彭鑫
吴华娟
赵益波
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Shanghai Xinhui Electronics Co ltd
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Nanjing University of Information Science and Technology
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Abstract

The invention discloses a kind of detection suppression system of uttering long and high-pitched sounds based on MAX262 and FPGA, including detection circuit, chauvent's criterion circuit and the relay switching circuit of uttering long and high-pitched sounds, described detection circuit of uttering long and high-pitched sounds includes frequency detecting part and amplitude detecting section, wherein frequency detecting part monitors the frequency of voice signal in real time, amplitude detecting section is used to detecting the amplitude of sound, chauvent's criterion circuit damage utter long and high-pitched sounds caused by amplitude conditions and phase condition.It is of the invention to be detected with traditional artificial utter long and high-pitched sounds compared with suppressing method, have the characteristics that full-automatic, be delayed short, small volume.

Description

Utter long and high-pitched sounds detection suppression system and its control method based on MAX262 and FPGA
Technical field
The present invention relates to a kind of automatic detection field, more particularly to a kind of detection of uttering long and high-pitched sounds based on MAX262 and FPGA suppresses System and its control method.
Background technology
In the sound reinforcement system of numerous microphone pickups, there is the possibility uttered long and high-pitched sounds, microphone, which is uttered long and high-pitched sounds, to be produced very to sound reinforcement system Big harm.Utter long and high-pitched sounds the self-oscillation of i.e. voice signal, the sound that loudspeaker plays is superimposed upon Mike again after barrier reflects On wind, microphone then will reflect back into the voice signal come and be played out again by loudspeaker, and the superposition so to go round and begin again will Ear-piercing shriek is produced, here it is the self-oscillation caused by voice signal positive feedback, is observed with oscillograph, the ripple of howling Shape is " frequency stabilization, the sine wave of amplitude stabilization ", and the distance of microphone and loudspeaker is nearer, and easier generation is uttered long and high-pitched sounds, and is maked a whistling sound The amplitude cried is also bigger.During self-oscillation, power amplifier can produce very big power output, may exceed holding for sound amplifier By scope, power amplifier and audible device are burnt out.
At present, the detection of uttering long and high-pitched sounds of domestic main flow is by sound console, balanced device and frequency shifter, by specialty with suppression approach Tuner is gradually increased volume and uttered long and high-pitched sounds a little to look for manually, is eliminated again by balanced device after finding.If sound reinforcement system is alliteration Road system, then need tuner first to close a passage, adjust uttering long and high-pitched sounds a little for another passage;What a after adjusting passage, close This passage, according to another passage of same method de-regulation;After both sides all mix up simultaneously, it is also necessary to boost by two passages Reexamine and whether also have others to utter long and high-pitched sounds a little, eliminated if having still through balanced device.
The content of the invention
The purpose of the present invention is suppressed to solve the above problems, providing a kind of detection of uttering long and high-pitched sounds based on MAX262 and FPGA System and its control method.
In order to achieve the above object, the present invention provides following technical scheme:A kind of inspection of uttering long and high-pitched sounds based on MAX262 and FPGA Suppression system is surveyed, including utter long and high-pitched sounds detection circuit, chauvent's criterion circuit and relay switching circuit, described detection circuit of uttering long and high-pitched sounds Including frequency detecting part and amplitude detecting section, wherein frequency detecting part monitors the frequency of voice signal in real time, and it is wrapped The output end for including LM339 comparators and FPGA, LM339 comparator is connected with FPGA, and described amplitude detecting section includes Peak detection chip AD637 and modulus conversion chip ADS1118, peak detection chip AD637 and modulus conversion chip ADS1118 is connected, and modulus conversion chip ADS1118 is connected with FPGA I/O mouths, and signal leads to after peak detection chip AD637 Cross modulus conversion chip ADS1118 and the analog voltage amount of output is converted into digital voltage amount, then digital voltage amount is given FPGA I/O mouths;Described chauvent's criterion circuit includes the double second order universal switch electric capacity active filter MAX262 of two CMOS, Respectively it is connected with FPGA, passes through plus 0.1 μ F capacitance, MAX262 after every MAX262 two filtering channel FPGA provides accurate external clock;Described relay switching circuit includes relay, triode S9013, wherein, three poles Pipe S9013 base stage connection FPGA I/O mouths, collector connection relay, grounded emitter.
The invention also discloses a kind of control method of the detection suppression system of uttering long and high-pitched sounds based on MAX262 and FPGA, including such as Lower step:
(1), signal is shaped as square wave by comparator.Particularly, waveform when uttering long and high-pitched sounds is shaped as dutycycle 50% square wave;
(2), FPGA counts the frequency that can obtain square wave or square wave within the set time to it;
(3), signal obtains the amplitude of voice signal by AD637 peak detection circuits;
(4), by FPGA by carrying out frequency detecting and amplitude detection to signal of uttering long and high-pitched sounds;
(5), whether Simultaneous Stabilization gets off for determination frequency and amplitude, if in shorter time period, frequency and amplitude are simultaneously steady Decide, then judge that generation is uttered long and high-pitched sounds;
(6), FPGA according to whether produce utter long and high-pitched sounds come control relay switching circuit switch over into without utter long and high-pitched sounds path or Chauvent's criterion circuit;
(7) if, relay switching circuit switch over into chauvent's criterion circuit, chauvent's criterion circuit is connected;
(8) for detection electric circuit inspection of, uttering long and high-pitched sounds to one " main utter long and high-pitched sounds Frequency point ", the Open loop gain cofficient of this Frequency point is maximum, Emerge at first;
(9) and then MAX262 first order filtering channel is configured to arrowband trapper by FPGA, and centre frequency is arranged to institute The master detected utters long and high-pitched sounds frequency, and by second and third, level Four filtering channel be configured to all-pass filter, i.e. phase shifter;
(10), suppressed master to utter long and high-pitched sounds after Frequency point, detection circuit of uttering long and high-pitched sounds continues to monitor whether " secondary frequency of uttering long and high-pitched sounds be present Point ", the Open loop gain cofficient of this Frequency point is smaller, does not emerge at first, if in the presence of enabling FPGA again, the second level is filtered Ripple passage is configured to narrow band filter, and centre frequency is arranged to detected secondary frequency of uttering long and high-pitched sounds;
(11), system continues to monitor whether the 3rd and the 4th Frequency point of uttering long and high-pitched sounds be present, come determine how configuration the 3rd, Four filtering channels.
As a modification of the present invention, whether described FPGA determination frequencies are stablized, and the method for use is:FPGA is to frequency Rate often samples 20 times, just finds out the maximum f of this 20 frequency valuesh, minimum value flWith round after mode fmode, i.e., at 20 times Time of measuring in, the frequency of voice signal is in [fl,fh] in the range of, if fh-fl< fe, and continue n bout, then meet " frequency stabilization feature " wherein feFor frequency jitter parameter, n is judgement delay of uttering long and high-pitched sounds, and is sampled as 1 bout 20 times.
As a modification of the present invention, described FPGA judges whether amplitude is stablized, and the method for use is:FPGA is to width Degree often samples 20 times, just finds out the maximum V of this 20 range valueshWith minimum value Vl, i.e., in the time of measuring of 20 times, sound The amplitude of signal is in [Vl,Vh] in the range of, if Vh-Vl< Ve, and continue n bout, then meet " amplitude stabilization feature ", wherein VeFor amplitude jitter parameter, n is judgement delay of uttering long and high-pitched sounds, and is sampled as 1 bout 20 times.
Beneficial effect:
Detection suppression system of uttering long and high-pitched sounds provided by the invention based on MAX262 and FPGA monitors voice signal frequency by FPGA Rate, AD637 monitoring voice signal amplitudes.When the result that amplitude-frequency detection is carried out to voice signal is " frequency stabilization and amplitude stabilization " When, then illustrate generation of now uttering long and high-pitched sounds.In addition, two panels programmable filter MAX262 built in system, 4 tunnels driving clock is provided by FPGA And MAX262 is configured to arrowband trapper and all-pass filter, destroy amplitude conditions and phase condition caused by uttering long and high-pitched sounds.Due to Utter long and high-pitched sounds Frequency point more than one, so system cooperates to reach the purpose that suppression utters long and high-pitched sounds using 4 grades " traps " and " all-pass ". The system is detected compared with suppressing method with traditional artificial utter long and high-pitched sounds, and has the characteristics that full-automatic, be delayed short, small volume.
Brief description of the drawings
Fig. 1 is the system access schematic diagram of the present invention;
The sound reinforcement system of Fig. 2 present invention, which is uttered long and high-pitched sounds, produces schematic diagram;
Fig. 3 is the waveform of uttering long and high-pitched sounds of the present invention;
Fig. 4 is the detection circuit of uttering long and high-pitched sounds of the present invention;
Fig. 5 is the chauvent's criterion circuit of the present invention;
Fig. 6 is the relay switching circuit of the present invention;
Fig. 7 main program flow charts;
Embodiment
Technical scheme provided by the invention is described in detail below with reference to specific embodiment, it should be understood that following specific Embodiment is only illustrative of the invention and is not intended to limit the scope of the invention.
A kind of detection suppression system of uttering long and high-pitched sounds based on MAX262 and FPGA of the present invention, including utter long and high-pitched sounds and detect circuit, utter long and high-pitched sounds Suppression circuit and relay switching circuit, as shown in figure 1, the present invention utter long and high-pitched sounds detection suppression system be arranged on pickup circuit with Between power amplifier, pickup circuit is connected with detection circuit of uttering long and high-pitched sounds, and detection circuit of uttering long and high-pitched sounds is connected with chauvent's criterion circuit, relay Device switching circuit is connected without utter long and high-pitched sounds path or howl by the adhesive of relay to control between pickup circuit and power amplifier It is suppression circuit.
Sound reinforcement system as shown in Figure 2, which is uttered long and high-pitched sounds, produces schematic diagram, and Producing reason of uttering long and high-pitched sounds, and waveform spy are analyzed according to Fig. 2 Sign.
Assuming that the relation between microphone reception signal x (n) and amplifier output signal y (n) is
Or it is expressed as in a frequency domain
In formula (2), N represents loudspeaker to the sum in microphone acoustic propagation path, aiRepresent declining for i-th acoustic propagation path Subtract, τiRepresent propagation path delay.The open-loop transfer function of sound reinforcement system is represented by
In formula (3), A is the gain of power amplifier.The open-loop gain that sound reinforcement system can be obtained by formula (3) is
Assuming that for the ω that some frequency is in audio signal0Frequency component has
ω0τi=2miπ (5)
In formula (5), miFor arbitrary integer.From formula (4), now open-loop gain is in ω0Frequency point reaches a peak value
And its phase
∠|H(jω0) |=0 (6b)
Then now sound reinforcement system meets ω0The self-oscillation of frequency, utters long and high-pitched sounds so as to produce.Formula (6a) is caused width of uttering long and high-pitched sounds Degree condition, formula (6b) are caused phase condition of uttering long and high-pitched sounds.
In addition, utter long and high-pitched sounds utters long and high-pitched sounds waveform as shown in figure 3, waveform of uttering long and high-pitched sounds is regular sine wave when producing by oscillograph observation, have Two features:1. frequency stabilization, frequency is relevant with public address system local environment, generally lies in the range of [1kHz, 5kHz];2. width Degree is stable, and amplitude can increase with microphone and furthering for loudspeaker distance.So uttered long and high-pitched sounds at that moment in firm generation, The waveform uttered long and high-pitched sounds is the regular sine wave of frequency stabilization and amplitude stabilization.Therefore, uttered long and high-pitched sounds to detect, can be by believing sound Number frequency detecting and amplitude detection are carried out, if in shorter time period, frequency and amplitude Simultaneous Stabilization get off, then judge to produce howl Cry.
The present invention Cleaning Principle of uttering long and high-pitched sounds be:Utter long and high-pitched sounds generation when, voice signal can be shaped as dutycycle by comparator For 50% square wave, FPGA counts the frequency that can obtain square wave within the set time to it;Meanwhile signal passes through AD637 peaks Value detection circuit can obtain the amplitude of voice signal.When whether determination frequency and amplitude settle out, " stabilization " this concept Criterion after quantization is as follows:
FPGA is often sampled 20 times to frequency, just finds out the maximum f of this 20 frequency valuesh, minimum value flWith round after crowd Number fmode, i.e., in the time of measuring of 20 times, the frequency of voice signal is in [fl,fh] in the range of.If fh-fl< fe, and continue n Individual bout (feFor frequency jitter parameter, n is judgement delay of uttering long and high-pitched sounds, and is sampled as 1 bout 20 times), then meet that " frequency stabilization is special Sign ";Meanwhile FPGA is often sampled 20 times to amplitude, the maximum V of this 20 range values is just found outhWith minimum value Vl, i.e., at 20 times Time of measuring in, the amplitude of voice signal is in [Vl,Vh] in the range of.If Vh-Vl< Ve, and continue n bout (VeFor amplitude Jitter parameter, n are judgement delay of uttering long and high-pitched sounds, and are sampled as 1 bout 20 times), then meet " amplitude stabilization feature ".The f of the systemeTake 200Hz, VeTakeN takes 10.If voice signal is provided simultaneously with frequecy characteristic and amplitude characteristic, system judges " voice signal becomes the sine wave of frequency stabilization and amplitude stabilization within the period of n bout ", that is, generation of uttering long and high-pitched sounds, utter long and high-pitched sounds Frequency is taken as the mode f of last bout samplingmode
The present invention chauvent's criterion principle be:Sound reinforcement system open-loop gain is reduced by arrowband trapper, that is, destroys and utters long and high-pitched sounds Caused amplitude conditions;Phase shift is introduced by all-pass filter, that is, destroys caused phase condition of uttering long and high-pitched sounds.Therefore, elimination is passed through Self-oscillatory two Production conditions can effectively suppress uttering long and high-pitched sounds for sound reinforcement system.
System carry out chauvent's criterion workflow be:First, utter long and high-pitched sounds and detect electric circuit inspection to " main a frequency of uttering long and high-pitched sounds Point " (Open loop gain cofficient of this Frequency point is maximum, therefore emerges at first), then FPGA matches somebody with somebody MAX262 first order filtering channel Be set to arrowband trapper, centre frequency is arranged to detected master and uttered long and high-pitched sounds frequency, and by second and third, level Four filtering channel matches somebody with somebody It is set to all-pass filter, i.e. phase shifter.Suppress master to utter long and high-pitched sounds after Frequency point, detection circuit of uttering long and high-pitched sounds continues to monitor whether exist " secondary Frequency point of uttering long and high-pitched sounds " (Open loop gain cofficient of this Frequency point is smaller, therefore does not emerge at first), if in the presence of enabling again FPGA, second level filtering channel is configured to narrow band filter, centre frequency is arranged to detected secondary frequency of uttering long and high-pitched sounds.Together Reason, system may proceed to monitor whether the 3rd and the 4th Frequency point of uttering long and high-pitched sounds be present, and lead to determine how to configure third and fourth and filter Road (default configuration is all-pass filter), the Open loop gain cofficient of these Frequency points of uttering long and high-pitched sounds is sequentially reduced, and volume of uttering long and high-pitched sounds is also successively Reduce.The port number of notch filter can not be very few, and otherwise chauvent's criterion is not thorough;Simultaneously can not be excessive, otherwise it can influence The quality of sound.It was verified that the phenomenon of uttering long and high-pitched sounds of public address system can not possibly be completely eliminated, it is only possible to farthest suppress, and When be suppressed to the fourth stage utter long and high-pitched sounds frequency when, human ear is difficult to recognize to utter long and high-pitched sounds and generated.Therefore the present invention is only with level Four filtering Passage.
The detection circuit of uttering long and high-pitched sounds of the present invention is as shown in figure 4, including frequency detecting and amplitude detection.Frequency detecting part by LM339 comparators and FPGA are completed, and can monitor the frequency of voice signal in real time.The audio signal of input is whole by comparator Shape is square wave, and FPGA counts to the rising edge of square wave, can calculate the frequency of square wave.In fact, when only uttering long and high-pitched sounds, Voice signal can just become the sine wave of frequency stabilization, shaped into the square wave that dutycycle is 50%, and now FPGA could be read Stable frequency values.LM339 output end open collectors, so the external 10k Ω of circuit pull-up resistor R2.Slide rheostat R1 Can be with adjusting threshold voltage.Voltage-stabiliser tube D5 vises comparator output level, is allowed to mutually compatible with FPGA TTL low and high levels.
Amplitude detecting section uses the RMS-DC peak detection chip AD637 of ADI companies, and its output voltage, which includes input, to be believed Number effective value information;The analog voltage amount of output is converted into counting using 16 modulus conversion chip ADS1118 of TI companies Word voltage, then the digital voltage amount comprising the effective value information of input audio signal is given to by SPI sequential FPGA I/O Mouth, the amplitude of voice signal can be calculated.
MAX262 is the double second order universal switch electric capacity active filters of the CMOS produced by MAXIM companies, by microprocessor Accurate control filter function, can be configured to low pass, high pass, with logical, trap and all-pass filter, and without external circuit, it is necessary to Program sets centre frequency f0, quality factor q and working method MODE, while need to ensure external clock frequency fclkTo filtering Device centre frequency f0Ratio precision be 1% (A levels), therefore system provides accurate external clock using FPGA, is fully able to Meet A class precision requirements.In addition, in order to improve ratio precision of the clock frequency to centre frequency, system fixed sampling frequency control Word FN=63 processed, i.e., be configured to maximum by the sampling frequency parameters of switching capacity.So, external clock frequency just obtains most Big variable range.If the quality factor of wave filter are Q, centre frequency f0, then MAX262 control word QN and required External clock frequency fclkIt can be calculated by formula (7) and formula (8).
QN=128-90.51/Q (7)
fclk=44.5 × π × f0 (8)
Negative bias can be introduced because signal passes through MAX262, therefore (every MAX262 contains two filters in four filtering channels Ripple passage) after respectively plus 0.1 μ F capacitance eliminating the negative bias of chip introducing.Chauvent's criterion circuit at most may be used Effectively suppress 4 Frequency points of uttering long and high-pitched sounds.If system is uttered long and high-pitched sounds, two Frequency points of uttering long and high-pitched sounds existing for detection circuit decision-making system are respectively 2kHz and 3kHz, then after switching to chauvent's criterion circuit by relay, 2 grades of program control filtering passages are arrowband trap before FPGA configurations Device, centre frequency are respectively 2kHz and 3kHz;It is simultaneously all-pass filter with 2 grades of program control filtering passages are postponed;Configuration words are by formula (7) gained is calculated.
Chauvent's criterion circuit is configured and provided to it by FPGA as shown in figure 5, circuit is made up of two panels MAX262 Variable driving clock.When system utter long and high-pitched sounds detection circuit judge utter long and high-pitched sounds generation when, FPGA at once control relay from Fig. 1 It is switched to " chauvent's criterion circuit " " without path of uttering long and high-pitched sounds ";When system without utter long and high-pitched sounds produce when, control relay switches back to " nothing to FPGA again Utter long and high-pitched sounds path ", relay switching circuit is as shown in fig. 6, label A~F is consistent with Fig. 1 in figure.
The relay switching circuit of the present invention, including relay, triode S9013 are illustrated in figure 6, wherein, triode S9013 base stage connection FPGA I/O mouths, collector connection relay, grounded emitter.
System uses the Cyclone IV EP4CE6F17C8N of ALTERA companies as main control chip, by building ALTER_ Soft core inside AVALON, is programmed using NIOS II implementation processs figure.NIOS II series embeded processors are that ALTERA is released The soft core embeded processor solution of the second generation.NIOS II processor cores are 32 bit processors, and it has shared Universal command structure set.
Logic circuit is built into the Nios II of soft core in QUARTUS II using SOPC Builder Processor、System ID Peripheral、Sdram Controller、EPCS Serial Flash Controller、 The modules such as JTAG UART and Parallel I/O, and by PLL by 50MHz clock frequencies frequency multiplication to 100MHz.Thus obtain One 32 soft core.System cooperates VHDL language and C language, realizes the programming requirement of sequential and flow.
Main program flow chart is as shown in fig. 7, system initializes FPGA I/O mouths, configuration ADS1118 first;Then FPGA The frequency and amplitude of reading current audio signals simultaneously judge whether that generation is uttered long and high-pitched sounds, and utter long and high-pitched sounds if having produced, are switched to by relay Chauvent's criterion circuit, and frequency is uttered long and high-pitched sounds to configure MAX262 control word according to what is read;Then proceed to monitor whether exist Other frequencies of uttering long and high-pitched sounds;Finally check whether to have eliminated and utter long and high-pitched sounds, if having eliminated, be switched to by relay without path of uttering long and high-pitched sounds;Journey Sequence finally returns to the frequency and amplitude for reading voice signal, and cycle detection is repeated.
Required equipment includes during the testing experiment of the present invention:RIGOL-DS2202A oscillographs;Programmable DC power supply DP832;AWG DG-4102,8 Ω pure resistances (cement power resistor);Sanwa microphones (full directing, it is sensitive Degree:-40±3dB);Cone formula loudspeaker (5W, 8 Ω);Pickup circuit is built using audio amplifier OPA2134;Power amplifier is adopted With TPA3112 modules.
The method of testing of the present invention is as follows:
1) one is tested:The public address set shown in Fig. 1 is built, changes microphone into AWG, loudspeaker changes 8 into Ω pure resistances, access whistle inhibition system.Audio-source uses 20mV sine waves, and resistance drop is as output signal, observation output Waveform whether distortion.
2) two are tested:The public address set shown in Fig. 1 is built, does not access whistle inhibition system, microphone and loudspeaker are initial Distance is 4.0 meters, and audio file is played with computer in microphone side.If without uttering long and high-pitched sounds generations, slowly further microphone with raise The distance between sound device, untill generation of uttering long and high-pitched sounds, now the distance between microphone and loudspeaker, this distance are referred to as measurement " critical distance of uttering long and high-pitched sounds ".
3) three are tested:The condition for testing two is changed to " access whistle inhibition system ", measured " critical distance of uttering long and high-pitched sounds ".
Known microphones and the distance of loudspeaker are nearer, easier to utter long and high-pitched sounds.From the experimental result in table 1, system Critical the distance between microphone and loudspeaker are reduced to 0.21 meter by 2.5 meters when uttering long and high-pitched sounds, therefore probability caused by uttering long and high-pitched sounds is significantly Reduce, and the sound fidelity and clear during chauvent's criterion.In practical application, the distance of microphone and loudspeaker is not in 0.21 meter so near, so the whistle inhibition system is fully applicable in live public address system.
Table 1
Technological means disclosed in the present invention program is not limited only to the technological means disclosed in above-mentioned embodiment, in addition to Formed technical scheme is combined by above technical characteristic.

Claims (4)

1. it is a kind of based on MAX262 and FPGA uttering long and high-pitched sounds detection suppression system, including utter long and high-pitched sounds detection circuit, chauvent's criterion circuit with And relay switching circuit, it is characterised in that:Described detection circuit of uttering long and high-pitched sounds includes frequency detecting part and amplitude detection portion Point, wherein frequency detecting part monitors the frequency of voice signal in real time, and it includes LM339 comparators and FPGA, LM339 compare The output end of the external 10k Ω of device pull-up resistor R2, LM339 comparator is connected with FPGA, described amplitude detecting section bag Include peak detection chip AD637 and modulus conversion chip ADS1118, peak detection chip AD637 and modulus conversion chip ADS1118 is connected, and modulus conversion chip ADS1118 is connected with FPGA I/O mouths, and signal leads to after peak detection chip AD637 Cross modulus conversion chip ADS1118 and the analog voltage amount of output is converted into digital voltage amount, then digital voltage amount is given FPGA I/O mouths;Described chauvent's criterion circuit includes the double second order universal switch electric capacity active filter MAX262 of two CMOS, Respectively it is connected with FPGA, passes through plus 0.1 μ F capacitance, MAX262 after every MAX262 two filtering channel FPGA provides accurate external clock;Described relay switching circuit includes relay, triode S9013, wherein, three poles Pipe S9013 base stage connection FPGA I/O mouths, collector connection relay, grounded emitter.
2. a kind of control method of the detection suppression system of uttering long and high-pitched sounds based on MAX262 and FPGA, it is characterised in that including following step Suddenly:
(1), signal is shaped as square wave by comparator, and waveform when uttering long and high-pitched sounds is shaped as the square wave that dutycycle is 50%;
(2), FPGA counts the frequency that can obtain square wave or square wave within the set time to it;
(3), signal obtains the amplitude of voice signal by AD637 peak detection circuits;
(4), by FPGA by carrying out frequency detecting and amplitude detection to signal of uttering long and high-pitched sounds;
(5), whether Simultaneous Stabilization gets off for determination frequency and amplitude, if in shorter time period, under frequency and amplitude Simultaneous Stabilization Come, then judge that generation is uttered long and high-pitched sounds;
(6), FPGA path or utters long and high-pitched sounds according to whether producing control relay switching circuit of uttering long and high-pitched sounds and switching over into without uttering long and high-pitched sounds Suppression circuit;
(7) if, relay switching circuit switch over into chauvent's criterion circuit, chauvent's criterion circuit is connected;
(8) detection electric circuit inspection of, uttering long and high-pitched sounds is to one " main Frequency point of uttering long and high-pitched sounds ", and the Open loop gain cofficient of this Frequency point is maximum, at first Emerge;
(9) and then MAX262 first order filtering channel is configured to arrowband trapper by FPGA, and centre frequency is arranged to be detected To master utter long and high-pitched sounds frequency, and by second and third, level Four filtering channel be configured to all-pass filter, i.e. phase shifter;
(10), having suppressed master to utter long and high-pitched sounds after Frequency point, detection circuit of uttering long and high-pitched sounds continues to monitor whether " secondary Frequency point of uttering long and high-pitched sounds " be present, this The Open loop gain cofficient of Frequency point is smaller, does not emerge at first, if in the presence of FPGA being enabled again, by second level filtering channel Narrow band filter is configured to, centre frequency is arranged to detected secondary frequency of uttering long and high-pitched sounds;
(11), system continues to monitor whether the 3rd and the 4th Frequency point of uttering long and high-pitched sounds be present, and to determine how configuration, third and fourth is filtered Ripple passage.
3. a kind of control method of detection suppression system of uttering long and high-pitched sounds based on MAX262 and FPGA according to claim 2, its It is characterised by:Whether described FPGA determination frequencies are stablized, and the method for use is:FPGA is often sampled 20 times to frequency, is just found out The maximum f of this 20 frequency valuesh, minimum value flWith round after mode fmode, i.e., in the time of measuring of 20 times, sound letter Number frequency be in [fl,fh] in the range of, if fh-fl< fe, and continue n bout, then meet " frequency stabilization feature " wherein fe For frequency jitter parameter, n is judgement delay of uttering long and high-pitched sounds, and is sampled as 1 bout 20 times.
4. a kind of control method of detection suppression system of uttering long and high-pitched sounds based on MAX262 and FPGA according to claim 2, its It is characterised by:Described FPGA judges whether amplitude is stablized, and the method for use is:FPGA is often sampled 20 times to amplitude, is just found out The maximum V of this 20 range valueshWith minimum value Vl, i.e., in the time of measuring of 20 times, the amplitude of voice signal is in [Vl, Vh] in the range of, if Vh-Vl< Ve, and continue n bout, then meet " amplitude stabilization feature ", wherein VeFor amplitude jitter parameter, n Judge delay to utter long and high-pitched sounds, be sampled as 1 bout 20 times.
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