CN204334931U - Suppression system is detected based on uttering long and high-pitched sounds of MAX262 and FPGA - Google Patents

Abstract

The utility model discloses a kind of detection suppression system of uttering long and high-pitched sounds based on MAX262 and FPGA, comprise testing circuit of uttering long and high-pitched sounds, chauvent's criterion circuit and relay commutation circuit, described testing circuit of uttering long and high-pitched sounds comprises frequency detecting part and amplitude detecting section, the wherein frequency of frequency detecting part Real-Time Monitoring voice signal, amplitude detecting section for detecting the amplitude of sound, chauvent's criterion circuit damage utter long and high-pitched sounds produce amplitude conditions and phase condition.The utility model detects compared with suppressing method with traditional manually uttering long and high-pitched sounds, and has the features such as full-automatic, time delay is short, volume is little.

Description

Suppression system is detected based on uttering long and high-pitched sounds of MAX262 and FPGA

Technical field

The utility model relates to a kind of detection field automatically, particularly a kind of detection suppression system of uttering long and high-pitched sounds based on MAX262 and FPGA.

Background technology

In the sound reinforcement system of numerous microphone pickup, have the possibility of uttering long and high-pitched sounds, microphone is uttered long and high-pitched sounds and can be produced very large harm to sound reinforcement system.To utter long and high-pitched sounds the self-oscillation of i.e. voice signal, the sound that loud speaker is play is superimposed upon again on microphone after barrier reflection, the voice signal reflected then is played out by loud speaker by microphone again, the superposition gone round and begun again so just can produce ear-piercing shriek, the self-oscillation that voice signal positive feedback that Here it is causes, observe with oscilloscope, the waveform of howling is " frequency stabilization; the sine wave of amplitude stabilization ", and the distance of microphone and loud speaker is nearer, more easily produce and utter long and high-pitched sounds, the amplitude of uttering long and high-pitched sounds is also larger.During self-oscillation, power amplifier can produce very large power stage, may exceed the tolerance range of sound amplifier, burns out power amplifier and audible device.

At present, the detection of uttering long and high-pitched sounds of domestic main flow is by sound console, equalizer and frequency shifter with suppression approach, is looked for and utters long and high-pitched sounds a little, eliminated after finding by equalizer again by the manual VOLUME UP gradually of the tuner of specialty.If sound reinforcement system is two-channel system, then need tuner first to close a passage, what regulate another passage utters long and high-pitched sounds a little; After adjusting what a passage, close this passage, go to regulate another passage according to same method; After both sides all mix up, also need two passages to boost to reexamine whether also have uttering long and high-pitched sounds a little of other simultaneously, if having, still eliminated by equalizer.

Utility model content

The purpose of this utility model is for solving the problem, and provides a kind of detection suppression system of uttering long and high-pitched sounds based on MAX262 and FPGA.

In order to achieve the above object, the utility model provides following technical scheme: a kind of detection suppression system of uttering long and high-pitched sounds based on MAX262 and FPGA, comprise testing circuit of uttering long and high-pitched sounds, chauvent's criterion circuit and relay commutation circuit, described testing circuit of uttering long and high-pitched sounds comprises frequency detecting part and amplitude detecting section, the wherein frequency of frequency detecting part Real-Time Monitoring voice signal, it comprises LM339 comparator and FPGA, the output of LM339 comparator is connected with FPGA, described amplitude detecting section comprises peak detection chip AD637 and modulus conversion chip ADS1118, peak detection chip AD637 is connected with modulus conversion chip ADS1118, the I/O mouth of modulus conversion chip ADS1118 and FPGA is connected, signal converts the analog voltage amount of output to digital voltage amount by modulus conversion chip ADS1118 after peak detection chip AD637, again digital voltage amount is given the I/O mouth of FPGA, described chauvent's criterion circuit comprises the two second order universal switch electric capacity active filter MAX262 of two CMOS, the capacitance of a 0.1 μ F is added after two filtering channels of every sheet MAX262, MAX262 and FPGA is connected, and provides accurate external clock by FPGA, described relay commutation circuit comprises relay, triode S9013, and wherein, the base stage of triode S9013 connects the I/O mouth of FPGA, collector connection relay, grounded emitter.

Beneficial effect:

The detection suppression system of uttering long and high-pitched sounds based on MAX262 and FPGA that the utility model provides monitors sound signal frequencies by FPGA, and AD637 monitors voice signal amplitude.When the result of voice signal being carried out to amplitude-frequency detection is for " frequency stabilization and amplitude stabilization ", then generation of now uttering long and high-pitched sounds is described.In addition, system built-in two panels programmable filter MAX262, provides 4 roads drive clock and MAX262 is configured to arrowband trapper and all-pass filter by FPGA, destroys the amplitude conditions and phase condition of uttering long and high-pitched sounds and producing.Due to more than one of Frequency point of uttering long and high-pitched sounds, so system adopts 4 grades " traps " and " all-pass " to cooperatively interact to reach the object suppressing to utter long and high-pitched sounds.This system detects compared with suppressing method with traditional manually uttering long and high-pitched sounds, and has the features such as full-automatic, time delay is short, volume is little.

Accompanying drawing explanation

Fig. 1 is system access schematic diagram of the present utility model;

Fig. 2 sound reinforcement system of the present utility model is uttered long and high-pitched sounds generation schematic diagram;

Fig. 3 is waveform of uttering long and high-pitched sounds of the present utility model;

Fig. 4 is testing circuit of uttering long and high-pitched sounds of the present utility model;

Fig. 5 is chauvent's criterion circuit of the present utility model;

Fig. 6 is relay commutation circuit of the present utility model;

Fig. 7 main program flow chart;

Embodiment

Below with reference to specific embodiment, the technical scheme that the utility model provides is described in detail, following embodiment should be understood and be only not used in restriction scope of the present utility model for illustration of the utility model.

A kind of detection suppression system of uttering long and high-pitched sounds based on MAX262 and FPGA of the present utility model, comprise testing circuit of uttering long and high-pitched sounds, chauvent's criterion circuit and relay commutation circuit, as shown in Figure 1, of the present utility model uttering long and high-pitched sounds detects suppression Operation system setting between pickup circuit and power amplifier, pickup circuit is connected with testing circuit of uttering long and high-pitched sounds, testing circuit of uttering long and high-pitched sounds is connected with chauvent's criterion circuit, and relay commutation circuit is controlled pickup circuit by the adhesive of relay and is connected between power amplifier without uttering long and high-pitched sounds path or chauvent's criterion circuit.

Sound reinforcement system is uttered long and high-pitched sounds generation schematic diagram as shown in Figure 2, analyzes according to Fig. 2 Producing reason of uttering long and high-pitched sounds, and wave character.

Suppose that the pass between microphones signal x (n) and amplifier output signal y (n) is

$x\left(n\right)=\underset{i=0}{\overset{N-1}{\mathrm{\Σ}}}{a}_{i}y(n-{\mathrm{\τ}}_i)---\left(1\right)$

Or be expressed as in a frequency domain

$X\left(\mathrm{j\ω}\right)=Y\left(\mathrm{j\ω}\right)\underset{i=0}{\overset{N-1}{\mathrm{\Σ}}}{a}_i{e}^{-\mathrm{j\ω}{\mathrm{\τ}}_i}---\left(2\right)$

In formula (2), N represents the sum of loud speaker to microphone acoustic propagation path, a _irepresent the decay in i-th acoustic propagation path, τ _irepresent propagation path delay.The open-loop transfer function of sound reinforcement system can be expressed as

$H\left(\mathrm{j\ω}\right)=A\underset{i=0}{\overset{N-1}{\mathrm{\Σ}}}{a}_i{e}^{-\mathrm{j\ω}{\mathrm{\τ}}_i}---\left(3\right)$

In formula (3), A is the gain of power amplifier.The open-loop gain that can be obtained sound reinforcement system by formula (3) is

$\left|H\left(\mathrm{j\ω}\right)\right|=\left|A\underset{i=0}{\overset{N-1}{\mathrm{\Σ}}}{a}_i{e}^{-\mathrm{j\ω}{\mathrm{\τ}}_i}\right|\≤A\underset{i=0}{\overset{N-1}{\mathrm{\Σ}}}\left|a_i{e}^{-\mathrm{j\ω}{\mathrm{\τ}}_i}\right|---\left(4\right)$

Suppose the ω being for certain frequency in audio signal ₀frequency component has

ω ₀τ _i＝2m _iπ (5)

In formula (5), m _ifor arbitrary integer.From formula (4), now open-loop gain is at ω ₀frequency point reaches a peak value

$\left|H\left(j{\mathrm{\ω}}_0\right)\right|=A\underset{i=0}{\overset{N-1}{\mathrm{\Σ}}}{a}_i>1---\left(6a\right)$

And its phase place

∠|H(jω ₀)|＝0 (6b)

Then now sound reinforcement system meets ω ₀the self-oscillation of frequency, thus generation is uttered long and high-pitched sounds.Formula (6a) is the amplitude conditions produced of uttering long and high-pitched sounds, and formula (6b) is the phase condition produced of uttering long and high-pitched sounds.

In addition, utter long and high-pitched sounds when producing and utter long and high-pitched sounds waveform as shown in Figure 3 by oscilloscope observation, waveform of uttering long and high-pitched sounds is regular sine wave, and have two features: 1. frequency stabilization, frequency is relevant with environment residing for public address system, is generally in [1kHz, 5kHz] scope; 2. amplitude stabilization, amplitude can increase along with microphone and furthering of loudspeaker distance.So produce just and utter long and high-pitched sounds at that moment, the waveform of uttering long and high-pitched sounds is the regular sine wave of frequency stabilization and amplitude stabilization.Therefore, utter long and high-pitched sounds to detect, can by carrying out frequency detecting and amplitude detection to voice signal, if in short period section, frequency and amplitude Simultaneous Stabilization get off, then judge that generation is uttered long and high-pitched sounds.

Cleaning Principle of uttering long and high-pitched sounds of the present utility model is: utter long and high-pitched sounds when producing, voice signal can be shaped as by comparator the square wave that duty ratio is 50%, and FPGA just can the side's of obtaining wave frequency to its counting within the set time; Meanwhile, signal can obtain the amplitude of voice signal by AD637 peak detection circuit.When whether determination frequency and amplitude settle out, the criterion after " stablizing " this concept quantizes is as follows:

FPGA often samples 20 times to frequency, just finds out the maximum f of these 20 frequency values _h, minimum value f _lwith round after mode f _mode, namely in the Measuring Time of 20 times, the frequency of voice signal is in [f _l, f _h] in scope.If f _h-f _l< f _e, and continue n bout (f _efor frequency jitter parameter, n is judgement time delay of uttering long and high-pitched sounds, and is sampled as 1 bout 20 times), then meet " frequency stabilization feature "; Meanwhile, FPGA often samples 20 times to amplitude, just finds out the maximum V of these 20 range values _hwith minimum value V _l, namely in the Measuring Time of 20 times, the amplitude of voice signal is in [V _l, V _h] in scope.If V _h-V _l< V _e, and continue n bout (V _efor amplitude jitter parameter, n is judgement time delay of uttering long and high-pitched sounds, and is sampled as 1 bout 20 times), then meet " amplitude stabilization feature ".The f of native system _eget 200Hz, V _eget n gets 10.If voice signal possesses frequecy characteristic and amplitude characteristic simultaneously, then system judges " voice signal, within the time period of n bout, becomes frequency stabilization and the sine wave of amplitude stabilization ", generation of namely uttering long and high-pitched sounds, and frequency of uttering long and high-pitched sounds is taken as the mode f of last bout sampling _mode.

Chauvent's criterion principle of the present utility model is: reduce sound reinforcement system open-loop gain by arrowband trapper, namely destroys the amplitude conditions of uttering long and high-pitched sounds and producing; Introduce phase shift by all-pass filter, namely destroy the phase condition of uttering long and high-pitched sounds and producing.Therefore, uttering long and high-pitched sounds of sound reinforcement system can effectively be suppressed by eliminating self-oscillatory two Production conditions.

The workflow that system carries out chauvent's criterion is: first, testing circuit of uttering long and high-pitched sounds detects one " main Frequency point of uttering long and high-pitched sounds ", and (Open loop gain cofficient of this Frequency point is maximum, therefore appear in one's mind at first), then the first order filtering channel of MAX262 is configured to arrowband trapper by FPGA, centre frequency is set to detected master and utters long and high-pitched sounds frequency, and by second and third, level Four filtering channel is configured to all-pass filter, i.e. phase shifter.Master has been suppressed to utter long and high-pitched sounds after Frequency point, whether testing circuit of uttering long and high-pitched sounds continuation monitoring exists " secondary Frequency point of uttering long and high-pitched sounds ", and (Open loop gain cofficient of this Frequency point is less, therefore do not appear in one's mind at first), if exist, then again enable FPGA, second level filtering channel is configured to narrow band filter, and centre frequency is set to detected secondary frequency of uttering long and high-pitched sounds.In like manner, system can continue monitoring and whether there is the 3rd and the 4th Frequency point of uttering long and high-pitched sounds, determine how to configure third and fourth filtering channel (default configuration is all-pass filter), the Open loop gain cofficient of these Frequency points of uttering long and high-pitched sounds reduces successively, and volume of uttering long and high-pitched sounds also reduces successively.The port number of notch filter can not be very few, otherwise chauvent's criterion is not thorough; Simultaneously can not be too much, otherwise the quality of sound can be affected.Facts have proved, the phenomenon of uttering long and high-pitched sounds of public address system can not be eliminated completely, only may farthest suppress, and when be suppressed to the fourth stage utter long and high-pitched sounds frequency time, people's ear is just difficult to that having recognized utters long and high-pitched sounds creates.Therefore the utility model only have employed level Four filtering channel.

Of the present utility modelly utter long and high-pitched sounds testing circuit as shown in Figure 4, comprise frequency detecting and amplitude detection.Frequency detecting part has been come by LM339 comparator and FPGA, can the frequency of Real-Time Monitoring voice signal.The audio signal of input is shaped as square wave by comparator, and FPGA counts the rising edge of square wave, just can calculate rectangle wave frequency.In fact, when only uttering long and high-pitched sounds, voice signal just can become the sine wave of frequency stabilization, and through being shaped to the square wave that duty ratio is 50%, now FPGA could read stable frequency values.LM339 output open collector, so the pull-up resistor R2 of the external 10k Ω of circuit.Slide rheostat R1 can adjusting threshold voltage.Voltage-stabiliser tube D5 vises comparator output level, makes it mutually compatible with the TTL low and high level of FPGA.

Amplitude detecting section uses the RMS-DC peak detection chip AD637 of ADI company, and its output voltage comprises the effective value information of input signal; 16 modulus conversion chip ADS1118 of TI company are used to convert the analog voltage amount of output to digital voltage amount, by SPI sequential, the digital voltage amount comprising input audio signal effective value information is given the I/O mouth of FPGA again, just can calculate the amplitude of voice signal.

MAX262 is the two second order universal switch electric capacity active filter of CMOS produced by MAXIM company, accurately filter function is controlled by microprocessor, can be configured to that low pass, high pass, with are logical, trap and all-pass filter, and without the need to external circuit, need programming centre frequency f ₀, quality factor q and working method MODE, need to ensure external clock frequency f simultaneously _clkto filter centre frequency f ₀ratio precision be 1% (A level), therefore system adopt FPGA accurate external clock is provided, the requirement of A class precision can be met completely.In addition, in order to improve the ratio precision of clock frequency to centre frequency, system fixed sampling frequency control word FN=63, the sampling frequency parameters by switching capacity is configured to maximum.Like this, external clock frequency just obtains maximum variable range.If the quality factor of filter are Q, centre frequency is f ₀, then the control word QN of MAX262 and required external clock frequency f _clkcan be calculated by formula (7) and formula (8).

QN＝128-90.51/Q (7)

f _clk＝44.5×π×f ₀(8)

Because signal can introduce negative bias through MAX262, therefore after four filtering channels (every sheet MAX262 contains two filtering channels), add the negative bias that the capacitance of a 0.1 μ F is introduced in order to eliminate chip.Chauvent's criterion circuit effectively can suppress 4 Frequency points of uttering long and high-pitched sounds at most.Two Frequency points of uttering long and high-pitched sounds that testing circuit decision-making system exists if system is uttered long and high-pitched sounds are 2kHz and 3kHz respectively, then, after switching to chauvent's criterion circuit by relay, it is arrowband trapper that FPGA configures front 2 grades of program control filtering passages, and centre frequency is respectively 2kHz and 3kHz; Configure rear 2 grades of program control filtering passages is all-pass filter simultaneously; Configuration words calculates gained by formula (7).

As shown in Figure 5, circuit is made up of two panels MAX262 chauvent's criterion circuit, to be configured and to provide variable driving clock by FPGA to it.When the testing circuit of uttering long and high-pitched sounds of system judges to utter long and high-pitched sounds generation, FPGA at once control relay is switched to " chauvent's criterion circuit " from " without uttering long and high-pitched sounds path " Fig. 1; When system produces without uttering long and high-pitched sounds, FPGA again control relay switches back to " without uttering long and high-pitched sounds path ", and as shown in Figure 6, number in the figure A ~ F is all consistent with Fig. 1 for relay commutation circuit.

Be illustrated in figure 6 relay commutation circuit of the present utility model, comprise relay, triode S9013, wherein, the base stage of triode S9013 connects the I/O mouth of FPGA, collector connection relay, grounded emitter.

System adopts the Cyclone IV EP4CE6F17C8N of ALTERA company to be main control chip, by building the inner soft core of ALTER_AVALON, utilizes NIOS II realization flow figure to programme.NIOS II series flush bonding processor is the second generation soft core flush bonding processor solution that ALTERA releases.NIOS II processor cores is 32 bit processors, and it has shared universal command structure set.

In QUARTUS II, utilize SOPC Builder logical circuit to be built into Nios II Processor, the System ID Peripheral of soft core, Sdram Controller, the module such as EPCS Serial Flash Controller, JTAG UART and Parallel I/O, and by PLL by 50MHz clock frequency frequency multiplication to 100MHz.So just obtain 32 soft cores.VHDL language and C language cooperate by system, realize the programming requirement of sequential and flow process.

Main program flow chart as shown in Figure 7, the I/O mouth of system first initialization FPGA, configuration ADS1118; Then read the frequency of current audio signals and amplitude and judge whether that generation is uttered long and high-pitched sounds, uttering long and high-pitched sounds if produced, be then switched to chauvent's criterion circuit by relay, and configure the control word of MAX262 according to read frequency of uttering long and high-pitched sounds; Then continue monitoring and whether there is other frequencies of uttering long and high-pitched sounds; Finally checking whether to have eliminated and utter long and high-pitched sounds, if eliminate, being then switched to without uttering long and high-pitched sounds path by relay; Program finally returns the frequency and amplitude that read voice signal, and repeatedly carries out cycle detection.

Equipment required during testing experiment of the present utility model comprises: RIGOL-DS2202A oscilloscope; Programmable DC power supply DP832; AWG (Arbitrary Waveform Generator) DG-4102,8 Ω pure resistances (cement power resistor); Sanwa microphone (full directing, sensitivity :-40 ± 3dB); Cone formula loudspeaker (5W, 8 Ω); Pickup circuit adopts audio frequency amplifier OPA2134 to build; Power amplifier adopts TPA3112 module.

Method of testing of the present utility model is as follows:

1) one is tested: build the public address set shown in Fig. 1, change microphone into AWG (Arbitrary Waveform Generator), loud speaker changes 8 Ω pure resistances into, access whistle inhibition system.Audio-source uses 20mV sinusoidal wave, and resistance drop, as output signal, observes output waveform whether distortion.

2) two are tested: build the public address set shown in Fig. 1, do not access whistle inhibition system, microphone and loud speaker initial distance are 4.0 meters, at microphone side computer displaying audio file.If without uttering long and high-pitched sounds generation, then the distance slowly furthered between microphone and loud speaker, till producing until uttering long and high-pitched sounds, measuring the distance now between microphone and loud speaker, claiming this distance for " critical distance of uttering long and high-pitched sounds ".

3) three are tested: the condition of test two changed into " access whistle inhibition system ", measure " critical distance of uttering long and high-pitched sounds ".

The distance of known microphones and loud speaker is nearer, more easily utters long and high-pitched sounds.From the experimental result in table 1, system is critical when uttering long and high-pitched sounds, and the distance between microphone and loud speaker is reduced to 0.21 meter by 2.5 meters, therefore the probability produced of uttering long and high-pitched sounds significantly reduces, and in chauvent's criterion process sound fidelity and clear.In practical application, the distance of microphone and loud speaker can not exist 0.21 meter so closely, so this whistle inhibition system can be applied in on-the-spot public address system completely.

Table 1

Technological means disclosed in the utility model scheme is not limited only to the technological means disclosed in above-mentioned execution mode, also comprises the technical scheme be made up of above technical characteristic combination in any.

Claims (1)

1. one kind is detected suppression system based on uttering long and high-pitched sounds of MAX262 and FPGA, comprise testing circuit of uttering long and high-pitched sounds, chauvent's criterion circuit and relay commutation circuit, it is characterized in that: described testing circuit of uttering long and high-pitched sounds comprises frequency detecting part and amplitude detecting section, the wherein frequency of frequency detecting part Real-Time Monitoring voice signal, it comprises LM339 comparator and FPGA, the output of LM339 comparator is connected with FPGA, described amplitude detecting section comprises peak detection chip AD637 and modulus conversion chip ADS1118, peak detection chip AD637 is connected with modulus conversion chip ADS1118, the I/O mouth of modulus conversion chip ADS1118 and FPGA is connected, signal converts the analog voltage amount of output to digital voltage amount by modulus conversion chip ADS1118 after peak detection chip AD637, again digital voltage amount is given the I/O mouth of FPGA, described chauvent's criterion circuit comprises the two second order universal switch electric capacity active filter MAX262 of two CMOS, the capacitance of a 0.1 μ F is added after two filtering channels of every sheet MAX262, MAX262 and FPGA is connected, and provides accurate external clock by FPGA, described relay commutation circuit comprises relay, triode S9013, and wherein, the base stage of triode S9013 connects the I/O mouth of FPGA, collector connection relay, grounded emitter.