CN104699544A - BIT communication method for redundancy computer system - Google Patents

Abstract

The invention belongs to a computer communication technology, and relates to improvement on a BIT communication method for a redundancy computer. The communication method is based on the application of a redundancy computer system with more than two channels. A common communication manner is to connect ground test equipment with each channel of the redundancy computer system in a point-to-point manner and transmit a command request to multiple channels in one time by virtue of ground test software, and transmission time differences easily cause the problems of loss of synchronization between the channels of the redundancy computer, channel failures and the like, and even cause the incapability of smoothly finishing BIT work. In order to solve the problem, the conventional point-to-point multi-line connection communication manner is replaced by a manner of connecting a communication bus to any bus board of the redundancy computer and forwarding a command by bus board software in a one-to-many manner, and then effective command passages are pre-identified by redundancy computer system software, so that command responding is simplified, and the problem is well solved.

Description

The means of communication that a kind of redundance computer system BIT tests

Technical field

The invention belongs to computer communication technology field, relate to the improvement to the means of communication that redundance computer system BIT tests.

Background technology

The means of communication that existing redundance computer system BIT tests all are adopted many rigid lines and are connected to each channel bus plate of redundance computer system, and method is as follows:

Ground checkout equipment is connected to redundance computer system passage A, B bus board by many rigid lines by step one;

Step 2 ground checkout equipment sends the effective item test command of BIT to passage A, B, and passage A, B bus board receives test command;

Effective for the BIT received in step 2 item test command is sent to the host CPU plate of passage A, B by step 3 passage A, B bus board simultaneously;

The host CPU plate of step 4 passage A, B receives respectively from passage A, B effective BIT test command to bus board, judge passage A, B test command effectively and consistent after start BIT test, otherwise this subcommand failure, wait for test command next time.

The object of the invention is: propose a kind of reliable communicating method connecting simple, applicable redundancy computer system BIT and test.

Technical scheme of the present invention is:

The means of communication that redundance computer system BIT tests, is characterized in that:

The communication port of ground checkout equipment with redundance computer system passage A bus board is connected by a rigid line by step 1;

Step 2 ground checkout equipment sends the effective item test command of BIT, enters redundance computer system bus plate by passage A;

Effective for the BIT received in step 2 item test command is sent to the host CPU plate of passage A, B by step 3 bus board simultaneously;

The host CPU plate of step 4 passage A, B receives and after identifying effective BIT test command, starts BIT test.

Advantage of the present invention is:

A) rigid line connects simple

Redundance computer system was when carrying out BIT test in the past, all needed many rigid lines to be connected to, and the method only needs a rigid line to connect, and simplifies signal wiring complexity;

B) synchronism, real-time are good

An event command sends to redundance computing machine by bus board software simultaneously, and the synchronism of computing machine significantly improves, more timely to the response of order.At multiplicated system synchronism detection, during channel combined test, measuring stability obviously improves;

C) Airborne Software command recognition simplifies

The method, redundance computer software is after starting to recognize effective command channel, catching of follow-up all event command, effective order passage only need be inquired about just passable at each duty cycle, no longer need to carry out catching of effective order to each passage, prevent and need hyperchannel command recognition and issuable mistake, running software sequential is clear.

Accompanying drawing explanation

Fig. 1 is General Implementing step schematic diagram

Fig. 2 is idiographic flow schematic diagram

Fig. 3 is connection diagram

Embodiment

Be described in further detail this method below in conjunction with accompanying drawing, as shown in Figure 1, idiographic flow step as shown in Figure 2, is described in detail as follows General Implementing step:

The identification of 1 passage effective order

A) connect a notebook computer (ground checkout equipment) and 2 redundancy computer passage A bus board serial ports with a Serial Port Line, connection diagram is as Fig. 3;

B) system power-up starts, and whether this passage of the equal periodic queries of passage A, B bus board software has the BIT test command meeting communications protocol.After notebook computer sends BIT test instruction, passage A bus board receives this BIT test command;

C) after passage A bus board software recognizes this order effective order, namely by data bus, this BIT test command is sent to this passage host CPU plate, also be forwarded to channel B host CPU plate, such passage A, B host CPU plate receives BIT test command simultaneously simultaneously.

2 host CPU plate identification effective orders

Because passage A, B host CPU plate software first time recognizes effective order, now all recording channel A is the command channel of BIT test, and for preventing follow-up test from occurring disable instruction, after this order from passage A only inquired about by passage A, B host CPU plate software.

3 response test orders also send test data

A) passage A, B receives and after identifying effective BIT test command, starts BIT test simultaneously, complete the execution to test command by topworks;

B), after having tested, passage A, B host CPU plate software all sends to passage A bus board software by data bus each self-test data;

4 Synthetic Measuring Data are also uploaded to ground checkout equipment

A) passage A bus board software the test result data receiving A, B two passages all after, passage A bus board software carries out comprehensively to the test result data of passage A, B according to communications protocol, be uploaded to ground checkout equipment after comprehensively completing, complete the test assignment that this redundance computer system BIT tests.

B) passage A bus board software continues periodically to wait for new test command, until complete all test jobs.

Claims (1)

1. means of communication for redundance computer system BIT test, is characterized in that,

The communication port of ground checkout equipment with redundance computer system passage A bus board is connected by a rigid line by step 1;

Step 2 ground checkout equipment sends the effective item test command of BIT, and passage A bus board receives test command;

Effective for the BIT received in step 2 item test command is sent to the host CPU plate of passage A, B by step 3 bus board simultaneously;

The host CPU plate of step 4 passage A, B receives and after identifying effective BIT test command, starts BIT test.