CN104679626A - System and method for debugging and detecting BIOS (Basic Input / Output System) - Google Patents
System and method for debugging and detecting BIOS (Basic Input / Output System) Download PDFInfo
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- CN104679626A CN104679626A CN201310634160.7A CN201310634160A CN104679626A CN 104679626 A CN104679626 A CN 104679626A CN 201310634160 A CN201310634160 A CN 201310634160A CN 104679626 A CN104679626 A CN 104679626A
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Abstract
The invention provides a system and a method for debugging and detecting a BIOS (Basic Input / Output System). The system and the method for debugging and detecting the BIOS are applied to a computer, wherein the computer comprises a BMC (block multiplexer channel) controller, a PCH (Platform Controller Hub) chip, a serial-parallel converter and an LED panel; when the computer performs the POST process, a POST information code generated by the computer performing the POST process is obtained from the PCH chip and the sent to the serial-parallel converter to control an LED indicator light on the LED panel to be displayed; after the computer performs the POST process, a system state code of the computer is obtained from the PCH chip and then sent to the serial-parallel converter to control the LED indicator light on the LED panel to be displayed. With the adoption of the system and the method, testers can directly know the BIOS debugging process.
Description
Technical field
The present invention relates to a kind of computer BIOS debug system and method, particularly debug detecting system and method about a kind of BIOS based on BMC.
Background technology
Based on debugging BIOS(basic input-output system, Basic Input or Output System (BIOS)) needs, Hardware Engineer's two kinds of approach when design server are used for debugging BIOS.A utilization is com port, and another is that start detects (power-on self test, POST) LED light.Be in the consideration of Product Safety, com port generally can be removed at product volume postpartum.In such cases, driving LED has just become user to understand BIOS operation conditions and maintenance personal debugs unique approach of BIOS.But current industry is debugged BIOS about utilization start detection LED light and is mainly adopted add-on card to show.Its add-on card is one, and have can the little circuit of program design device and seven sections of rainbow display tubes, and design is comparatively complicated, and each motherboard will be equipped with a connectivity port (connector), causes the problem of waste electron device.In addition, connect add-on card after all will shutting down time the start of each server goes wrong and debug again, but be just difficult to copy after the problem of some randomness is likely shut down, cause the inconvenience of debugging.
Summary of the invention
In view of above content, be necessary to provide a kind of BIOS to debug detecting system and method, automatically the POST information code of computing machine and system for computer status code can be presented in LED light, thus enable tester understand the debug process of BIOS intuitively.
Described BIOS debugs detecting system and runs in computing machine, and this computing machine comprises BMC controller, PCH chip, serial parallel converter and LED panel.This system comprises: BIOS starts module, opening computer self-inspection POST process is performed for starting BIOS when computer booting, utilize BIOS that the GIPO value of the GIPO port on BMC controller is set to low level, and judge whether computing machine is in execution POST process by the GIPO value detecting GIPO port; POST information detecting module, perform in POST process when computing machine is in, the POST information code that computing machine execution POST process produces is obtained from PCH chip, POST information code is sent to serial parallel converter, each logic numeral in POST information code is specified in order in LED panel the LED light that corresponding, and utilize the serial parallel converter LED light controlled in LED panel to show logic numeral corresponding to POST information code; System information detecting module, for when the POST process of computing machine is finished, system for computer status code is obtained from PCH chip, system state code is sent to serial parallel converter, each logic numeral in system state code is specified in order in LED panel the LED light that is corresponding, and the logic numeral utilizing the LED light display system status code in serial parallel converter control LED panel corresponding.
Described BIOS debugs method for detecting and should go in computing machine, and this computing machine comprises BMC controller, PCH chip, serial parallel converter and LED panel.The method comprising the steps of: start BIOS when computer booting and perform opening computer self-inspection POST process, utilize BIOS that the GIPO value of the GIPO port on BMC controller is set to low level; Judging whether computing machine is in by the GIPO value detecting GIPO port performs in POST process; Perform in POST process when computing machine is in, the POST information code that computing machine execution POST process produces is obtained from PCH chip, POST information code is sent to serial parallel converter, each logic numeral in POST information code is specified in order in LED panel the LED light that corresponding, and utilize the serial parallel converter LED light controlled in LED panel to show logic numeral corresponding to POST information code; When the POST process of computing machine is finished, system for computer status code is obtained from PCH chip, system state code is sent to serial parallel converter, each logic numeral in system state code is specified in order in LED panel the LED light that is corresponding, and the logic numeral utilizing the LED light display system status code in serial parallel converter control LED panel corresponding.
Compared to prior art, BIOS of the present invention debugs detecting system and method, and when utilizing BIOS to carry out in POST process to computing machine, the method can automatic acquisition POST information code be presented in LED light; When computing machine carries out after startup self-detection test terminates, can automatic acquisition system for computer status code being presented in LED light, thus enable tester understand the debug process of BIOS intuitively.
Accompanying drawing explanation
Fig. 1 is the running environment schematic diagram that BIOS of the present invention debugs detecting system preferred embodiment.
Fig. 2 is the functional block diagram that BIOS of the present invention debugs detecting system.
Fig. 3 is the process flow diagram that BIOS of the present invention debugs method for detecting preferred embodiment.
Main element symbol description
Computing machine 100
BIOS debugs detecting system 10
BIOS starts module 101
POST information detecting module 102
System information detecting module 103
Wire jumper detecting module 104
GIPO port one 1
PCH chip 2
BIOS 20
Lpc bus 21
Serial parallel converter 3
GPIO bus 31
LED panel 4
LED light 40
Wire jumper arranges device 5
Central processing unit 6
Embodiment
Consulting shown in Fig. 1, is the running environment schematic diagram that BIOS of the present invention debugs detecting system 10 preferred embodiment.In the present embodiment, described BIOS debugs detecting system 10 and installs and run in computing machine 100, this computing machine comprises BMC(Base management controller) controller 1, south bridge (Platform controller hub, PCH) chip 2, serial parallel converter (Switch) 3, LED panel 4, wire jumper arrange device 5 and central processing unit (CPU) 6.Described BMC controller 1 is by LPC(Low Pin Count) bus 21 is connected with PCH chip 2, and is connected with serial parallel converter 3 by GPIO bus 31.Described serial parallel converter 3 is electrically connected to LED panel 4, and this LED panel 4 is made up of the LED light 40 that eight are respectively used to display logic digital " 0 " and logic numeral " 1 ", and each LED light 40 is that one is made up of seven sections of laser-emitting diodes.In the present embodiment, described computing machine 100 can be a kind of personal computer (PC), workstation computer (Workstation computer), notebook (Notebook), server (Server) or other computing electronics.
Described BMC controller 1 also comprises GIPO port one 1, and described wire jumper arranges device 5 and is connected to GIPO port one 1 for arranging a wire jumper.Described PCH chip 2 comprises Basic Input or Output System (BIOS) (basic input-output system, BIOS) 20, this BIOS20 carries out startup self-detection (Power On Self Test, POST) program to computing machine 100 and the normal import operation system (OS) of vectoring computer 100 and complete whole start process.
Consulting shown in Fig. 2, is the functional block diagram that BIOS of the present invention debugs detecting system 10.In the present embodiment, described BIOS debugs detecting system 10 and comprises BIOS startup module 101, POST information detecting module 102, system information detecting module 103 and wire jumper detecting module 104.Functional module alleged by the present invention refer to a kind of can be performed and the sequence of program instructions section of fixed function can be completed by the central processing unit 6 of computing machine 100, it is stored in the Flash internal memory (such as Flash ROM) of BMC controller 1.To be described in detail in the flowchart of fig. 3 about each functional module 201-204.
Consulting shown in Fig. 3, is the process flow diagram that BIOS of the present invention debugs method for detecting preferred embodiment.In the present embodiment, the method is applied in computing machine 100, and when utilizing BIOS20 to carry out in startup self-detection (POST) debug process to computing machine 100, the method can automatic acquisition POST information code being presented in LED light 40.When computing machine 100 carries out after startup self-detection test terminates, the method can automatic acquisition computing machine 100 system state code and be presented in LED light 40, thus enable tester understand BIOS debug process intuitively.
Step S31, when computing machine 100 is started shooting, BIOS starts module 101 and starts the POST process that BIOS20 performs computing machine 100, and utilizes BIOS20 that the GIPO value of GIPO port one 1 is set to low level.In the present embodiment, low level is set to logical zero, and high level is set to logical one.After POST process is finished, BIOS starts module 101 and automatically the GIPO value of GIPO port one 1 is set to high level.
Step S32, BIOS start module 101 and judge whether computing machine 100 is in execution POST process by the GIPO value detecting GIPO port one 1.In the present embodiment, when the GIPO value of GIPO port one 1 is low level, BIOS starts module 101 and judges that computing machine 100 is performing POST process; If when the GIPO value of GIPO port one 1 is high level, BIOS starts module 101 and judges that computing machine 100 has been finished POST process.Perform in POST process if computing machine 100 is in, then flow process turns to step S33; The POST process if computing machine 100 has been finished, then flow process turns to step S36.
Step S33, POST information detecting module 102 obtains computing machine 100 by lpc bus 21 and performs the POST information code that POST process produces from PCH chip 2.In the present embodiment, described POST information code is an octal code be made up of logic digital " 0 " and logic numeral " 1 ", such as, if when the POST information code produced when computing machine 100 detects internal memory is for " 00000000 ", then represents that internal memory detects mistake; If the POST information code produced is " 11111111 ", then represent that internal memory detects successfully.
POST information code is sent to serial parallel converter 3 by GIPO bus 31 by step S34, POST information detecting module 102, and by each the logic numeral LED light 40 that appointment one is corresponding in LED panel 4 in order in POST information code.
Step S35, POST information detecting module 102 utilizes serial parallel converter 3 LED light 40 controlled in LED panel 4 to show logic numeral corresponding to POST information code.Such as, the POST information code produced when computing machine 100 detects internal memory is " 11111111 ", then each LED light 40 in LED panel 4 is all shown as numeral " 1 ", shows that the internal memory of computing machine 100 detects normal.The POST information code produced when computing machine 100 detects internal memory is " 00000000 ", then each LED light 40 in LED panel 4 is all shown as digital " 0 ", shows that the internal memory of computing machine 100 detects mistake.
Step S36, system information detecting module 103 obtains the system state code of computing machine 100 by lpc bus 21 from PCH chip 2.In the present embodiment, described system state code is also an octal code be made up of logic digital " 0 " and logic numeral " 1 ", such as, when the system state of computing machine 100 is abnormal, the system state code that this system information detecting module 103 obtains is " 00000000 "; When the system state of computing machine 100 is normal, the system state code that system information detecting module 103 obtains is for being " 11111111 ".
Step S37, system state code is sent to serial parallel converter 3 by GIPO bus 31 by system information detecting module 103, and by each the logic numeral LED light 40 that appointment one is corresponding in LED panel 4 in order in system state code.
Step S38, system information detecting module 103 utilizes serial parallel converter 3 to control logic numeral corresponding to LED light 40 display system status code in LED panel 4.Such as, when the system state code of computing machine 100 is " 11111111 ", then each LED light 40 is all shown as numeral " 1 ", shows that the system state of computing machine 100 is normal.When the system state code of computing machine 100 is " 00000000 ", then each LED light 40 is all shown as digital " 0 ", shows that the system state of computing machine 100 is abnormal, may make a mistake.
In the present embodiment, tester can utilize wire jumper to arrange device 5 on GIPO port one 1, arrange a wire jumper, performs in POST engineering be automatically connected on GIPO port one 1 at computing machine 100.Whether the wire jumper arranged described in described wire jumper detecting module 104 detecting real-time is connected on GIPO port one 1.If described wire jumper is connected on GIPO port one 1, then the LED light 40 that POST information detecting module 102 utilizes serial parallel converter 3 to control in LED panel 4 shows POST information code, thus allows tester understand the POST information of computing machine 100; If described wire jumper is not connected on GIPO port one 1, then the system information detecting module 103 LED light 40 display system status code that utilizes serial parallel converter 3 to control in LED panel 4, thus allow tester understand the system status information of computing machine 100.
Above embodiment is only in order to illustrate technical scheme of the present invention and unrestricted, although with reference to above preferred embodiment to invention has been detailed description, those of ordinary skill in the art should be appreciated that and can modify to technical scheme of the present invention or be equal to the spirit and scope of replacing and should not depart from technical solution of the present invention.
Claims (10)
1. BIOS debugs a detecting system, and run in computing machine, this computing machine comprises BMC controller, PCH chip, serial parallel converter and LED panel, it is characterized in that, described BIOS debugs detecting system and comprises:
BIOS starts module, opening computer self-inspection POST process is performed for starting BIOS when computer booting, utilize BIOS that the GIPO value of the GIPO port on BMC controller is set to low level, and judge whether computing machine is in execution POST process by the GIPO value detecting GIPO port;
POST information detecting module, perform in POST process when computing machine is in, the POST information code that computing machine execution POST process produces is obtained from PCH chip, POST information code is sent to serial parallel converter, each logic numeral in POST information code is specified in order in LED panel the LED light that corresponding, and utilize the serial parallel converter LED light controlled in LED panel to show logic numeral corresponding to POST information code; And
System information detecting module, for when the POST process of computing machine is finished, system for computer status code is obtained from PCH chip, system state code is sent to serial parallel converter, each logic numeral in system state code is specified in order in LED panel the LED light that is corresponding, and the logic numeral utilizing the LED light display system status code in serial parallel converter control LED panel corresponding.
2. BIOS as claimed in claim 1 debugs detecting system, it is characterized in that, this system also comprises system information detecting module, whether this system information detecting module is provided with wire jumper on GIPO port described in detecting real-time, if described GIPO port is provided with wire jumper, the LED light then utilizing serial parallel converter to control in LED panel shows described POST information code, if described GIPO port does not arrange wire jumper, then the LED light utilizing serial parallel converter to control in LED panel shows described system state code.
3. BIOS as claimed in claim 2 debugs detecting system, it is characterized in that, described wire jumper utilizes the wire jumper of computing machine to arrange device to arrange, and be automatically connected on described GIPO port in computing machine execution POST engineering.
4. BIOS as claimed in claim 1 debugs detecting system, and it is characterized in that, described BMC controller is connected with described PCH chip by lpc bus, and is connected with described serial parallel converter by GPIO bus.
5. BIOS as claimed in claim 1 debugs detecting system, and it is characterized in that, described serial parallel converter is electrically connected in LED panel, and this LED panel is made up of the LED light that eight are respectively used to display logic digital " 0 " and logic numeral " 1 ".
6. BIOS debugs a method for detecting, and should go in computing machine, this computing machine comprises BMC controller, PCH chip, serial parallel converter and LED panel, and it is characterized in that, the method comprising the steps of:
Start BIOS when computer booting and perform opening computer self-inspection POST process, utilize BIOS that the GIPO value of the GIPO port on BMC controller is set to low level;
Judging whether computing machine is in by the GIPO value detecting GIPO port performs in POST process;
Perform in POST process when computing machine is in, the POST information code that computing machine execution POST process produces is obtained from PCH chip, POST information code is sent to serial parallel converter, each logic numeral in POST information code is specified in order in LED panel the LED light that corresponding, and utilize the serial parallel converter LED light controlled in LED panel to show logic numeral corresponding to POST information code; And
When the POST process of computing machine is finished, system for computer status code is obtained from PCH chip, system state code is sent to serial parallel converter, each logic numeral in system state code is specified in order in LED panel the LED light that is corresponding, and the logic numeral utilizing the LED light display system status code in serial parallel converter control LED panel corresponding.
7. BIOS as claimed in claim 6 debugs method for detecting, and it is characterized in that, the method also comprises step:
Whether GIPO port described in detecting real-time is provided with wire jumper;
If described GIPO port is provided with wire jumper, then the LED light utilizing serial parallel converter to control in LED panel shows described POST information code;
If described GIPO port does not arrange wire jumper, then the LED light utilizing serial parallel converter to control in LED panel shows described system state code.
8. BIOS as claimed in claim 7 debugs method for detecting, it is characterized in that, described wire jumper utilizes the wire jumper of computing machine to arrange device to arrange, and be automatically connected on described GIPO port in computing machine execution POST engineering.
9. BIOS as claimed in claim 6 debugs method for detecting, and it is characterized in that, described BMC controller is connected with described PCH chip by lpc bus, and is connected with described serial parallel converter by GPIO bus.
10. BIOS as claimed in claim 6 debugs method for detecting, it is characterized in that, described serial parallel converter is electrically connected in LED panel, and this LED panel is made up of the LED light that eight are respectively used to display logic digital " 0 " and logic numeral " 1 ".
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| CN201310634160.7A CN104679626A (en) | 2013-11-30 | 2013-11-30 | System and method for debugging and detecting BIOS (Basic Input / Output System) |
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| CN201310634160.7A CN104679626A (en) | 2013-11-30 | 2013-11-30 | System and method for debugging and detecting BIOS (Basic Input / Output System) |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN106980569A (en) * | 2017-04-18 | 2017-07-25 | 深圳市同泰怡信息技术有限公司 | A kind of method that utilization USB keyboard lamp represents BIOS POST progresses |
| CN107153600A (en) * | 2016-03-02 | 2017-09-12 | 昆达电脑科技(昆山)有限公司 | The method of record system daily record during system boot |
| CN107678929A (en) * | 2017-09-14 | 2018-02-09 | 郑州云海信息技术有限公司 | A kind of system and method for judging the server operation phase |
| CN107885624A (en) * | 2017-10-10 | 2018-04-06 | 曙光信息产业(北京)有限公司 | Control the method, apparatus and server of BIOS Debugging message output |
| CN107894934A (en) * | 2017-10-10 | 2018-04-10 | 曙光信息产业(北京)有限公司 | Control the method, apparatus and server of BIOS Debugging message output |
| CN113051140A (en) * | 2019-12-26 | 2021-06-29 | 广达电脑股份有限公司 | System and method for providing state index in power-on self-test program |
| CN113051141A (en) * | 2019-12-27 | 2021-06-29 | 广达电脑股份有限公司 | System and method for providing status information during a power-on self-test routine |
-
2013
- 2013-11-30 CN CN201310634160.7A patent/CN104679626A/en active Pending
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107153600A (en) * | 2016-03-02 | 2017-09-12 | 昆达电脑科技(昆山)有限公司 | The method of record system daily record during system boot |
| CN106980569A (en) * | 2017-04-18 | 2017-07-25 | 深圳市同泰怡信息技术有限公司 | A kind of method that utilization USB keyboard lamp represents BIOS POST progresses |
| CN107678929A (en) * | 2017-09-14 | 2018-02-09 | 郑州云海信息技术有限公司 | A kind of system and method for judging the server operation phase |
| CN107885624A (en) * | 2017-10-10 | 2018-04-06 | 曙光信息产业(北京)有限公司 | Control the method, apparatus and server of BIOS Debugging message output |
| CN107894934A (en) * | 2017-10-10 | 2018-04-10 | 曙光信息产业(北京)有限公司 | Control the method, apparatus and server of BIOS Debugging message output |
| CN113051140A (en) * | 2019-12-26 | 2021-06-29 | 广达电脑股份有限公司 | System and method for providing state index in power-on self-test program |
| CN113051141A (en) * | 2019-12-27 | 2021-06-29 | 广达电脑股份有限公司 | System and method for providing status information during a power-on self-test routine |
| US11567843B2 (en) | 2019-12-27 | 2023-01-31 | Quanta Computer Inc. | Method and system for indicating BIOS POST status from a chassis identifying LED |
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Application publication date: 20150603 |