CN104601173B - The conversion method of simulation numeral and its associated analog digital quantizer - Google Patents
The conversion method of simulation numeral and its associated analog digital quantizer Download PDFInfo
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- CN104601173B CN104601173B CN201310530745.4A CN201310530745A CN104601173B CN 104601173 B CN104601173 B CN 104601173B CN 201310530745 A CN201310530745 A CN 201310530745A CN 104601173 B CN104601173 B CN 104601173B
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Abstract
The invention discloses a kind of conversion method of simulation numeral and its associated analog digital quantizers.The conversion method, which includes, charges to a capacitance by an analog signal, to sample the voltage of the analog signal；When the voltage of the capacitance is equal to the voltage of the analog signal, the capacitance and multiple reference voltages are coupled to a comparator, with the voltage of the capacitance and the multiple reference voltage and generates one first comparative result；In the state change of first comparative result, the capacitance is coupled to a ramp generator, with a ramp signal of the ramp generator and a pressure difference and generates one second comparative result；In the state change of second comparative result, a first voltage value of the ramp signal is obtained；And the first voltage value according to first reference voltage and the ramp signal, obtain a digital code of the analog signal.
Description
Technical field
The present invention relates to the method and its analog-digital converter of a kind of Analog-digital Converter more particularly to a kind of utilization are more
Weight reference voltage and single ramp generator realize the conversion method and its analog-digital converter of two stepwise simulation numerals.
Background technology
Image inductor evolves into speed and is getting faster, and can more accurately capture various material objects（For example, visible ray, red
Outside line ...）Image.For example, have become daily life business more than 10M picture elements to capture the handheld camera of 120 figures per second
Product.Similarly, extremely fast（10,000 figures per second）And super accurate science inductor is to be used for developing life science, machine
People, building etc..For the demand in market, constantly improve these images, it is necessary to set about from the design and technological innovation of system.Example
Such as, speed and inductor quality, multiple mutual storehouses of integrated circuit, with the succinct imaging device of realization are improved.In addition, new reading
Framework is developed, to realize higher reading speed.However, this needs analog-digital converter（analog-to-digital
Converters, ADC）Design innovation, reduce area and power consumption, while improve speed and resolution ratio.
With the progress of integrated circuit manufacture process technology, the digit of a digital signal of analog-digital converter output is increasingly
It is high.That is, the magnitude of digital signal representation becomes closer to the analog signal inputted.Certainly, the digit of digital signal
Improve the circuit complexity rising for also representing analog-digital converter, layout area increases and noise is resisted demand and improved.It is following
Patent document introduction analog-digital converter and its relevant method.
U.S. Patent number US20120025062 disclose a kind of hybrid simulation digital quantizer, an image sensor and
For providing the method for multiple digital codes.However, realize that the patent needs substantial amounts of capacitance that must utilize larger pixel sense
Answer device.Accordingly, it is difficult to realize the image sensor of small size.
IEEE files " Multiple-Ramp Column-Parallel ADC Architectures for COMS
Image Sensor " disclose a kind of imaging device, with parallel processing simulation numeral, and according to single tiltedly according to a multiple oblique wave
Rate analog-digital converter.It causes power consumption problem disadvantage is that multigroup ramp generator.
European patent number EP1351490 discloses a kind of image sensor for improving reading circuit.And U.S. Patent number
US6670904 discloses a kind of dual oblique wave analog-digital converter for complementary metal oxide semiconductor.It is however, above-mentioned special
The realization method of profit is limited only to a linear approach（Linear search）.
The content of the invention
Therefore, the main object of the present invention is to disclose a kind of conversion method of simulation numeral, to reach economization power supply
Consumption and shortening conversion time.
The present invention discloses a kind of conversion method of simulation numeral.The conversion method includes through the analog signal pair
One capacitance charges, to sample the voltage of the analog signal；When the voltage of the capacitance is equal to the voltage of the analog signal,
The capacitance and multiple reference voltages are coupled to a comparator, with the voltage of the capacitance and the multiple reference voltage
And generate one first comparative result；In the state change of first comparative result, couple the capacitance a to oblique wave and generate
Device, with one first reference voltage of a ramp signal of the ramp generator and the multiple reference voltage and described
A pressure difference and one second comparative result of generation between the voltage of capacitance；In the state change of second comparative result, obtain
One the first voltage value of the ramp signal；And described first according to first reference voltage and the ramp signal
Voltage value obtains the digital code of the analog signal.
Invention additionally discloses a kind of analog-digital converters.The analog-digital converter includes plural parallel processing
Row, a reference voltage generator and a ramp generator.The plural number parallel processing row are used for inputting multiple simulation letters simultaneously
Number.Wherein, each parallel processing row include a capacitance, a first switch, a second switch and a comparator.The capacitance
For sampling the voltage of the analog signal according to an analog signal of the multiple analog signal.The first switch is coupled to
One first end of the capacitance, for controlling the coupling relation of the capacitance.The second switch is coupled to the one of the capacitance
Second end, for controlling the coupling relation of the capacitance.It is described with reference to electricity that there is the comparator first input end to be coupled to
Pressure generator, one second input terminal are coupled to each second switch and an output terminal is used for generating one first comparative result
And one second comparative result.The reference voltage generator is used for generating multiple reference voltages.The ramp generator coupling
In the first switch, for generating a ramp signal.
Description of the drawings
Fig. 1 is the schematic diagram of one analog-digital converter of the embodiment of the present invention.
Fig. 2 is a sequence diagram of the analog-digital converter 10 of Fig. 1 of the present invention.
Fig. 3 is the schematic diagram of another analog-digital converter of the embodiment of the present invention.
Fig. 4 is the schematic diagram of one flow of the embodiment of the present invention.
Wherein, the reference numerals are as follows：
10th, 30 analog-digital converter
100 reference voltage generators
120 ramp generators
130 counters
140 capacitances
160 comparators
180 logic memory units
40 flows
400th, 402,404,406,408,410,412 step
S1, S2 are switched
V, V ' voltages
T_V+, T_V- input terminal
Rmp ramp signals
P, Q, N digital code
Vinp_1, Vinp_2 ..., Vinp_n analog signals
Colmn_1, Colmn_2 ..., Colmn_n parallel processing row
Rv_1, rv_2 ..., rv_n, rv_p, rv_p-1 reference voltage
Specific embodiment
It please refers to Fig.1, Fig. 1 is the schematic diagram of one analog-digital converter 10 of the embodiment of the present invention.Analog-digital converter
10 can parallel processing analog signal Vinp_1, Vinp_2 ..., Vinp_n.Analog-digital converter 10 includes parallel processing row
Colmn_1, Colmn_2 ..., Colmn_n, a reference voltage generator 100, a ramp generator 120 and a counter
130.Reference voltage generator 100 be used for generate reference voltage rv_1, rv_2 ..., rv_n, with to analog signal Vinp_1,
Vinp_2 ..., Vinp_n perform a thick portion compare（coarse conversion）.Parallel processing row Colmn_1, Colmn_
2nd ..., Colmn_n, for input simultaneously analog signal Vinp_1, Vinp_2 ..., Vinp_n, and the corresponding number of parallel output
Character code.Parallel processing row Colmn_1, Colmn_2 ..., each parallel processing of Colmn_n row include a capacitance 140, switch
S1 and S2, a comparator 160 and a logic memory unit 180.Capacitance 140 is used for sampled analog signals Vinp_1, Vinp_
2nd ..., the voltage of an analog signal of Vinp_n.Switch S1 is coupled to a first end of capacitance 140, for controlling capacitance 140
Coupling relation.Switch S2 is coupled to a second end of capacitance 140, for controlling the coupling relation of capacitance 140.Comparator 160 has
There is a first input end T_V- to be coupled to reference voltage generator 100, one second input terminal T_V+ is coupled to switch S2 and one
Output terminal is used for generating comparative result cmpr_1 and comparative result cmpr_2.Ramp generator 120 is coupled to switch S1, uses
A ramp signal Rmp is generated, to perform thin portion conversion to the analog signal（fine conversion）.
For convenience of explanation, only by taking parallel processing row colmn_1 as an example.When switch S1 is " 1 " and switch S2 is " 1 ",
One end of capacitance 140 is coupled to analog signal Vinp_1, and the other end ground connection of capacitance 140, analog signal Vinp_1 is to capacitance 140
It charges.When switch S1 is " 1 " and switch S2 is " 0 ", capacitance 140 is coupled to the second input terminal T_V+ of comparator 160,
And the first input end T_V- of comparator 160 is coupled to reference voltage generator 100.At this point, the voltage of capacitance 140 is charged to mould
Intend the voltage of signal Vinp_1, comparator 160 starts the voltage for comparing capacitance 140（That is, the voltage of analog signal Vinp_1）With
And reference voltage rv_1, rv_2 ..., rv_n, and generate comparative result cmpr_1.A dichotomy can be used in comparator 140
（Binary search）An or linear approach（Linear search）Compare the voltage of capacitance 140 and reference voltage rv_1, rv_
2、….、rv_n.During according to dichotomy, logic memory unit 180 also includes an incremental buffer（Successive
Approximate Register, SAR）.It is preferred that reference voltage rv_1, rv_2 ..., rv_n can in a manner of binary by
It is small to be incremented by big.If the voltage of capacitance 140 is big compared with reference voltage, comparative result cmpr_1 is " 1 ".If the voltage of capacitance 140
When small compared with reference voltage, comparative result cmpr_1 is " 0 ".When one reference voltage rv_p is compared with the voltage of capacitance 140, make
Obtain the state change of comparative result（From " 0 " to " 1 "）.It is represented, the voltage of capacitance 140（That is, the electricity of analog signal Vinp_1
Pressure）Between a reference voltage rv_p-1 and reference voltage rv_p.Since reference voltage rv_p-1 can be by a digital code P tables
Show, analog-digital converter 10 obtains the digital code of thick portion conversion（That is, higher significance bit（More Significant Bit,
MSB））.And the first input end T_V- of comparator 160 is coupled to reference voltage rv_p-1, further to perform thin portion conversion.
When performing thin portion conversion, switch S1 switches to " 0 " and switch S2 is switched to " 0 ".At this point, capacitance 140 is coupled to
The the second input terminal T_V+ and ramp generator 120 of comparator 160, and the first input end T_V- of comparator 160 is coupled to
Reference voltage rv_p-1.Comparator 160 starts the voltage for comparing first input end T_V-（That is, reference voltage rv_p-1）And the
The voltage of two input terminal T_V+（That is, the voltage of capacitance 140 adds ramp signal Rmp）.In other words, comparator 160 is relatively more oblique
A pressure difference V between ripple signal Rmp and the voltage of reference voltage rv_p-1 and capacitance 140, and generate comparative result cmpr_2.Preferably
Ground, ramp signal Rmp have a negative slope or a positive slope.Counter 130 is coupled to ramp generator 120, in oblique wave
Signal Rmp often successively decreases/is incremented by（Depending on negative slope or positive slope）It is incremented by one during single order therewith.When ramp signal Rmp successively decreases/
It is incremented to voltage value V '（The pressure difference V being slightly less than between the voltage of reference voltage rv_p-1 and capacitance 140）When, comparative result cmpr_2
State change.For example, the voltage of capacitance is 0.35 volt, and reference voltage rv_p-1 is 0.30 volt.Comparator 160
Comparison reference voltage rv_p-1（0.30 volt）With the voltage of capacitance 140（0.35 volt）And the totalling of ramp signal Rmp.By
There is negative slope in ramp signal Rmp, the voltage of the second input terminal T_V+ of comparator 160 is passed downwards from 0.35 volt
Subtract.It is slightly less than reference voltage rv_p-1's when the voltage of the second input terminal T_V+ of comparator 160 is decremented to from 0.35 volt
At 0.30 volt, the state change of comparative result cmpr_2.
When the state change of comparative result cmpr_2, counter 130 exports number when ramp signal Rmp is voltage value V '
Character code Q is to logic memory unit 180.Thus, analog-digital converter 10 obtains the digital code of thin portion conversion（That is, remaining
Compared with low order（Less Significant Bit, LSB））.Analog-digital converter 10 can according to reference voltage rv_p-1 with
And the digital code P of voltage V '（That is, higher significance bit）And digital code Q（That is, remaining is compared with low order）, obtain analog signal
A digital code N of Vinp_1（Wherein, N=P+Q）.Analog-digital converter 10 needs 2P+2QConversion time.In the prior art, together
Sample then needs 2 with the analog-digital converter of NNConversion time.It compares down, the Analog-digital Converter of the embodiment of the present invention
Device 10 can save conversion time.In addition, a final digital code can be by higher significance bit（More Significant
Bit, MSB）And remaining is compared with low order（Less Significant Bit, LSB）Perform mathematical operation acquirement.
For simple, analog-digital converter 10 utilizes and switchs S1 and S2 by two input terminal couplings of comparator 160
Be connected to reference voltage generator 100, oblique wave production device 120 or capacitance 140, can to analog signal Vinp_1, Vinp_2 ..., Vinp_
N is parallel to carry out thick portion conversion and thin portion conversion.On thick portion conversion is performed, analog-digital converter 10 can flexibly use line
Property dichotomy or linear approach.In addition, the analog-digital converter of the embodiment of the present invention only needs a ramp generator, therefore compare
Can not only save conversion time in the prior art can also solve the problems, such as power consumption.
It please refers to Fig.2, Fig. 2 is a sequence diagram of analog-digital converter 10.Fig. 2 includes the voltage of switch S1 and S2
Signal, the voltage signal of the first output terminal T_V- of comparator 160, comparator 160 second output terminal T_V+ voltage signal
And the voltage signal of the output terminal of comparator 160.The variation of the output terminal of comparator 160 as seen from Figure 2.
It please refers to Fig.3, Fig. 3 is the schematic diagram of another analog-digital converter 30 of the embodiment of the present invention.Analog-digital Converter
Device 30 is with the basic framework of analog-digital converter 10 with similar, therefore same components and signal continue to use identical label.Simulation
Digital quantizer 30 the difference is that only capacitance 140 with switching the coupling position of S1 and S2 with analog-digital converter 10
It puts.When switch S1 switches to " 0 " and switch S2 switches to " 0 ", capacitance 140 is coupled to the first input end T_ of comparator 160
V- and reference voltage rv_p-1, and the second input terminal T_V+ of comparator 160 is coupled to ramp generator 120.Comparator 160
Compare the pressure difference V between ramp signal Rmp and the voltage of reference voltage rv_p-1 and capacitance 140, and generate comparative result cmpr_
2.Remaining operating procedure can refer to above-mentioned, and details are not described herein.
It please refers to Fig.4, the operating procedure on analog-digital converter 10 can be summarized as a flow 40.Flow 40 is used for mould
Intend in digital quantizer 10, for converting an analog signal to a digital code.Flow 40 comprises the steps of：
Step 400：Start.
Step 402：By analog signal Vinp_1, Vinp_2 ..., Vinp_n charge to capacitance 140, believed with sampling simulation
Number Vinp_1, Vinp_2 ..., the voltage of Vinp_n.
Step 404：The voltage of capacitance 140 be equal to analog signal Vinp_1, Vinp_2 ..., the voltage of Vinp_n when, coupling
Connect capacitance 140 and reference voltage rv_1, rv_2 ..., rv_n to comparator 160, to compare the voltage of capacitance 140 and reference
Voltage rv_1, rv_2 ..., rv_n, and generate comparative result cmpr_1.
Step 406：In the state change of comparative result cmpr_1, coupling capacitance 140 to ramp generator 120, with than
Compared with the pressure difference V between ramp signal Rmp and the voltage of reference voltage rv_p-1 and capacitance 140, and generate comparative result cmpr_
2。
Step 408：In the state change of comparative result cmpr_2, the voltage value V ' of ramp signal Rmp is obtained.
Step 410：According to reference voltage rv_p-1 and voltage value V ', parallel acquirement analog signal Vinp_1, Vinp_
2nd ..., the digital code of Vinp_n.
Step 412：Terminate.
The detailed embodiment of flow 40 can refer to above-mentioned, not repeat herein.
In conclusion two input terminals of comparator are coupled to by the ratio digital quantizer of the embodiment of the present invention using switch
Reference voltage generator, ramp generator or capacitance parallel to analog signal can carry out thick portion conversion and thin portion conversion, therefore
Simulation can be saved to the conversion time of number.In addition, the analog-digital converter of the embodiment of the present invention only needs an oblique wave to generate
Device, therefore can also solve the problems, such as the power consumption of the prior art.
The foregoing is only a preferred embodiment of the present invention, is not intended to limit the invention, for the skill of this field
For art personnel, the invention may be variously modified and varied.Within the spirit and principles of the invention, that is made any repaiies
Change, equivalent substitution, improvement etc., should all be included in the protection scope of the present invention.
Claims (16)
1. a kind of conversion method of simulation numeral, the conversion method include：
It is charged by an analog signal to a capacitance, couples a first end of the capacitance to the analog signal, and couple institute
A second end of capacitance is stated to a ground connection, to sample the voltage of the analog signal；
When the voltage of the capacitance is equal to the voltage of the analog signal, couples the first end of the capacitance and compare to one
One positive input terminal of device couples the second end of the capacitance to the ground connection, and selectively inputs multiple reference voltages
To a negative input end of the comparator, with the voltage of the capacitance and the multiple reference voltage and one first ratio is generated
Relatively result；
In the state change of first comparative result, the second end of the capacitance is coupled to a ramp generator, with
Input the total value of a ramp signal of the ramp generator and the voltage of the capacitance to the comparator it is described just
Input terminal, and input one first reference voltage of the multiple reference voltage to the negative input end of the comparator, with than
A pressure difference and generation one between the total value of the voltage of the ramp signal and the capacitance and first reference voltage
Second comparative result；
In the state change of second comparative result, a first voltage value of the ramp signal is obtained；
And
According to the first voltage value of first reference voltage and the ramp signal, the one of the analog signal is obtained
Digital code.
2. conversion method as described in claim 1, it is characterised in that the voltage of the capacitance is with the multiple with reference to electricity
Pressure is using the voltage of a dichotomy or the linear approach capacitance and the multiple reference voltage.
3. conversion method as described in claim 1, it is characterised in that the state of first comparative result is in the capacitance
Voltage compared with one second reference voltage of multiple reference voltages when change.
4. conversion method as claimed in claim 3, it is characterised in that the analog signal between first reference voltage with
Between second reference voltage.
5. conversion method as claimed in claim 3, it is characterised in that a high significance bit of the digital code can be by described first
Reference voltage obtains and remaining low order of the digital code can be taken by the first voltage value of the ramp signal
.
6. conversion method as described in claim 1, it is characterised in that the ramp signal has a positive or negative slope.
7. conversion method as claimed in claim 6, it is characterised in that the ramp signal often successively decreases or is incremented by single order and causes one
One numerical value of counter is incremented by one therewith.
8. a kind of analog-digital converter, for the multiple analog signals of parallel processing, the analog-digital converter includes：
One reference voltage generator, for generating multiple reference voltages；
Plural parallel processing row, for inputting the multiple analog signal simultaneously, wherein each parallel processing row include：
One capacitance for sampling the voltage of the analog signal according to an analog signal of the multiple analog signal, includes
One first end and a second end；
There is one comparator a first input end to be coupled to the reference voltage generator, one second input terminal and an output
End, wherein the output terminal is used for generating one first comparative result and one second comparative result；
One first switch is coupled to the first end of the capacitance, and the first end for controlling the capacitance is coupled to
Second input terminal of the analog signal or the comparator；And
One second switch is coupled to the second end of the capacitance, and the second end for controlling the capacitance is coupled to
One ramp generator or a ground connection；And
The ramp generator is coupled to the second switch, for generating a ramp signal；
Wherein, charged by an analog signal to the capacitance, the first switch couples the first end of the capacitance extremely
The analog signal, and the second switch couples the second end of the capacitance to the ground connection, to sample the simulation
The voltage of signal；
Wherein, when the voltage of the capacitance is equal to the voltage of the analog signal, the first switch couples the capacitance
The first end is to second input terminal of the comparator, and the second end of the second switch coupling capacitance is extremely
The ground connection, and multiple reference voltages are selectively input to the first input end of the comparator, the comparator ratio
The voltage of the capacitance and the multiple reference voltage simultaneously generate first comparative result；
Wherein, in the state change of first comparative result, the second switch couples the second end of the capacitance
To the ramp generator, to input the total value of the voltage of the ramp signal of the ramp generator and the capacitance
To second input terminal of the comparator, and one first reference voltage of the multiple reference voltage is inputted to the comparison
The total value of the voltage of the first input end of device, the comparator ramp signal and the capacitance with it is described
A pressure difference between first reference voltage simultaneously generates second comparative result；
Wherein, in the state change of second comparative result, a first voltage value of the ramp signal is obtained；
Wherein, according to the first voltage value of first reference voltage and the ramp signal, the simulation letter is obtained
Number a digital code.
9. analog-digital converter as claimed in claim 8, it is characterised in that the comparator uses a dichotomy or a line
Property the method capacitance voltage and the multiple reference voltage.
10. analog-digital converter as claimed in claim 8, it is characterised in that the state of first comparative result is in institute
Change when stating the voltage of capacitance compared with one second reference voltage of multiple reference voltages.
11. analog-digital converter as claimed in claim 10, it is characterised in that the analog signal is between the described first ginseng
It examines between voltage and second reference voltage.
12. analog-digital converter as claimed in claim 8, also comprising a logic memory unit, for according to described the
One the first voltage value of one reference voltage and the ramp signal obtains a digital code of the analog signal.
13. analog-digital converter as claimed in claim 12, it is characterised in that a high significance bit of the digital code can be by
First reference voltage obtains and remaining low order of the digital code can be by one first electricity of the ramp signal
Pressure value obtains.
14. analog-digital converter as claimed in claim 8, it is characterised in that the ramp signal has a negative slope.
15. analog-digital converter as claimed in claim 14 also comprising a counter, is coupled to the oblique wave and generates
Device, for being incremented by one therewith when the ramp signal often successively decreases or is incremented by single order.
16. analog-digital converter as claimed in claim 13, it is characterised in that a final digital code is that have to higher
It imitates position and remaining performs a mathematical operation compared with low order and obtains.
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| CN102209210A (en) * | 2010-03-30 | 2011-10-05 | 索尼公司 | Solid-state image pickup apparatus, signal processing method for the solid-state image pickup apparatus and electronic apparatus |
| CN102572325A (en) * | 2010-11-09 | 2012-07-11 | 三星电子株式会社 | Analog to digital converters, image sensor systems, and methods of operating the same |
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| CN102209210A (en) * | 2010-03-30 | 2011-10-05 | 索尼公司 | Solid-state image pickup apparatus, signal processing method for the solid-state image pickup apparatus and electronic apparatus |
| CN102572325A (en) * | 2010-11-09 | 2012-07-11 | 三星电子株式会社 | Analog to digital converters, image sensor systems, and methods of operating the same |
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