CN104599717A - Flash memory data storage method with error correction function - Google Patents

Flash memory data storage method with error correction function Download PDF

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CN104599717A
CN104599717A CN 201510039606 CN201510039606A CN104599717A CN 104599717 A CN104599717 A CN 104599717A CN 201510039606 CN201510039606 CN 201510039606 CN 201510039606 A CN201510039606 A CN 201510039606A CN 104599717 A CN104599717 A CN 104599717A
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error
area
sector
read
user data
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CN 201510039606
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CN104599717B (en )
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郑茳
肖佐楠
匡启和
王廷平
薛毅
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苏州国芯科技有限公司
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Abstract

The invention provides a flash memory data storage method with an error correction function. An ECC control register comprises a management byte enable bit, a left sector data enable bit, a right sector data enable bit, an error checkout enable bit and a management byte length control bit, wherein the management byte enable bit is used for controlling whether a management byte sector is subjected to error correction or not; the left sector data enable bit is used for controlling whether one sector in a user data area is subjected to error correction or not; the right sector data enable bit is used for controlling whether the other sector in the user data area is subjected to error correction; the error checkout enable bit is used for controlling whether an error checkout area is subjected to error correction; the management byte length control bit is used for configuring the length of a management byte; the user data area comprises a first user data area and at least one second user data area; the error checkout area comprises a first error checkout area and at least one second error checkout area; the first error checkout area is used for merging the corresponding first user data area and the management byte area to perform checkout error collection coding. According to the flash memory data storage method, the reading-writing speed of flash memory data is improved, the accuracy of reading or writing information is ensured, and the hardware utilization rate is high.

Description

具有纠错功能的闪存数据存储方法 Flash data storage method having an error correction function

技术领域 FIELD

[0001] 本发明涉及一种闪存数据存储方法,具体涉及一种具有纠错功能的闪存数据存储方法。 [0001] The present invention relates to a flash memory data storage method, particularly relates to a flash memory data storage method having an error correction function.

背景技术 Background technique

[0002] 现有nandfIash内存由若干物理块组成,如图1所示,物理块包含若干个物理页, 物理页包括管理字节区、若干个由至少两个扇区组成的用户数据区和若干个分别与所述用户数据区一一对应的错误校验区(ECC),每个错误校验区(ECC)用于校验并纠错其负责的用户数据区的错误代码,所述管理字节区用来建立逻辑页与物理页之间或者建立逻辑块与物理块之间的对应关系。 [0002] by a conventional nandfIash several physical memory blocks, as shown in FIG, 1 physical block includes a plurality of physical pages, including a physical page management byte area, a plurality of at least two sectors of the user data area and a number of a user data area respectively correspond to the error check region (ECC), each error checking area (ECC) for checking and error correction code is a user data area which it is responsible, the management word section area between logical pages and used to establish a physical page or establishing a correspondence between a logical block and a physical block. 管理理字节:一般是存储控制器厂家根据自己的管理算法定义的几个字节,在实际应用中需要单独读取这部分数据用来建立逻辑页与物理页之间或者建立逻辑块与物理块之间的对应关系和提供其它用户管理信息。 Management management byte: a storage controller manufacturers generally according to their management algorithm defined few bytes need to be read separately in practice this part of the data used to establish the logical blocks and physical connection between the physical and logical page or pages established correspondence and provide other user management information between the blocks.

[0003] Ik用户数据:包含用户数据两个扇区的数据。 [0003] Ik User data: user data comprising data of two sectors.

[0004] LBA: logical block address,逻辑块地址对应于用户一个扇区(512个字节)的数据,PC主端与存储类设备通信是以一个扇区(512个字节)为单位进行读写的。 [0004] LBA: logical block address, the logical block address corresponding to a user a sector (512 bytes) of data, communication with the PC main storage class device is the end of one sector (512 bytes) read units written.

[0005] ECC: error correction code,错误校验(代码)。 [0005] ECC: error correction code, error check (code). nandflash物理特性上使得其数据读写过程中会发生一定几率的错误,需要有个对应的错误检验和纠正的机制,所以存储控制器一般都提供ECC用于用户数据的检测和纠正.Nandflash的ECC,常见的算法有BCH和海明码; 当用户只需要Ik用户数据中前一个扇区或后一个扇区的数据,如果将整个Ik的数据都加载到存储控制器缓存中,势必存储控制器缓存需要多增加一个扇区大小的容量;另外本来只需要对一个扇区进行纠错,如果对整个Ik用户数据都进行纠错的话,必然降低了对nandflash的读速度。 So that the physical properties nandflash errors which occur during data read and write certain probability, the need for a mechanism corresponding to error checking and correction, the memory controller typically provides ECC for detecting and correcting the user data ECC .Nandflash common Hamming code and BCH algorithm; when a user only needs Ik sector or user data before the data of one sector, if the entire data Ik are loaded into the cache memory controller, the cache memory controller is bound We need more increase the capacity of a sector size; would only need one additional sector error correction, if the entire Ik user data for error correction, it certainly reduces the reading speed of the nandflash. 因此如何提高了对nandflash存储设备的读写速度,成为本领域技术人员努力的方向。 So how to improve the reading and writing speed of nandflash storage devices become skilled in the art direction of efforts.

发明内容 SUMMARY

[0006] 本发明目的是提供一种具有纠错功能的闪存数据存储方法,该方法提高了对nandflash存储设备的读写速度,且保证了读写信息准确性且硬件利用率高。 [0006] The object of the present invention is to provide a flash memory data storage method having an error correction function, which improves the speed of reading and writing nandflash storage device, and read and write information to ensure the high accuracy and hardware utilization.

[0007] 为达到上述目的,本发明采用的技术方案是:一种应用于nandflash存储设备的快速读写方法,所述nandflash存储器由若干物理块组成,物理块包含若干个物理页,物理页包括管理字节区、若干个由左、右两个扇区组成的用户数据区和若干个分别与所述用户数据区一一对应的具有纠错功能的错误校验区(ECC),每个错误校验区(ECC)用于校验并纠错其负责的用户数据区中错误代码,所述管理字节区用来建立逻辑页与物理页之间的对应关系或者建立逻辑块与物理块之间的对应关系; 还包括一组ECC控制寄存器用于对管理字节区、用户数据区及错误校验区分别控制是否进行纠错,此ECC控制寄存器包括: 管理字节使能位,用于控制是否对所述管理字节区进行纠错; 左扇区数据使能位,用于控制是否对所述用户数据区中一个扇区进行纠错处理; 右扇区数据使能 [0007] To achieve the above object, the present invention adopts the technical solution is: A nandflash applied fast read and write memory device, said memory nandflash by a number of physical blocks, the physical blocks comprising a plurality of physical pages, physical page comprising management byte area, from the plurality of left and right two sectors of the user data area and a plurality of user data area respectively correspond to the error check region (ECC) having a correction function, each error check region (ECC) for checking and correction of the user data area which is responsible for the error code, the management byte area is used to establish a correspondence between the logical page and the physical page or establishing a logical block and physical block of the correspondence between; further comprising a control register set of ECC bytes for management area, a user data area and the error check whether an error correction control regions respectively, the ECC control register comprising: a management byte enable bit, for controlling whether the management byte area for error correction; left sector data enable bit to control whether the user data area of ​​a sector of an error correction process; the right sector data enable 位,用于控制是否对所述用户数据区中另一个扇区进行纠错处理; 错误校验使能位,用于控制是否对所述错误校验区(ECC)进行纠错处理; 管理字节长度控制位,用于配置管理字节的长度,从而控制对物理页中使能的区域进行纠错,而对物理页中关闭的区域不进行纠错; 所述用户数据区包括一个第一用户数据区和至少一个第二用户数据区,所述错误校验区(ECC)包括一个第一错误校验区(ECC)和至少一个第二错误校验区(ECC),所述第一错误校验区(ECC)用于将其相应的第一用户数据区和管理字节区合在一起进行校验纠错编码; 在对nandflash进行读操作时:当在逻辑上读用户数据区中左扇区时,则使能ECC控制寄存器中左扇区数据使能位,如果左扇区位于第一用户数据区内,则配置ECC控制寄存器中管理字节长度控制位有效(长度为8),发送读命令将用户管理 Bits, is used to control whether the user data area to another sector error correction process; error check enable bit, for controlling whether the error check region (ECC) for error correction processing; management word section length control bits, bytes in length for configuration management, thereby controlling the area of ​​the physical page is enabled in error correction, while the physical page area without performing error correction closed; the user data area includes a first user data area and at least a second user data area, the area error check (ECC) error check comprises a first region (ECC) error check and at least one second region (ECC), the first error check region (ECC) for error correction encoding together verify their respective first user data area and management byte area; in a read operation when nandflash: when reading the user data area logically left a sector, it enables the left sector data ECC control register enable bit, if left at the first sector of the user data area, the configuration management byte ECC control register bits control the effective length (length 8), sending a read command to the user management 息读入BCH模块解码查错,但不加载到控制器缓存中,将左扇区数据读到BCH模块解码查错,并加载到控制器缓存中进行纠错,再将右扇区读到BCH模块解码查错,但不加载到控制器缓存中,否则,发送读命令将左扇区数据读到BCH模块解码查错,并加载到控制器缓存中进行纠错,再将右扇区读到BCH模块解码查错,但不加载到控制器的缓存中; 当在逻辑上读用户数据区中右扇区时,则使能ECC控制寄存器中右扇区数据使能位, 如果右扇区位于第一用户数据区内,则配置ECC控制寄存器中管理字节长度控制位有效(长度为8),发送读命令将用户管理信息和左扇区数据读入BCH模块解码查错,但不加载到控制器缓存中,将右扇区数据读到BCH模块解码查错,并加载到控制器缓存中进行纠错,否贝1J,发送读命令将左扇区读到BCH模块解码查错,但不加载到控制器的缓存中 BCH decoding the information read troubleshooting module, but not loaded into the cache controller, the left sector data read block decoding BCH error checking, and loaded into the cache controller performs error correction, and then the right to read the sector BCH Troubleshooting decoding module, but not loaded into the cache controller, otherwise, transmitting the read command to read the left sector data block decoding BCH error checking, and loaded into the cache controller performs error correction, and then the right to read the sector Troubleshooting BCH decoding module, but not loaded into the cache controller; when reading the user data area at the right logical sectors, the ECC control register to enable the right sector data enable bit, if the right sector is located a first user data area, the configuration management byte ECC control register bits control the effective length (length of 8), transmits a read command to the user management information read sector data and the left block decoding BCH error detection, but not loaded into the cache controller, read the sector data of the right block decoding BCH error checking, and loaded into the cache controller performs error correction, no shellfish 1J, left sector transmits a read command to read the block decoding BCH error checking, but not loaded into the cache controller 将扇区数据读到BCH模块解码查错,并加载到控制器缓存中进行纠错; 当在逻辑上读一个由左、右两个扇区组成的用户数据区时,则使能ECC控制寄存器中左、右扇区数据使能位,如果用户数据区为第一用户数据区,则配置ECC控制寄存器中管理字节长度控制位有效(长度为8),发送读命令将用户管理信息读入BCH模块解码查错,但不加载到控制器缓存中,将用户数据区数据读到BCH模块解码查错,并加载到控制器缓存中进行纠错,否则,发送读命令将用户数据区数据读到BCH模块解码查错,并加载到控制器缓存中进行纠错。 The sector data reading block decoding BCH error checking, and loaded into the cache controller performs the error correction; when a user data area is read from left and right two sectors logically, it enables the ECC control register left and right sector data enable bit, if the user data region is a first user data area, the configuration management byte ECC control register bits control the effective length (length of 8), the user sends a read command to read the management information Troubleshooting BCH decoding module, but not loaded into the cache controller, the user data area to read the data block decoding BCH error checking, and loaded into the cache controller performs error correction otherwise, sends the read command to read data user data area to the BCH decoder error checking module, and loaded into the cache controller performs error correction.

[0008] 上述技术方案中的进一步改进方案如下: 上述方案中,所述用户管理信息区长度为8个字节,包括4个字节的管理字节和4个字节的CRC校验码。 [0008] A further development of the above technical solution is as follows: the above-described embodiment, the user information management area length is 8 bytes, 4 bytes including management byte and 4-byte CRC.

[0009] 由于上述技术方案运用,本发明与现有技术相比具有下列优点和效果: 本发明具有纠错功能的闪存数据存储方法,其硬件在ECC控制寄存器提供了一个机制去使能或关闭相关区域数据是否需要纠错,所以如果我们只需要读取前一个扇区数据到存储控制器缓存中时,我们可以只使能左扇区数据区域,让整个Ik数据+BCH码需要经过ECC 通道进行查错,但只需要读左扇区数据到存储控制器缓存中进行纠错;基于上面同样的原因,我们在实际读取数据时,可能只需要读取右扇区数据到存储控制器缓存中,而且存储控制器缓存就只能提供一个扇区的容量可用(多读出的数据会覆盖掉前面的有用数据),因此,我们在只需要读取后一个扇区数据到存储控制器缓存中时,可以配置ECC控制寄存器, 只使能右扇区数据区域,将整个Ik数据+BCH码经过ECC通道进行查错,但 [0009] Using the above technical solution, the present invention and the prior art has the following advantages and effects compared: a flash memory data storage method of the present invention having an error correction function, in which the hardware ECC control register provides a mechanism to enable or disable whether the relevant regional data needs error correction, so before if we only need to read a sector of data to the cache memory controller, we can only be left sector data area, so that the entire data Ik + BCH ECC code to go through channels troubleshoot, but only need to read the left sector data to the memory controller for error correction buffer; the same reason above, we actually reading data, the right may only need to read the sector data to the cache memory controller , the cache memory controller and the memory controller cache can only provide data to a sector of a sector of the available capacity (data to read out the foregoing will overwrite useful data). Therefore, we only need to read the when can configure ECC control register, enables only the right sector data area, the entire Ik + BCH code data ECC channel through troubleshooting, but 读右扇区数据到存储控制器缓存中进行纠错;又提高了对nandflash存储设备的读写速度。 Right read sector data to the memory controller for error correction cache; but also improves the access speed of the storage device nandflash.

附图说明 BRIEF DESCRIPTION

[0010] 附图1为现有技术nandflash存储器结构示意图; 附图2为本发明nandflash存储器结构示意图; 附图3为本发明管理字节读操作流程图; 附图4为本发明ECC控制寄存器结构示意图; 附图5为本发明用户数据读操作流程图; 附图6为本发明用户数据写操作流程图。 [0010] Figure 1 is a prior art schematic diagram of a memory structure nandflash; Fig. 2 a schematic view of a memory structure nandflash present invention; Figure 3 is a flowchart of the operation management byte read invention; Figure 4 of the present invention, the structure of the ECC control register a schematic view; Figure 6 is a flowchart of the operation to write user data to the invention; Figure 5 a user data read operation flowchart of the present invention.

具体实施方式 detailed description

[0011] 下面结合附图及实施例对本发明作进一步描述: 实施例:一种具有纠错功能的闪存数据存储方法,所述nandflash存储器由若干物理块组成,物理块包含若干个物理页,物理页包括管理字节区、若干个由左、右两个扇区组成的用户数据区和若干个分别与所述用户数据区一一对应的具有纠错功能的错误校验区(ECC),每个错误校验区(ECC)用于校验并纠错其负责的用户数据区中错误代码,所述管理字节区用来建立逻辑页与物理页之间的对应关系或者建立逻辑块与物理块之间的对应关系; 还包括一组ECC控制寄存器用于对管理字节区、用户数据区及错误校验区分别控制是否进行纠错,此ECC控制寄存器包括: 管理字节使能位,用于控制是否对所述管理字节区进行纠错; 左扇区数据使能位,用于控制是否对所述用户数据区中一个扇区进行纠错处理; 右扇区数 Example:: [0011] and the following examples of the present invention will be further described in conjunction with the accompanying drawings flash data storage method having an error correction function, the memory consists of several nandflash physical blocks, the physical blocks comprising a plurality of physical pages, physical byte page includes a management area, the plurality of left and right two sectors of the user data area and a plurality of user data area respectively correspond to the error check region (ECC) having a correction function for each error check region (ECC) for checking and correction of the user data area which is responsible for the error code, the management byte area is used to establish a correspondence between the logical page and the physical page or establishing a logical block and the physical correspondence between the blocks; further comprising a control register set of ECC bytes for management area, a user data area and the error check whether an error correction control regions respectively, the ECC control register comprising: a management byte enable bit, for controlling whether said management byte area for error correction; left sector data enable bit to control whether the user data area of ​​a sector of an error correction process; the right sector number 使能位,用于控制是否对所述用户数据区中另一个扇区进行纠错处理; 错误校验使能位,用于控制是否对所述错误校验区(ECC)进行纠错处理; 管理字节长度控制位,用于配置管理字节的长度,从而控制对物理页中使能的区域进行纠错,而对物理页中关闭的区域不进行纠错; 所述用户数据区包括一个第一用户数据区和至少一个第二用户数据区,所述错误校验区(ECC)包括一个第一错误校验区(ECC)和至少一个第二错误校验区(ECC),所述第一错误校验区(ECC)用于将其相应的第一用户数据区和管理字节区合在一起进行校验纠错编码; 在对nandflash进行读操作时:当在逻辑上读用户数据区中左扇区时,则使能ECC控制寄存器中左扇区数据使能位,如果左扇区位于第一用户数据区内,则配置ECC控制寄存器中管理字节长度控制位有效(长度为8),发送读命令将用 Enable bit to control whether the user data area of ​​another sector error correction process; error check enable bit to control whether the error check region (ECC) for error correction processing; management control bit byte length, byte length for configuration management, thereby controlling the area of ​​the physical page is enabled in error correction, while the physical page area without performing error correction closed; the user data area includes a a first user data area and at least a second user data area, the area error check (ECC) error check comprises a first region (ECC) error check and at least one second region (ECC), said first an error check area (ECC) for error correction encoding together verify their respective first user data area and management byte area; in a read operation when nandflash: when reading the user data area logically when the left sector, it enables the left sector data ECC control register enable bit, if left at the first sector of the user data area, the configuration management byte ECC control register bits control the effective length (length 8 ), sends a read command with 管理信息读入BCH模块解码查错,但不加载到控制器缓存中,将左扇区数据读到BCH模块解码查错,并加载到控制器缓存中进行纠错,再将右扇区读到BCH模块解码查错,但不加载到控制器缓存中,否则,发送读命令将左扇区数据读到BCH模块解码查错,并加载到控制器缓存中进行纠错,再将右扇区读到BCH模块解码查错,但不加载到控制器的缓存中; 当在逻辑上读用户数据区中右扇区时,则使能ECC控制寄存器中右扇区数据使能位, 如果右扇区位于第一用户数据区内,则配置ECC控制寄存器中管理字节长度控制位有效(长度为8),发送读命令将用户管理信息和左扇区数据读入BCH模块解码查错,但不加载到控制器缓存中,将右扇区数据读到BCH模块解码查错,并加载到控制器缓存中进行纠错,否贝1J,发送读命令将左扇区读到BCH模块解码查错,但不加载到控制器的 Management information reading BCH error detection decoding module, but not loaded into the cache controller, the left sector data read block decoding BCH error checking, and loaded into the cache controller performs error correction, and then the right to read the sector Troubleshooting BCH decoding module, but not loaded into the cache controller, otherwise, transmitting the read command to read the left sector data block decoding BCH error checking, and loaded into the cache controller performs error correction, and then the right sector read BCH block decoding to error detection, but not loaded into the cache controller; when reading the user data area at the right logical sectors, the ECC control register to enable the right sector data enable bit, if the right sector located in the first user data area, the configuration management byte ECC control register bits control the effective length (length of 8), transmits a read command to the user management information read sector data and the left block decoding BCH error detection, but does not load the cache controller, the right to read the sector data block decoding BCH error checking, and loaded into the cache controller performs error correction, no shellfish 1J, left sector transmits a read command to read the BCH decoding module troubleshooting, but not loaded to the controller 存中,将扇区数据读到BCH模块解码查错,并加载到控制器缓存中进行纠错; 当在逻辑上读一个由左、右两个扇区组成的用户数据区时,则使能ECC控制寄存器中左、右扇区数据使能位,如果用户数据区为第一用户数据区,则配置ECC控制寄存器中管理字节长度控制位有效(长度为8),发送读命令将用户管理信息读入BCH模块解码查错,但不加载到控制器缓存中,将用户数据区数据读到BCH模块解码查错,并加载到控制器缓存中进行纠错,否则,发送读命令将用户数据区数据读到BCH模块解码查错,并加载到控制器缓存中进行纠错; 在对nandflash进行写操作时:当对第一用户数据区中写数据时,将用户管理信息与待写入第一用户数据区的数据经BCH模块进行编码生成BCH码,再将用户管理信息、待写入第一用户数据区的数据和BCH码分别写入用户管理信息区、第一用户 Memory, to read the sector data block decoding BCH error checking, and loaded into the cache controller performs the error correction; when a user data area is read from left and right two sectors logically, it enables ECC control register left and right sector data enable bit, if the user data region is a first user data area, the configuration management byte ECC control register bits control the effective length (length of 8), transmitting the read management command to the user BCH decoding information reading module troubleshooting, but not loaded into the cache controller, the user data area to read the data block decoding BCH error checking, and loaded into the cache controller performs error correction otherwise, transmitting the user data read command area data read block decoding BCH error checking, and loaded into the cache controller performs the error correction; nandflash when the write operation: when a first write data to the user data area, the subscriber management information to be written to the first a user data area data is encoded to generate a BCH code, and then the user information management module via the BCH, a BCH code data and the first user data area to be written to write user management information area, respectively, a first user 据区和第一错误校验区(ECC); 当对第二用户数据区中写数据时,则管理字节长度控制位无效,再将待写入第二用户数据区的数据经BCH模块进行编码生成BCH码,再将待写入第二用户数据区的数据和BCH 码分别写入第二用户数据区和第二错误校验区(ECC)。 According to the first region and the error check region (the ECC); when writing data to the second user data area, the management control byte length invalid bits, then the data to be written to the second user data area is performed by the BCH module code generation BCH code, BCH code, and then the data of the second user data area to be written to write the second user data area and the second error check region (ECC), respectively.

[0012] 上述物理页包括4个用户数据区,4个错误校验区(ECC),上述用户管理字节为4 个字节,CRC校验码长度为4个字节。 [0012] The physical page includes a user data area 4, four error check region (the ECC), said user management bytes 4 bytes, CRC check code length of 4 bytes.

[0013] 上述内容进一步阐述如下。 [0013] The above is further illustrated as follows.

[0014] 对管理字节会单独采用一个查错纠错算法: 从实际分析和测试的情况来看,绝大多数nandflash的绝大部分物理页这几个字节都没有错,只有极少数物理页有错。 [0014] management byte is a troubleshooting error correction algorithms alone: ​​from the actual analysis and testing point of view, the vast majority of most of the physical page nandflash these bytes are not wrong, only a handful of physical page wrong. 我们只采用一个简单的查错算法,只判定有没有错,如有错,则采用将管理字节和后面的Ik数据作为一个整体,利用原有的ECC模块进行纠错,如没错,系统就直接获取管理字节数据。 We only use a simple error checking algorithm only determines there is nothing wrong, if wrong data is used to manage Ik bytes and rear as a whole, using the original ECC block for error correction, such as yes, the system direct access to management byte of data.

[0015] 用户只需要读一个扇区的数据我们将实际存放的每一个最小读写单位数据分成4个区域,如表1所示: 表1 [0015] Users only need to read a sector of data will be stored in each of the actual minimum read unit of data is divided into four regions, as shown in Table 1: Table 1

Figure CN104599717AD00061

结合相关的硬件,使每一个区域都可以单独控制要不要进行纠错,另外每次管理字节的长度是可配置的,从而可以控制只对使能的区域进行纠错,而对关闭的区域不进行纠错。 With related hardware, so that each area can be controlled individually or not error correction, each additional management byte length is configurable, so that the area can be controlled only energy error correction, and the area of ​​the closed no error correction.

[0016] 本发明设计相关的硬件机制,再结合软件算法实现相关功能。 [0016] The present invention is related to the design of hardware mechanism, combined with software algorithms related functions. 以一个长度为8个字节的管理信息,采用BCH纠错算法的一个实际应用为例,进行以下详细设计说明。 To a length of 8 bytes management information using a BCH error correction algorithm practical example, the following detailed description.

[0017] I. ECC control register 如附图4 所不。 [0017] I. ECC control register 4 as the drawings are not.

[0018] Ctrl_MIEn,Ctrl_LeftEn,Ctrl_RightEn 及ECC_En:这些控制位用于控制相关区域要不要纠错。 [0018] Ctrl_MIEn, Ctrl_LeftEn, Ctrl_RightEn and ECC_En: These control bits are used to control the relevant region or not error correction. 我们数据的存放顺序为8个字节(管理信息)+左扇区(512个字节)数据+ 右扇区(512个字节)+BCHCode,根据系统的设计需要,使能相应的控制位(设置为"1") 表示相应的部分数据需要纠错,关闭相应的控制位(设置为"〇")表示相应的部分数据不需要纠错。 Our order of storing 8 bytes of data (management information) + left sector (512 bytes) of data + right sector (512 bytes) + BCHCode, depending on design requirements of the system, enable the corresponding control bit (set to "1") indicates an error correction data to corresponding parts, closes the corresponding control bit (set to "square") indicates that the corresponding data does not need error correction portions.

[0019] MI [3:0]:选择管理字节的长度,如表2所示: 表2 [0019] MI [3: 0]: selection management bytes in length, as shown in Table 2: Table 2

Figure CN104599717AD00071

对管理字节读写的处理: 管理信息长度为4个字节的用户管理字节和4个字节的CRC校验码,总共8个字节。 Bytes read and write processing for the management: management information length of 4 bytes of user management byte and 4-byte CRC checksum, a total of 8 bytes. 4个字节的用户管理字节用于建立虚拟逻辑页与实际物理页的对应关系,以及其它用户自定义的管理信息等。 4 bytes of user management byte for establishing a virtual logical page corresponding relationship to the actual physical page, and the management information and other user-defined. 4个字节的CRC校验只是用于检测4个字节的管理字节是否有错,无纠错功能,因此算法简单,速度快,成本低。 If 4 bytes of CRC check bytes only for detecting four-byte error management, without error correction, so the algorithm is simple, fast, and low cost. 如CRC判断有错,则采用将管理字节和后面的Ik数据作为一个整体,利用原有的ECC模块进行纠错,如没错,系统就直接获取管理字节数据。 The CRC determination is an error, using the data management Ik bytes and rear as a whole, using the original ECC block for error correction, such as right, direct access to the system management of data bytes.

[0020] 对只读取IK数据中左扇区的处理: 在对数据的实际读写操作中,对于要求对IK数据进行纠错的nandflash,因为我们所有的数据都是以lK+BCHCode作为一个整体写入到nandflash中,因此我们读取数据时,也必须将这lK+BCHCode作为一个整体进行读取。 [0020] IK processing the read only data sectors left: in actual reading and writing operations of data, the requirement for error correction nandflash IK data, because the data are based on all of our as a lK + BCHCode overall written to nandflash, so when we read the data, these must also be lK + BCHCode read as a whole. 但我们在实际读取数据时,可能只需要读取前一个扇区数据到存储控制器缓存中,而且存储控制器缓存就只能提供一个扇区的容量可用(多读出的数据会覆盖掉后面的有用数据),因此,我们结合ECC硬件的相关支持模块做个特别处理; 硬件在ECC控制寄存器提供了一个机制去使能或关闭相关区域数据是否需要纠错,所以如果我们只需要读取前一个扇区数据到存储控制器缓存中时,我们可以只使能左扇区数据区域,让整个Ik数据+BCH码需要经过ECC通道进行查错,但只需要读左扇区数据到存储控制器缓存中进行纠错。 But before we actually read in the data, you may only need to read a sector of data to a cache memory controller, cache and memory controller can only provide a sector capacity available (multi-data read out will be overwritten useful data later), therefore, we combine the ECC hardware support module to be associated special treatment; hardware ECC control register provides a mechanism to enable or disable the need for correction relevant region data, so if we only need to read a front sector data to the cache memory controller, we can make only a left sector data area, so that the data Ik + BCH codes ECC required troubleshooting through channel, but only need to read the sector data into the left storage control cache in error correction.

[0021] 对只读取IK数据中右扇区的处理: 基于上面同样的原因,我们在实际读取数据时,可能只需要读取右扇区数据到存储控制器缓存中,而且存储控制器缓存就只能提供一个扇区的容量可用(多读出的数据会覆盖掉前面的有用数据),因此,我们在只需要读取后一个扇区数据到存储控制器缓存中时,可以配置ECC控制寄存器,只使能右扇区数据区域,将整个Ik数据+BCH码经过ECC通道进行查错,但只读右扇区数据到存储控制器缓存中进行纠错。 [0021] The process of reading only the data in the right sector IK: the same reason above, when we read the actual data, the right may only need to read the sector data to the cache memory controller and the memory controller it can only provide a buffer capacity available sector (the data to read out the foregoing will overwrite useful data). Therefore, we only need to read a sector of data after the memory controller to the cache, you may be configured ECC control register, enables only the right sector data area, the entire Ik + BCH code data through ECC error checking channel, but right-sector data read-only buffer to the memory controller for error correction.

[0022] 上述实施例只为说明本发明的技术构思及特点,其目的在于让熟悉此项技术的人士能够了解本发明的内容并据以实施,并不能以此限制本发明的保护范围。 [0022] Examples of the above-described embodiments illustrate the technical concept and features of the invention, its object is to only allow those skilled in the art to understand the present invention and according to embodiments, and not limit the scope of this invention. 凡根据本发明精神实质所作的等效变化或修饰,都应涵盖在本发明的保护范围之内。 Where an equivalent changes or modifications made from the spirit of the present invention, shall fall within the scope of the present invention.

Claims (1)

  1. 1. 一种具有纠错功能的闪存数据存储方法,所述nan壯lash存储器由若干物理块组成,物理块包含若干个物理页,物理页包括管理字节区、若干个由左、右两个扇区组成的用户数据区和若干个分别与所述用户数据区一一对应的具有纠错功能的错误校验区(ECC), 每个错误校验区(ECC)用于校验并纠错其负责的用户数据区中错误代码,所述管理字节区用来建立逻辑页与物理页之间的对应关系或者建立逻辑块与物理块之间的对应关系;其特征在于: 还包括一组ECC控制寄存器用于对管理字节区、用户数据区及错误校验区分别控制是否进行纠错,此ECC控制寄存器包括: 管理字节使能位,用于控制是否对所述管理字节区进行纠错; 左扇区数据使能位,用于控制是否对所述用户数据区中一个扇区进行纠错处理; 右扇区数据使能位,用于控制是否对所述用户数据区 1. A flash memory data storage method having an error correction function, the nan strong lash memory consists of several physical blocks, the physical blocks comprising a plurality of physical pages, including a physical page management byte area, from the plurality of left and right two a user data area and a plurality of sectors of user data area respectively correspond to the error check region (ECC) having a correction function for each region the error check (ECC) for checking and correction user data area which is responsible for the error code, the management byte area is used to establish a correspondence between the logical page and the physical page or establishing a correspondence between a logical block and physical block; characterized in that: further comprising a set of ECC control register for management byte area, a user data area and the error check whether an error correction control regions respectively, the ECC control register comprising: a management byte enable bits control whether or not the management byte area error correction; left sector data enable bit to control whether the user data area of ​​a sector of an error correction process; the right sector data enable bit, whether the user control data area 另一个扇区进行纠错处理; 错误校验使能位,用于控制是否对所述错误校验区(ECC)进行纠错处理; 管理字节长度控制位,用于配置管理字节的长度,从而控制对物理页中使能的区域进行纠错,而对物理页中关闭的区域不进行纠错; 所述用户数据区包括一个第一用户数据区和至少一个第二用户数据区,所述错误校验区(ECC)包括一个第一错误校验区(ECC)和至少一个第二错误校验区(ECC),所述第一错误校验区(ECC)用于将其相应的第一用户数据区和管理字节区合在一起进行校验纠错编码; 在对nan壯lash进行读操作时:当在逻辑上读用户数据区中左扇区时,则使能ECC控制寄存器中左扇区数据使能位,如果左扇区位于第一用户数据区内,则配置ECC控制寄存器中管理字节长度控制位有效(长度为8),发送读命令将用户管理信息读入BCH模块解码查错,但不加载 Another sector error correction process; error check enable bit to control whether the error check region (ECC) for error correction processing; management byte length control bits, bytes in length for configuration management thereby controlling the area of ​​the physical page is enabled in error correction, while the physical page area without performing error correction closed; the user data area includes a first user data area and at least a second user data area, the said area error check (ECC) error check comprises a first region (ECC) error check and at least one second region (ECC), the first error check region (ECC) for their respective first user data area and a management area together checksum byte error correction encoding; nan strong when the lash read operation: when reading the user data area logically left sector, the ECC control register to enable left sector data enable bit, if left at the first sector of the user data area, the configuration management byte ECC control register bits control the effective length (length of 8), transmits a read command to read the user information management module BCH decoding error detection, but does not load 控制器缓存中,将左扇区数据读到BCH模块解码查错,并加载到控制器缓存中进行纠错,再将右扇区读到BCH模块解码查错,但不加载到控制器缓存中,否则,发送读命令将左扇区数据读到BCH模块解码查错,并加载到控制器缓存中进行纠错,再将右扇区读到BCH模块解码查错,但不加载到控制器的缓存中; 当在逻辑上读用户数据区中右扇区时,则使能ECC控制寄存器中右扇区数据使能位, 如果右扇区位于第一用户数据区内,则配置ECC控制寄存器中管理字节长度控制位有效(长度为8),发送读命令将用户管理信息和左扇区数据读入BCH模块解码查错,但不加载到控制器缓存中,将右扇区数据读到BCH模块解码查错,并加载到控制器缓存中进行纠错,否贝1J,发送读命令将左扇区读到BCH模块解码查错,但不加载到控制器的缓存中,将扇区数据读到BCH模块解码查错, Cache controller, the left sector data read block decoding BCH error checking, and loaded into the cache controller performs error correction, and then the right to read a sector block decoding BCH error detection, but not loaded into the cache controller otherwise, transmit a read command to read the left sector data block decoding BCH error checking, and loaded into the cache controller performs error correction, and then the right to read a sector block decoding BCH error checking, but is not loaded to the controller cache; when reading the user data area in the right sector logic, the enable control for the right sector data ECC enable register bit, if the right is located in a first sector of the user data area, then the ECC control register configuration effective management control bit byte length (length of 8), the user sends a read command to read the management information and the sector data into the left block decoding BCH error detection, but not loaded into the cache controller, the right sector data read BCH block decoding error checking, and loaded into the cache controller performs error correction, no shellfish 1J, transmits a read command to read a sector of the left block decoding BCH error detection, but not loaded into the cache controller, read the sector data BCH decoding the troubleshooting module, 加载到控制器缓存中进行纠错; 当在逻辑上读一个由左、右两个扇区组成的用户数据区时,则使能ECC控制寄存器中左、右扇区数据使能位,如果用户数据区为第一用户数据区,则配置ECC控制寄存器中管理字节长度控制位有效(长度为8),发送读命令将用户管理信息读入BCH模块解码查错,但不加载到控制器缓存中,将用户数据区数据读到BCH模块解码查错,并加载到控制器缓存中进行纠错,否则,发送读命令将用户数据区数据读到BCH模块解码查错,并加载到控制器缓存中进行纠错; 所述用户管理信息区长度为8个字节,包括4个字节的管理字节和4个字节的CRC校验码。 Loaded into the cache controller performs the error correction; when a user data area is read from left and right two sectors logically, the ECC control register to enable the left and right sector data enable bit, if the user a first data area is a user data area, the configuration management byte ECC control register bits control the effective length (length of 8), the user sends a read command to read the management information block decoding BCH error detection, but not loaded into the cache controller in the user data area to read the data block decoding BCH error checking, and loaded into the cache controller performs error correction otherwise, transmitting the user data area read command to read data block decoding BCH error checking, and loaded into the cache controller performs the error correction; the user management information area length is 8 bytes, 4 bytes including management byte and 4-byte CRC.
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