Content of the invention
The invention provides a kind of super-radiance light emitting diode temperature-control circuit, to solve in laser instrument temperature control field
In, traditional tec control device cannot meet the needs of the temperature sensitive degree of laser instrument.
A kind of super-radiance light emitting diode temperature-control circuit that the present invention provides for solving the above problems, comprising:
Temperature survey amplifier module, pid compensate amplification module, thermal module, voltage module, oscillator module, parameter
Module, Pulse width modulation module and field-effect control module;
Wherein, described temperature survey amplifier module is compensated amplification module with described pid and is connected by corresponding pin, with reality
Existing described temperature survey amplifier module compensates the control of amplification module to pid;
Described temperature survey amplifier module pass through corresponding pin receive the temperature reference value that described thermal module sets with
And the measured temperature of collection;
Described temperature survey amplifier module is powered to described voltage module by corresponding pin;
Described temperature survey amplifier module passes through corresponding pin and adjusts described Pulse width modulation module control signal;
Described parameter module is connected with described oscillator module, controls described oscillator;
Described Pulse width modulation module receives described pid by corresponding pin and compensates amplification module, temperature survey amplification
Device module and oscillator module control signal, field-effect control module described in output control;
Described field-effect control module receives the control signal of described Pulse width modulation module by corresponding pin, output
To external output;
Described voltage module is powered to described thermal module by corresponding pin.
Further, described temperature survey amplifier module is adn8830 chip.
Further, pid compensate amplification module include first resistor, second resistance, 3rd resistor, the first electric capacity, second
Electric capacity and the 3rd electric capacity;
Wherein, the first end of the first end of described first resistor and described first electric capacity and described adn8830 chip the tenth
Two pins are connected, the second end of described first resistor and the second end of described second resistance and described adn8830 chip the 13rd
Pin is connected, the second end of the first end of described second resistance and described first electric capacity and the first end of described 3rd resistor, described
The first end of the second electric capacity is connected;
Second end of described 3rd resistor is connected with the first end of described 3rd electric capacity, the second end of described 3rd electric capacity with
Second end of described second electric capacity and described adn8830 chip the 14th pin are connected.
Further, described thermal module includes the 4th resistance, the 5th resistance, the 6th resistance, the 7th resistance, the 8th electricity
Resistance, the 4th electric capacity, the first diode, the second diode, the first triode, the second triode and first interface composition;
Wherein, the first end of the first end of described first interface and described 4th electric capacity, the first end of described 4th resistance
And described adn8830 chip crus secunda is connected, the second end ground connection of described first interface, the second termination of described 4th electric capacity
Ground;
First end ground connection, the first end of the second end and described 6th resistance and the described adn8830 core of described 5th resistance
Piece the 4th pin is connected, and the second end of described 6th resistance is connected with the second end of described 4th resistance;
The first end of described 7th resistance is connected with dc source, and the second end is connected with described first diode cathode, institute
State the first diode cathode to be connected with described first transistor collector, described first transistor emitter ground connection, base stage and institute
State adn8830 chip the 5th pin to be connected;
The first end of described 8th resistance is connected with dc source, and the second end is connected with described second diode cathode, institute
State the second diode cathode to be connected with described second transistor collector, described second transistor emitter ground connection, base stage and institute
State adn8830 chip first pin to be connected.
Further, described voltage module includes benchmark power supply unit, no drives power supply unit, maximum voltage power supply unit
And output voltage unit;
Wherein, described benchmark power supply unit passes through described adn8830 chip the 7th pin and described 4th resistance the secondth end
And the second end of described 6th resistance is connected;
Described no driving power supply unit includes the 5th electric capacity, and described no driving power supply unit passes through described adn8830 chip
Octal is connected with the first end of described 5th electric capacity and direct current supply, the second end ground connection of described 5th electric capacity;
Described maximum voltage power supply unit passes through described adn8830 chip the 15th pin ground connection;
Described output voltage unit is connected with output monitoring equipment by described adn8830 chip the 16th pin.
Further, described parameter module includes the 9th resistance, the tenth resistance, the 11st resistance, the 6th electric capacity and the 7th
Electric capacity;
Wherein, the first end of described 9th resistance and the first end of described 6th electric capacity and described adn8830 chip the 3rd
Ten pins are connected to the ground;Second end of the second end of described 9th resistance and described 6th electric capacity and described adn8830 chip the
The first end of 29 pins and described tenth resistance is connected, the second end of described tenth resistance and described adn8830 chip the
Seven pins are connected;
The first end of described 7th electric capacity is connected with described adn8830 chip the 27th pin, the second end and described the
The first end of 11 resistance, described adn8830 chip the 25th pin and ground are connected, the second end of described 11st resistance
It is connected with described adn8830 chip the 26th pin.
Further, described Pulse width modulation module and oscillator module are embedded in described adn8830 chip.
Further, described field-effect control module includes field-effect driver element and field-effect bridge;
Wherein, described field-effect driver element include the first driving chip, the second driving chip, the 12nd resistance, the tenth
Three resistance, the 14th resistance, the 15th resistance, the 16th resistance, the 17th resistance, the 18th resistance, the 19th resistance, the 8th
Electric capacity, the 9th electric capacity, the tenth electric capacity, the 11st electric capacity and the 12nd electric capacity;
Described tenth electric capacity first end is connected with described adn8830 chip the 20th pin and dc source, and the described tenth
Electric capacity second pin is grounded;
The first end of described 12nd resistance, the first end of described 13rd resistance and described adn8830 chip the 20th
Two pins are connected, and the second end of described 12nd resistance is connected with the 7th pin of described first driving chip, and the described 13rd
Second end of resistance is connected with the second pin of described first driving chip, described first driving chip the 3rd pin ground connection;
The first end of described 14th resistance and described adn8830 chip the 21st pin and described 15th resistance
First end is connected, and the second end of described 14th resistance is connected with the 3rd pin of described first driving chip, and the described 15th
Second end of resistance is connected with described first driving chip the 5th pin, described 8th electric capacity first end and described 9th electric capacity
First end is connected and is grounded, and the second end of described 8th electric capacity is connected with the second end of described 9th electric capacity and and dc source
And described first driving chip the 6th pin is connected;
The first end of described 16th resistance and the first end of described 17th resistance and described adn8830 chip the 11st
Pin is connected, and the second end of described 16th resistance is connected with described second driving chip the 4th pin, described 17th resistance
Second end is connected with described second driving chip the 5th pin;
Described 18th resistance first end and described 19th resistance first end and described adn8830 chip the tenth pin phase
Even, described 18th resistance the second end is connected with described second driving chip the 7th pin, described 19th resistance the second end and institute
State the second driving chip second pin to be connected, described 11st electric capacity first end is connected and connects with described 12nd electric capacity first end
Ground, described 11st electric capacity the second end is connected with described 12nd electric capacity the second end and drives core with dc source and described second
Piece the 6th pin is connected.
Further, described field-effect bridge include the 13rd electric capacity, the 14th electric capacity, the 15th electric capacity, the 16th electric capacity,
17th electric capacity, the 20th resistance, the 21st resistance, the 22nd resistance, the 23rd resistance, the 24th resistance,
25 resistance, the first FET, the second FET, the 3rd FET, the 4th FET, the first inductance and second
Interface forms;
Wherein, described first FET, the 4th FET are p-type FET, the second FET, the 3rd effect
Should manage as N-shaped FET;
Described first FET drain electrode is connected with the 13rd electric capacity first end and dc source, and grid drives with described first
Dynamic chip the 5th pin is connected, and source electrode is connected with described first inductance first end and described second FET drain electrode;Described
13 electric capacity the second ends ground connection, described first inductance the second end and described 14th electric capacity first end, described 20th resistance the
One end and described second interface first end are connected, described 14th electric capacity the second end ground connection, described 20th resistance the second end with
Described 21st resistance first end and the 24th resistance first end are connected, described 21st resistance the second end ground connection, institute
State the 24th resistance the second end to be connected with described adn8830 chip the 19th pin, described second fet gate and institute
State the first driving chip the 7th pin to be connected, source ground;
Described 3rd FET grounded drain, grid is connected with described second driving chip the 7th pin, source electrode and institute
State the 15th electric capacity first end, described 22nd resistance first end, described second interface second end and described 4th field-effect
Pipe drain electrode is connected;Described 15th electric capacity the second end ground connection, described 22nd resistance the second end and described 23rd resistance
First end and the 25th resistance first end, the 17th electric capacity first end are connected, described 23rd resistance the second end ground connection, institute
State the 25th resistance the second end to be connected with described adn8830 chip the 9th pin, described second fet gate with described
Second driving chip the 5th pin and described 17th electric capacity the second end are connected, and source electrode is connected with described 16th electric capacity first end
And connect dc source, described 16th electric capacity the second end ground connection.
Further, described first driving chip, the second driving chip are ir4427, described first FET, second
FET, the 3rd FET, the 4th FET are irf7343.
The present invention proposes a kind of super-radiance light emitting diode temperature-control circuit, by existing tec controller adn8830
On the basis of, add field-effect control module, using ir4427 field-effect amplifier part and irf7343 FET, Jin Erti
The control range of high voltage and electric current and accuracy.
Embodiment one
Fig. 1 is that a kind of super-radiance light emitting diode temperature-control circuit construction module provided in an embodiment of the present invention is illustrated
Figure.This circuit includes temperature survey amplifier module 110, pid compensates amplification module 120, thermal module 130, voltage module
140th, parameter module 150, oscillator module 160, Pulse width modulation module 170 and field-effect control module 180;
Wherein, described temperature survey amplifier module 110 compensates amplification module 120 by corresponding pin phase with described pid
Even, to realize the control that described temperature survey amplifier module 110 compensates amplification module 120 to pid;
Described temperature survey amplifier module 110 passes through corresponding pin and receives the temperature base that described thermal module 130 sets
Quasi- value and the measured temperature of collection;
Described temperature survey amplifier module 110 passes through corresponding pin and described voltage module 140 is powered;
Described temperature survey amplifier module 110 adjusts described Pulse width modulation module 170 control signal;
Described parameter module 150 is connected with described oscillator module 160, controls described oscillator module 160;
Described Pulse width modulation module 170 receives described pid by corresponding pin and compensates amplification module 120, temperature survey
Amount amplifier module 110 and oscillator module 160 control signal, field-effect control module 180 described in output control;
Described field-effect control module 180 receives the control letter of described Pulse width modulation module 170 by corresponding pin
Number, export to external output;
Described voltage module 140 is powered to described thermal module 130 by corresponding pin.
Fig. 2 is a kind of super-radiance light emitting diode temperature-control circuit schematic diagram provided in an embodiment of the present invention.
Further, described temperature survey amplifier module 110 is adn8830 chip.
Further, pid compensation amplification module includes first resistor r1, second resistance r2,3rd resistor r3, the first electric capacity
C1, the second electric capacity c2 and the 3rd electric capacity c3;
Wherein, the first end of the first end of described first resistor r1 and described first electric capacity c1 and described adn8830 chip
12nd pin is connected, the second end of described first resistor r1 and the second end of described second resistance r2 and described adn8830 core
Piece the 13rd pin is connected, second end of the first end of described second resistance r2 and described first electric capacity c1 and described 3rd resistor r3
First end, described second electric capacity c2 first end be connected;
Second end of described 3rd resistor r3 is connected with the first end of described 3rd electric capacity c3, and the of described 3rd electric capacity c3
Two ends are connected with second end of described second electric capacity c2 and described adn8830 chip the 14th pin.
Wherein, described first resistor r1, second resistance r2,3rd resistor r3, the first electric capacity c1, the second electric capacity c2 and the 3rd
Electric capacity c3 forms integrating amplification circuit, and being connected with corresponding pin to play compensates the effect amplified.
Further, described thermal module 130 includes the 4th resistance r4, the 5th resistance r5, the 6th resistance r6, the 7th resistance
R7, the 8th resistance r8, the 4th electric capacity c4, the first diode d1, the second diode d2, the first triode q1, the second triode q2
And first interface h1 composition;
Wherein, the first end of the first end of described first interface h1 and described 4th electric capacity c4, described 4th resistance r4
First end and described adn8830 chip crus secunda are connected, the second end ground connection of described first interface h1, described 4th electric capacity c4's
Second end ground connection;The external thermistor of described first interface h1, for by extraneous collecting temperature signal transmission to described adn8830
Chip, the ground wire at second end of the 4th electric capacity c4 is signal ground;
The first end ground connection of described 5th resistance r5, the first end of the second end and described 6th resistance r6 and described
Adn8830 chip the 4th pin is connected, and second end of described 6th resistance r6 is connected with second end of described 4th resistance r4;
Adn8830 chip the 4th pin is normal temperature design temperature pin, for established standardses temperature, the first of described 5th resistance r5
Termination signal ground;
The first end of described 7th resistance r7 is connected with dc source, the second end and described first diode d1 positive pole phase
Even, described first diode d1 negative pole is connected with described first triode q1 colelctor electrode, and described first triode q1 emitter stage connects
Ground, base stage are connected with described adn8830 chip the 5th pin, and the first triode q1 transmitting connects power supply ground;For display circuit work
Make state, when completing working condition debugging, described first diode d2 is bright.
The first end of described 8th resistance r8 is connected with dc source, the second end and described second diode d2 positive pole phase
Even, described second diode d2 negative pole is connected with described second triode q2 colelctor electrode, and described second triode q2 emitter stage connects
Ground, base stage are connected with described adn8830 chip first pin, and the second triode q2 transmitting connects power supply ground.For display circuit work
Make state, when working condition is abnormal, described second diode d2 is bright.
Further, described voltage module 140 includes benchmark power supply unit, no drives power supply unit, maximum voltage to power
Unit and output voltage unit;
Wherein, described benchmark power supply unit passes through described adn8830 chip the 7th pin and described 4th resistance r4 the second end
And second end of described 6th resistance r6 is connected;Power to described first interface h1 circuit for reference voltage.
Described no driving power supply unit includes the 5th electric capacity c5, and described no driving power supply unit passes through described adn8830 core
Piece octal is connected with the first end of described 5th electric capacity c5 and direct current supply, the second end ground connection of described 5th electric capacity c5;Should
Ground is signal ground;
Described maximum voltage power supply unit passes through described adn8830 chip the 15th pin ground connection, and this ground is signal ground;
Described output voltage unit is connected with output monitoring equipment by described adn8830 chip the 16th pin.
Further, described parameter module includes the 9th resistance r9, the tenth resistance r10, the 11st resistance r11, the 6th electricity
Hold c6 and the 7th electric capacity c7;
Wherein, the first end of described 9th resistance r9 and the first end of described 6th electric capacity c6 and described adn8830 chip
30th pin is connected to the ground, and this ground is signal ground;Second end of described 9th resistance r9 and the second of described 6th electric capacity c6
End is connected with the first end of described adn8830 chip the 29th pin and described tenth resistance r10, described tenth resistance r10
The second end be connected with described adn8830 chip the 7th pin;Wherein, second end of described tenth resistance r10 is used for receiving and supplies
Electricity, described 9th resistance r9, described 6th electric capacity c6 are used for preparing output phase place;
The first end of described 7th electric capacity c7 is connected with described adn8830 chip the 27th pin, the second end with described
The first end of the 11st resistance r11, described adn8830 chip the 25th pin and ground are connected, and this ground is signal ground, described
Second end of the 11st resistance r11 is connected with described adn8830 chip the 26th pin.Wherein, described adn8830 chip
25 pins, the 26th pin, the 27th pin are used for preparing initial value, the frequency of output signal,;
Further, described Pulse width modulation module 170 and oscillator module 160 are embedded in described adn8830 chip
In.
Further, described field-effect control module 180 includes field-effect driver element and field-effect bridge;
Wherein, described field-effect driver element includes the first driving chip ir1, the second driving chip ir2, the 12nd resistance
R12, the 13rd resistance r13, the 14th resistance r14, the 15th resistance r15, the 16th resistance r16, the 17th resistance r17,
18 resistance r18, the 19th resistance r19, the 8th electric capacity c8, the 9th electric capacity c9, the tenth electric capacity c10, the 11st electric capacity c11 and
12 electric capacity c12;
Described tenth electric capacity c10 first end is connected with described adn8830 chip the 20th pin and dc source, this direct current
Between power supply and power supply are powered, string has resistance to be used for improving fan-out capability, described tenth electric capacity c10 second pin ground connection, and this ground is electric
Source ground, is installed with resistance between this power supply ground and signal ground;
The first end of described 12nd resistance r12, the first end of described 13rd resistance r13 and described adn8830 chip
22nd pin is connected, the 7th pin phase of second end of described 12nd resistance r12 and described first driving chip ir1
Even, second end of described 13rd resistance r13 is connected with the second pin of described first driving chip ir1, described first driving
Chip ir1 the 3rd pin is grounded;
Wherein said first driving chip ir1 is used for improving signal to increase driving force, and described 12nd resistance r12 uses
In feedback;
The first end of described 14th resistance r14 and described adn8830 chip the 21st pin and described 15th electricity
The first end of resistance r15 is connected, the 4th pin phase of second end of described 14th resistance r14 and described first driving chip ir1
Even, second end of described 15th resistance r15 is connected with described first driving chip ir1 the 5th pin, described 8th electric capacity c8
First end is connected and is grounded with the first end of described 9th electric capacity c9, and this ground is power supply ground, second end of described 8th electric capacity c8
It is connected with second end of described 9th electric capacity c9 and be connected with dc source and described first driving chip ir1 the 6th pin, should
Power supply is+12v;
Wherein, described 15th resistance r15 is used for feeding back, and described 8th electric capacity c8 and described 9th electric capacity c9 are used for filtering
Ripple;
The first end of described 16th resistance r16 and the first end of described 17th resistance r17 and described adn8830 chip
11st pin is connected, and second end of described 16th resistance r16 is connected with described second driving chip ir2 the 4th pin, institute
State the 17th resistance r17 the second end to be connected with described second driving chip ir2 the 5th pin;
Described 18th resistance r18 first end and described 19th resistance r19 first end and described adn8830 chip the tenth
Pin is connected, and described 18th resistance r18 the second end is connected with described second driving chip ir2 the 7th pin, described 19th electricity
Resistance r19 second end is connected with described second driving chip ir2 second pin, described 11st electric capacity c11 first end and described the
12 electric capacity c12 first ends are connected and are grounded, described 11st electric capacity c11 the second end and described 12nd electric capacity c12 the second end
It is connected and is connected with dc source and described second driving chip ir2 the 6th pin, this power supply is+12v.
Wherein, described 18th resistance r18, the 19th resistance r19 are used for feeding back, described 11st electric capacity c11, the 12nd
Electric capacity c12 is used for filtering.
Further, described field-effect bridge include the 13rd electric capacity c13, the 14th electric capacity c14, the 15th electric capacity c15,
16th electric capacity c16, the 17th electric capacity c17, the 20th resistance r20, the 21st resistance r21, the 22nd resistance r22,
23 resistance r23, the 24th resistance r24, the 25th resistance r25, the first FET q3, the second FET q4,
3rd FET q5, the 4th FET q6, the first inductance l1 and second interface h2 composition;
Wherein, described first FET q3, the 4th FET q6 are p-type FET, the second FET q4, the
Three FET q5 are N-shaped FET;
Described first FET q3 drain electrode be connected with the 13rd electric capacity c13 first end and dc source, this power supply for+
12v, grid is connected with described first driving chip ir1 the 5th pin, source electrode and described first inductance l1 first end and described the
Two FET q4 drain electrodes are connected;Described 13rd electric capacity c13 the second end ground connection, this ground is power supply ground, described first inductance l1
Second end and described 14th electric capacity c14 first end, described 20th resistance r20 first end and described second interface h2 first end
It is connected, described 14th electric capacity c14 the second end ground connection, this ground is power supply ground, described 20th resistance r20 the second end and described the
21 resistance r21 first ends and the 24th resistance r24 first end are connected, described 21st resistance r21 the second end ground connection,
This ground is power supply ground, and described 24th resistance r24 the second end is connected with described adn8830 chip the 19th pin, described the
Two FET q4 grids are connected with described first driving chip ir1 the 7th pin, source ground, and this ground is power supply ground.
Described 3rd FET q5 grounded drain, grid is connected with described second driving chip ir2 the 7th pin, source electrode
With described 15th electric capacity c15 first end, described 22nd resistance r22 first end, described second interface h2 second end and institute
State the 4th FET q6 drain electrode to be connected;Described 15th electric capacity c15 the second end ground connection, this ground is power supply ground, the described 20th
Two resistance r22 the second ends and described 23rd resistance r23 first end and the 25th resistance r25 first end, the 17th electric capacity
C17 first end is connected, described 23rd resistance r23 the second end ground connection, and this ground is power supply ground, described 25th resistance r25
Second end is connected with described adn8830 chip the 9th pin, described 4th FET q6 grid and described second driving chip
Ir2 the 5th pin and described 17th electric capacity c17 the second end are connected, and source electrode is connected simultaneously with described 16th electric capacity c16 first end
Connect dc source, this dc source is+12v, described 16th electric capacity c16 the second end ground connection, this ground is power supply ground.
Further, described first driving chip ir1, the second driving chip ir2 are ir4427, described first FET
Q3, the second FET q4, the 3rd FET q5, the 4th FET q6 are irf7343.
Wherein, during super-radiance light emitting diode temperature-control circuit of the present invention work, described first FET q3, the 3rd
FET q5 is in same working condition;Described second FET q4, the 4th FET q6 are in same working condition.
The upper described preferred embodiment being only the embodiment of the present invention, is not limited to the embodiment of the present invention, for ability
For field technique personnel, the embodiment of the present invention can have various change and change.All spirit in the embodiment of the present invention and principle
Within any modification, equivalent substitution and improvement made etc., should be included within the protection domain of the embodiment of the present invention.