CN104575609B - Chip identifier reading/writing method in OTP register - Google Patents

Chip identifier reading/writing method in OTP register Download PDF

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CN104575609B
CN104575609B CN201310513218.2A CN201310513218A CN104575609B CN 104575609 B CN104575609 B CN 104575609B CN 201310513218 A CN201310513218 A CN 201310513218A CN 104575609 B CN104575609 B CN 104575609B
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chip identifier
sha
register
otp register
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CN104575609A (en
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李林
仲亚东
夏建明
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Huali Zhixin (Chengdu) integrated circuit Co., Ltd
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HWA CREATE SHANGHAI CO Ltd
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Abstract

The present invention relates to reading/writing method, the chip identifier reading/writing method in a kind of one time programming OTP register is disclosed.The chip identifier being written into one time programming OTP register in the present invention is received and saved in temporary register by system interface, system obtains the meeting previously stored data of auto-destruct after the chip identifier, the operation for carrying out secure hash algorithm SHA to the chip identifier of acquisition later encrypts, the encrypted chip identifier is written in the setting address in OTP register again, when reading chip identifier from OTP register, SHA operation encryption is carried out to above-mentioned encrypted chip identifier again, end user obtains by encrypted chip identifier twice.Compared with prior art, the chip identifier that user is shown in the present invention passes through encryption twice, because the calculating process of SHA is unidirectionally irreversible, even hacker is also difficult the chip identifier for being inversely inferred to really save inside OTP register.

Description

Chip identifier reading/writing method in OTP register
Technical field
The present invention relates to identifier reading writing methods, in particular to the chip identifier in one time programming OTP register is read Write method.
Background technique
More and more extensive with Embedded Application, the safety of product also becomes more and more important.It is on the one hand to protect Hardware design is protected, still further aspect is prevented also for the safety of product itself by hacker attack (HACKED).In order to protect core Data in piece, portion provides a kind of special register: OTP register (One Time in the chip for more and more manufacturers Programmable, one time programming register).The characteristics of OTP register is that every group of OTP register includes multiple bits, For each bit, information is all one-time write, non-rewritable, but different bits can be written several times.Fall Electricity does not lose data, can read data repeatedly.
Chip identifier Chip ID has uniqueness and unmodifiable requirement, so OTP deposit is generally used at present Device is realized.The write-in of current Chip ID and reading method are as shown in Figure 1:
It is step 101 first, obtains the Chip ID of setting;
Followed by step 102, the Chip ID of setting is written to OTP register;
Then step 103 reads the Chip ID of setting when needing to read Chip ID from OTP register;
Final step 104, user obtain the Chip ID of the setting read from OTP register.
The Chip ID of setting, which is written to OTP register, in usual step 2 is realized using electrical fuse e-Fuse, When produced from silicon chip, all chips are all similarly to be worth, such as 16 0x0 write when the Chip ID of setting After when entering to OTP register, the value of chip can be changed to the Chip ID of setting, and 16 0x1, last position change for example Become, the value that final system is read is exactly the Chip ID set in step 101.During this although outside of chip does not have Variation, but since physical influence of the e-Fuse to chip is bigger, if this chips dissection and analysis is just very easy to find The position of rewriting can be easy to conversed analysis with optical microscopy and crack these Chip ID.It can certainly be setting be written The chip (corresponding ID be 0x0) of Chip ID be rewritten as 0x1, realize duplicate copy, thus the safety of product itself made At very big threat.
In addition after system obtains the Chip ID set in the prior art, the interim deposit for saving this Chip ID is set Still this in store Chip ID in standby, can cause a hidden trouble in this way to the safety of Chip ID.
Summary of the invention
The purpose of the present invention is to provide the chip identifications in the OTP register in a kind of one time programming OTP register Accord with reading/writing method so that after obtaining chip identifier Chip ID can previously stored data destroying, and user with Manufacturer uses the available unique chip identifier Chip ID of OTP register, and is difficult to inversely be cracked and illegally answered System.
In order to solve the above technical problems, the present invention provides the chip identifiers in a kind of one time programming OTP register Reading/writing method comprising the steps of:
Receive the chip identifier for being written in one time programming OTP register;Wherein, received chip identification Symbol is stored in temporary register;
Obtain the chip identifier being stored in the temporary register;
The operation that secure hash algorithm SHA is carried out to the chip identifier of the acquisition, obtains encrypted through SHA Chip identifier;
Chip identifier encrypted through SHA is written in the setting address in the OTP register;
When reading the chip identifier from the OTP register, obtains and set ground described in the OTP register Data in location;
The operation that the data of the acquisition are carried out to SHA, obtains reading data encrypted through SHA;
Reading data encrypted through SHA are shown to user;
Wherein, after obtaining the chip identifier being stored in the temporary register, the temporary register is destroyed The data of middle preservation.
Compared with prior art, chip identifier can be the core received before being written to OTP register in the present invention Piece identifier is stored in temporary register, and system will be automatic white after the chip identifier in temporary register is acquired The data in temporary register are destroyed, the safety of chip identifier is effectively protected, prevents by unauthorized theft.In addition, this hair The chip identifier that OTP register is written in bright is the chip identifier of the encryption obtained after SHA operation, the encryption Chip identifier is different from the above-mentioned chip identifier being written in OTP register, therefore can deposit to OTP is written to Chip identifier in device encrypts, and prevents from being cracked;Also, the chip of this encryption is read from OTP register The operation that a SHA can also be passed through when identifier, makes the chip identifier for being eventually displayed to user pass through encryption twice, on State be shown to user chip identifier it is also not identical with the encrypted chip identifier being written in OTP register, this Sample has just made further encipherment protection to the chip identifier being written in OTP register.Since the calculating process of SHA is It is unilateral and nonreversible, even so hacker is also difficult inversely to be inferred to according to the chip identifier for being eventually displayed to user True chip identifier inside OTP register.In addition, SHA is a string of message indefinite length, it is subject at specific algorithm Reason, obtains the data of regular length, this data theoretically cracks highly difficult, and Project Realization is also impossible, so this Chip identifier in invention be also it is unique, it is irreproducible.
Preferably, before the computing of SHA, it also comprises the steps of:
Using the chip identifier being written in OTP register as the first field, after first field Second field is for storing stop position, and the third field after second field is to fill field, in the filling field Each bit is filled with 0;
The 4th field after the third field is used to indicate the number of bits that first field occupies;
First field, the second field, the bit length summation of third field and the 4th field are 512 bits;
It, will be described in the step of carrying out the operation of SHA in the chip identifier being written into OTP register 512 bits of the first field, the second field, third field and the 4th field composition, carry out the operation of the SHA.
In SHA calculating process, since the data of input must be 512 bits, pass through the standard before above-mentioned SHA operation Standby step, can be by the bit length summation integrated treatment of the first field, the second field, third field and the 4th field at applicable In 512 bits of SHA operation, the operability and accuracy of SHA operation ensure that.
Preferably, the chip identifier in the present invention includes ID set by user and ID set by manufacturer, uses this side Method, even knowing the research staff of whole design details, has lacked any one as long as protecting vendor code or personal code work Code cannot all crack said chip identifier, blank chip can not be rewritten as the chip of specific Chip ID, than list There are a vendor code or personal code work safety coefficient higher.
In addition, the present invention is to obtain the ID set by user and ID set by manufacturer by system interface.The system connects Mouth is at certain sequence, being convenient for next step SHA algorithm to it ID set by user and ID merging treatment set by manufacturer Carry out calculation process.
In addition, being respectively used to save the ID set by user and manufacturer setting there are two temporary registers in the present invention Fixed ID keeps the input process of chip identifier in good order, it is not easy to malfunction.
In addition, in OTP register in the present invention for storing the field of ID set by user, for the OTP register In the 72nd bit from low to high to the 103rd bit;For storing the field of ID set by manufacturer, posted for the OTP The 104th bit in storage from low to high is to the 247th bit.
Due to using the chip identifier information after SHA algorithm operation that can be written to OTP register in a certain order In, and also will be by the operation of SHA algorithm when reading chip identifier from OTP register, and OTP is deposited in the present invention The field of ID set by user and the field of ID set by manufacturer have one-to-one position storage relationship in device, this is just The accuracy of SHA algorithm provides guarantee, keeps entire calculating process in perfect order, it is not easy to occur since positional relationship is incorrect Caused operation mistake.
As a further improvement of the present invention, the OTP register will be written to by the encrypted chip identifier of SHA In setting address in step before, can also comprise the steps of:
Chip identifier encrypted through SHA is tested by software, is judged whether the encryption succeeds, such as Fruit encrypts successfully, then enters back into and described chip identifier encrypted through SHA is written to setting in the OTP register Determine the step in address.
The chip identifier of mistake can be written to OTP register to avoid due to SHA operation mistake by above-mentioned software test In, moreover, if software test encryption failed, can also provide the prompt of SHA operation mistake, believe convenient for user's time update correlation Breath, increases operability of the invention.
In addition, the OTP register in the present invention can be to blow laser type OTP register, fusing fuse type OTP deposit Device or electrical fuse efuse type OTP register.The characteristics of OTP register of these types is exactly one-time write, can not be changed It writes, if it is desirable, specific sequence number can also be written according to the needs of client in chip manufacturer, in this way, each chip can There is a different ID number, avoid being replicated, meet chip identifier Chip ID with uniqueness and not modifiable wants It asks.
Detailed description of the invention
Fig. 1 is the chip identifier reading/writing method flow chart in one time programming OTP register in the prior art;
Fig. 2 is the chip identifier read-write in the one time programming OTP register in first embodiment according to the present invention Method flow diagram;
Fig. 3 is the chip identifier read-write in the one time programming OTP register in first embodiment according to the present invention Method schematic diagram;
Fig. 4 is the chip identifier of the write-in one time programming OTP register in first embodiment according to the present invention Data channel;
Fig. 5 is the chip identifier of the reading one time programming OTP register in first embodiment according to the present invention Data channel;
Fig. 6 is the chip identifier of the write-in one time programming OTP register in second embodiment according to the present invention Data channel.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with attached drawing to each reality of the invention The mode of applying is explained in detail.However, it will be understood by those skilled in the art that in each embodiment of the present invention, In order to make the reader understand this application better, many technical details are proposed.But even if without these technical details and base In the various changes and modifications of following embodiment, each claim of the application technical side claimed also may be implemented Case.
The first embodiment of the present invention is related to the chip identifier read-write sides in a kind of one time programming OTP register Method.Detailed process is as shown in Figure 2.
It is step 201 first, the chip identifier for being written in OTP register is received by system interface.
The Chip ID includes ID's set by user, ID set by manufacturer, other customized ID or any combination thereof ID uses the combination of ID set by user and ID set by manufacturer, as shown in Figure 3 in the present embodiment.In this way, As long as protecting ID set by user and ID set by manufacturer, even knowing the research staff of whole design details, lack times It anticipates one and is worth, cannot all crack said chip identifier, blank chip can not be rewritten as the chip of specific Chip ID, Than singly having a vendor code or personal code work safety coefficient higher.
Then step 202, the chip identifier that system interface is received are stored in temporary register.
In the present embodiment, it there are two above-mentioned temporary registers, is respectively used to save the ID set by user and factory The ID of quotient's setting, keeps the input process of chip identifier in good order, it is not easy to malfunction.
Then step 203, obtains to destroy after the chip identifier that is stored in temporary register and saves in temporary register Data.
The chip identifier being stored in temporary register is also needed just can be by system by the process of a merging treatment It obtaining, this process merged is used for ID set by user and ID merging treatment set by manufacturer into certain sequence, so as to For subsequent SHA operation.It is specific as shown in Figure 4:
System interface is written into number 1 in ID(Fig. 4 being set by the user in OTP register first) and manufacturer set Number 2 in fixed ID(Fig. 4) composition Chip ID as the first field, such as the number 3 in Fig. 4, then in above-mentioned first field Rear the second field stores stop position, such as the number 4 in Fig. 4, later using the third field after above-mentioned second field as to fill out Field is filled, each bit in the filling field is filled with 0, such as the number 5 in Fig. 4, finally by the 4th word after third field Duan Zuowei indicates the number of bits that above-mentioned first field occupies, such as the number 6 in Fig. 4.
Above-mentioned first field, the second field, the bit length summation of third field and the 4th field are 512 bits, In the bit length of the 4th field be 64 bits, excess-three section bit length is that 512 bits subtract 64 bits, i.e., 448 Position bit.
After the completion of above-mentioned merging process, system obtains the chip identifier being stored in temporary register, later system meeting The data that automatic white destruction is stored in temporary register, thus effectively protect the safety of chip identifier, prevent By unauthorized theft.
SHA operation could be carried out to the value of above-mentioned setting by above-mentioned merging process, in SHA calculating process, due to defeated The data entered must be 512 bits, can be by the first field, the second word by the preparation process before above-mentioned SHA operation The bit length summation integrated treatment of section, third field and the 4th field ensure that at 512 bits for being suitable for SHA operation The operability and accuracy of SHA operation.
Followed by step 204, secure hash algorithm SHA(Secure Hash Algorithm is used) algorithm is to from interim The Chip ID obtained in register carries out operation encryption.
SHA algorithm is a string of setting values indefinite length, is subject to specific algorithm process, obtains the number of regular length According to that is, encrypted Chip ID.
By taking ID set by user [31:0] as an example, as shown in Figure 4.
ID(set by user prepares write-in) initial data is 0XF66FAA55, by SHA operation, encrypted user is set Fixed ID is 0x8558c7b5d53fb052af498dcf9b17fb487fe877e9=SHA (F66FAA55), is actually written into OTP The value that is saved of register is 0x7fe877e9, is 0x66c1e9f19 by obtaining the data that OTP register is read out after SHA A4891253a100e86cac4239a58604ad7=SHA (7fe877e9), the ID for the user setting that software systems are read are 0x58604ad7。
Software thinks that write-in value efuse_pgm_word [103:72] (corresponding ID [31:0] set by user) is 0xF66FAA55, but the practical save value efuse_pgm_real_word [103:72] of OTP register is 0x7FE877E9.
Due to the process of SHA operation be it is unilateral and nonreversible, after carrying out operation to the Chip ID of setting using SHA algorithm It encrypts obtained Chip ID and is different Chip with the original Chip ID being written in OTP register in step 101 ID, therefore in the case where not knowing ID initial data set by user and ID initial data set by manufacturer, even known Specific OTP register in ID, and cannot be replicated.
SHA algorithm includes that many algorithms such as SHA160/224/256/384/512 and MD4/MD5/MD6 are realized, is theoretically broken Solve that highly difficult (i.e. current mathematical analysis theory has been proven that current mathematical tool cannot be by dividing encrypted data Analysis, counter push away crack out initial data before encrypting), Project Realization is impossible (not to be available the mode of force exhaustion, root Initial data before encrypting is cracked out according to encrypted data).Its feature is as follows:
1) former input data is pushed away by data summarization is counter, is highly difficult from computational theory;
2) want to find two groups of different data and correspond to identical data summarization, it is from computational theory and very tired Difficult;
3) variation of any pair of input data, the data summarization for having very high probability that it is caused to generate are totally different.
Since the specific algorithm of SHA has been existing mature technology, details are not described herein.
Step 205 is subsequently entered, it will be in the setting address through the encrypted Chip ID write-in OTP register of SHA.Wherein, When OTP register is written in system, ID [143:0] set by manufacturer and ID set by user [31:0] must be written in two times, write Enter data by the way that OTP register could really be written after SHA encryption.Specifically:
First above-mentioned encrypted Chip ID, the N bits of low level are taken, the N is the bit long of ID set by manufacturer Degree, then above-mentioned N bits are written in the field for being used to store ID set by manufacturer in OTP register, then by this N N1 bit of the low level in a bit is written in the field for storing ID set by user in OTP register. Wherein, N1 is the bit length of ID set by user.
So far, writing process terminates.
As shown in figure 4, in the present embodiment, the field for being used to store ID set by user in OTP register, for this The 72nd bit in OTP register from low to high is to the 103rd bit, for storing the field of ID set by manufacturer, For the 104th bit in the OTP register from low to high to the 247th bit.
Due to using the chip identifier information after SHA algorithm operation that can be written to OTP register in a certain order In, and in the present invention in OTP register the field of ID set by user and the field of ID set by manufacturer be have it is one-to-one Relationship is stored in position, this just provides guarantee for the accuracy of SHA algorithm, keeps entire calculating process in perfect order, it is not easy to Occur due to the incorrect caused operation mistake of positional relationship.
The write-in of OTP register is by electrical fuse e-Fuse, blows laser or fusing fuse is realized in this step , wherein efuse type OTP register includes the efuse register of the efuse register of coupled capacitor type, series crystal type With the efuse register of dielectric breakdown type.The OTP register feature that these modes are realized be can only one-time write, can not It rewrites, but can repeat to read data, if it is desirable, specific sequence can also be written according to the needs of client in chip manufacturer Row number avoids being replicated in this way, each chip can have a different ID number, meets Chip ID with uniqueness and not Modifiable requirement.
Step 206, it reads and passes through encrypted chip identifier.
Step 207, second of operation encryption is carried out using encrypted chip identifier of the SHA algorithm to reading.
It also will be by the merging treatment in step 203 before carrying out second of operation encryption to encrypted Chip ID Process, as shown in the number 3,4,5 and 6 in Fig. 5, the merging treatment process in this step is with the merging treatment mistake in step 203 Cheng Xiangtong is not repeated herein.
It is also identical with the SHA calculating process of step 204 for crossing into the operation for merging treated Chip ID and carrying out SHA, It is not repeated herein.
Second of SHA operation by this step, has obtained encrypting Chip ID twice.
Step 208 is finally entered, user obtains the chip identifier by encrypting twice.
The Chip ID that user obtains in this step is different from the Chip ID being written in OTP register in step 205 Chip ID, in step 203 from temporary register obtain the Chip ID being written in OTP register be also different Chip ID, the Chip ID that user obtains is the equal of that have passed through the Chip ID encrypted twice, greatly increases Chip ID Safety coefficient.
Herein also by taking ID set by user [31:0] as an example, as shown in Figure 5.
System is a kind of including encryption and decryption and key pipe by DRM(DigitalRightManage digital rights management Reason realize function of keeping secret (Security) hardware) read OTP register in ID when, encrypted by SHA, user can be divided into Two kinds of situations of the ID of setting and ID set by manufacturer, being embodied in hardware_sel [1:0], (this two can be 00/01/10/ 11, corresponding 4 kinds of functions selection respectively corresponds the functions such as CustomID/DevelopID and self-test).Specific address is in DRM (Security) (system software can configure this address, change hardware_sel, real at offset 0x0100 [4:3] Existing different function), 2 ' b10 are to read ID set by user, and 2 ' b11 are to read ID set by manufacturer.It is handled, is reached by SHA160 To the purpose of hash hash.
For system, ID [143:0] either set by manufacturer or ID [31:0] set by user are not that OTP is posted The data that storage saves, the result that software is read all are that have passed through the result of SHA encryption.User is in upper-level system one-time write After ID set by user is 0xF66FAA55, the ID set by user read every time is 0x58604ad7.
So far, the read-write process of entire chip identifier terminates.
Compared with prior art, chip identifier can be the core received before being written to OTP register in the present invention Piece identifier is stored in temporary register, and system will be automatic white after the chip identifier in temporary register is acquired The data in temporary register are destroyed, the safety of chip identifier is effectively protected, prevents by unauthorized theft.In addition, this hair The chip identifier that OTP register is written in bright is the chip identifier of the encryption obtained after SHA operation, the encryption Chip identifier is different from the above-mentioned chip identifier being written in OTP register, therefore can deposit to OTP is written to Chip identifier in device encrypts, and prevents from being cracked;Also, the chip of this encryption is read from OTP register The operation that a SHA can also be passed through when identifier, makes the chip identifier for being eventually displayed to user pass through encryption twice, on State be shown to user chip identifier it is also not identical with the encrypted chip identifier being written in OTP register, this Sample has just made further encipherment protection to the chip identifier being written in OTP register.Since the calculating process of SHA is It is unilateral and nonreversible, even so hacker is also difficult inversely to be inferred to according to the chip identifier for being eventually displayed to user True chip identifier inside OTP register.In addition, SHA is a string of message indefinite length, it is subject at specific algorithm Reason, obtains the data of regular length, this data theoretically cracks highly difficult, and Project Realization is also impossible, so this Chip identifier in invention be also it is unique, it is irreproducible.
The step of various methods divide above, be intended merely to describe it is clear, when realization can be merged into a step or Certain steps are split, multiple steps are decomposed into, as long as comprising identical logical relation, all in the protection scope of this patent It is interior;To adding inessential modification in algorithm or in process or introducing inessential design, but its algorithm is not changed Core design with process is all in the protection scope of the patent.
Second embodiment of the present invention is related to the chip identifier reading/writing method in a kind of OTP register.Second implements Mode is roughly the same with first embodiment, is in place of the main distinction: in the first embodiment, by step 204, using After SHA algorithm is to operation encryption is carried out from the chip identifier obtained in temporary register, it is just directly entered the write-in of step 205 The movement of OTP register.And in second embodiment of the invention, after step 204, system can also add a detection dress It sets, as shown in Figure 6.Whether this detection device is correct for detecting SHA operation, if testing result is correct, is just directly entered Step 205, if testing result is incorrect, 205 will not be entered step, but prompts user's operation mistake, while can also go out Existing miscue, prompts user to modify relevant parameter, increases the operability of the present embodiment.
It will be understood by those skilled in the art that the respective embodiments described above are to realize specific embodiments of the present invention, And in practical applications, can to it, various changes can be made in the form and details, without departing from the spirit and scope of the present invention.

Claims (9)

1. the chip identifier reading/writing method in a kind of one time programming OTP register, which is characterized in that comprise the steps of:
Receive the chip identifier for being written in one time programming OTP register;Wherein, received chip identifier is protected There are in temporary register;
Obtain the chip identifier being stored in the temporary register;
The operation that secure hash algorithm SHA is carried out to the chip identifier of the acquisition, obtains chip encrypted through SHA Identifier;
Chip identifier encrypted through SHA is written in the setting address in the OTP register;
When reading the chip identifier from the OTP register, obtain in setting address described in the OTP register Data;
The operation that the data of the acquisition are carried out to SHA, obtains reading data encrypted through SHA;
Reading data encrypted through SHA are shown to user;
Wherein, it after obtaining the chip identifier being stored in the temporary register, destroys and is protected in the temporary register The data deposited;
It wherein, also include following step before the chip identifier being written into OTP register, the operation for carrying out SHA It is rapid:
Using the chip identifier being written in OTP register as the first field, after first field second For field for storing stop position, the third field after second field is filling field, each ratio in the filling field Special position is filled with 0;
The 4th field after the third field is used to indicate the number of bits that first field occupies;
First field, the second field, the bit length summation of third field and the 4th field are 512 bits;
In the chip identifier being written into OTP register, in the step of carrying out the operation of SHA, by described first 512 bits of field, the second field, third field and the 4th field composition, carry out the operation of the SHA.
2. the chip identifier reading/writing method in OTP register according to claim 1, which is characterized in that will be described It also include following step before the step of data of acquisition carry out the operation of SHA, obtain reading data encrypted through SHA It is rapid:
Using the data of the acquisition as the first field, the second field after first field is used to store stop position, Third field after second field is filling field, and each bit in the filling field is filled with 0;
The 4th field after the third field is used to indicate the number of bits that first field occupies;
First field, the second field, the bit length summation of third field and the 4th field are 512 bits;
In the operation that the data of the acquisition are carried out to SHA, in the step of obtaining readings data encrypted through SHA, general 512 bits of first field, the second field, third field and the 4th field composition, carry out the operation of the SHA.
3. the chip identifier reading/writing method in OTP register according to claim 1, which is characterized in that
The chip identifier includes ID set by user and ID set by manufacturer.
4. the chip identifier reading/writing method in OTP register according to claim 3, which is characterized in that pass through system Interface obtains the ID set by user and ID set by manufacturer.
5. the chip identifier reading/writing method in OTP register according to claim 3, which is characterized in that described interim There are two registers, is respectively used to save the ID set by user and ID set by manufacturer.
6. the chip identifier reading/writing method in OTP register according to claim 3, which is characterized in that will be through described The encrypted chip identifier of SHA is written in the step in the setting address in the OTP register, includes following sub-step It is rapid:
In the data obtained after the SHA operation, the N bits of low level are taken, the N is the ID's set by manufacturer Bit length;
The N bits are written in the field for being used to store ID set by manufacturer in the OTP register;It will be described N1 bit of the low level in N bits is written to the word for being used to store ID set by user in the OTP register Duan Zhong;Wherein, the N1 is the bit length of the ID set by user.
7. the chip identifier reading/writing method in OTP register according to any one of claim 1 to 6, feature exist In, the step being written to chip identifier encrypted through SHA in setting address in the OTP register it Before, also comprise the steps of:
Chip identifier encrypted through SHA is tested by software, is judged whether the encryption succeeds, if plus Close success, then with entering back into the setting being written to chip identifier encrypted through SHA in the OTP register Step in location.
8. the chip identifier reading/writing method in OTP register according to any one of claim 1 to 6, feature exist In the OTP register is the OTP register of any one following type:
Blow laser type OTP register, fusing fuse type OTP register, electrical fuse efuse type OTP register.
9. the chip identifier reading/writing method in OTP register according to claim 8, which is characterized in that
The efuse type OTP register includes the efuse register of the efuse register of coupled capacitor type, series crystal type With the efuse register of dielectric breakdown type.
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