CN104575433A - GOA reset circuit and driving method, array substrate, display panel and device - Google Patents

GOA reset circuit and driving method, array substrate, display panel and device Download PDF

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Publication number
CN104575433A
CN104575433A CN201510057316.9A CN201510057316A CN104575433A CN 104575433 A CN104575433 A CN 104575433A CN 201510057316 A CN201510057316 A CN 201510057316A CN 104575433 A CN104575433 A CN 104575433A
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China
Prior art keywords
goa
reset circuit
input end
transistor
reset
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Pending
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CN201510057316.9A
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Chinese (zh)
Inventor
孙志华
李承珉
吴行吉
姚树林
刘宝玉
汪建明
马伟超
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Beijing BOE Display Technology Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Beijing BOE Display Technology Co Ltd
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Priority to CN201510057316.9A priority Critical patent/CN104575433A/en
Publication of CN104575433A publication Critical patent/CN104575433A/en
Pending legal-status Critical Current

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Abstract

The invention provides a GOA reset circuit, a driving method of the GOA reset circuit, an array substrate, a display panel and a device. The GOA reset circuit is used for resetting a GOA unit, wherein the GOA unit comprises multiple input ends; the GOA reset circuit comprises a switching unit; and the switching unit is connected to a reset signal, is respectively connected with the multiple input ends and is used for controlling the multiple input ends to connect to a high-level signal when the reset signal is effective. When the GOA unit shuts down, the multiple input ends of the GOA unit are connected to the high-level signal so as to open all the channels, the cost is saved, the heat dissipation function is improved, the residual charges are released, and the ghost shadow is eliminated.

Description

GOA reset circuit and driving method, array base palte, display panel and device
Technical field
The present invention relates to display technique field, particularly relate to a kind of GOA reset circuit and driving method, array base palte, display panel and device.
Background technology
TFT-LCD (Thin Film Transistor-Liquid Crystal Display, thin film transistor-liquid crystal display) GOA (Gate On Array, array base palte row cutting) design of unit, be that gate driver circuit is arranged on array base palte, eliminate grid drive chip and reach the object reduced costs.
Reset function is not had in the design of existing GOA unit, the current potential of all GOA signals (described GOA signal comprises start signal STV, clock signal clk, low level signal VSS) can only be moved to high level by external power supply part, when shutdown, all passages could be opened simultaneously, release residual charge, eliminates ghost.The design proposal of existing external power source part adds reset schemes in shift register, all causes very large difficulty to the cost of shift register and heat radiation.
Summary of the invention
Fundamental purpose of the present invention is to provide a kind of GOA reset circuit and driving method, array base palte, display panel and device, solve in prior art and can only move the current potential of all GOA signals to high level by arranging external power supply in a shift register, when shutdown, all passages could be opened simultaneously, release residual charge, eliminate ghost, but all cause the problem of very large difficulty to the cost of shift register and heat radiation simultaneously.
In order to achieve the above object, the invention provides a kind of GOA reset circuit, for resetting to GOA unit, described GOA unit comprises multiple input end, and described GOA reset circuit comprises:
Switch element, access reset signal, and be connected with described multiple input end respectively, for when described reset signal is effective, control described multiple input end access high level signal.
During enforcement, described switch element comprises multiple transistor;
The grid of described multiple transistor all accesses described reset signal, and described high level signal is all accessed in the first pole of described multiple transistor, and the second pole of described multiple transistor accesses described multiple input end respectively.
During enforcement, described multiple transistor is all PMOS (positive channel Metal OxideSemiconductor, the field effect of p NMOS N-channel MOS N) transistor, effective when described reset signal is low level.
During enforcement, described multiple transistor is all NMOS (negative channel Metal OxideSemiconductor, the field effect of n NMOS N-channel MOS N) transistor, effective when described reset signal is high level.
During enforcement, described multiple input end comprises clock signal input terminal, start signal input end and low level signal input end.
Present invention also offers a kind of driving method of GOA reset circuit, for driving above-mentioned GOA reset circuit, described driving method comprises:
When GOA unit is shut down, reset signal is effective, and switch element controls multiple input end access high level signals that GOA unit comprises.
Present invention also offers a kind of array base palte, comprise GOA unit and above-mentioned GOA reset circuit, multiple input ends that described GOA unit comprises are connected with the switch element of described GOA unit respectively.
Present invention also offers a kind of display panel, comprise above-mentioned array base palte.
Present invention also offers a kind of display device, comprise above-mentioned display panel.
Compared with prior art, the present invention, when GOA unit shutdown, opens all passages, release residual charge while saving cost and raising heat sinking function by the multiple input end access high level signal by GOA unit, eliminates ghost.
Accompanying drawing explanation
Fig. 1 is the structured flowchart of the GOA reset circuit described in the embodiment of the present invention;
Fig. 2 is the circuit diagram of the switch element that the GOA reset circuit described in the present invention one specific embodiment comprises.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, be clearly and completely described the technical scheme in the embodiment of the present invention, obviously, described embodiment is only the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
GOA reset circuit described in the embodiment of the present invention, for resetting to GOA unit, described GOA unit comprises multiple input end, and described GOA reset circuit comprises:
Switch element, access reset signal, and be connected with described multiple input end respectively, for when described reset signal is effective, control described multiple input end access high level signal.
When GOA unit shutdown, reset signal is effective, the switch element that GOA reset circuit described in the embodiment of the present invention comprises controls multiple input end access high level signals of GOA unit, all passages are driven to open to control GOA unit, discharge residual charge at saving cost with while improving heat sinking function, eliminate ghost.
Concrete, described multiple input end can comprise clock signal input terminal CLK, start signal input end STV and low level signal input end VSS.
As shown in Figure 1, in the GOA reset circuit described in the present invention one specific embodiment, the control end access reset signal Reset of switch element 10;
The clock signal input terminal CLK that switch element 11 also comprises with GOA unit 10 respectively, start signal input end STV and low level signal input end VSS are connected;
Described switch element 11 also accesses high level signal VGH;
When GOA unit is shut down, reset signal Reset is effective, described switch element 10 controls described clock signal input terminal CLK, described start signal input end STV and described low level signal input end VSS accesses high level signal VGH, all passages are driven to open to control GOA unit, release residual charge, eliminates ghost.
When practical operation, described GOA unit 10 is positioned at the non-display area of the left and right edges of display panel, and corresponding GOA reset unit 11 is arranged at above described GOA unit 10 respectively.
During enforcement, described switch element comprises multiple transistor;
The grid of described multiple transistor all accesses described reset signal, and described high level signal is all accessed in the first pole of described multiple transistor, and the second pole of described multiple transistor accesses described multiple input end respectively;
When described reset signal is effective, all conductings of described multiple transistor, thus multiple input ends that GOA unit is comprised all access high level signal, to discharge residual charge, eliminate ghost.
The transistor adopted in all embodiments of the present invention can be all thin film transistor (TFT) or field effect transistor or the identical device of other characteristics.In embodiments of the present invention, being distinguish transistor the two poles of the earth except grid except, will first can be wherein extremely source electrode or drain electrode, and second can be extremely drain or source electrode.In addition, distinguish transistor can be divided into n-type transistor or p-type transistor according to the characteristic of transistor.In the driving circuit that the embodiment of the present invention provides; all crystals Guan Jun is the explanation carried out for n-type transistor; it is conceivable that be that those skilled in the art can expect, therefore also in embodiments of the invention protection domain easily not making under creative work prerequisite when adopting p-type transistor to realize.
Concrete, described multiple transistor can be all PMOS (positive channel Metal OxideSemiconductor, the field effect of p NMOS N-channel MOS N) transistor, effective when described reset signal is low level.
Concrete, described multiple transistor is all NMOS (negative channel Metal OxideSemiconductor, the field effect of n NMOS N-channel MOS N) transistor, effective when described reset signal is high level.
As shown in Figure 2, the switch element 11 that the GOA reset circuit described in the embodiment of the present invention comprises comprises multiple PMOS transistor;
Described GOA unit (not showing in Fig. 2) comprises start signal input end STV, low level signal input end VSS and n clock signal input terminal CLK1-CLKn, wherein, n be greater than 1 integer;
The grid of described multiple PMOS transistor all accesses reset signal Reset;
The drain electrode of described multiple PMOS transistor all accesses high level signal VGH;
The source electrode of described multiple PMOS transistor is connected with described start signal input end STV, a described low level signal input end VSS and described n clock signal input terminal CLK1-CLKn respectively;
When GOA unit normally works, described reset signal Reset is high level, and described multiple PMOS transistor all turns off, described start signal input end STV, a described low level signal input end VSS and described n clock signal input terminal CLK 1-CLK nnormal input signal;
When GOA unit is shut down, described reset signal Reset switches to low level, and described multiple PMOS transistor is all opened, a described low level signal input end VSS and described n clock signal input terminal CLK 1-CLK nall access high level signal VGH, drive all passages to open to control GOA unit, release residual charge, eliminates ghost.
Present invention also offers a kind of driving method of GOA reset circuit, for driving above-mentioned GOA reset circuit, described driving method comprises:
When GOA unit is shut down, reset signal is effective, and switch element controls multiple input end access high level signals that GOA unit comprises.
The driving method of the GOA reset circuit described in the embodiment of the present invention is when GOA unit is shut down, multiple input ends GOA unit being comprised by reset signal gauge tap unit all access high level signal, all passages are driven to open to control GOA unit, discharge residual charge at saving cost with while improving heat sinking function, eliminate ghost.
Present invention also offers a kind of array base palte, comprise GOA unit and above-mentioned GOA reset circuit, multiple input ends that described GOA unit comprises are connected with the switch element of described GOA unit respectively.
Present invention also offers a kind of display panel, comprise above-mentioned array base palte.
Present invention also offers a kind of display device, comprise above-mentioned display panel.
Described display device can be such as: any product or parts with Presentation Function such as liquid crystal indicator, Electronic Paper, OLED (OrganicLight-Emitting Diode, Organic Light Emitting Diode) display device, mobile phone, panel computer, televisor, display, notebook computer, digital album (digital photo frame), navigating instrument.
The above is the preferred embodiment of the present invention; it should be pointed out that for those skilled in the art, under the prerequisite not departing from principle of the present invention; can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.

Claims (9)

1. a GOA reset circuit, for resetting to GOA unit, described GOA unit comprises multiple input end, it is characterized in that, described GOA reset circuit comprises:
Switch element, access reset signal, and be connected with described multiple input end respectively, for when described reset signal is effective, control described multiple input end access high level signal.
2. GOA reset circuit as claimed in claim 1, it is characterized in that, described switch element comprises multiple transistor;
The grid of described multiple transistor all accesses described reset signal, and described high level signal is all accessed in the first pole of described multiple transistor, and the second pole of described multiple transistor accesses described multiple input end respectively.
3. GOA reset circuit as claimed in claim 2, it is characterized in that, described multiple transistor is all PMOS transistor, effective when described reset signal is low level.
4. GOA reset circuit as claimed in claim 2, it is characterized in that, described multiple transistor is all nmos pass transistor, effective when described reset signal is high level.
5. the GOA reset circuit as described in claim arbitrary in Claims 1-4, is characterized in that, described multiple input end comprises clock signal input terminal, start signal input end and low level signal input end.
6. a driving method for GOA reset circuit, for driving the GOA reset circuit any one of claim 1 to 5 as described in claim, it is characterized in that, described driving method comprises:
When GOA unit is shut down, reset signal is effective, and switch element controls multiple input end access high level signals that GOA unit comprises.
7. an array base palte, is characterized in that, comprise GOA unit and above-mentioned GOA reset circuit, multiple input ends that described GOA unit comprises are connected with the switch element of described GOA unit respectively.
8. a display panel, is characterized in that, comprises array base palte as claimed in claim 7.
9. a display device, is characterized in that, comprises display panel as claimed in claim 8.
CN201510057316.9A 2015-02-04 2015-02-04 GOA reset circuit and driving method, array substrate, display panel and device Pending CN104575433A (en)

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Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105096789A (en) * 2015-09-25 2015-11-25 武汉华星光电技术有限公司 Common circuit for gate driver on array (GOA) test and shutdown ghost elimination
CN105161063A (en) * 2015-09-14 2015-12-16 深圳市华星光电技术有限公司 Grid drive circuit of liquid crystal display apparatus
CN105185333A (en) * 2015-09-14 2015-12-23 深圳市华星光电技术有限公司 Grid driving circuit of liquid crystal display device
CN105913828A (en) * 2016-07-05 2016-08-31 京东方科技集团股份有限公司 Residual shadow elimination circuit, grid drive circuit and display device
CN106328084A (en) * 2016-10-18 2017-01-11 深圳市华星光电技术有限公司 GOA drive circuit and liquid crystal display device
CN107358905A (en) * 2017-08-30 2017-11-17 厦门天马微电子有限公司 A kind of display panel and electronic equipment
CN109754746A (en) * 2019-03-28 2019-05-14 京东方科技集团股份有限公司 Timing control unit, sequential control method and display device
CN110969978A (en) * 2019-12-23 2020-04-07 Tcl华星光电技术有限公司 Driving circuit
CN115831031A (en) * 2023-02-07 2023-03-21 深圳市微源半导体股份有限公司 Level conversion circuit, display panel and display device

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080062072A1 (en) * 2006-09-11 2008-03-13 Himax Technologies Limited Flat display and timing controller thereof
CN101188095A (en) * 2007-12-20 2008-05-28 友达光电股份有限公司 LCD and residual shadow attenuation method
CN101364390A (en) * 2007-08-10 2009-02-11 奇美电子股份有限公司 Planar display
CN101383133A (en) * 2008-10-20 2009-03-11 友达光电股份有限公司 Apparatus for eliminating ghost, shifting cache unit, LCD device and method
CN101546529A (en) * 2008-03-28 2009-09-30 群康科技(深圳)有限公司 Liquid crystal display device
TW201013625A (en) * 2008-09-26 2010-04-01 Au Optronics Corp Apparatus, shift register unit, liquid crystal displaying device and method for eliminating afterimage
CN102222474A (en) * 2010-04-14 2011-10-19 群康科技(深圳)有限公司 Liquid crystal display device and method for improving power off afterimage phenomenon thereof
JP2012093762A (en) * 2010-10-26 2012-05-17 Lg Display Co Ltd Liquid crystal display device and driving method of the same
JP2014010231A (en) * 2012-06-28 2014-01-20 Lapis Semiconductor Co Ltd Source driver and liquid crystal display device
US8743106B2 (en) * 2007-11-30 2014-06-03 Au Optronics Corp. Liquid crystal display device and method for decaying residual image thereof

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080062072A1 (en) * 2006-09-11 2008-03-13 Himax Technologies Limited Flat display and timing controller thereof
CN101364390A (en) * 2007-08-10 2009-02-11 奇美电子股份有限公司 Planar display
US8743106B2 (en) * 2007-11-30 2014-06-03 Au Optronics Corp. Liquid crystal display device and method for decaying residual image thereof
CN101188095A (en) * 2007-12-20 2008-05-28 友达光电股份有限公司 LCD and residual shadow attenuation method
CN101546529A (en) * 2008-03-28 2009-09-30 群康科技(深圳)有限公司 Liquid crystal display device
TW201013625A (en) * 2008-09-26 2010-04-01 Au Optronics Corp Apparatus, shift register unit, liquid crystal displaying device and method for eliminating afterimage
CN101383133A (en) * 2008-10-20 2009-03-11 友达光电股份有限公司 Apparatus for eliminating ghost, shifting cache unit, LCD device and method
CN102222474A (en) * 2010-04-14 2011-10-19 群康科技(深圳)有限公司 Liquid crystal display device and method for improving power off afterimage phenomenon thereof
JP2012093762A (en) * 2010-10-26 2012-05-17 Lg Display Co Ltd Liquid crystal display device and driving method of the same
JP2014010231A (en) * 2012-06-28 2014-01-20 Lapis Semiconductor Co Ltd Source driver and liquid crystal display device

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105185333B (en) * 2015-09-14 2018-05-11 深圳市华星光电技术有限公司 A kind of gate driving circuit of liquid crystal display device
CN105161063A (en) * 2015-09-14 2015-12-16 深圳市华星光电技术有限公司 Grid drive circuit of liquid crystal display apparatus
CN105185333A (en) * 2015-09-14 2015-12-23 深圳市华星光电技术有限公司 Grid driving circuit of liquid crystal display device
CN105161063B (en) * 2015-09-14 2018-05-11 深圳市华星光电技术有限公司 A kind of gate driving circuit of liquid crystal display device
US9805680B2 (en) 2015-09-14 2017-10-31 Shenzhen China Star Optoelectronics Technology Co, Ltd Liquid crystal display device and gate driving circuit
US9799293B2 (en) 2015-09-14 2017-10-24 Shenzhen China Star Optoelectronics Technology Co., Ltd Liquid crystal display device and gate driving circuit
CN105096789B (en) * 2015-09-25 2018-01-30 武汉华星光电技术有限公司 GOA tests the common circuit with removing power-off ghost shadow
CN105096789A (en) * 2015-09-25 2015-11-25 武汉华星光电技术有限公司 Common circuit for gate driver on array (GOA) test and shutdown ghost elimination
CN105913828A (en) * 2016-07-05 2016-08-31 京东方科技集团股份有限公司 Residual shadow elimination circuit, grid drive circuit and display device
CN106328084A (en) * 2016-10-18 2017-01-11 深圳市华星光电技术有限公司 GOA drive circuit and liquid crystal display device
CN107358905A (en) * 2017-08-30 2017-11-17 厦门天马微电子有限公司 A kind of display panel and electronic equipment
CN109754746A (en) * 2019-03-28 2019-05-14 京东方科技集团股份有限公司 Timing control unit, sequential control method and display device
CN110969978A (en) * 2019-12-23 2020-04-07 Tcl华星光电技术有限公司 Driving circuit
CN115831031A (en) * 2023-02-07 2023-03-21 深圳市微源半导体股份有限公司 Level conversion circuit, display panel and display device

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Application publication date: 20150429