CN104572518A - Storage device - Google Patents
Storage device Download PDFInfo
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- CN104572518A CN104572518A CN201410844479.7A CN201410844479A CN104572518A CN 104572518 A CN104572518 A CN 104572518A CN 201410844479 A CN201410844479 A CN 201410844479A CN 104572518 A CN104572518 A CN 104572518A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
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Abstract
An embodiment of the invention discloses a storage device comprising at least one PCB (printed circuit board) and a DDR (double data rate) interface. The PCBs are provided with controllers and storage particles. The controllers are connected with the storage particles and further connected with the DDR interface through DDR buses. The DDR interface is arranged on one of the PCBs. DDR data lines of the DDR bus correspond to the controllers. The DDR interface is used for connection with a DDR socket on a main board where a CPU (central processing unit) exists. Digits of the DDR data lines corresponding to the controllers are less than those of the DDR data lines provided by the DDR socket. The controllers receive control signals sent from the CPU and read and/or write target data from/in the storage particles. The storage device has the advantages that transmission delay in the case of reading and/or writing data from/in the storage device is reduced.
Description
Technical field
The present invention relates to field of computer technology, particularly relate to a kind of memory storage.
Background technology
Along with the development of terminal technology, the demand that individual consumer, enterprise etc. store for information increases day by day, and the storage pressure on computing machine, server is also increasing.As everyone knows, hard disk comprises mechanical hard disk (HardDisk Drive, HDD) and solid state hard disc (Solid State Disk, SSD), wherein, solid state hard disc has abandoned traditional magnetic medium, adopt electronic storage medium to carry out data storage and reading, there is the advantages such as read or write speed is fast, shock resistance good, low in energy consumption, therefore, in the face of growing data volume and storage demand, solid state hard disc is widely used.
Hard-disk interface is the link between hard disk and host computer system, and effect transmits data between hard disk and main frame, and the quality of hard-disk interface directly affects system reads data propagation delay time from hard disk.At present, common hard-disk interface has IDE (Integrated Drive Electronics, integrated driving electronic equipment), SATA (Serial Advanced Technology Attachment, Serial Advanced Technology Attachment, a kind of connection hardware driver interface based on industry standard), SCSI (Small Computer System Interface, small computer system interface) etc., hard disk is connected with south bridge by interface, south bridge (Southbridge) is connected (as shown in Figure 1a with north bridge (Northbridge), Fig. 1 a is the relation schematic diagram of a kind of solid state hard disc of providing of prior art and CPU), thus, hard disk passes through south bridge, north bridge heel CPU carries out exchanges data, the propagation delay time of data in read-write process is large.
Summary of the invention
The embodiment of the present invention provides a kind of memory storage, can reduce the propagation delay time that system reads and writes data from memory storage.
First aspect, the embodiment of the present invention provides a kind of memory storage, comprise: at least one bar printing wiring board PCB and double data rate ddr interface, every block PCB be placed with controller and store particle, described storage particle is connected with described controller, described controller is connected with described ddr interface by DDR bus, and described ddr interface is placed on wherein on one piece of PCB; DDR data line in described DDR bus is made up of the DDR data line that each controller is corresponding; Described ddr interface is for being connected with the DDR socket on the mainboard of CPU place; Wherein,
The DDR data line figure place that each controller is corresponding is less than the DDR data line figure place that described DDR socket provides; Described controller receives the control signal that described CPU sends, and reads and/or write target data from described storage particle according to described control signal.
In conjunction with first aspect, in the first possible implementation of first aspect, the DDR data line figure place that described each controller is corresponding is 8.
In conjunction with the first possible implementation of first aspect or first aspect, in the implementation that the second of first aspect is possible, described storage particle comprises any one storage medium in flash chip, magnetic RAM MRAM, phase-change random access memory PRAM and resistance-variable storing device RRAM.
In conjunction with first aspect, in the third possible implementation of first aspect, if the block number of described at least one bar printing wiring board PCB is n block, n >=2, n is integer, and described memory storage also comprises n-1 block flexible board, and two pieces of adjacent PCB are electrically connected by described flexible board, wherein, the controller on described two pieces of PCB is connected by described flexible board.
In conjunction with first aspect, in the 4th kind of possible implementation of first aspect, if the block number of described at least one bar printing wiring board PCB is n block, n >=2, n is integer, and described memory storage also comprises n-1 connector, and two pieces of adjacent PCB are electrically connected by described connector, wherein, the controller on described two pieces of PCB is connected by described connector.
In conjunction with first aspect, in the 5th kind of possible implementation of first aspect, if the block number of described at least one bar printing wiring board PCB is n block, n >=2, n is integer, and described memory storage also comprises n-1 block PCB daughter board, and two pieces of adjacent PCB are electrically connected by described PCB daughter board, wherein, the controller on described two pieces of PCB is connected by described PCB daughter board.
In conjunction with the third of first aspect to any one the possible implementation in the 5th kind, in the 6th kind of possible implementation of first aspect, described memory storage also comprises heat sink material, and described heat sink material is arranged between two pieces of adjacent PCB.
In conjunction with the first possible implementation of first aspect, first aspect, first aspect the third to any one the possible implementation in the 5th kind, in the 7th kind of possible implementation of first aspect, described ddr interface comprises DDR3 and DDR4.
In conjunction with the 7th kind of possible implementation of first aspect, in the 8th kind of possible implementation of first aspect, described memory storage also comprises shell, described at least one bar printing wiring board PCB, described controller and described storage particle are arranged at described enclosure, and described ddr interface is arranged in described shell.
In conjunction with first aspect, in the 9th kind of possible implementation of first aspect, described storage particle is connected with described controller by open flash interface ONFI bus.
Implement the embodiment of the present invention, memory storage comprises at least one bar printing wiring board PCB and double data rate ddr interface, every block PCB be placed with controller and store particle, wherein, store particle to be connected with controller, described controller is connected with ddr interface by DDR bus, and ddr interface is placed on wherein on one piece of PCB; DDR data line in DDR bus is made up of the DDR data line that each controller is corresponding.Adopt the embodiment of the present invention, be connected with the DDR socket on the mainboard of CPU place by ddr interface, thus memory storage carries out data transmission based on main memory access and CPU, can reduce the propagation delay time that system reads and writes data from memory storage; Meanwhile, the DDR data line figure place that in memory storage, each controller is corresponding is less than the DDR data line figure place that the DDR socket on the mainboard of CPU place provides, and can realize the expandable type design of memory storage, improve the dirigibility of design memory storage.
Accompanying drawing explanation
In order to be illustrated more clearly in the technical scheme in the embodiment of the present invention, below the accompanying drawing used required in describing embodiment is briefly described, apparently, accompanying drawing in the following describes is some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 a is the relation schematic diagram of a kind of solid state hard disc of providing of prior art and CPU;
Fig. 1 is the structural representation of a kind of memory storage that the embodiment of the present invention provides;
Fig. 1 b is the relation schematic diagram of a kind of memory storage of providing of the embodiment of the present invention and CPU;
Fig. 2 is another structural representation of a kind of memory storage that the embodiment of the present invention provides;
Fig. 3 is the another structural representation of a kind of memory storage that the embodiment of the present invention provides;
Fig. 3 a is a structural representation again of a kind of memory storage that the embodiment of the present invention provides;
Fig. 3 b is a structural representation again of a kind of memory storage that the embodiment of the present invention provides;
Fig. 3 c is a structural representation again of a kind of memory storage that the embodiment of the present invention provides.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, be clearly and completely described the technical scheme in the embodiment of the present invention, obviously, described embodiment is only a part of embodiment of the present invention, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
Refer to Fig. 1, Fig. 1 is the structural representation of a kind of memory storage that the embodiment of the present invention provides, in embodiments of the present invention, this memory storage can comprise: at least one bar printing wiring board (Printed CircuitBoard, PCB) 101, double data rate (Double Data Rate, DDR) interface 102, controller 103 and a storage particle 104.
Wherein, every bar printing wiring board be placed with controller and store particle, storing particle and be connected with controller, controller passes through DDR bus and is connected with ddr interface, and ddr interface is placed on wherein on one piece of PCB; DDR data line in described DDR bus is made up of the DDR data line that each controller is corresponding, and described controller receives the control signal that described CPU sends, and reads and/or write target data from described storage particle according to described control signal; Described ddr interface is for being connected with the DDR socket on the mainboard of CPU place.Thus, when the equipment such as computing machine or server uses the memory storage of the embodiment of the present invention, the ddr interface in this memory storage directly can be connected with the DDR socket on the mainboard of CPU place.Because the DDR socket on the mainboard of CPU place is for connecting internal memory, therefore, memory storage is connected with CPU by main memory access, CPU and this memory storage carry out data when transmitting, effectively can reduce the propagation delay time that system reads and writes data from memory storage, be applicable to be connected on equipment and serve as hard disk use.For convenience of understanding, refer to Fig. 1 b, Fig. 1 b is the relation schematic diagram of a kind of memory storage of providing of the embodiment of the present invention and CPU, known, the memory storage that the embodiment of the present invention provides directly is connected with north bridge, therefore, memory storage and CPU carry out transmission path when data are transmitted short (only through north bridge), effectively can reduce the propagation delay time that system reads and writes data from memory storage, what deserves to be explained is, along with the development of chip technology, north bridge is integrated in (as shown in Figure 1 a or 1b) in CPU usually, thus, when system reads data from memory storage, real-time is high.
In the embodiment of the present invention, the DDR data line figure place that each controller is corresponding is less than the DDR data line figure place that described DDR socket provides.Such as, for the DDR4 on X86-based mainboard, its DDR4 socket is generally 288 pins, wherein 72 pins represent DDR data line, in the embodiment of the present invention, the DDR data line that each controller is corresponding is less than the DDR data line that DDR4 socket provides, and DDR data line as corresponding in each controller can be 4,8,16 etc.What deserves to be explained is, as long as the DDR data line figure place that in the embodiment of the present invention, each controller is corresponding is less than the DDR data line figure place (as in X86-based, the data line figure place of DDR4 socket is 72) that DDR socket provides, the concrete embodiment of the present invention is not restricted.For convenience of understanding, still for DDR4 socket, suppose that the DDR data line figure place that each controller is corresponding is 8, memory storage then based on DDR4 socket can comprise at most 9 controllers, supposes one piece of PCB comprises 1 controller, then memory storage is maximum can be designed to 9 pieces of PCB, therefore, adopt the embodiment of the present invention, expanded type design can be carried out to memory storage, increase the memory capacity of memory storage.
What deserves to be explained is, in specific implementation, because addressing mode when system reads data from hard disk and internal memory is different, in the embodiment of the present invention, the DDR address wire that main memory access provides can not be used, namely DDR bus can only include DDR data line and DDR control line, and wherein, the DDR control line be connected with DDR socket is all connected with each controller.
What deserves to be explained is, the quantity of the embodiment of the present invention to printed-wiring board (PWB), controller, storage particle does not limit, and its concrete quantity can set according to the actual requirements.Such as, suppose the memory storage of a desired design 800G, and the maximum 500G that makes of the printed-wiring board (PWB) of one piece of suitable dimension, two bar printing wiring boards then can be adopted to design, wherein, two bar printing wiring boards are electrically connected, and the storage particle on two bar printing wiring boards, controller all transmit data by ddr interface 102 with CPU; If the memory storage within desired design 500G, then adopt a bar printing wiring board.In specific implementation, the amount controller on every bar printing wiring board can be 1 also can be multiple, and the embodiment of the present invention is not restricted.For convenience of understanding, being exemplified below, supposing that controller has 8 memory channels (as NAND passage), each passage can connect at most 8 and store particle, then the maximum storage granule number that controller can be supported is 64; If can place 128 storage particles maximum on printed-wiring board (PWB), then can arrange two controllers on this printed-wiring board (PWB), wherein, each controller connects 64 respectively and stores particles, and two controllers are electrically connected.In specific implementation, store the quantity of particle, unit capacity need require to choose to memory capacity, size etc. according to the memory storage that will design, the embodiment of the present invention does not impose any restrictions this.
For convenience of description, the scene (as shown in Figure 1) bar printing wiring board, printed-wiring board (PWB) being placed with a controller is comprised for memory storage, other scene please refer to subsequent embodiment, in FIG, printed-wiring board (PWB) 101 is placed with controller 103, stores particle 104 and ddr interface 102, store particle 104 to be connected with controller 103 respectively, its connected mode is determined by the character or production firm storing particle 104.Such as, if store the NAND FLASH flash chip being company's research and development such as Intel, Micron, SanDisk, Sony or producing that particle adopts, then store particle to be connected with controller by open flash interface (Open NAND FLASHInterface, ONFI) bus.Again such as; if store the NAND FLASH flash chip being Samsung and Toshiba research and development or producing that particle adopts; then store particle to be connected with controller based on Toggle DDRMode standard; wherein, Toggle DDR Mode standard source combines the brand-new nand flash memory interface standard of formulation from Samsung and Toshiba.In specific implementation, the connected mode storing particle and controller need be determined according to the type storing particle, and the embodiment of the present invention is not restricted this.
In specific implementation, storing particle can be flash chip, and as NOR FLASH or NAND FLASH, wherein, NOR and NAND is two kinds of main nonvolatile flash memories on market, and it is large that NAND FLASH possesses memory capacity, the feature that read-write speed is slow; It is little that NOR FLASH possesses memory capacity, the feature that read-write speed is fast; Usually, NAND FLASH is used for as storing (Storage), and NOR FLASH is used for depositing code (code).Therefore, flash chip can be chosen in conjunction with actual demand, as one preferred embodiment, store particle and adopt NAND FLASH flash chip, thus, the printed-wiring board (PWB) of same size can be designed the memory storage possessing more large storage capacity.
What deserves to be explained is, storage particle can also be any one storage medium in magnetic RAM (Magnetic RandomAccess Memory, MRAM), phase-change random access memory PRAM and resistance-variable storing device RRAM.MRAM is a kind of nonvolatile magnetic RAM, it has static RAM (Static Random Access Memory, SRAM) high speed reads write capability, and dynamic RAM (Dynamic Random Access Memory, DRAM) high integration, and substantially can repeat write unlimitedly.PRAM is a storer that Samsung company releases, and compare common DRAM and flash memory, PRAM has the feature of high-speed low-power-consumption.RRAM is according to the difference of the voltage be applied on metal oxide (Metal Oxide), make the resistance of material, between high-impedance state and low resistance state, respective change occur, thus open or blocks current flow passage, and utilize this character to store the internal memory of various information, permanance and data rate can be significantly improved.
In the memory storage that the embodiment of the present invention describes, comprise at least one bar printing wiring board PCB and double data rate ddr interface, every block PCB be placed with controller and store particle, wherein, store particle to be connected with controller, controller is connected with ddr interface by DDR bus; Ddr interface is placed on wherein on one piece of PCB, and the DDR data line in DDR bus is made up of the DDR data line that each controller is corresponding.Adopt the embodiment of the present invention, be connected with the DDR socket on the mainboard of CPU place by ddr interface, thus memory storage carries out data transmission based on main memory access and CPU, can reduce the propagation delay time that system reads and writes data from memory storage; Meanwhile, the DDR data line figure place that in memory storage, each controller is corresponding is less than the DDR data line figure place that the DDR socket on the mainboard of CPU place provides, and can realize the expandable type design of memory storage, improve the dirigibility of design memory storage.
Refer to Fig. 2, Fig. 2 is another structural representation of a kind of memory storage that the embodiment of the present invention provides, for convenience of description, the embodiment of the present invention is to comprise placement controller on two pieces of PCB, every block PCB, in embodiments of the present invention, this memory storage can comprise: at least one bar printing wiring board (101a, 101b), double data rate interface (102), controller (103a, 103b) and storage particle (104a, 104b).
Wherein, every bar printing wiring board (101a, 101b) be placed with controller (103a, 103b) and store particle (104a, 104b), store particle to be connected with controller (being connected with controller 103a as stored particle 104a, storing particle 104b and being connected with controller 103b); Ddr interface (102) is placed on wherein on one piece of PCB (as 101a), and controller (103a, 103b) is connected with ddr interface (102) by DDR bus; Controller (103a) receives the control signal that described CPU sends, and reads and/or write target data from described storage particle (104a, 104b) according to described control signal; Ddr interface (102) is for being connected with the DDR socket on the mainboard of CPU place.Wherein, the DDR data line in DDR bus is made up of the DDR data line that each controller is corresponding, and the DDR data line figure place that each controller is corresponding is less than the DDR data line figure place that described DDR socket provides.
Thus, when the equipment such as computing machine or server uses the memory storage of the embodiment of the present invention, the ddr interface in this memory storage directly can be connected with the DDR socket on the mainboard of CPU place.Because the DDR socket on the mainboard of CPU place is for connecting internal memory, therefore, memory storage is connected with CPU by main memory access, CPU and this memory storage carry out data when transmitting, effectively can reduce the propagation delay time that system reads and writes data from memory storage, when system reads data from memory storage, real-time is high.
In the embodiment of the present invention, a corresponding ddr interface of memory storage, each controller is all connected with ddr interface by DDR bus, because controller is all arranged on PCB, therefore, in specific implementation, if memory storage comprises one piece of PCB, then the controller on this PCB is directly connected with ddr interface by DDR bus; If memory storage comprises two or more than two PCB, be electrically connected between two pieces of adjacent PCB, controller wherein on one piece of PCB is directly connected with ddr interface by DDR bus, by DDR bus, Electric connection characteristic between controller Based PC B on other PCB is also connected with ddr interface that (the DDR control line namely in ddr interface is all connected with each controller on PCB, wherein, the DDR data line in ddr interface is made up of the DDR data line that each controller is corresponding).In specific implementation, memory storage comprises n bar printing wiring board PCB, and n is integer, if n >=2, then two pieces of adjacent PCB are electrically connected, and are all connected with ddr interface by DDR bus to make each controller on every block PCB.For convenience of understanding, spy is exemplified below, suppose that memory storage comprises 2 pieces of PCB (being described as respectively " PCB1 " and " PCB2 "), every block PCB is placed with a controller (being described as respectively " controller one " and " controller two "), the DDR data line that each controller is corresponding is 8 (being described as respectively " D1 ~ D8 " and " D9 ~ D16 "), DDR control line in the DDR bus of ddr interface and DDR socket is 15 (being described as " C1 ~ C15 "), then known, DDR data line in the DDR bus of ddr interface and DDR socket is 16, comprise " D1 ~ D16 ", wherein, the DDR data line ports that DDR data line " D1 ~ D8 " in ddr interface is corresponding with " controller one " connects, the DDR data line ports that DDR data line " D9 ~ D16 " in ddr interface is corresponding with " controller two " connects, DDR control line " C1 ~ C15 " in ddr interface is connected with the DDR control line port of " controller one " and " controller two " respectively, namely the DDR bus that " controller one " is corresponding is " D1 ~ D8, C1 ~ C15 ", the DDR bus that " controller two " is corresponding is " D9 ~ D16, C1 ~ C15 ", in specific implementation, also the DDR control line in ddr interface can be divided into many parts, such as, suppose every a corresponding 15, the DDR director port that DDR control line " C1 ~ C15 " then in ddr interface is corresponding with " controller one " connects, the DDR control line port that DDR control line " C16 ~ C30 " in ddr interface is corresponding with " controller two " connects, namely the DDR bus that " controller one " is corresponding is " D1 ~ D8, C1 ~ C15 ", and the DDR bus that " controller two " is corresponding is " D9 ~ D16, C16 ~ C30 ".What deserves to be explained is, these are only a kind of example, equivalent or similarity transformation can be carried out according to the actual requirements in specific implementation, such as, the DDR data line that controller is corresponding is 4,16 etc., the DDR control line that controller is corresponding is 20,25 etc., and concrete, the embodiment of the present invention is not restricted.Usually, because internal memory is direct addressing method, system bus based on main memory access comprises data bus (Data Bus, DB), control bus (Control Bus, and address bus (AddressBus CB), AB), addressing mode when memory storage in the embodiment of the present invention reads data is with hard disk, CFC (Compact Flash Card, compact flash) similar, belong to indirect addressing mode, therefore, also memory capacity can be done very large based on main memory access.In specific implementation, the DDR address wire in DDR socket can be saved, reduce the complexity of design memory storage, therefore, the ddr interface of memory storage can only include DDR data line and DDR control line, certainly, also can be the set of DDR data line, DDR control line, DDR address wire, concrete, the embodiment of the present invention is not restricted.
As a kind of feasible embodiment, if the block number of described at least one bar printing wiring board PCB is n block, n >=2, n is integer, described memory storage also comprises n-1 block flexible board, two pieces of adjacent PCB are electrically connected by described flexible board, and wherein, the controller on described two pieces of PCB is connected by described flexible board.
For convenience of understanding, refer to Fig. 3, Fig. 3 is the another structural representation of a kind of memory storage that the embodiment of the present invention provides, with 2 pieces of PCB (301a in Fig. 3, 301b) be example, this memory storage comprises ddr interface (302), controller (not shown) and storage particle (are reduced to particle in figure 3, as 304a, 304b), two pieces of PCB (301a, 301b) connected by flexible board (305), DDR stand (302) is for being connected with the DDR socket on the mainboard of CPU place, thus, except the PCB being placed with ddr interface, the DDR bus that each controller on other PCB is corresponding can be connected to ddr interface by flexible board.As a kind of feasible embodiment, controller on two pieces of adjacent PCB is connected by flexible board, thus, when connection between DDR bus corresponding to certain controller and ddr interface goes wrong, transmit data, control signal etc. by being interconnected between controller, improve the fault-tolerant ability of memory storage.In specific implementation, consider that two pieces of adjacent PCB may exist heat dissipation problem, as a kind of feasible embodiment, memory storage can also comprise heat sink material, and described heat sink material is arranged between two pieces of adjacent PCB.
As a kind of feasible embodiment, if the block number of described at least one bar printing wiring board PCB is n block, n >=2, n is integer, described memory storage also comprises n-1 connector, two pieces of adjacent PCB are electrically connected by described connector, and wherein, the controller on described two pieces of PCB is connected by described connector.
For convenience of understanding, refer to Fig. 3 a, Fig. 3 a is a structural representation again of a kind of memory storage that the embodiment of the present invention provides, with 2 pieces of PCB (301a in Fig. 3 a, 301b) be example, this memory storage comprises ddr interface (302), controller (not shown) and storage particle (are reduced to particle in fig. 3 a, as 304a, 304b), two pieces of PCB (301a, 301b) connected by connector (306), DDR stand (302) is for being connected with the DDR socket on the mainboard of CPU place, thus, except the PCB being placed with ddr interface, the DDR bus that each controller on other PCB is corresponding can be connected to ddr interface by connector.As a kind of feasible embodiment, controller on two pieces of adjacent PCB is connected by connector, thus, when connection between DDR bus corresponding to certain controller and ddr interface goes wrong, transmit data, control signal etc. by being interconnected between controller, improve the fault-tolerant ability of memory storage.In specific implementation, consider that two pieces of adjacent PCB may exist heat dissipation problem, as a kind of feasible embodiment, memory storage can also comprise heat sink material, and described heat sink material is arranged between two pieces of adjacent PCB.
As a kind of feasible embodiment, if the block number of described at least one bar printing wiring board PCB is n block, n >=2, n is integer, described memory storage also comprises n-1 block PCB daughter board, two pieces of adjacent PCB are electrically connected by described PCB daughter board, and wherein, the controller on described two pieces of PCB is connected by described PCB daughter board.
For convenience of understanding, refer to Fig. 3 b, Fig. 3 b is a structural representation again of a kind of memory storage that the embodiment of the present invention provides, with 2 pieces of PCB (301a in Fig. 3 b, 301b) be example, this memory storage comprises ddr interface (302), controller (not shown) and storage particle (are reduced to particle in fig. 3 a, as 304a, 304b), two pieces of PCB (301a, 301b) connected by PCB daughter board (307), DDR stand (302) is for being connected with the DDR socket on the mainboard of CPU place, thus, except the PCB being placed with ddr interface, the DDR bus that each controller on other PCB is corresponding can be connected to ddr interface by PCB daughter board.As a kind of feasible embodiment, controller on two pieces of adjacent PCB is connected by PCB daughter board, thus, when connection between DDR bus corresponding to certain controller and ddr interface goes wrong, transmit data, control signal etc. by being interconnected between controller, improve the fault-tolerant ability of memory storage.In specific implementation, consider that two pieces of adjacent PCB may exist heat dissipation problem, as a kind of feasible embodiment, memory storage can also comprise heat sink material, and described heat sink material is arranged between two pieces of adjacent PCB.
What deserves to be explained is, the quantity of the embodiment of the present invention to printed-wiring board (PWB), controller does not limit, its concrete quantity can set according to the actual requirements, the quantity of storage particle, unit capacity also need to require to choose to memory capacity, size etc. according to the memory storage that will design, and the embodiment of the present invention is not restricted detail.Such as, if desired design memory capacity is the memory storage of 160G, 4 capacity can be adopted to be the storage particle of 40G, also 8 capacity can be adopted to be storage particle of 20G etc., but, adopt 4 capacity be 40G storage particle and adopt 8 capacity be 20G storage pellet design memory storage out may in size, price, performance difference to some extent, therefore, need in actual process to choose storage particle according to actual needs, the embodiment of the present invention does not impose any restrictions this.
For convenience of understanding, suppose that the DDR data line figure place that each controller is corresponding is 8, the DDR socket on the mainboard of CPU place is DDR4, known DDR4 comprises 288 pins, wherein 72 pins represent DDR data bus, and therefore, maximum can being designed to of memory storage comprises 9 pieces of PCB.Can according to the PCB of the selection of dimension suitable dimension of the memory storage that will design in specific implementation, if the memory capacity of the memory storage that will design cannot be met on one piece of PCB, then set up one piece of PCB again, these two pieces of PCB are electrically connected, if two pieces of PCB still cannot meet the memory capacity of the memory storage that will design, then continue to set up PCB, till meeting design.Certainly, need in specific implementation to consider many-sided factors such as size, price, performance, with the memory storage expecting that capacity of designing is large, cost is low, volume is little.For convenience of understanding, memory storage comprises the structure of polylith PCB can as shown in Figure 3 c, and Fig. 3 c is a structural representation again (controller does not illustrate in the drawings) of a kind of memory storage that the embodiment of the present invention provides.Two pieces of adjacent PCB are electrically connected by modes such as flexible board, connector, PCB daughter boards, and the controller on two pieces of adjacent PCB is connected.
What deserves to be explained is, in specific implementation, ddr interface can be the either memory interface mated with the DDR socket on the mainboard of CPU place, and at present, common memory interface has DDR3, DDR4.In the embodiment of the present invention, ddr interface comprises DDR3 and DDR4, and certainly, can also be DDR2 or DDR1, the concrete embodiment of the present invention be restricted.
In a kind of feasible embodiment, the memory storage of the embodiment of the present invention can also comprise shell, wherein, at least one bar printing wiring board PCB, controller and storage particle are all arranged at described enclosure, if PCB is polylith, then flexible board, connector, PCB daughter board are also arranged at enclosure, ddr interface is arranged in described shell, thus, memory storage can be designed to the form such as hard disk or storage card that can independently use, can, directly when portable hard drive uses, user be facilitated to carry.
In the memory storage that the embodiment of the present invention describes, comprise at least one bar printing wiring board PCB and double data rate ddr interface, every block PCB be placed with controller and store particle, wherein, store particle and be connected with controller; Ddr interface is placed on wherein on one piece of PCB, and the controller on this PCB is connected with ddr interface by DDR bus, and the DDR data line in DDR bus is made up of the DDR data line that each controller is corresponding.Adopt the embodiment of the present invention, be connected with the DDR socket on the mainboard of CPU place by ddr interface, thus memory storage carries out data transmission based on main memory access and CPU, can reduce the propagation delay time that system reads and writes data from memory storage; Meanwhile, the DDR data line figure place that in memory storage, each controller is corresponding is less than the DDR data line figure place that the DDR socket on the mainboard of CPU place provides, and can realize the expandable type design of memory storage, improve the dirigibility of design memory storage.
In the description of this instructions, specific features, structure, material or feature that the description of reference term " embodiment ", " some embodiments ", " example ", " concrete example " or " some examples " etc. means to describe in conjunction with this embodiment or example are contained at least one embodiment of the present invention or example.In this manual, not necessarily must for identical embodiment or example to the schematic representation of above-mentioned term.And the specific features of description, structure, material or feature can combine in one or more embodiment in office or example in an appropriate manner.In addition, when not conflicting, the feature of the different embodiment described in this instructions or example and different embodiment or example can carry out combining and combining by those skilled in the art.
The feature of the different embodiment described in this instructions and different embodiment can carry out combining and combining by those skilled in the art.Each embodiment is only in order to illustrate technical scheme of the present invention above, is not intended to limit; Although with reference to foregoing embodiments to invention has been detailed description, those of ordinary skill in the art is to be understood that: it still can be modified to the technical scheme described in foregoing embodiments, or carries out equivalent replacement to wherein some or all of technical characteristic; And these amendments or replacement, under the premise without departing from the principles of the invention, still belong to the scope that the present invention is contained.
Claims (10)
1. a memory storage, it is characterized in that, comprise at least one bar printing wiring board PCB and double data rate ddr interface, every block PCB be placed with controller and store particle, described storage particle is connected with described controller, described controller is connected with described ddr interface by DDR bus, and described ddr interface is placed on wherein on one piece of PCB; DDR data line in described DDR bus is made up of the DDR data line that each controller is corresponding; Described ddr interface is for being connected with the DDR socket on the mainboard of CPU place; Wherein,
The DDR data line figure place that each controller is corresponding is less than the DDR data line figure place that described DDR socket provides; Described controller receives the control signal that described CPU sends, and reads and/or write target data from described storage particle according to described control signal.
2. memory storage as claimed in claim 1, it is characterized in that, the DDR data line figure place that described each controller is corresponding is 8.
3. memory storage as claimed in claim 1 or 2, it is characterized in that, described storage particle comprises any one storage medium in flash chip, magnetic RAM MRAM, phase-change random access memory PRAM and resistance-variable storing device RRAM.
4. memory storage as claimed in claim 1, it is characterized in that, if the block number of described at least one bar printing wiring board PCB is n block, n >=2, n is integer, and described memory storage also comprises n-1 block flexible board, and two pieces of adjacent PCB are electrically connected by described flexible board, wherein, the controller on described two pieces of PCB is connected by described flexible board.
5. memory storage as claimed in claim 1, it is characterized in that, if the block number of described at least one bar printing wiring board PCB is n block, n >=2, n is integer, and described memory storage also comprises n-1 connector, and two pieces of adjacent PCB are electrically connected by described connector, wherein, the controller on described two pieces of PCB is connected by described connector.
6. memory storage as claimed in claim 1, it is characterized in that, if the block number of described at least one bar printing wiring board PCB is n block, n >=2, n is integer, and described memory storage also comprises n-1 block PCB daughter board, and two pieces of adjacent PCB are electrically connected by described PCB daughter board, wherein, the controller on described two pieces of PCB is connected by described PCB daughter board.
7. the memory storage as described in any one of claim 4-6, is characterized in that, described memory storage also comprises heat sink material, and described heat sink material is arranged between two pieces of adjacent PCB.
8. the memory storage as described in claim 1-2 or any one of 4-6, is characterized in that, described ddr interface comprises DDR3 and DDR4.
9. memory storage as claimed in claim 8, it is characterized in that, described memory storage also comprises shell, and described at least one bar printing wiring board PCB, described controller and described storage particle are arranged at described enclosure, and described ddr interface is arranged in described shell.
10. memory storage as claimed in claim 1, it is characterized in that, described storage particle is connected with described controller by open flash interface ONFI bus.
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| CN104572518B CN104572518B (en) | 2018-06-26 |
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| CN104572518B (en) | 2018-06-26 |
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Effective date of registration: 20200420 Address after: 518129 Bantian HUAWEI headquarters office building, Longgang District, Guangdong, Shenzhen Patentee after: HUAWEI TECHNOLOGIES Co.,Ltd. Address before: 301, A building, room 3, building 301, foreshore Road, No. 310053, Binjiang District, Zhejiang, Hangzhou Patentee before: Huawei Technologies Co.,Ltd. |