CN104572268B - A kind of high-efficiency dynamic Method for HW/SW partitioning - Google Patents
A kind of high-efficiency dynamic Method for HW/SW partitioning Download PDFInfo
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- CN104572268B CN104572268B CN201510018282.2A CN201510018282A CN104572268B CN 104572268 B CN104572268 B CN 104572268B CN 201510018282 A CN201510018282 A CN 201510018282A CN 104572268 B CN104572268 B CN 104572268B
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Abstract
A kind of high-efficiency dynamic Method for HW/SW partitioning, for the design of embedded system, the mathematical models including 1) establishing hardware-software partition problem；2) for the correlation of coefficient in coefficient matrix in constraints, by the naive model that mathematical models abbreviation is low dimensional；3) automatic partitioning algorithm, solution procedure 2 are selected) simplified model, obtain optimal hardware-software partition scheme, and record the run time of algorithm solution, observe the efficiency that automatic partitioning algorithm solves simplified model；4) feasibility of hardware-software partition scheme is verified；5) optimal hardware-software partition scheme is exported.The present invention can reduce the complexity of model, automatic partitioning algorithm is made to greatly reduce the time of model solution, improve the solution efficiency of partitioning algorithm, especially for extensive hardware-software partition, speed can clearly get a promotion, so that solving large-scale complicated hardware-software partition becomes a kind of possibility, the range that model is applicable in is improved.
Description
Technical field
The present invention relates to a kind of Method for HW/SW partitioning for embedded system.It is soft more particularly to a kind of high-efficiency dynamic
Hardware partition method.
Background technology
Embedded system is application-centered, based on computer and integrated circuit technique, software and hardware can cut, fit
Answer dedicated computer system of the application system to strict demands such as function, reliability, cost, volume, power consumptions.In embedded system
There are two types of basic implementation methods for portion's function module：Software and hardware.Software approach is using microprocessor as platform, by designing generation
Coded program completes the specific function of system.And hardware approach is to realize system function by design specialized logic circuit.One
As for, hardware can provide better performance than software, and software is easier to develop and modification, and flexibility is stronger, cost is than hard
Part is lower.There are greatest differences in performance and cost for both means, in order to reach the best combination of cost and performance, take into account
Speed and flexibility, major part embedded system is all in a manner that software and hardware is realized jointly at present.Since embedded system is big
Mostly in a manner that software and hardware is realized jointly, then it is extremely important that hardware-software partition just influences embedded system performance into one
Link.
Hardware-software partition is the important link and component part of Hardware/Software Collaborative Design, plays very crucial effect.It is soft
Hardware division refers to the realization method in design system, determining that modules take software or hardware.Its main task
Be under conditions of every design constraint is met, on the software and hardware part in system function division to object construction, and
Best software and hardware compromise proposal is provided for system.
The description of hardware-software partition problem：
The model of hardware-software partition problem can be described with a Flow chart task, and entire Flow chart task is one oriented again
Acyclic figure (DAG figures), as shown in Figure 1, being denoted as G=(V, E).
Wherein, V is the set of task, V={ V0,V1..., Vn, ViA task in expression system, can be with soft
Part or hardware realization, each task node include the node attribute informations such as its software, the execution time of hardware and power consumption；E is
The set on side, E={ e0,e1..., em, represent the control planning or data flow between task, the terminal task of each edge
It can just must start to perform after the initial point task on this side is completed, the communication that the weight on side is represented between two nodes is opened
Pin.
If X={ x1,x2,..,xnFor a hardware-software partition scheme, xiThe software and hardware for representing a task node is realized
Mode, xi=1 represents the node hardware realization, xi=0 represents that the node is realized with software.
In order to facilitate network analysis, but also network analysis has more specific aim, object function is set as to perform the time, to it
His systematic parameter has certain constraint.In this case, the accurate model of hardware-software partition problem is：
Wherein T (X), area (X), price (X), power (X), storage (X) represent hardware-software partition scheme X respectively
Task execution time, area, cost, power consumption, storage overhead.In actual conditions, the constraints meeting of hardware-software partition problem
Have very much.In the case of more than constraints, when automatic partitioning algorithm solves accurate model, it is likely that many can be absorbed in
Among inefficient cycle, it can thus extend the time of the solution hardware-software partition problem of automatic partitioning algorithm, considerably increase mould
The difficulty that type solves.
Invention content
The technical problem to be solved by the invention is to provide a kind of complexities that can reduce model, make automatic partitioning algorithm
The high-efficiency dynamic Method for HW/SW partitioning greatly reduce to the time of model solution.
The technical solution adopted in the present invention is：A kind of high-efficiency dynamic Method for HW/SW partitioning, for embedded system
Design, includes the following steps：
1) mathematical models of hardware-software partition problem are established, it is assumed that have n task node and m constraints, be
System performs time object function as an optimization, establishes mathematical models as follows：
In formula, xiRepresent the software and hardware realization method of a task node, xi=1 represents the node hardware realization, xi=
0 represents that the node is realized with software, aijAnd ciIt is the performance parameter of embedded system, biIt is the performance constraints of embedded system
Value.
2) for the correlation of coefficient in coefficient matrix in constraints, by the letter that mathematical models abbreviation is low dimensional
Single model, the model after abbreviation are as follows：
I, j and k are simplified model bound term in formula；
3) simplified model is solved
Select automatic partitioning algorithm, solution procedure 2) simplified model, obtain optimal hardware-software partition scheme, and record calculation
The run time that method solves, observes the efficiency that automatic partitioning algorithm solves simplified model；
4) feasibility of hardware-software partition scheme is verified
Optimal hardware-software partition scheme described in step 3) is substituted into the constraint in the mathematical models described in step 1)
Condition group, the optimal hardware-software partition scheme obtained to solving simplified model carries out feasibility verification, if meeting accurate mathematical
Each constraints in model, optimal hardware-software partition scheme is feasible solution in mathematical models, is entered step 5), if
Optimal hardware-software partition scheme is unsatisfactory for each constraints in mathematical models, and optimal hardware-software partition scheme is in perfect number
It is infeasible solution to learn in model, then back to step 2) loop iteration until the optimal hardware-software partition scheme obtained is feasible solution
Until；
5) optimal hardware-software partition scheme is exported.
The performance parameter of embedded system described in step 1) includes：The execution time of system, area, cost, power consumption
And storage overhead.
Correlation described in step 2) is the linear dependence between row vector in coefficient matrix.
Automatic partitioning algorithm described in step 3) is genetic algorithm or particle cluster algorithm or the algorithm that leapfrogs.
A kind of high-efficiency dynamic Method for HW/SW partitioning of the present invention, the mathematical models after model simplifying method,
The complexity of model can be reduced so that the speed solved with automatic partitioning algorithm is greatly speeded up, even if automatic partitioning algorithm is to mould
The time that type solves greatly reduces, and improves the solution efficiency of partitioning algorithm, especially for extensive hardware-software partition, speed
It can clearly get a promotion so that solving large-scale complicated hardware-software partition becomes a kind of possibility, improves model and is applicable in
Range.In dynamic hardware-software partition, this modeling method can also meet the requirement of system real time.The present invention again draw by cooperation
The verification method of offshoot program solves the practical sex chromosome mosaicism of complicated hardware-software partition model.
Description of the drawings
Fig. 1 is Flow chart task；
Fig. 2 is the flow chart of high-efficiency dynamic Method for HW/SW partitioning of the present invention.
Specific embodiment
A kind of high-efficiency dynamic Method for HW/SW partitioning of the present invention is described in detail with reference to embodiment and attached drawing.
A kind of high-efficiency dynamic Method for HW/SW partitioning of the present invention, for the design of embedded system, as shown in Fig. 2, packet
Include following steps：
1) mathematical models of hardware-software partition problem are established, it is assumed that have n task node and m constraints, be
System performs time object function as an optimization, establishes mathematical models as follows：
In formula, xiRepresent the software and hardware realization method of a task node, xi=1 represents the node hardware realization, xi=
0 represents that the node is realized with software, aijAnd ciIt is the performance parameter of embedded system, biIt is the performance constraints of embedded system
Value,
The performance parameter of the embedded system includes：Execution time, area, cost, power consumption and the storage of system
Expense；
2) for the correlation of coefficient in coefficient matrix in constraints, by the letter that mathematical models abbreviation is low dimensional
Single model, the model after abbreviation are as follows：
I, j and k are simplified model bound term in formula；The correlation is the linear phase between row vector in coefficient matrix
Guan Xing；
3) simplified model is solved
Select automatic partitioning algorithm, solution procedure 2) simplified model, obtain optimal hardware-software partition scheme, and record calculation
The run time that method solves, observes the efficiency that automatic partitioning algorithm solves simplified model, and the automatic partitioning algorithm is to lose
Propagation algorithm or particle cluster algorithm or the algorithm that leapfrogs；
4) feasibility of hardware-software partition scheme is verified
Optimal hardware-software partition scheme described in step 3) is substituted into the constraint in the mathematical models described in step 1)
Condition group, the optimal hardware-software partition scheme obtained to solving simplified model carries out feasibility verification, if meeting accurate mathematical
Each constraints in model, optimal hardware-software partition scheme is feasible solution in mathematical models, is entered step 5), if
Optimal hardware-software partition scheme is unsatisfactory for each constraints in mathematical models, and optimal hardware-software partition scheme is in perfect number
It is infeasible solution to learn in model, then back to step 2) loop iteration until the optimal hardware-software partition scheme obtained is feasible solution
Until；
5) optimal hardware-software partition scheme is exported.
Specific example is given below：
(1) intend 44 node tasks flow graphs using the generation of tgff tools as test model, task execution time conduct
Optimization aim, area, power consumption and cost are as constraints；
(2) according to the correlation between coefficient in constraints coefficient matrix, accurate model is converted to only comprising area
The simplified model of constraint；
(3) simplified model is solved, obtains optimal hardware-software partition scheme as automatic partitioning algorithm using genetic algorithm.
The parameter setting of genetic algorithm：Population scale 10, Hybridization Factor 0.618, mutagenic factor 0.03, iterations 100.
(4) it will be solved in the optimal hardware-software partition scheme substitution mathematical models that simplified model obtains with genetic algorithm
Sets of constraints verified, with this determine optimal hardware-software partition scheme in mathematical models be feasible solution.
If splitting scheme is feasible solution in mathematical models, splitting scheme is just exported.If splitting scheme is in accurate mathematical mould
It is infeasible solution in type, is returned to step (2), until optimal hardware-software partition scheme is feasible solution.
The average solution time of 1 accurate model of table and simplified model
| The model of solution | Averagely solve the time (ms) |
| Accurate model | 155.0 |
| Simplified model | 90.7 |
Claims (4)
1. a kind of high-efficiency dynamic Method for HW/SW partitioning, for the design of embedded system, which is characterized in that including walking as follows
Suddenly：
1) mathematical models of hardware-software partition problem are established, it is assumed that have n task node and m constraints, system is held
Row time object function as an optimization, establishes mathematical models as follows：
In formula, xiRepresent the software and hardware realization method of a task node, xi=1 represents the node hardware realization, xi=0 table
Show that the node is realized with software, aijAnd ciIt is the performance parameter of embedded system, biIt is the performance constraints value of embedded system；
2) for the correlation of coefficient in coefficient matrix in constraints, by the simple mould that mathematical models abbreviation is low dimensional
Type, the model after abbreviation are as follows：
K bound term is shared in simplified model；
3) simplified model is solved
Select automatic partitioning algorithm, solution procedure 2) simplified model, obtain optimal hardware-software partition scheme, and record algorithm and ask
The run time of solution observes the efficiency that automatic partitioning algorithm solves simplified model；
4) feasibility of hardware-software partition scheme is verified
Optimal hardware-software partition scheme described in step 3) is substituted into the constraints in the mathematical models described in step 1)
Group, the optimal hardware-software partition scheme obtained to solving simplified model carries out feasibility verification, if meeting mathematical models
In each constraints, optimal hardware-software partition scheme is feasible solution in mathematical models, is entered step 5), if optimal
Hardware-software partition scheme is unsatisfactory for each constraints in mathematical models, and optimal hardware-software partition scheme is in accurate mathematical mould
It is infeasible solution in type, then back to step 2) loop iteration until the optimal hardware-software partition scheme obtained is that feasible solution is
Only；
5) optimal hardware-software partition scheme is exported.
2. a kind of high-efficiency dynamic Method for HW/SW partitioning according to claim 1, which is characterized in that embedding described in step 1)
The performance parameter of embedded system includes：Execution time, area, cost, power consumption and the storage overhead of system.
A kind of 3. high-efficiency dynamic Method for HW/SW partitioning according to claim 1, which is characterized in that the phase described in step 2)
Closing property is the linear dependence in coefficient matrix between row vector.
4. a kind of high-efficiency dynamic Method for HW/SW partitioning according to claim 1, which is characterized in that described in step 3) from
Dynamic partitioning algorithm is genetic algorithm or particle cluster algorithm or the algorithm that leapfrogs.
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| CN104899048A (en) * | 2015-06-27 | 2015-09-09 | 奇瑞汽车股份有限公司 | Design method for embedded system |
| CN105550439A (en) * | 2015-12-09 | 2016-05-04 | 天津大学 | Generation method of dynamic software-hardware partitioning environment |
| CN105389615B (en) * | 2015-12-09 | 2018-01-09 | 天津大学 | A kind of dynamic hardware-software partition environmental change detection method of nested type |
| CN115499305B (en) * | 2022-07-29 | 2024-04-26 | 天翼云科技有限公司 | Deployment method and device of distributed cluster storage equipment and electronic equipment |
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