CN104572268A - Efficient dynamic division method of software and hardware - Google Patents

Abstract

The invention provides an efficient dynamic division method of software and hardware, and aims at designing an embedded system. The method comprises the steps of 1) building an accurate mathematic model for software and hardware division problem; 2) simplifying the accurate mathematic model into a low-dimensional simple model according to the relevance of coefficients of a coefficient matrix in a limitation condition; 3) solving the simplified model obtained in step 2) through the automatic division algorithm to obtain the optimal software and hardware division scheme, recording the algorithm solving operation time, and observing the simplified mode solving efficiency of the automatic division algorithm; 4) verifying the feasibility of the software and hardware division scheme; 5) outputting the optimal software and hardware division scheme. With the adoption of the method, the complexity of the model can be reduced; the model solving time of the automatic division algorithm can be greatly reduced; the division algorithm solving efficiency can be increased; the large scale software and hardware can be particularly quickly divided; therefore, large scale complex software and hardware can be divided, and the applicable scope of the model is expanded.

Description

A kind of high-efficiency dynamic Method for HW/SW partitioning

Technical field

The present invention relates to a kind of Method for HW/SW partitioning for embedded system.Particularly relate to a kind of high-efficiency dynamic Method for HW/SW partitioning.

Background technology

Embedded system be application-centered, based on computing machine and integrated circuit technique, software and hardware can cutting, adapt to application system dedicated computer system that function, reliability, cost, volume, power consumption etc. are strict with.Embedded system inner function module has two kinds of basic implementation methods: software and hardware.Software approach take microprocessor as platform, is carried out the specific function of completion system by design code program.And hardware approach realizes systemic-function by design specialized logical circuit.In general, hardware can provide better performance than software, and software is more easily developed and revised, and dirigibility is stronger, cost is lower than hardware.There is greatest differences in these two kinds of means, in order to reach the best combination of cost and performance, take into account speed and dirigibility in performance and cost, the mode that current most of embedded system all adopts software and hardware jointly to realize.Since the mode that embedded system adopts software and hardware jointly to realize mostly, so hardware-software partition has just become one to affect the very important link of embedded system performance.

Hardware-software partition is important step and the ingredient of Hardware/Software Collaborative Design, plays a part very crucial.Hardware-software partition refers to when design system, determines that modules takes the implementation of software or hardware.Its main task is under the condition meeting every design constraint, system function division in the software and hardware part in object construction, and provides best software and hardware compromise proposal for system.

The description of hardware-software partition problem:

The model of hardware-software partition problem can describe with a Flow chart task, and whole Flow chart task is again a directed acyclic graph (DAG figure), as shown in Figure 1, is denoted as G=(V, E).

Wherein, V is the set of task, V={V ₀, V ₁...., V _n, V _ia task in expression system, can with software or hardware implementing, and each task node comprises the node attribute information such as execution time and power consumption of its software, hardware; E is the set on limit, E={e ₀, e ₁...., e _m, represent the control planning between task or data flow, the terminal task on every bar limit just can must start to perform after the initial point task on this limit completes, and the weight on limit represents the communication-cost between two nodes.

If X={x ₁, x ₂.., x _nbe a hardware-software partition scheme, x _irepresent the software and hardware implementation of a task node, x _i=1 represents this node hardware implementing, x _i=0 represents this node software simulating.

Conveniently systematic analysis, also makes systematic analysis have more specific aim, objective function is set to the execution time, have certain constraint to other system parameter.In this case, the accurate model of hardware-software partition problem is:

$\left\{\begin{array}{c}\min T\left(X\right)\\ s.t.\mathrm{area}\left(X\right)\≤\mathrm{arealimit}\\ s.t.\mathrm{price}\left(X\right)\≤\mathrm{pricelimit}\\ s.t.\mathrm{power}\left(X\right)\≤\mathrm{powerlimit}\\ s.t.\mathrm{storage}\left(X\right)\≤\mathrm{storagelimit}\\ \·\\ \·\\ \·\end{array}\right.$

Wherein T (X), area (X), price (X), power (X), storage (X) represent task execution time, area, cost, power consumption, the storage overhead of hardware-software partition scheme X respectively.In actual conditions, the constraint condition of hardware-software partition problem has a lot.When constraint condition is many, when automatic partitioning algorithm solves accurate model, be absorbed among many inefficient cycle possibly, the time solving hardware-software partition problem of automatic partitioning algorithm will be extended like this, considerably increase the difficulty of model solution.

Summary of the invention

Technical matters to be solved by this invention is, provides a kind of complexity that can reduce model, makes the high-efficiency dynamic Method for HW/SW partitioning that the time of automatic partitioning algorithm to model solution greatly reduces.

The technical solution adopted in the present invention is: a kind of high-efficiency dynamic Method for HW/SW partitioning, for the design of embedded system, comprises the steps:

1) set up the mathematical models of hardware-software partition problem, suppose have n task node and m constraint condition, the system execution time, as optimization object function, sets up mathematical models as follows:

$\left\{\begin{array}{c}\min f\left(X\right)=c_1{x}_1+c_2{x}_2+\·\·\·+c_n{x}_n\\ s.t.a_{11}{x}_1+a_{12}+x_2+\·\·\·+a_{1n}{x}_n\≤b_1\\ s.t.a_{21}{x}_1+a_{22}{x}_2+\·\·\·+a_{2n}{x}_n\≤b_2\\ s.t.a_{31}{x}_1+a_{32}{x}_2+\·\·\·+a_{3n}{x}_n\≤b_3\\ \·\\ \·\\ \·\\ s.t.a_{m1}{x}_1+a_{m2}{x}_2+\·\·\·+a_{\mathrm{mm}}{x}_n\≤b_m\end{array}\right.$

In formula, x _irepresent the software and hardware implementation of a task node, x _i=1 represents this node hardware implementing, x _i=0 represents this node software simulating, a _ijand c _ithe performance parameter of embedded system, b _iit is the performance constraints value of embedded system.

2) for the correlativity of coefficient in matrix of coefficients in constraint condition, be the naive model of low dimension by mathematical models abbreviation, the model after abbreviation is as follows:

$\left\{\begin{array}{c}\min f\left(X\right)=c_1{x}_1+c_2{x}_2+\·\·\·+c_n{x}_n\\ s.t.a_{i1}{x}_1+a_{i2}+x_2+\·\·\·+a_{\mathrm{in}}{x}_n\≤b_i\\ s.t.a_{j1}{x}_1+a_{j2}{x}_2+\·\·\·+a_{\mathrm{jn}}{x}_n\≤b_j\\ \·\\ \·\\ \·\\ s.t.a_{k1}{x}_1+a_{k2}{x}_2+\·\·\·+a_{\mathrm{kn}}{x}_n\≤b_k\end{array}\right.$

In formula, i, j and k are simplified model bound term;

3) simplified model is solved

Select automatic partitioning algorithm, solution procedure 2) simplified model, obtain optimum hardware-software partition scheme, and record the working time of Algorithm for Solving, observe the efficiency that automatic partitioning algorithm solves simplified model;

4) feasibility of hardware-software partition scheme is verified

By step 3) described in optimum hardware-software partition scheme substitute into step 1) described in mathematical models in sets of constraints, feasibility checking is carried out to solving the optimum hardware-software partition scheme that simplified model draws, if meet each constraint condition in mathematical models, optimum hardware-software partition scheme is feasible solution in mathematical models, enter step 5), if optimum hardware-software partition scheme does not meet each constraint condition in mathematical models, optimum hardware-software partition scheme is infeasible solution in mathematical models, then turning back to step 2) loop iteration is until the optimum hardware-software partition scheme drawn is feasible solution,

5) optimum hardware-software partition scheme is exported.

Step 1) described in the performance parameter of embedded system include: execution time of system, area, cost, power consumption and storage overhead.

Step 2) described in correlativity be linear dependence in matrix of coefficients between row vector.

Step 3) described in automatic partitioning algorithm be genetic algorithm or particle cluster algorithm or the algorithm that leapfrogs.

A kind of high-efficiency dynamic Method for HW/SW partitioning of the present invention, mathematical models after model simplifying method, the complexity of model can be reduced, speed with automatic partitioning algorithm solves is accelerated greatly, even if the time of partitioning algorithm to model solution greatly reduces automatically, improve the solution efficiency of partitioning algorithm, especially concerning extensive hardware-software partition, speed can clearly get a promotion, make to solve large-scale complicated hardware-software partition and become a kind of possibility, improve the scope that model is suitable for.In dynamic hardware-software partition, this modeling method can also meet the requirement of system real time.The present invention coordinates again the verification method of splitting scheme, solves the practicality problem of complicated hardware-software partition model.

Accompanying drawing explanation

Fig. 1 is Flow chart task;

Fig. 2 is the process flow diagram of high-efficiency dynamic Method for HW/SW partitioning of the present invention.

Embodiment

Below in conjunction with embodiment and accompanying drawing, a kind of high-efficiency dynamic Method for HW/SW partitioning of the present invention is described in detail.

A kind of high-efficiency dynamic Method for HW/SW partitioning of the present invention, for the design of embedded system, as shown in Figure 2, comprises the steps:

1) set up the mathematical models of hardware-software partition problem, suppose have n task node and m constraint condition, the system execution time, as optimization object function, sets up mathematical models as follows:

$\left\{\begin{array}{c}\min f\left(X\right)=c_1{x}_1+c_2{x}_2+\·\·\·+c_n{x}_n\\ s.t.a_{11}{x}_1+a_{12}+x_2+\·\·\·+a_{1n}{x}_n\≤b_1\\ s.t.a_{21}{x}_1+a_{22}{x}_2+\·\·\·+a_{2n}{x}_n\≤b_2\\ s.t.a_{31}{x}_1+a_{32}{x}_2+\·\·\·+a_{3n}{x}_n\≤b_3\\ \·\\ \·\\ \·\\ s.t.a_{m1}{x}_1+a_{m2}{x}_2+\·\·\·+a_{\mathrm{mm}}{x}_n\≤b_m\end{array}\right.$

In formula, x _irepresent the software and hardware implementation of a task node, x _i=1 represents this node hardware implementing, x _i=0 represents this node software simulating, a _ijand c _ithe performance parameter of embedded system, b _ithe performance constraints value of embedded system,

The performance parameter of described embedded system includes: execution time of system, area, cost, power consumption and storage overhead;

2) for the correlativity of coefficient in matrix of coefficients in constraint condition, be the naive model of low dimension by mathematical models abbreviation, the model after abbreviation is as follows:

$\left\{\begin{array}{c}\min f\left(X\right)=c_1{x}_1+c_2{x}_2+\·\·\·+c_n{x}_n\\ s.t.a_{i1}{x}_1+a_{i2}+x_2+\·\·\·+a_{\mathrm{in}}{x}_n\≤b_i\\ s.t.a_{j1}{x}_1+a_{j2}{x}_2+\·\·\·+a_{\mathrm{jn}}{x}_n\≤b_j\\ \·\\ \·\\ \·\\ s.t.a_{k1}{x}_1+a_{k2}{x}_2+\·\·\·+a_{\mathrm{kn}}{x}_n\≤b_k\end{array}\right.$

In formula, i, j and k are simplified model bound term; Described correlativity is the linear dependence in matrix of coefficients between row vector;

3) simplified model is solved

Select automatic partitioning algorithm, solution procedure 2) simplified model, obtain optimum hardware-software partition scheme, and record the working time of Algorithm for Solving, observe the efficiency that automatic partitioning algorithm solves simplified model, described automatic partitioning algorithm is genetic algorithm or particle cluster algorithm or the algorithm that leapfrogs;

4) feasibility of hardware-software partition scheme is verified

By step 3) described in optimum hardware-software partition scheme substitute into step 1) described in mathematical models in sets of constraints, feasibility checking is carried out to solving the optimum hardware-software partition scheme that simplified model draws, if meet each constraint condition in mathematical models, optimum hardware-software partition scheme is feasible solution in mathematical models, enter step 5), if optimum hardware-software partition scheme does not meet each constraint condition in mathematical models, optimum hardware-software partition scheme is infeasible solution in mathematical models, then turning back to step 2) loop iteration is until the optimum hardware-software partition scheme drawn is feasible solution,

5) optimum hardware-software partition scheme is exported.

Provide instantiation below:

(1) 44 the node tasks flow graphs intending adopting tgff instrument to generate are as test model, and task execution time is as optimization aim, and area, power consumption and cost are as constraint condition;

(2) according to the correlativity in constraint condition matrix of coefficients between coefficient, accurate model is converted to and only comprises area-constrained simplified model;

(3) adopt genetic algorithm as automatic partitioning algorithm, solve simplified model, draw optimum hardware-software partition scheme.The optimum configurations of genetic algorithm: population scale 10, Hybridization Factor 0.618, mutagenic factor 0.03, iterations 100.

(4) sets of constraints that the optimum hardware-software partition scheme drawn with genetic algorithm for solving simplified model substitutes in mathematical models is verified, determine that optimum hardware-software partition scheme is feasible solution in mathematical models with this.If splitting scheme is feasible solution in mathematical models, just export splitting scheme.If splitting scheme is infeasible solution in mathematical models, just return step (2), until optimum hardware-software partition scheme is feasible solution.

Table 1 accurate model and simplified model on average solve the time

The model solved	On average solve the time (ms)
		Accurate model	155.0
Simplified model	90.7

Claims (4)

1. a high-efficiency dynamic Method for HW/SW partitioning, for the design of embedded system, is characterized in that, comprises the steps:

1) set up the mathematical models of hardware-software partition problem, suppose have n task node and m constraint condition, the system execution time, as optimization object function, sets up mathematical models as follows:

$\left\{\begin{array}{c}\min f\left(X\right)=c_1{x}_1+c_2{x}_2+...+c_n{x}_n\\ s.t.a_{11}{x}_1+a_{12}{x}_2+...+a_{1n}{x}_n\≤b_1\\ s.t.a_{21}{x}_1+a_{22}{x}_2+...+a_{2n}{x}_n\≤b_2\\ s.t.a_{31}{x}_1+a_{32}{x}_2+...+a_{3n}{x}_n\≤b_3\\ .\\ .\\ .\\ s.t.a_{m1}+x_1+a_{m2}{x}_2+...+a_{\mathrm{mn}}{x}_n\≤b_m\end{array}\right.$

In formula, x _irepresent the software and hardware implementation of a task node, x _i=1 represents this node hardware implementing, x _i=0 represents this node software simulating, a _ijand c _ithe performance parameter of embedded system, b _iit is the performance constraints value of embedded system;

2) for the correlativity of coefficient in matrix of coefficients in constraint condition, be the naive model of low dimension by mathematical models abbreviation, the model after abbreviation is as follows:

$\left\{\begin{array}{c}\min f\left(X\right)=c_1{x}_1+c_2{c}_2+...+c_n{x}_n\\ s.t.a_{i1}{x}_1+a_{i2}{x}_2+...+a_{\mathrm{in}}{x}_n\≤b_i\\ s.t.a_{j1}{x}_1+a_{j2}{x}_2+...+a_{\mathrm{jn}}{x}_n\≤b_j\\ .\\ .\\ .\\ s.t.a_{k1}{x}_1+a_{k2}{x}_2+...{+a}_{\mathrm{kn}}{x}_n\≤b_k\end{array}\right.$

In formula, i, j and k are simplified model bound term;

3) simplified model is solved

Select automatic partitioning algorithm, solution procedure 2) simplified model, obtain optimum hardware-software partition scheme, and record the working time of Algorithm for Solving, observe the efficiency that automatic partitioning algorithm solves simplified model;

4) feasibility of hardware-software partition scheme is verified

By step 3) described in optimum hardware-software partition scheme substitute into step 1) described in mathematical models in sets of constraints, feasibility checking is carried out to solving the optimum hardware-software partition scheme that simplified model draws, if meet each constraint condition in mathematical models, optimum hardware-software partition scheme is feasible solution in mathematical models, enter step 5), if optimum hardware-software partition scheme does not meet each constraint condition in mathematical models, optimum hardware-software partition scheme is infeasible solution in mathematical models, then turning back to step 2) loop iteration is until the optimum hardware-software partition scheme drawn is feasible solution,

5) optimum hardware-software partition scheme is exported.

2. a kind of high-efficiency dynamic Method for HW/SW partitioning according to claim 1, is characterized in that, step 1) described in the performance parameter of embedded system include: execution time of system, area, cost, power consumption and storage overhead.

3. a kind of high-efficiency dynamic Method for HW/SW partitioning according to claim 1, is characterized in that, step 2) described in correlativity be linear dependence in matrix of coefficients between row vector.

4. a kind of high-efficiency dynamic Method for HW/SW partitioning according to claim 1, is characterized in that, step 3) described in automatic partitioning algorithm be genetic algorithm or particle cluster algorithm or the algorithm that leapfrogs.