CN104570587A - System and method for preparing OPC lithography mask - Google Patents
System and method for preparing OPC lithography mask Download PDFInfo
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- CN104570587A CN104570587A CN201310520086.6A CN201310520086A CN104570587A CN 104570587 A CN104570587 A CN 104570587A CN 201310520086 A CN201310520086 A CN 201310520086A CN 104570587 A CN104570587 A CN 104570587A
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
- G03F1/36—Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes
Abstract
The invention relates to a system and a method for preparing an OPC lithography mask. The system comprises a CDSEM module and an OPC module, wherein the CDSEM module is used for acquiring the wafer data; and the OPC module is used for reading the wafer data, transforming the coordinates of all points in the wafer into coordinates in an OPC layout according to the wafer data to obtain a complete OPC layout and finally preparing the OPC lithography mask according to the OPC layout. According to the system and the method for preparing the OPC lithography mask provided by the invention, the data in CDSEM files, comprising the measuring position, graphic name, measured value, measuring sequence and other data in the wafer, is automatically read so as to automatically generate an OPC model according to the method, and the OPC lithography mask is prepared according to the OPC model. According to the method, the coordinate relationship between one point in the CDSEM and the OPC model is determined, correlation between the CDSEM data and the OPC model is established, and the positions of all the residual data in the CDSEM in the OPC model are calculated by virtue of the correlation, so that lots of space can be saved.
Description
Technical field
The present invention relates to semiconductor applications, particularly, the present invention relates to a kind of system and method preparing OPC lithography mask version.
Background technology
Ic manufacturing technology is a complicated technique, and technology innovation is very fast.The key parameter characterizing ic manufacturing technology is minimum feature size, i.e. critical size (critical dimension, CD), the size of critical size develops into present 0.13 micron from initial 125 microns, even less, the reduction just because of critical size just makes each chip to be arranged 1,000,000 devices becomes possibility.
Photoetching technique is the driving force of integrated circuit fabrication process development, is also one of technology of complexity the most.Relatively and other single manufacturing technology, the development of raising to integrated circuit of photoetching technique is significant.Before photoetching process starts, first need pattern to copy on mask plate by particular device, then by the light of lithographic equipment generation specific wavelength, the patterning on mask plate is copied on the silicon chip of production chip.But due to reducing of dimensions of semiconductor devices, can distortion phenomenon there is by design transfer to the process of silicon chip, if do not eliminate the failure that this distortion phenomenon can cause whole manufacturing technology.Therefore, optics can be carried out to described mask plate close on correction (Optical ProximityCorrection to solve described problem, OPC), described OPC method is carries out pre-service before photoetching to described lithography mask version, revise in advance, the amount that amendment is compensated just in time can compensate the optical proximity effect that exposure system causes.
Preparation OPC lithography mask version is needed at present in described OPC process, the preparation of described OPC lithography mask version needs the summary carried out with the data of ten thousand notes by number in scanning electron microscope (CDSEM) and editor usually, the preparation of the lithography mask version of OPC described in prior art normally human-edited, scanning electron microscope (CDSEM) is selected to collect the data of multiple exposed wafer, and be stored as the file of many be separated (seperated), above-mentioned file is carried out editing and the data in described CDSEM being associated with the position in OPC domain, thus obtain described OPC lithography mask version, described editor, calculate the time all needing at substantial, often need one week even longer time.
By manually preparing by CDSEM the time that described OPC lithography mask version needs at substantial in prior art, and degree of accuracy is also undesirable, makes production efficiency low, yield reduces, therefore, need to do further improvement to said method, to solve above-mentioned drawback.
Summary of the invention
In summary of the invention part, introduce the concept of a series of reduced form, this will further describe in embodiment part.Summary of the invention part of the present invention does not also mean that the key feature and essential features that will attempt to limit technical scheme required for protection, does not more mean that the protection domain attempting to determine technical scheme required for protection.
The invention provides a kind of system preparing OPC lithography mask version, comprising:
CDSEM module, for collecting wafer data;
OPC module, for reading described wafer data, and according to described wafer data by this wafer coordinate transformation be a little the coordinate in OPC domain, obtain complete OPC domain, finally prepare described OPC lithography mask version according to described OPC domain.
As preferably, described OPC template comprises reader, and described reader, for reading the described wafer data collected in described CDSEM module, comprises and measures order, figure title, measuring value and adjustment location.
As preferably, described OPC module comprises converter, for the position of arbitrfary point in described wafer being converted into the position of centralization in corresponding OPC domain, to obtain the coordinate of described arbitrfary point in described OPC domain.
As preferably, described converter by by described wafer CDSEM coordinate and the described arbitrfary point coordinate in described OPC domain be a little associated, then the position of remaining point in described OPC domain in described wafer, as reference, is determined in the position using this arbitrfary point in OPC domain.
As preferably, described OPC module comprises editing machine, in described OPC domain that converter is obtained coordinate a little edit, to obtain complete OPC domain.
As preferably, described OPC module comprises OPC lithography mask version and makes control module, and for being exported by described complete OPC domain, and control OPC lithography mask version making apparatus is produced, and obtains the OPC lithography mask version of entity.
Present invention also offers a kind of method that said system prepares OPC lithography mask version, comprising:
A () selects CDSEM to scan wafer, to obtain described wafer data;
B () calculates the described wafer data in step (a), by described wafer position be a little converted into position corresponding in OPC domain;
(c) by the domain of OPC described in step (b) position a little edit, obtain complete OPC domain;
D described complete OPC domain exports and prepares OPC lithography mask version by ().
As preferably, described step (b) comprises following sub-step:
(b-1) in described wafer, choose the data of first, determine its position in described wafer, then determine described first position in OPC domain, obtain described first coordinate in described OPC domain;
(b-2) be arranged in the coordinate of described wafer according to described first and be arranged in the coordinate of described OPC domain, determine in described wafer coordinate relation a little and between point corresponding to described OPC domain;
(b-3) determine n-th corresponding position in described OPC domain in described wafer according to the coordinate relation of described wafer and described OPC domain, wherein n be greater than 1 natural number.
As preferably, described step (b-3) comprises following sub-step further:
(b-3-1) read n-th coordinate data in wafer, the coordinate relation according to described wafer and described OPC domain determines n-th initial coordinate in described OPC domain;
(b-3-2) according to described first and described n-th coordinate in described OPC domain, obtain described and described n-th coordinate difference in described OPC domain at first, simultaneously length in units of adjacent pattern distance, determines the spaced at integer of described and at n-th at described first;
(b-3-3) after the spaced at integer determining described and at n-th at described first, length in units of adjacent pattern distance further, then rounding distance between n-th and described first, and then determine described n-th final position in described OPC domain.
The present invention prepares the problem of at substantial material resources and time to solve OPC lithography mask version in prior art, provide a kind of system and method preparing described OPC lithography mask version, described method is by automatically reading the data in CDSEM file, comprise the adjustment location in wafer, figure title, measuring value and measure the data such as order and generate OPC model automatically, and prepare OPC lithography mask version according to described OPC model.In the process by determining a point in described CDSEM and the coordinate relation in OPC model, set up the association between described CDSEM data and OPC model, calculated in CDSEM the position remained in all data in OPC model by described association, thus a large amount of time can be saved.
Accompanying drawing explanation
Following accompanying drawing of the present invention in this as a part of the present invention for understanding the present invention.Shown in the drawings of embodiments of the invention and description thereof, be used for explaining device of the present invention and principle.In the accompanying drawings,
Fig. 1 is for preparing the schematic diagram of the system of OPC lithography mask version described in the embodiment of the invention;
Fig. 2 in the embodiment of the invention by described wafer position be a little converted into the schematic flow sheet of the position of centralization in OPC domain.
Embodiment
In the following description, a large amount of concrete details is given to provide more thorough understanding of the invention.But, it is obvious to the skilled person that the present invention can be implemented without the need to these details one or more.In other example, in order to avoid obscuring with the present invention, technical characteristics more well known in the art are not described.
Should give it is noted that term used here is only to describe specific embodiment, and be not intended to restricted root according to exemplary embodiment of the present invention.As used herein, unless the context clearly indicates otherwise, otherwise singulative be also intended to comprise plural form.In addition, it is to be further understood that, " comprise " when using term in this manual and/or " comprising " time, it indicates exists described feature, entirety, step, operation, element and/or assembly, but does not get rid of existence or additional other features one or more, entirety, step, operation, element, assembly and/or their combination.
Now, describe in more detail with reference to the accompanying drawings according to exemplary embodiment of the present invention.But these exemplary embodiments can multiple different form be implemented, and should not be interpreted as being only limited to the embodiments set forth herein.Should be understood that, providing these embodiments to be of the present inventionly disclose thorough and complete to make, and the design of these exemplary embodiments fully being conveyed to those of ordinary skill in the art.In the accompanying drawings, for the sake of clarity, use the element that identical Reference numeral represents identical, thus will omit description of them.
The invention provides a kind of preparation system and method for OPC lithography mask version, described system comprises:
CDSEM module, for collecting wafer data;
OPC module, for reading described wafer data, and according to described wafer data by this wafer coordinate transformation be a little the coordinate in OPC domain, obtain complete OPC domain, finally prepare described OPC lithography mask version according to described OPC domain.
Further, described OPC module comprises data reader, converter, editing machine, OPC lithography mask version making control module;
Wherein, described data reader, for reading the described wafer data collected in described CDSEM module, comprises the data in the file of each individualism, comprises data such as measuring order, figure title, measuring value and adjustment location.Wherein said adjustment location refers to the data in described wafer, needs the data be converted in OPC model described position, could prepare OPC lithography mask version.
Described converter, for the position of arbitrfary point in described wafer being converted into the position of centralization in corresponding OPC domain, to obtain the coordinate of described arbitrfary point in described OPC domain.Described converter by by described wafer CDSEM coordinate and the described arbitrfary point coordinate in described OPC domain be a little associated, then the position of remaining point in described OPC domain in described wafer, as reference, is determined in the position using this arbitrfary point in OPC domain.
Particularly, in described converter, first the data of any are chosen on wafer described in described CDSEM, obtain the coordinate of this point, then determine this some position in OPC domain, determine this some coordinate in described OPC domain, determine associating of the coordinate of CDSEM and coordinate in OPC domain according to this point, then using this position in OPC domain as reference, other the position of point in OPC domain in wafer, is remained.
Described editing machine, the coordinate for each point in the OPC domain that obtained by described converter is edited, and to obtain complete OPC domain, described OPC domain is the OPC domain of wafer sample.
Described OPC lithography mask version makes control module, described OPC lithography mask version makes control module and comprises OPC domain server further, described server is used for exporting obtaining OPC domain in described editing machine, and control OPC lithography mask version making apparatus is produced, and obtains the OPC lithography mask version of entity.
Present invention also offers a kind of preparation method of OPC lithography mask version, said method comprising the steps of:
A () selects CDSEM to scan wafer, to obtain described wafer data;
B () calculates the described wafer data in step (a), by described wafer position be a little converted into position corresponding in OPC domain;
(c) by the domain of OPC described in step (b) position a little edit, obtain complete OPC domain;
D described complete OPC domain exports and prepares OPC lithography mask version by ().
In the process, wherein, described step (b) is further comprising the steps:
(b-1) in described wafer, choose the data of first, determine its position in described wafer, then determine described first position in OPC domain, obtain described first coordinate in described OPC domain;
(b-2) be arranged in the coordinate of described wafer according to described first and be arranged in the coordinate of described OPC domain, determine in described wafer coordinate relation a little and between point corresponding to described OPC domain;
(b-3) determine n-th corresponding position in described OPC domain in described wafer according to the coordinate relation of described wafer and described OPC domain, wherein n be greater than 1 natural number.
Below in conjunction with accompanying drawing, the preparation system of OPC lithography mask version of the present invention and method are described further.
Embodiment 1
As shown in Figure 1, in the preparation system of described OPC lithography mask version, comprising:
CDSEM module, for collecting wafer data;
OPC module, described OPC module is used for reading described wafer data, and is the coordinate in described OPC domain according to described data by the coordinate transformation of arbitrfary point in wafer, and prepares described OPC lithography mask version according to described OPC domain.
Wherein, described CDSEM module and OPC module are connected by computing machine, wherein, particularly, one end of described computing machine is connected with multiple CDSEM module respectively, for by the digital independent in CDSEM out, data reader in described calculating in OPC module, converter, editing machine carry out editor and calculate, obtain OPC domain, and produced in described OPC lithography mask version making apparatus by described computer export, prepare entity OPC lithography mask version.Wherein every platform computing machine and multiple CDSEM and OPC lithography mask version making apparatus parallel join, control multiple equipment simultaneously and carry out work.
Further, the scanning electron microscope CDSEM measuring critical size is at least comprised in described CDSEM module, described CDSEM is used for scanning the critical size of each device in wafer, measuring, and store measuring the data obtained, multiple independent data file is comprised for each wafer, and each file is carried out to the key entry of keyword, to distinguish described multiple data file, described keyword comprises measurement order, figure title, measuring value and adjustment location etc.
Then need to process the ten hundreds of data in above-mentioned CDSEM to prepare OPC lithography mask version, be then by artificial method, the data in file are one by one carried out reading and calculating in prior art, in the present invention, then realize above-mentioned purpose by described data reader, converter.
Wherein said data reader is used for being stored in data in described CDSEM file folder, is converted into the data type carrying out editing in described editing machine, and the data wherein read comprise measurement order, figure title, measuring value and adjustment location etc.Wherein said adjustment location refers to the data in described wafer, needs the data be converted in OPC model described position, could prepare OPC lithography mask version.
Described converter is used for the position of arbitrfary point in described wafer to be converted into the position of its centralization in OPC domain.In described converter, first the data of any are chosen on wafer described in described CDSEM, obtain the coordinate of this point, then this some position in OPC domain is determined, determine this some coordinate in described OPC domain, determine associating of the coordinate of CDSEM and coordinate in OPC domain according to this point, then using this position in OPC domain as reference, in wafer, remain other the position of point in OPC domain.
Further, in described converter, in order to improve the degree of accuracy of described OPC domain, its processing procedure as shown in Figure 2:
In described wafer, choose the data of a bit, determine its position in described wafer as one point union, then determine first position in OPC domain, obtain described first data in described OPC domain.
According to described first coordinate in wafer and the coordinate in described OPC domain, determine the coordinate relation of described wafer and described OPC domain, then n-th coordinate data in wafer is read, wherein n be greater than 1 natural number, the coordinate relation according to described wafer and described OPC domain determines n-th initial coordinate in described OPC domain.
Further, described editing machine is also for correcting the coordinate of described n-th, to provide the accuracy of described OPC domain, described trimming process is by first and described n-th coordinate in described OPC domain, obtain described and described n-th coordinate difference in described OPC domain at first, simultaneously length in units of adjacent pattern distance, determines the spaced at integer of described and at n-th at described first.
After the spaced at integer determining described and at n-th at described first, length, then rounding distance between n-th and described first in units of adjacent pattern distance further, and then determine described n-th final position in described OPC domain.
In described converter by described wafer position a little be all converted into centralized location in described OPC domain, determine coordinate a little.
Further, described editing machine, the coordinate for each point in the OPC domain that obtained by described converter is edited, and to obtain complete OPC domain, described OPC domain is the OPC domain of wafer sample.
It should be noted that, described OPC domain is the simulation domain formed in described editing machine, described simulation domain, error may be there is in described simulation mask plate with final target domain, therefore can also be used in described editing machine carrying out OPC correction to described OPC domain, to make described OPC domain, there is higher degree of accuracy.The shape of described OPC domain can be observed, to carry out real-time monitoring to described OPC domain in described editing machine.
Described OPC lithography mask version output module, described OPC lithography mask version output module comprises OPC domain server further, described server is used for exporting obtaining OPC domain in described editing machine, and control OPC lithography mask version making apparatus is produced, and obtains the OPC lithography mask version of entity.
Data in the system in described wafer can be calculated voluntarily by the converter in system, be the position in OPC domain and coordinate points by the coordinate transformation of the point in described wafer, this process is no longer artificial execution, save the time greatly, the preparation time of whole OPC lithography mask version is shortened, improves wafer production efficiency.
Embodiment 2
Present invention also offers a kind of preparation method of OPC lithography mask version,
A () selects CDSEM to scan wafer, to obtain the data of described wafer;
B () calculates the data in step (a), by described wafer position be a little converted into the position of centralization in OPC domain;
(c) by described in OPC domain in step (b) centralized location a little edit, obtain complete OPC domain;
D () is prepared according to described OPC domain and is exported OPC lithography mask version.
In described step (a), select CDSEM to scan wafer, to obtain the data of described wafer, wherein comprise the critical size of each device in wafer in this step to scan, measure, and store measuring the data obtained, multiple independent data file is comprised for each wafer, and each file is carried out to the key entry of keyword, to distinguish described multiple data file, described keyword comprises measurement order, figure title, measuring value and adjustment location etc.
In described step (b), the position of arbitrfary point in described wafer is converted into the position of its centralization in OPC domain.Particularly, first the data of any are chosen on wafer described in described CDSEM, obtain the coordinate of this point, then this some position in OPC domain is determined, determine this some coordinate in described OPC domain, determine associating of the coordinate of CDSEM and coordinate in OPC domain according to this point, then using this position in OPC domain as reference, in wafer, remain other the position of point in OPC domain.
Further, in the process, wherein, described step (b) is further comprising the steps:
(b-1) in described wafer, choose the data of first, determine its position in described wafer, then determine described first position in OPC domain, obtain described first coordinate in described OPC domain;
(b-2) be arranged in the coordinate of described wafer according to described first and be arranged in the coordinate of described OPC domain, determine in described wafer coordinate relation a little and between point corresponding to described OPC domain;
(b-3) determine n-th corresponding position in described OPC domain in described wafer according to the coordinate relation of described wafer and described OPC domain, wherein n be greater than 1 natural number.
As preferably, described step (b-3) comprises following sub-step further:
(b-3-1) read n-th coordinate data in wafer, wherein n be greater than 1 natural number, the coordinate relation according to described wafer and described OPC domain determines n-th initial coordinate in described OPC domain;
(b-3-2) according to described first and described n-th coordinate in described OPC domain, obtain described and described n-th coordinate difference in described OPC domain at first, simultaneously length in units of adjacent pattern distance, determines the spaced at integer of described and at n-th at described first;
(b-3-3) after the spaced at integer determining described and at n-th at described first, length in units of adjacent pattern distance further, then rounding distance between n-th and described first, and then determine described n-th final position in described OPC domain.
Can be used for correcting the coordinate of described n-th by the sub-step of described step (b-3), to optimize described n-th position in described OPC domain, improve the accuracy of described OPC domain further.
In described step (d), export obtaining OPC domain in described editing machine, and control OPC lithography mask version making apparatus is produced, and obtains the OPC lithography mask version of entity.In of the present invention one particularly embodiment, lithography mask version is actually " the print egative film " of photoresist in photoetching process (be commonly called as photoresist, also claim photoresistance) layer, it has been printed the geometric figure of original integrated circuit design layout.That is, from original integrated circuit design layout to the formation of wafer on-chip circuit figure, namely intermediate demand, through plate-making link, also needs to make and a set of it prints the lithography mask version of original integrated circuit design layout pattern as " print egative film ".The geometric figure be somebody's turn to do on " print egative film " is transferred on wafer by photoetching process exactly, forms the circuitous pattern on wafer.
The lithography process of lithography mask version is as follows: first, and smooth bright and clean glass (or quartz) base version forms chromium film base version by Deposited By Dc Magnetron Sputtering photosensitive material chromium nitride-nitrogen chromium oxide; Then, in this chromium film base version, even application one deck photoresist or electron sensitive resist make sol evenning chromium plate, and this sol evenning chromium plate is photomask-blank, and it makes the geometric desirable photonasty blank plate of micro; Finally, in photomask base version, printed the micro geometric figure be transformed by original integrated circuit design layout by photoetching mask-making technology, thus complete the plate-making process of lithography mask version.
The present invention prepares the problem of at substantial manpower and materials and time to solve OPC lithography mask version in prior art, provide a kind of system and method preparing described OPC lithography mask version, described method is by automatically reading the data in CDSEM file, comprise the adjustment location in wafer, figure title, measuring value and measure the data such as order and generate OPC model automatically, and prepare OPC lithography mask version according to described OPC model.In the process by determining a point in described CDSEM and the coordinate relation in OPC model, set up the association between described CDSEM data and OPC model, calculated in CDSEM the position remained in all data in OPC model by described association, thus a large amount of time can be saved.
The present invention is illustrated by above-described embodiment, but should be understood that, above-described embodiment just for the object of illustrating and illustrate, and is not intended to the present invention to be limited in described scope of embodiments.In addition it will be appreciated by persons skilled in the art that the present invention is not limited to above-described embodiment, more kinds of variants and modifications can also be made according to instruction of the present invention, within these variants and modifications all drop on the present invention's scope required for protection.Protection scope of the present invention defined by the appended claims and equivalent scope thereof.
Claims (9)
1. prepare a system for OPC lithography mask version, comprising:
CDSEM module, for collecting wafer data;
OPC module, for reading described wafer data, and according to described wafer data by this wafer coordinate transformation be a little the coordinate in OPC domain, obtain complete OPC domain, prepare described OPC lithography mask version according to described OPC domain.
2. system according to claim 1, is characterized in that, described OPC template comprises reader, and described reader, for reading the described wafer data collected in described CDSEM module, comprises and measures order, figure title, measuring value and adjustment location.
3. system according to claim 1, it is characterized in that, described OPC module comprises converter, for the position of arbitrfary point in described wafer being converted into the position of centralization in corresponding OPC domain, to obtain the coordinate of described arbitrfary point in described OPC domain.
4. system according to claim 3, it is characterized in that, described converter by by described wafer CDSEM coordinate and the described arbitrfary point coordinate in described OPC domain be a little associated, then the position of remaining point in described OPC domain in described wafer, as reference, is determined in the position using this arbitrfary point in OPC domain.
5. system according to claim 1, is characterized in that, described OPC module comprises editing machine, in described OPC domain that converter is obtained coordinate a little edit, to obtain complete OPC domain.
6. system according to claim 1, it is characterized in that, described OPC module comprises OPC lithography mask version and makes control module, for being exported by described complete OPC domain, and control OPC lithography mask version making apparatus is produced, and obtains the OPC lithography mask version of entity.
7. adopt the described system of one of claim 1-6 to prepare a method for OPC lithography mask version, comprising:
A () selects CDSEM to scan wafer, to obtain described wafer data;
B () calculates the described wafer data in step (a), by described wafer position be a little converted into position corresponding in OPC domain;
(c) by the domain of OPC described in step (b) position a little edit, obtain complete OPC domain;
D described complete OPC domain exports and prepares OPC lithography mask version by ().
8. method according to claim 1, is characterized in that, described step (b) comprises following sub-step:
(b-1) in described wafer, choose the data of first, determine its position in described wafer, then determine described first position in OPC domain, obtain described first coordinate in described OPC domain;
(b-2) be arranged in the coordinate of described wafer according to described first and be arranged in the coordinate of described OPC domain, determine in described wafer coordinate relation a little and between point corresponding to described OPC domain;
(b-3) determine n-th corresponding position in described OPC domain in described wafer according to the coordinate relation of described wafer and described OPC domain, wherein n be greater than 1 natural number.
9. method according to claim 1, is characterized in that, described step (b-3) comprises following sub-step further:
(b-3-1) read n-th coordinate data in wafer, the coordinate relation according to described wafer and described OPC domain determines n-th initial coordinate in described OPC domain;
(b-3-2) according to described first and described n-th coordinate in described OPC domain, obtain described and described n-th coordinate difference in described OPC domain at first, simultaneously length in units of adjacent pattern distance, determines the spaced at integer of described and at n-th at described first;
(b-3-3) after the spaced at integer determining described and at n-th at described first, length in units of adjacent pattern distance further, then rounding distance between n-th and described first, and then determine described n-th final position in described OPC domain.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108153995A (en) * | 2018-01-19 | 2018-06-12 | 中国科学院微电子研究所 | The choosing method and device of resolution chart, the method and apparatus for building lithography model |
| CN108693714A (en) * | 2018-05-25 | 2018-10-23 | 德淮半导体有限公司 | OPC data collection method and OPC data collection device |
| CN113221499A (en) * | 2021-05-31 | 2021-08-06 | Tcl华星光电技术有限公司 | Mask layout generation method and device, computer equipment and storage medium |
| WO2023024872A1 (en) * | 2021-08-23 | 2023-03-02 | 苏州贝克微电子股份有限公司 | Method and apparatus for establishing chip model in layout of chip, and storage medium |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7012031B2 (en) * | 2004-01-08 | 2006-03-14 | Samsung Electronics Co., Ltd. | Photoresist pattern, method of fabricating the same, and method of assuring the quality thereof |
| US20070141477A1 (en) * | 2005-12-19 | 2007-06-21 | Chin-Lung Lin | Optical proximity correction method, optical proximity correction mask and conductive line structure |
| US20080250380A1 (en) * | 2007-04-04 | 2008-10-09 | Hitachi High-Technologies Corporation | Method of OPC Model Building, Information-Processing Apparatus, and Method of Determining Process Conditions of Semiconductor Device |
| CN101393569A (en) * | 2007-09-20 | 2009-03-25 | 中芯国际集成电路制造(上海)有限公司 | Method and system for establishing measurement form and measurement method |
| CN102109771A (en) * | 2011-01-27 | 2011-06-29 | 上海宏力半导体制造有限公司 | Method for detecting semiconductor device |
| CN102193307A (en) * | 2010-03-15 | 2011-09-21 | 中芯国际集成电路制造(上海)有限公司 | Method for enhancing identifiability of pattern requiring measurement |
| CN102385242A (en) * | 2010-09-01 | 2012-03-21 | 无锡华润上华半导体有限公司 | Method and system for manufacturing mask |
| CN103365071A (en) * | 2012-04-09 | 2013-10-23 | 中芯国际集成电路制造(上海)有限公司 | Optical proximity correction method for mask plate |
-
2013
- 2013-10-29 CN CN201310520086.6A patent/CN104570587A/en active Pending
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7012031B2 (en) * | 2004-01-08 | 2006-03-14 | Samsung Electronics Co., Ltd. | Photoresist pattern, method of fabricating the same, and method of assuring the quality thereof |
| US20070141477A1 (en) * | 2005-12-19 | 2007-06-21 | Chin-Lung Lin | Optical proximity correction method, optical proximity correction mask and conductive line structure |
| US20080250380A1 (en) * | 2007-04-04 | 2008-10-09 | Hitachi High-Technologies Corporation | Method of OPC Model Building, Information-Processing Apparatus, and Method of Determining Process Conditions of Semiconductor Device |
| CN101393569A (en) * | 2007-09-20 | 2009-03-25 | 中芯国际集成电路制造(上海)有限公司 | Method and system for establishing measurement form and measurement method |
| CN102193307A (en) * | 2010-03-15 | 2011-09-21 | 中芯国际集成电路制造(上海)有限公司 | Method for enhancing identifiability of pattern requiring measurement |
| CN102385242A (en) * | 2010-09-01 | 2012-03-21 | 无锡华润上华半导体有限公司 | Method and system for manufacturing mask |
| CN102109771A (en) * | 2011-01-27 | 2011-06-29 | 上海宏力半导体制造有限公司 | Method for detecting semiconductor device |
| CN103365071A (en) * | 2012-04-09 | 2013-10-23 | 中芯国际集成电路制造(上海)有限公司 | Optical proximity correction method for mask plate |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108153995A (en) * | 2018-01-19 | 2018-06-12 | 中国科学院微电子研究所 | The choosing method and device of resolution chart, the method and apparatus for building lithography model |
| CN108153995B (en) * | 2018-01-19 | 2021-07-20 | 中国科学院微电子研究所 | Test pattern selection method and device and method and device for building photoetching model |
| CN108693714A (en) * | 2018-05-25 | 2018-10-23 | 德淮半导体有限公司 | OPC data collection method and OPC data collection device |
| CN113221499A (en) * | 2021-05-31 | 2021-08-06 | Tcl华星光电技术有限公司 | Mask layout generation method and device, computer equipment and storage medium |
| CN113221499B (en) * | 2021-05-31 | 2023-12-05 | Tcl华星光电技术有限公司 | Mask layout generation method and device, computer equipment and storage medium |
| WO2023024872A1 (en) * | 2021-08-23 | 2023-03-02 | 苏州贝克微电子股份有限公司 | Method and apparatus for establishing chip model in layout of chip, and storage medium |
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