CN104569908A - Radio navigation receiver digital signal processing platform based on DSP/FPGA - Google Patents
Radio navigation receiver digital signal processing platform based on DSP/FPGA Download PDFInfo
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- CN104569908A CN104569908A CN201410689406.5A CN201410689406A CN104569908A CN 104569908 A CN104569908 A CN 104569908A CN 201410689406 A CN201410689406 A CN 201410689406A CN 104569908 A CN104569908 A CN 104569908A
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- dsp
- signal processing
- fpga
- digital signal
- radio navigation
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S1/00—Beacons or beacon systems transmitting signals having a characteristic or characteristics capable of being detected by non-directional receivers and defining directions, positions, or position lines fixed relatively to the beacon transmitters; Receivers co-operating therewith
- G01S1/02—Beacons or beacon systems transmitting signals having a characteristic or characteristics capable of being detected by non-directional receivers and defining directions, positions, or position lines fixed relatively to the beacon transmitters; Receivers co-operating therewith using radio waves
- G01S1/04—Details
- G01S1/045—Receivers
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- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Remote Sensing (AREA)
- Position Fixing By Use Of Radio Waves (AREA)
Abstract
The invention relates to a radio navigation receiver digital signal processing platform based on DSP/FPGA. The radio navigation receiver digital signal processing platform comprises a digital signal processing module, an A/D sampling module and a DSP/FPGA signal processing unit, wherein FPGA is in charge of the generation of a local pseudo code sequence and a carrier signal, spread spectrum signal mixing and related extraction, while DSP is in charge of processing related results of the FPGA, and controlling the operation of the FPGA. According to the invention, the design mode of DSP and FPGA is adopted to perform digital signal processing on a radio navigation receiver, and the receiver has the advantages of miniaturization and high reliability; the platform has the characteristics of good concealing performance, good anti-jamming capability, large action range, high positioning precision and low cost when being applied to the receiver of a radio navigation system; a DS/BPSK modulation manner and a code division multiple access communication technology are adopted to guarantee that the system functions and the positioning precision are realized, and simplify the equipment complexity and technical difficulty of the system.
Description
Technical field
the present invention relates to a kind of radio navigation receivers digital signal processing platform, especially adopt a kind of radio navigation receivers digital signal processing module of the Design Mode based on DSP/FPGA.
Background technology
the demand for development development radio navigation system of navy navigation equipment " 15 " scientific research construction plan, supplementing as complex navigation positioning system, meets various equipment in perform region to the demand of navigator fix.
modern naval battle is under the one patterns of warfare of " not meeting " between ourselves and the enemy, and the scope of activities of the troops such as the big-and-middle-sized surface vessel of naval, submarine must accomplish continuously reliable location.Secondly combat vessel has very strong maneuverability, constantly work out according to combat duty and sea area situation and revise course line.Through complicated marine sites such as narrow fairway, shoal submerged reef, underwater obstacles, navigator fix must be very accurate.Especially in the Campaign Process that enemy and we's situation is fast changing, ship manoeuvre is stronger, higher to the accuracy of navigator fix, reliability requirement.Again in mine warfare, no matter be offensive thunder battle array, basic thunder battle array, or defence thunder battle array, mine-laying and clearance all need high-precision positioning means.
but, at present for the navigational system of China's naval vessels service all exists corresponding problem.GPS/GLONASS navigation positioning system: the receiver that we use all can only receive civilian code, poor anti jamming capability, certainly can not use in future war.
no. II, long river positioning system: there is blind area, location in key area; Can not be applied to weapon guidance, Plane location uses." No. one, the Big Dipper " global position system: location poor real; User is disguised poor; Active working method, number of users is limited; Ground central control system meets with to be attacked and will make systemic breakdown.The development of principle type subscriber computer completes substantially, can meet the development of the subscriber computer that naval vessels, aircraft and guided missile use also does not carry out.Can coming into operation immediately, it be clear and definite to need.
in sum, carry out good concealment, the research of Regional Radio navigational system that antijamming capability is strong has very important realistic meaning and application prospect.Near Regional Radio navigational system work simultaneously, channel model is complicated, therefore realizes difficulty large.Can say, this frequency range is carried out spread spectrum communication system research or a brand-new problem of navigation application.This problem is launched around the relevant Theories and methods of system, analyzes its characteristic of channel, proposes the design proposal of receiver and emulates wherein gordian technique and study, demonstrating the feasibility of scheme, for the realization of system lays the foundation.Therefore this paper selected topic not only has important theory significance, and has very important realistic price.
Summary of the invention
the object of the invention is to the radio navigation receivers digital signal processing module designing the Design Mode adopting DSP+FPGA, for radio navigation receivers digital signal processing.The design carries out digital signal processing by adopting the Design Mode of DSP+FPGA to radio navigation receivers, and FPGA is responsible for the generation of local pseudo-code sequence and carrier signal, spread-spectrum signal mixing and associated extraction; DSP is responsible for processing the correlated results of FPGA, and the operation of control FPGA, design receiver system, acquisition and tracking radio signal, extracts guidance station information.
the object of the present invention is achieved like this: a kind of based on DSP/FPGA radio navigation receivers digital signal processing platform, comprises digital signal processing module, A/D sampling module, DSP/FPGA signal processing unit; A/D sampling module connects Stratix EP1S40B956C6, and Stratix EP1S40B956C6 connects DSP_1, DSP_1 and connects DSP_2, DSP_2 connecting fluid crystal display LCD and full duplex serial ports.
described Stratix EP1S40B956C6 is connected with RPC16, JTAG downloading wire, clock output, external crystal-controlled oscillation input 1, external crystal-controlled oscillation input 2.
described DSP_1 connects guiding flash memory FLASH, outer extension memory SRAM.
described DSP_2 connects guiding flash memory FLASH, outer extension memory SRAM, real-time clock RTC, keyboard KEY.
described hardware components utilizes FPGA to be responsible for the generation of local pseudo-code sequence and carrier signal, spread-spectrum signal mixing and associated extraction; DSP is responsible for processing the correlated results of FPGA, realizes FEEDBACK CONTROL, adjusts corresponding functional part, form signal capture, code tracking and carrier tracking loop with this; Digital receiver signal processing system module mainly controls in real time to 3 channel signal processing modules, and carries out real-time resolving according to the data that signal processing module provides, and exports the navigator fix solution information such as information such as position, speed of carrier.
design feature of the present invention and beneficial effect: 1, this invention is for radio navigation system, adopt the Design Mode of DSP+FPGA to radio navigation receivers digital signal processing, and receiver has miniaturization, advantage that reliability is high; 2, the receiver that the present invention is applied to radio navigation system has good concealment, antijamming capability, reach is large, positioning precision is high and cost is low feature; 3, adopt the modulation system of DS/BPSK and the communication technology of CDMA, under guarantee realizes the condition of systemic-function and positioning precision, and simplify system equipment complexity and technical difficulty.
Accompanying drawing explanation
Fig. 1 is global design principle assumption diagram of the present invention.
Fig. 2 is receiver structure block diagram of the present invention.
Fig. 3 is DSP electric power management circuit schematic diagram of the present invention.
Fig. 4 is FPGA electric power management circuit schematic diagram of the present invention.
Fig. 5 is PLLV input filtering circuit theory diagrams of the present invention.
below in conjunction with accompanying drawing, principle of the present invention and concrete annexation are described in more detail:
embodiment 1
composition graphs 1, Fig. 1 is the global design principle assumption diagram of invention;
a kind of based on DSP/FPGA radio navigation receivers digital signal processing platform, comprise digital signal processing module, A/D sampling module, DSP/FPGA signal processing unit; A/D sampling module connects Stratix EP1S40B956C6, and Stratix EP1S40B956C6 connects DSP_1, DSP_1 and connects DSP_2, DSP_2 connecting fluid crystal display LCD and full duplex serial ports.
described Stratix EP1S40B956C6 is connected with RPC16, JTAG downloading wire, clock output, external crystal-controlled oscillation input 1, external crystal-controlled oscillation input 2.
described DSP_1 connects guiding flash memory FLASH, outer extension memory SRAM.
described DSP_2 connects guiding flash memory FLASH, outer extension memory SRAM, real-time clock RTC, keyboard KEY.
described hardware components utilizes FPGA to be responsible for the generation of local pseudo-code sequence and carrier signal, spread-spectrum signal mixing and associated extraction; DSP is responsible for processing the correlated results of FPGA, realizes FEEDBACK CONTROL, adjusts corresponding functional part, form signal capture, code tracking and carrier tracking loop with this; Digital receiver signal processing system module mainly controls in real time to 3 channel signal processing modules, and carries out real-time resolving according to the data that signal processing module provides, and exports the navigator fix solution information such as information such as position, speed of carrier.
the design adopts the modulation system of DS/BPSK and the communication technology of CDMA, each guidance station distributes the address code of a pseudo-code sequence as this TV station, on the basis realizing clock synchronous, three guidance station synchronized transmissions spread-spectrum signals, receiver receives the spread-spectrum signal to three guidance stations, is extracted the navigation information that there emerged a guidance station, measure the pseudorange of receiver and each guidance station by correlation technique, calculate the position coordinates of receiver, realize the function of navigator fix; Radio navigation system can be divided into the motor-driven navigation chain of stations of bank base and receiver two parts on the whole.The function that the navigation chain of stations realizes is modulated on PN code by navigation information, then after high frequency carrier mixing, go out after attacking amplification through antenna transmission, and receiver section acquisition and tracking radio signal extracts guidance station information.
embodiment 2
fig. 2 is receiver structure block diagram of the present invention;
mainly the completing reception, detect navigation signal, extract navigation raw data, data and resolve and process, complete task required by application system of receiver; Front end processing block is the simulation part of system, major function suppresses multi-path jamming and the outer interference of band as much as possible, the signal to noise ratio (S/N ratio) of Received signal strength is brought up to the operation level needed for signal processing module simultaneously, and when meeting certain dynamic range, the continuous signal received is become digital signal; Spread-spectrum signal processing module is the core of receiver, major function is from multi-address signal, identify the spread-spectrum signal of each mechanical stage, demodulation carrier wave on the basis of recovering signal to noise ratio (S/N ratio), eliminates the impact of Doppler frequency deviation, and despreading is carried out to it, recover baseband signal.Give DSP application system module by the observed quantity of the pseudo-code state corresponding to moment epoch of despreading and demodulation process, carrier phase state together with base-band information simultaneously; DSP application system module mainly controls in real time to spread-spectrum signal processing module, and carries out real-time resolving according to the data that signal processing module provides, and exports navigator fix solution (information such as position, speed of carrier).
embodiment 3
fig. 3, Fig. 4 are DSP and FPGA electric power management circuit schematic diagram of the present invention;
fig. 3 power management chip TPS54613 provides 1.5V voltage for FPGA, adopt low voltage power supply mode, the I/O power supply (DVDD) of 3.3V, the core power (CVDD) of 1.2V, adopts power management chip TPS54612 that 5V is transformed to 3.3V and 1.2V and powers to DSP;
fig. 4 is power management chip TPS54616 is that DSP, FPGA and flash etc. provide 3.3V voltage.
embodiment 4
fig. 5 is PLLV input filtering circuit theory diagrams of the present invention;
the input end of TMS320C6713 clock phase-locked loop (PLL) needs to carry out filtering to high-frequency electromagnetic interference, electromagnetic interface filter is adopted to add the combination of П mode filter, uneven bottoms pin () and 4 external interrupt pin () pull-up, draw high when bus keeps pin () and DSR pin () not to use.
Claims (5)
1. based on a DSP/FPGA radio navigation receivers digital signal processing platform, it is characterized in that: comprise digital signal processing module, A/D sampling module, DSP/FPGA signal processing unit; A/D sampling module connects Stratix EP1S40B956C6, and Stratix EP1S40B956C6 connects DSP_1, DSP_1 and connects DSP_2, DSP_2 connecting fluid crystal display LCD and full duplex serial ports.
2. one according to claim 1 is based on DSP/FPGA radio navigation receivers digital signal processing platform, it is characterized in that: described Stratix EP1S40B956C6 is connected with RPC16, JTAG downloading wire, clock output, external crystal-controlled oscillation input 1, external crystal-controlled oscillation input 2.
3. one according to claim 1 is based on DSP/FPGA radio navigation receivers digital signal processing platform, it is characterized in that: described DSP_1 connects guiding flash memory FLASH, outer extension memory SRAM.
4. one according to claim 1 is based on DSP/FPGA radio navigation receivers digital signal processing platform, it is characterized in that: described DSP_2 connects guiding flash memory FLASH, outer extension memory SRAM, real-time clock RTC, keyboard KEY.
5. one according to claim 1 is based on DSP/FPGA radio navigation receivers digital signal processing platform, it is characterized in that: hardware components utilizes FPGA to be responsible for the generation of local pseudo-code sequence and carrier signal, spread-spectrum signal mixing and associated extraction; DSP is responsible for processing the correlated results of FPGA, realizes FEEDBACK CONTROL, adjusts corresponding functional part, form signal capture, code tracking and carrier tracking loop with this; Digital receiver signal processing system module mainly controls in real time to 3 channel signal processing modules, and carries out real-time resolving according to the data that signal processing module provides, and exports the navigator fix solution information such as information such as position, speed of carrier.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201410689406.5A CN104569908A (en) | 2014-11-26 | 2014-11-26 | Radio navigation receiver digital signal processing platform based on DSP/FPGA |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201410689406.5A CN104569908A (en) | 2014-11-26 | 2014-11-26 | Radio navigation receiver digital signal processing platform based on DSP/FPGA |
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| CN104569908A true CN104569908A (en) | 2015-04-29 |
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| CN201410689406.5A Pending CN104569908A (en) | 2014-11-26 | 2014-11-26 | Radio navigation receiver digital signal processing platform based on DSP/FPGA |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109274401A (en) * | 2018-11-07 | 2019-01-25 | 成都天贸科技有限公司 | A kind of spread-spectrum signal source |
| CN112147942A (en) * | 2020-10-26 | 2020-12-29 | 西安工业大学 | FPGA + DSP-based dual-motion platform synchronous control system and control method |
-
2014
- 2014-11-26 CN CN201410689406.5A patent/CN104569908A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109274401A (en) * | 2018-11-07 | 2019-01-25 | 成都天贸科技有限公司 | A kind of spread-spectrum signal source |
| CN112147942A (en) * | 2020-10-26 | 2020-12-29 | 西安工业大学 | FPGA + DSP-based dual-motion platform synchronous control system and control method |
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Application publication date: 20150429 |