CN104569611A - PCB transmission line insertion loss testing method and probe device - Google Patents

Abstract

A test method for insertion loss of PCB transmission lines is proposed. By constructing a specific test PCB board, the insertion loss after de-embedding of a transmission line of a specific length at a specific frequency point is counted as a test experience value, and the test experience value is used to judge whether the actual PCB design is good or bad. A comparison target value; also provides a probe device, including a probe end and a fixed end. The proposed test probe device is easy to operate, has high test accuracy, low cost, and is easy to maintain; the proposed method is simple and effective in calibration and high in precision.

Description

A PCB transmission line insertion loss test method and probe device

technical field

The invention relates to the technical field of printed circuit board PCB design, in particular to a fully automatic PCB transmission line insertion loss testing method and a probe device.

Background technique

Driven by Moore's Law, the electronics industry has become more functional, more integrated, faster and faster, and the corresponding research and development cycle is getting shorter and shorter. Due to the miniaturization and high speed of electronic products, various challenges are brought to design and engineering. PCB is the physical realization of electrical connection. Various electrical devices are connected through PCB to complete the function realization. The PCB contains metal transmission lines that connect various devices. In a high-speed serial system, we also need to consider the high-quality transmission loss and the dielectric loss performance of the insulating environment where the transmission line is located. PCB loss can result in reduced signal amplitude and slower rise times, resulting in functional degradation. The parameters affecting PCB loss include metal transmission line geometry, metal surface roughness, skin effect, dielectric loss parameters, dielectric constant, temperature and humidity and other factors. For the improvement of many influencing parameters and signal frequency, in each frequency band It is particularly important to be able to measure more accurate loss parameters. More and more products have unsatisfactory passive channel control, resulting in delays in product launch or uncontrollable product reliability issues.

The loss parameter of the high-speed signal has become an important parameter to judge the electrical performance of the passive channel, and various PCB processing parameters such as transmission line etching, lamination, browning, and impedance control directly affect this parameter, which is increasingly impossible for small-batch testing of products. To meet our requirements for judging whether the product is reliable, different individual differences, different PCB factories, and different processing batches all have risks in whether the relevant product is reliable. Therefore, we need to test the loss parameters in the PCB processing stage to judge the performance of PCB passive channels, reduce functions, reduce risks, and shorten the development cycle. Instead of verifying product reliability in the SI active test and system test environment after the product is completed, this will only cause the time point of problem discovery to be shifted later and affect the product cycle.

For the loss test of high-speed signals, a relatively mature method is to use VNA (vector network analyzer) or TDR (Time-Domain Reflectometry) equipment for testing. VNA equipment is Agilent's product equipment, which is a kind of electromagnetic wave energy equipment. In terms of network analysis, a network refers to a group of internally interconnected electronic components. One of the functions of a network analyzer is to quantify the impedance mismatch between two RF components to maximize power efficiency and signal integrity. Whenever a radio frequency signal passes from one component to another, part of the signal will always be reflected and another part will be transmitted, so the concept of S-parameters is proposed to look at the signal problem we mentioned from the frequency. Its test accuracy is generally recognized in the industry at present, but due to the problems of probes and automatic devices, the test calibration and test efficiency are not high, so it has not yet been extended to mass test loss equipment. TDR equipment can also be used for loss testing, but due to factors such as test probe limitations and precision control, manual calibration is required and the time is too long, so it cannot be used as a mass testing solution. Moreover, the noise control of the TDR instrument itself is poorer than that of the VNA equipment, resulting in a poor match between the test results in the higher frequency band and the actual situation, and it is only generally recognized in the lower frequency band.

For the concept of S parameters, a general two-port network will have four sets of S parameters, namely: S11/S21/S22/S12.

S11 represents that Port1 emits a radio frequency signal, and then Port1 receives the reflected signal.

S21 means that Port1 sends out a radio frequency signal, and then Port2 receives it.

S22 is to send out a radio frequency signal by Port2, and then receive the reflected signal by Port2.

S12 means that Port2 sends out a radio frequency signal, and then Port1 receives it.

Usually we use the concept of insertion loss to measure the passive channel of the PCB, that is, the S21 or S12 parameter, where the SDD21 parameter represents the insertion loss of the differential port. The concept of insertion loss and reflection parameters comes from the definition of S parameters. The unit of insertion loss is decibels DB. S parameters are commonly used parameters for passive channel description, and will not be described in this article.

See Figure 1. When measuring the insertion loss, it is necessary to use a de-embedding algorithm to subtract the values of FA21 and FB21 quoted by the test device. These two values cannot be directly measured, or the results of the direct test are not credible, and need to be stripped through a certain algorithm. Parameter description: FA represents the part connected between the test fixture and instrument port 1, and FB represents the part connected between the test fixture and instrument port 2.

The de-embedding algorithm is based on the test results of multiple sets of regular transmission line lengths, and operates on various results to remove the influence of the test device on the test results, thereby obtaining accurate measurement results. The following briefly introduces the traditional de-embedding algorithm in the prior art, which converts the S parameter into a Z matrix. The following formula, Tmeasured is the measurement, Tde-embedded is the principle formula of de-embedding.

[T _A ] ^-1 [T _A ][T _DUT ][T _B ][T _B ] ^-1

= [T _DUT ]

[T _Measured ]＝[T _L ][T _DUT ][T _R ]

[T _De-embedded ]＝[T _L ] ^-1 [T _Measured ][T _R ] ^-1

＝[T _L ] ^-1 [T _L ][T _DUT ][T _R ][T _R ] ^-1 ＝[T _DUT ]

It can be seen from the above introduction that the existing de-embedding algorithm is relatively complicated, involving matrix transformation and calculation, and the operation process is cumbersome, which affects the calculation accuracy. In addition, the current types of probes include GGB, SMA/SMP, and probe stations, which cannot meet the requirements of batch testing in terms of cost, efficiency, and ease of use. Among them, the GGB probe is used to cooperate with the test method of SET2DIL, which is easy to damage and high in cost. SMA probes are generally used for passive channel testing and have high precision, but require soldering of corresponding interface libraries such as PCBs, which are poor in convenience and ease of design. The high-end probe test bench has the characteristics of high precision and high cost. The cycle of testing a single board is about 2 days, and the cost of testing and labor is high, so it cannot be used for mass testing.

Contents of the invention

Based on the above-mentioned technical problems in the prior art, the present invention proposes a PCB transmission line insertion loss testing method and a probe device, which reduce the complexity of the de-embedding algorithm, improve the accuracy of test results, realize large-scale automated testing, and reduce labor costs.

The methods include:

S1: Make a PCB test board, on which the length of each transmission line meets: F _n+1 = F _n +F _n-1 , where F _n is the length of the nth transmission line, n>2, and n is a positive integer;

S2: When a signal of a certain frequency point is transmitted on the transmission line, use a probe device to measure the insertion loss of each transmission line, and record the insertion loss of the nth transmission line as S _n ;

S3: Use the following formula to calculate the insertion loss S/F _n after the de-embedded transmission line per F _n length: S/F _n = S _n -(S _n+1 -S _n-1 ), and record each S/F _n value;

S4: Change the frequency point of the signal on the transmission line, return to step S2 until all frequency points are traversed, save all S/F _n values recorded under all frequency points as test experience values, and the process ends.

In particular:

When detecting the actually designed PCB circuit board, use the test experience value as the comparison target value to detect whether the insertion loss of the corresponding length transmission line on the actually designed PCB circuit board meets the requirements, and then determine the actually designed PCB circuit The pros and cons of the board.

A needle device comprising:

Probe end and fixed end;

The fixed end includes,

The first part for fixing to the robot automatic arm by screws or snaps,

The second part for fixing the probe end,

And, a spring device for connecting the first part and the second part.

In particular:

The probe end has a differential probe or a single probe, and the probe has a GND pin.

In particular:

The probe is a semi-rigid radio frequency coaxial cable, one end is an SMA interface, connected to the test equipment through the cable, and the other end is the stripped core of the cable.

The beneficial effects of the present invention are: the test probe is easy to use, high in precision, low in cost, and easy to maintain; the algorithm correction is simple and effective, and high in precision; the fully automatic loss test design method and the post-processing data analysis are combined with the specific test conditions, which can realize seamless Human on duty, fully automated, saving labor costs and improving product reliability.

Description of drawings

Figure 1 is an illustration of the principle of de-embedding

Fig. 2 is the test fixture wiring diagram used in the de-embedding method proposed by the present invention

Fig. 3 is the flow chart of the fully automatic PCB transmission line insertion loss testing method proposed by the present invention

Figure 4 is a normal distribution diagram of test results

Fig. 5 is the detection device figure that the present invention proposes

Fig. 6 is a structural diagram of the fixed part of the detection device proposed by the present invention

Detailed ways

The present invention will be described in detail below in conjunction with the accompanying drawings.

Embodiment 1: De-embedding method

To manufacture the PCB wiring test board involved in the technical solution proposed in this embodiment, hereinafter referred to as the test fixture in the present invention. In the design of the test fixture (test board) proposed in this embodiment, in order to match the probe device, corresponding test probe points are designed. Referring to Figure 2, use the Fibonacci Sequence (Fibonacci Sequence) for wiring design, and design PCB transmission lines of different lengths.

Except for the different lengths, the transmission line design requires the same attributes (layer, cross-sectional area, etc.). For how to choose the specific length of two pairs of differential lines, so as to ensure the accuracy of the de-embedding algorithm, the method is as follows:

Through the accumulation and comparison of a large number of test and verification data, in order to obtain accurate test data, the difference between the length of the long transmission line and the short transmission line should conform to the Fibonacci sequence, also known as the golden section sequence, which refers to such a sequence: 0 . +Fn-2(n>=2, n∈N*), in words, it means that the Fibonacci sequence starts from 0 and 1, and the subsequent Fibonacci sequence coefficients are added by the previous two numbers. We set the minimum length of the shorter transmission line equal to 3 inches, and the length of the longer transmission line needs to be equal to 8 inches, that is, the following formula exists:

Length B＝Fn-1; LengthA＝Fn+1;

Length A-length B=Fn where (n>=5);

High-precision parameters can be obtained by satisfying the above formula. From the perspective of actual engineering, when n=5, it is the best from the perspective of cost and design. The illustration given in this embodiment is also based on the number sequence arrangement of n=5. Of course, the above parameters can be adjusted according to different actual projects, but there will be accuracy problems, which can be analyzed in detail for specific problems.

The parameters of SDD21 are tested by the test device, which are respectively recorded as SDD21a, SDD21b, and SDD21c (hereinafter referred to as Sa, Sb, Sc). Among them, a is the insertion loss of the longer transmission line, b is the insertion loss of the next transmission line, and c is the insertion loss of the shortest transmission line, as shown in Figure 2. Among them, the parameter of SDD21 represents the S-parameter insertion loss of a pair of differential transmission lines 2 and 1 ports, and the unit is decibel DB. Here, in order to describe the algorithm structure more simply and clearly, we set according to the Fibonacci sequence, Length C=3 inches, then Length B=5 inches, Length A=8 inches, Length D=13 inches.

The insertion loss parameters of the same frequency point are respectively selected. By the definition of the unit decibel DB we can get.

Among them, according to our actual engineering design p1=p3, we can get:

According to the above formula, the following sets of data are obtained, and the insertion loss below is correspondingly obtained according to the difference of power transmission loss above.

Db/2inches=Sb-Sc;

Db/3inchs=Sa-Sb;

Db/5inches=Sa-Sc;

Db(fixture)=Sb-(Sa-Sc);

Among them, the last Db (fixture) is the insertion loss value of the 5-inch length transmission line that has eliminated the influence of the aforementioned FA21 and FB21.

From the above data, we can get the detailed parameters of the S insertion loss per Inch of the test fixture and transmission line. Only a can be tested for other boards in the future to increase the test efficiency.

Repeat the above test method at different frequency points to obtain detailed parameters of S insertion loss at each frequency point.

This embodiment optimizes and improves on the basis of the current de-embedding. It does not need to establish an equivalent circuit model connecting the input and output feeders of the DUT (Device Under Test), nor does it require the symmetry of the input feeder and output feeder, nor does it need to complete S-Y-Z Matrix transformation. This embodiment is aimed at the requirement of focusing on special frequency points, avoiding the influence of the roughness of the probe device, and only obtaining the insertion loss parameters of the corresponding frequency points of the transmission line. This method is easy to use, has good precision, and is suitable for high-volume testing requirements.

Referring to accompanying drawing 3 below, it shows the flow of the method for automatically testing the pros and cons of the target board proposed in this embodiment.

In the product design or processing stage, the designed test fixture (test board) is included in the design, and the corresponding design coordinate file is output, and the automatic engineering program file is designed according to the design coordinate file. This project file is the automatic addressing of the robot arm. basis. The method for designing automatic engineering program files is commonly used in current engineering design, and does not belong to the content of the present invention, so it will not be described again. The process description is as follows:

Cable calibration is performed before testing the test board, and the corresponding VNA test equipment for this calibration method contains test calibration parts.

After the calibration is completed, the robotic arm will automatically address and test according to the engineering program, and the test script will record the test loss of the corresponding frequency point.

Calculate and analyze the test results, and judge according to the given reference value, which is the differential loss per inch at each specific frequency obtained according to the aforementioned de-embedding method.

Referring to Figure 4, a normal distribution report is generated for manual analysis. The normal distribution report is used for decision-making. From the perspective of the normal distribution, the consistency of this batch of processing is seen. The smaller the sigma value, the better the consistency. The automatic test process ends.

For the DB/Inch test results, compare them according to the reference value we defined, and get the conclusion of PASS/FAIL. Perform mathematical statistics on the results and perform normal distribution analysis. The expected value μ determines its position, and the standard deviation σ determines the magnitude of the distribution. By analyzing these two data to confirm the overall performance of large batches, the FAIL board will be tested For scrapping, the judgment standard of FAIL is determined by the given target Target value; this data can also be used to extract the overall processing performance of PCB materials and PCB factories, and this value can be determined by signal integrity active and passive tests. Thereby improving the design and processing yield and ensuring the realization of electrical functions.

Embodiment 2: probe device

Fig. 5 shows the probe device proposed in this embodiment. The probe device (cable bracket pen) comprises two parts: a probe end and a fixed end. Among them, the probe end includes a differential probetip specification and a single-ended probe tip specification. Both specifications of probes include GND pins for connecting PCB GND and test equipment GND. The signal probe is composed of a semi-rigid RF coaxial cable, which can also be replaced by similar materials. One end is an SMA interface, which is connected to the test equipment through a cable cable; the other end is designed for stripping the core of the cable, which is designed for semi-rigid material , so the terminal pin spacing can be adjusted to deal with different test points.

See Figure 6, which shows that the fixed end of the probe device is divided into three parts, part1 can be fixed to the automatic arm by screws or buckles or other methods, and part3 can use the tiger tooth design and corresponding screws to fix the probe Part, the second part is a spring device, which is used to connect the first part and the third part, to buffer the force between the probe and the PCB, and increase the contact stability of the test point, so as to ensure the consistency and reliability of the test.

Using the patented probe device to fix the Cable probe, through the coordinate file output by the patented test board and the corresponding fixing fixture, can reduce the variable factors in the engineering test. According to the coordinate file of the test board, the automated software script is set, and the automated robotic arm can perform a loss test based on a specific test board according to the provided information, and by designing a specific test board, it reduces the complexity of the automated robotic arm, thereby reducing The number of motors required by the arm optimizes the cost of test. The automatic arm is a medium for realizing the patented method of the present invention, which can be customized by a third-party factory, and does not belong to the protection scope of this patent, so it will not be repeated here. The design of the test board can be attached to the main board design, similar to the design of the impedance strip in engineering, which provides operability for systematic and large-scale test loss, and the design is a cost-free solution.

Claims (5)

1. a PCB transmission line insertion loss method of testing, is characterized in that, comprising:

S1: make PCB test board, on it, length of every transmission lines meets:

F _n+1=F _n+ F _n-1, wherein F _nbe the length of the n-th transmission lines, n>2, and n is positive integer;

S2: when described transmission line transmitting the signal of a certain frequency, uses probe unit to measure the insertion loss of each transmission lines, remembers that the insertion loss of the n-th transmission lines is S _n;

S3: use the every F of following formulae discovery _nlength transmission line go embedding after insertion loss S/F _n:

S/F _n=S _n-(S _n+1-S _n-1), and record each S/F _nvalue;

S4: the frequency changing described signal on transmission line, returns step S2, until travel through all frequencies, the whole S/F recorded under preserving all frequencies _nvalue as test empirical value, flow process terminates.

2. the method for claim 1, is characterized in that:

When detecting the PCB of actual design, use described test empirical value as comparison object value, in the PCB detecting described actual design, whether the insertion loss of corresponding length transmission line meets the requirements, and then determines the quality of PCB of described actual design.

3. the probe unit used in method described in claim 1 or 2, is characterized in that, comprising: sound end and stiff end;

Wherein stiff end comprises,

For being fixed to the Part I on the automatic arm of robot by screw or buckle,

For the Part II of stationary probe end,

And spring assembly, for connecting described Part I and Part II.

4. probe unit as claimed in claim 3, is characterized in that:

Described sound end has differential probe or Single probe, and described probe has GND and holds pin.

5. probe unit as claimed in claim 4, is characterized in that:

Described probe is half firm radio frequency coaxial cables, and one end is SMA interface, is connected to testing apparatus by cable, and one end is the stripping core of cable.