CN104539886A - Infrared digital image acquisition and transmission system and method based on optical fiber communication - Google Patents

Infrared digital image acquisition and transmission system and method based on optical fiber communication Download PDF

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CN104539886A
CN104539886A CN201410748321.XA CN201410748321A CN104539886A CN 104539886 A CN104539886 A CN 104539886A CN 201410748321 A CN201410748321 A CN 201410748321A CN 104539886 A CN104539886 A CN 104539886A
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optical fiber
sdram
fpga
fifo
interface
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代具亭
汤心溢
刘鹏
张昊
杨转
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Shanghai Institute of Technical Physics of CAS
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Shanghai Institute of Technical Physics of CAS
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Abstract

本发明公开了一种基于光纤通信的红外数字图像采集和传输系统及方法。它用于红外成像探测设备产生数字图像的远程采集、传输和实时显示。该方法包括:发送端检测从LVDS接口接收到的红外数字图像并对其进行打包;接收端将解包后图像数据按照采集窗口对其裁剪,之后数据进入FPGA内建FIFO缓存与外部SDRAM组成的大容量FIFO缓存区,之后数据经USB接口进入上位机并实时显示。本发明的优点在于:采用了图像采集窗口和FPGA内建FIFO缓存与外部SDRAM组成的大容量FIFO缓存区,减少了无用图像数据的传输,提高了数据传输效率,同时只用到一片SDRAM做缓存,简化了电路结构。

The invention discloses an infrared digital image acquisition and transmission system and method based on optical fiber communication. It is used for remote acquisition, transmission and real-time display of digital images generated by infrared imaging detection equipment. The method includes: the sending end detects the infrared digital image received from the LVDS interface and packs it; the receiving end cuts the unpacked image data according to the acquisition window, and then the data enters the FPGA built-in FIFO buffer and external SDRAM. Large-capacity FIFO buffer area, and then the data enters the host computer through the USB interface and displays it in real time. The present invention has the advantages of: the large-capacity FIFO buffer area formed by the image acquisition window, FPGA built-in FIFO buffer and external SDRAM is adopted, the transmission of useless image data is reduced, the data transmission efficiency is improved, and only one piece of SDRAM is used for buffering , simplifying the circuit structure.

Description

基于光纤通信的红外数字图像采集和传输系统及方法Infrared digital image acquisition and transmission system and method based on optical fiber communication

技术领域:Technical field:

本发明涉及红外数字图像的传输和显示,具体来说是一种基于光纤通信的红外数字图像采集和传输系统及方法。它主要用于红外成像探测设备产生数字图像的远程采集、传输和实时显示。The invention relates to the transmission and display of infrared digital images, in particular to a system and method for collecting and transmitting infrared digital images based on optical fiber communication. It is mainly used for remote acquisition, transmission and real-time display of digital images generated by infrared imaging detection equipment.

背景技术:Background technique:

红外成像探测器可将红外辐射转换成电信号,然后电信号被模数转换并经过预处理后即为红外数字图像。通常红外成像探测器需要有全向空域的实时探测能力,因此红外探测器需要360度的旋转,而数据采集、接收装置为固定体,因此需要实时地将旋转体上产生的数据高速高可靠地传输到固定体上。而最初采用的电刷和导电环的实现方式,会引入很大的信号噪声,不适合传输高速的数据信号。Infrared imaging detectors convert infrared radiation into electrical signals, which are then analog-to-digital converted and preprocessed into infrared digital images. Usually infrared imaging detectors need to have real-time detection capabilities in omnidirectional airspace, so infrared detectors need to rotate 360 degrees, and the data acquisition and receiving devices are fixed bodies, so it is necessary to collect the data generated on the rotating body in real time with high speed and high reliability. transferred to the fixed body. However, the implementation method of brushes and conductive rings initially adopted will introduce a lot of signal noise, which is not suitable for transmitting high-speed data signals.

以往数据采集系统缓存设计多采用乒乓缓存,这需要两片SDRAM,这无形中增加了采集、传输系统设备的体积和复杂度。同时以往的数据采集系统多采用PCI总线与主机连接。但其不支持热插拔,也不利于做成便携式设备,应用普及程度远不及USB接口那么广泛。In the past, the cache design of data acquisition system mostly used ping-pong cache, which required two SDRAMs, which virtually increased the volume and complexity of the acquisition and transmission system equipment. At the same time, the previous data acquisition systems mostly used PCI bus to connect with the host computer. But it does not support hot plugging, and it is not conducive to making it into a portable device, and its application popularity is far less than that of a USB interface.

因此,设计一种高速率、高可靠性,便携式红外数字图像采集系统、传输非常必要。采用光纤传输旋转体和固定体间数据可避免引入信号噪声,同时用一片SDRAM模拟一个大容量FIFO以及用USB接口与主机连接可简化电路结构。Therefore, it is very necessary to design a high-speed, high-reliability, portable infrared digital image acquisition system and transmission. The use of optical fiber to transmit data between the rotating body and the fixed body can avoid introducing signal noise, and at the same time, using a piece of SDRAM to simulate a large-capacity FIFO and connecting to the host computer with a USB interface can simplify the circuit structure.

发明内容:Invention content:

本发明的目的在于提出一种基于光纤通信的红外数字图像采集和传输系统及方法,实现红外数字图像的高速、高可靠性传输、处理和显示,实现了实际工程中不仅要求电路结构简单,又要求高速、可靠地的传输数据的目标。The purpose of the present invention is to propose an infrared digital image acquisition and transmission system and method based on optical fiber communication, to realize high-speed, high-reliability transmission, processing and display of infrared digital images, and to realize not only simple circuit structure but also Targets that require high-speed, reliable transmission of data.

为实现上述目的,本发明所采用的硬件平台主要包括:主机,光纤接收端和光纤发送端。To achieve the above purpose, the hardware platform used in the present invention mainly includes: a host, an optical fiber receiving end and an optical fiber transmitting end.

各个硬件部分需要满足:所述的主机为具有USB2.0接口的计算机。所述的光纤接收端包括一片FPGA,一片USB2.0控制器芯片,一片SDRAM,一个光纤接收模块以及外围电路;其中,所述的FPGA具有块存储器模块;所述的USB2.0控制器芯片具有一个连接主机的USB2.0接口、一个连接外部设备的从器件FIFO接口和两个可设置输入输出方向的IO引脚;所述的SDRAM具有8M字节存储容量和8位数据总线;所述的光纤接收模块为一个光纤接插件和一片串并转换芯片组成的光纤接收电路模块;USB2.0控制器芯片、SDRAM和光纤接收模块均和FPGA直接连接。所述的光纤发送端包括一片FPGA,一个光纤发送模块以及外围电路接口;其中,所述的FPGA具有块存储器模块;所述的光纤发送模块为一个光纤接插件和一片并串转换芯片组成的光纤发送电路模块;所述的外围电路接口为LVDS接口;光纤发送模块和外围电路接口均和FPGA直接连接;Each hardware part needs to meet: the host is a computer with a USB2.0 interface. The optical fiber receiving end includes a FPGA, a USB2.0 controller chip, a SDRAM, an optical fiber receiving module and peripheral circuits; wherein, the FPGA has a block memory module; the USB2.0 controller chip has A USB2.0 interface connected to the host, a slave device FIFO interface connected to external devices, and two IO pins that can set the direction of input and output; the SDRAM has a storage capacity of 8M bytes and an 8-bit data bus; the The optical fiber receiving module is an optical fiber receiving circuit module composed of an optical fiber connector and a serial-to-parallel conversion chip; the USB2.0 controller chip, SDRAM and optical fiber receiving module are all directly connected to the FPGA. The optical fiber sending end includes a piece of FPGA, an optical fiber sending module and a peripheral circuit interface; wherein, the FPGA has a block memory module; the optical fiber sending module is an optical fiber connector and a parallel-serial conversion chip. Sending circuit module; the peripheral circuit interface described is an LVDS interface; the optical fiber sending module and the peripheral circuit interface are all directly connected to the FPGA;

各个硬件组成的连接关系是:主机和光纤接收端通过USB2.0传输线缆连接;光纤接收端和光纤发送端通过光纤连接;光纤发送端和红外探测器通过LVDS接口连接。The connection relationship of each hardware composition is: the host and the optical fiber receiving end are connected through a USB2.0 transmission cable; the optical fiber receiving end and the optical fiber transmitting end are connected through an optical fiber; the optical fiber transmitting end and the infrared detector are connected through an LVDS interface.

本发明具体实施的流程如下:The concrete implementation flow process of the present invention is as follows:

步骤1:光纤发送端FPGA配置光纤发送模块时钟,并将检测到的图像数据打包后存入内建FIFO缓存;Step 1: The FPGA at the optical fiber transmitting end configures the clock of the optical fiber transmitting module, and packs the detected image data into the built-in FIFO buffer;

步骤2:光纤发送端FPGA从内建FIFO缓存中读取数据并通过光纤发送模块发送;Step 2: FPGA at the optical fiber sending end reads data from the built-in FIFO buffer and sends it through the optical fiber sending module;

步骤3:光纤接收端FPGA配置光纤接收模块时钟,接收光纤数据并检测其图像帧头;Step 3: FPGA at the fiber receiving end configures the clock of the fiber receiving module, receives fiber data and detects its image frame header;

步骤4:按照采集窗口命令,将接收到的图像数据裁剪后存入内建输入FIFO缓存中;Step 4: According to the acquisition window command, the received image data is cropped and stored in the built-in input FIFO buffer;

步骤5:SDRAM控制单元按照优先级算法轮换机制决定对SDRAM的读写操作,不断将内建的输入FIFO缓存中数据依次读出并写入到SDRAM中,或者将SDRAM中数据依次读出并写入到内建输出FIFO缓存中,使得SDRAM与内建输入FIFO缓存和输出FIFO缓存组合成一个大容量FIFO;Step 5: The SDRAM control unit determines the read and write operations to SDRAM according to the priority algorithm rotation mechanism, and continuously reads and writes the data in the built-in input FIFO buffer to SDRAM in sequence, or reads and writes the data in SDRAM in sequence into the built-in output FIFO buffer, so that SDRAM, built-in input FIFO buffer and output FIFO buffer are combined into a large-capacity FIFO;

步骤6:图像数据发送模块读内建输出FIFO缓存中数据并写入到USB2.0控制器芯片的从器件FIFO中;Step 6: The image data sending module reads the data in the built-in output FIFO buffer and writes it into the slave device FIFO of the USB2.0 controller chip;

步骤7:通过固件程序设计将USB2.0控制芯片配置成从器件FIFO、控制传输模式,建立一个DMA传输通道同时可将主机发送的控制命令通过IO口模拟IIC协议方式发给光纤接收端FPGA;Step 7: Configure the USB2.0 control chip as a slave device FIFO and control transmission mode through firmware program design, establish a DMA transmission channel and simultaneously send the control command sent by the host to the FPGA of the optical fiber receiving end through the IO port analog IIC protocol;

步骤8:主机通过USB2.0接口读USB2.0控制器芯片的从器件FIFO中数据,并可通过USB2.0接口发送采集窗口等控制命令;Step 8: The host reads the data in the slave device FIFO of the USB2.0 controller chip through the USB2.0 interface, and can send control commands such as the acquisition window through the USB2.0 interface;

步骤9:光纤接收端FPGA内的IIC从设备接口模块,根据IIC协议,接收USB2.0控制器芯片发送的控制命令,并将其存入命令寄存器。Step 9: The IIC slave device interface module in the FPGA of the optical fiber receiving end receives the control command sent by the USB2.0 controller chip according to the IIC protocol, and stores it in the command register.

在步骤5中所述的优先级算法轮换机制具体步骤如下:The specific steps of the priority algorithm rotation mechanism described in step 5 are as follows:

(5-1):初始化对SDRAM写具有高优先级;(5-1): Initialization has high priority for SDRAM writing;

(5-2):检查读或者写SDRAM是否完成,完成转到(5-3);(5-2): Check whether reading or writing SDRAM is completed, and then go to (5-3);

(5-3):若SDRAM有多于127个字节容量且输入FIFO缓存内有多于127个字节,则转到(5-4),否则转到(5-6);(5-3): If the SDRAM has more than 127 bytes of capacity and there are more than 127 bytes in the input FIFO buffer, then go to (5-4), otherwise go to (5-6);

(5-4):若写SDRAM具有高优先级或者输出FIFO缓存有少于128字节容量,则转到(5-5),否则转到(5-6);(5-4): If writing to SDRAM has a high priority or the output FIFO buffer has a capacity of less than 128 bytes, then go to (5-5), otherwise go to (5-6);

(5-5):对SDRAM进行写操作,完成后置读SDRAM具有高优先级并转到(5-2);(5-5): Write operation to SDRAM, read SDRAM after completion with high priority and go to (5-2);

(5-6):若SDRAM有多于127个字节且输出FIFO缓存有多于127个字节容量,则转到(5-7),否则转到(5-2);(5-6): If the SDRAM has more than 127 bytes and the output FIFO buffer has more than 127 byte capacity, then go to (5-7), otherwise go to (5-2);

(5-7):若读SDRAM具有高优先级或者输入FIFO缓存有少于128字节,则转到(5-8),否则转到(5-2);(5-7): If reading SDRAM has a high priority or the input FIFO buffer has less than 128 bytes, then go to (5-8), otherwise go to (5-2);

(5-8):对SDRAM进行读操作,完成后置写SDRAM具有高优先级并转到(5-2)。(5-8): Read operation to SDRAM, write to SDRAM after completion has high priority and go to (5-2).

本发明的显著特点如下:Notable features of the present invention are as follows:

(1)体积小巧,便携性强。整个光纤接收端集中在一块儿板卡上,由于只使用了一片SDRAM且与电脑连接端使用USB接口,大大减轻了系统的体积和重量。(1) Small size and strong portability. The entire optical fiber receiving end is concentrated on one board. Since only one piece of SDRAM is used and the computer connection end uses a USB interface, the volume and weight of the system are greatly reduced.

(2)由于使用了图像采集窗口的方式,当图像产生速率超过采集系统的传输速率时,可通过设定采集窗口,只传输有意义的图像数据,提高了采集系统的传输速率。(2) Due to the use of the image acquisition window, when the image generation rate exceeds the transmission rate of the acquisition system, only meaningful image data can be transmitted by setting the acquisition window, which improves the transmission rate of the acquisition system.

(3)采用模块划分的方案,根据数据流向将光纤发送板设计划分成图像接收、缓存模块和图像发送模块等,将光纤接收板设计划分成帧头检测,采集窗口内图像和大容量FIFO等,条理清晰,便于编程。(3) Adopt the scheme of module division, divide the design of optical fiber sending board into image receiving, cache module and image sending module according to the data flow direction, and divide the design of optical fiber receiving board into frame header detection, image acquisition in the window and large-capacity FIFO, etc. , clear and easy to program.

附图说明Description of drawings

图1是基于光纤通信的红外数字图像采集、传输系统及方法的系统框图。Fig. 1 is a system block diagram of an infrared digital image acquisition and transmission system and method based on optical fiber communication.

图2是基于光纤通信的红外数字图像采集、传输系统及方法的流程图。Fig. 2 is a flowchart of the infrared digital image acquisition and transmission system and method based on optical fiber communication.

具体实施方式:Detailed ways:

下面根据附图对本发明的具体实施方式作进一步的说明。The specific embodiments of the present invention will be further described below according to the accompanying drawings.

图1是基于光纤通信的红外数字图像采集、传输系统及方法的系统框图。Fig. 1 is a system block diagram of an infrared digital image acquisition and transmission system and method based on optical fiber communication.

本发明所采用的硬件平台为:一台主机,一片USB2.0控制芯片,两片FPGA,一片SDRAM,一个光纤接收模块,一个光纤发送模块和外围接口。The hardware platform adopted in the present invention is: a host computer, a USB2.0 control chip, two FPGAs, a SDRAM, an optical fiber receiving module, an optical fiber sending module and peripheral interfaces.

所述的主机具有USB2.0接口,并安装有基于光纤通信的红外数字图像采集、传输系统的驱动程序。The host has a USB2.0 interface, and is installed with a driver program for an infrared digital image acquisition and transmission system based on optical fiber communication.

所述的USB2.0控制芯片选用了Cypress公司的CY7C68013。这款芯片符合USB2.0标准,其最高工作频率为48MHz,其有多于两个普通输入输出引脚可以模拟IIC协议,其可被配置成从器件FIFO、控制传输模式,使得数据可高速、可靠地通过CY7C68013传到主机进行显示,实测最高传输速率为23Mbyte/s。The USB2.0 control chip is selected from Cypress's CY7C68013. This chip conforms to the USB2.0 standard, and its maximum operating frequency is 48MHz. It has more than two common input and output pins that can simulate the IIC protocol. It can be configured as a slave device FIFO and control transmission mode, so that data can be transferred at high speed It is reliably transmitted to the host for display through CY7C68013, and the measured maximum transmission rate is 23Mbyte/s.

所述的FPGA芯片,光纤发送端和光纤接收端均选用了Xilinx Spartan-6系列的XC6SLX9-TQG144,该型号的FPGA有丰富的逻辑资源和时钟管理资源,可以用来构建内部缓冲区,以实现数据的缓存,以及与SDRAM组合成大容量FIFO。Said FPGA chip, the optical fiber transmitting end and the optical fiber receiving end all select the XC6SLX9-TQG144 of Xilinx Spartan-6 series, the FPGA of this type has abundant logic resource and clock management resource, can be used for constructing the internal buffer zone, in order to realize Data cache, and combined with SDRAM to form a large-capacity FIFO.

所述的SDRAM芯片选用了Micron公司的MT48LC8M8A2-75,该型号的SDRAM总容量为8M字节,读写速率最高达到133Mbyte/s,考虑到数据输入和输出时共享带宽,择半后的读写速率仍然超过了USB2.0最高的实测速率,能为高速数据传输提供缓存且不会降低传输速率。The SDRAM chip selected is Micron's MT48LC8M8A2-75. The total capacity of this type of SDRAM is 8M bytes, and the read/write rate can reach up to 133Mbyte/s. The rate still exceeds the highest measured rate of USB2.0, which can provide buffer for high-speed data transmission without reducing the transfer rate.

所述的光纤接收模块包括一个光纤接插件HFBR-5208AMZ和一片串并转换芯片MAX9218,光纤接收端FPGA通过内部的帧头检测模块,控制MAX9218接收光纤数据。The optical fiber receiving module includes a fiber optic connector HFBR-5208AMZ and a serial-to-parallel conversion chip MAX9218. The FPGA at the fiber receiving end controls the MAX9218 to receive fiber data through the internal frame header detection module.

所述的光纤发送模块包括一个光纤接插件HFBR-5208AMZ和一片并串转换芯片MAX9217,光纤发送端FPGA通过内部的光纤发送控制模块,控制MAX9217发送光纤数据,光纤发送、接收模块的最高速率为70Mbyte/s,超过了USB2.0的实测速率。The optical fiber transmission module includes a fiber optic connector HFBR-5208AMZ and a parallel-to-serial conversion chip MAX9217. The optical fiber transmission terminal FPGA controls the MAX9217 to send optical fiber data through the internal optical fiber transmission control module. The maximum rate of the optical fiber transmission and reception modules is 70Mbyte /s, exceeding the measured rate of USB2.0.

所述的LVDS接口直接连接光纤发送端FPGA的3对差分I/O引脚作为差分输入。选用针式DB9插座作为接插件。The LVDS interface is directly connected to 3 pairs of differential I/O pins of the FPGA at the optical fiber transmitting end as differential input. Use the pin type DB9 socket as the connector.

图2是基于光纤通信的红外数字图像采集、传输系统及方法的流程图。Fig. 2 is a flowchart of the infrared digital image acquisition and transmission system and method based on optical fiber communication.

光纤发送、接收模块时钟被配置好后,光纤发送端FPGA不断检测从LVDS接口接收到的图像数据,将图像数据加上帧头打包后,通过控制光纤发送模块将图像数据从光纤发送出去。After the optical fiber sending and receiving module clocks are configured, the FPGA at the optical fiber sending end continuously detects the image data received from the LVDS interface, and after packing the image data with a frame header, the image data is sent out from the optical fiber by controlling the optical fiber sending module.

光纤接收端FPGA不断检测光纤接收模块接收到的图像数据,并将图像按照主机发送的采集窗口命令裁剪图像,同时为了保证全景视野,裁剪过图像流中定长插入未裁剪图像,其插入频率由采集窗口命令参数控制。然后将图像数据加上帧头注入到FPGA内建FIFO缓存和SDRAM组合成的大容量FIFO中,该大容量FIFO为16-bit数据写入与光纤接收模块数据总线位数匹配,8-bit数据读出与写入USB2.0控制芯片从器件FIFO位数匹配。同时图像数据发送模块控制将大容量FIFO中图像数据连续写入USB2.0控制芯片从器件FIFO中。The FPGA at the optical fiber receiving end continuously detects the image data received by the optical fiber receiving module, and cuts the image according to the acquisition window command sent by the host. At the same time, in order to ensure the panoramic view, the cropped image stream is inserted into the uncropped image at a fixed length. The insertion frequency is determined by Acquisition window command parameter control. Then inject the image data plus the frame header into the large-capacity FIFO composed of FPGA built-in FIFO cache and SDRAM. The large-capacity FIFO is 16-bit data written to match the number of bits of the data bus of the optical fiber receiving module, and 8-bit data The number of bits read and written to the USB2.0 control chip slave device FIFO matches. At the same time, the image data sending module controls to continuously write the image data in the large-capacity FIFO into the FIFO of the slave device of the USB2.0 control chip.

光纤接收端FPGA内SDRAM控制单元,通过优先级算法轮换机制仲裁出的读或者写SDRAM操作来控制输入FIFO缓存,输出FIFO缓存,SDRAM芯片这三个模块的读写操作。优先级算法轮换机制充分考虑了光纤传输速率不受光纤接收端控制而USB2.0传输速率会受其影响,且为了充分发挥SDRAM的缓存作用,始终将写SDRAM操作优先,即首先判断写SDRAM是否满足条件,从而保证输入FIFO缓存中数据不会超过其容量。这样SDRAM控制单元、输入FIFO缓存、输出FIFO缓存和SDRAM芯片这四个模块组合成一个大容量缓冲区,其读写数据具有先进先出(FIFO)特点且读写时序和FPGA内建FIFO读写时序一样,因此可将这四个模块的组合作为一个大容量FIFO操作。The SDRAM control unit in the FPGA of the optical fiber receiving end controls the read and write operations of the input FIFO buffer, output FIFO buffer, and SDRAM chip through the read or write SDRAM operation arbitrated by the priority algorithm rotation mechanism. The priority algorithm rotation mechanism fully considers that the optical fiber transmission rate is not controlled by the optical fiber receiving end, but the USB2.0 transmission rate will be affected by it, and in order to give full play to the buffering effect of SDRAM, the write SDRAM operation is always given priority, that is, first judge whether to write SDRAM Satisfy the condition, so as to ensure that the data in the input FIFO buffer will not exceed its capacity. In this way, the four modules of SDRAM control unit, input FIFO buffer, output FIFO buffer and SDRAM chip are combined into a large-capacity buffer. The timing is the same, so the combination of these four modules can be operated as a large capacity FIFO.

USB2.0控制芯片配置成从器件FIFO、控制传输模式,当DMA传输通道建立之后,FPGA可连续向其从器件FIFO中写入图像数据,同时主机可连续将从器件FIFO中数据读入主机并显示。The USB2.0 control chip is configured as a slave device FIFO and controls the transmission mode. After the DMA transmission channel is established, the FPGA can continuously write image data to its slave device FIFO, and the host can continuously read the data from the slave device FIFO into the host and send show.

采集窗口命令由主机通过USB2.0控制芯片的控制端点发送到USB2.0控制芯片,然后通过IIC协议传输到光纤接收端FPGA并存放到其命令寄存器模块中。USB2.0控制芯片的两个普通IO引脚和光纤接收端FPGA的两个IO引脚连接,通过IO引脚模拟IIC协议,USB2.0控制芯片作为IIC的主设备,光纤接收端FPGA作为IIC的从设备。The acquisition window command is sent by the host to the USB2.0 control chip through the control endpoint of the USB2.0 control chip, and then transmitted to the FPGA of the optical fiber receiving end through the IIC protocol and stored in its command register module. The two ordinary IO pins of the USB2.0 control chip are connected to the two IO pins of the FPGA at the fiber receiving end, and the IIC protocol is simulated through the IO pins. The USB2.0 control chip is used as the master device of the IIC, and the FPGA at the fiber receiving end is used as the IIC from the device.

Claims (3)

1., based on infrared digital image collection and the transmission system of optical fiber communication, it comprises main frame, optical fiber receiving terminal and optical fiber transmitting terminal, it is characterized in that:
Described main frame is the computer with USB2.0 interface;
Described optical fiber receiving terminal comprises a slice FPGA, a slice USB2.0 controller chip, an optic fiber transceiver module, a slice SDRAM; Wherein: described FPGA has block memory module; Described USB2.0 controller chip has the USB2.0 interface of a connection main frame, the IO pin that can arrange input and output direction from device fifo interface and two of a connection external equipment; Described SDRAM has 8M bytes store capacity and 8 bit data bus; Described optic fiber transceiver module is the optical receiving circuit module of an optical fiber connector and a slice serioparallel exchange chip composition; USB2.0 controller chip, SDRAM are directly connected with FPGA with optic fiber transceiver module is equal;
Described optical fiber transmitting terminal comprises a slice FPGA, an optical fiber sending module and peripheral circuit interface; Wherein, described FPGA has block memory module; Described optical fiber sending module is the optical fiber transtation mission circuit module of an optical fiber connector and a slice parallel-serial conversion chip composition; Described peripheral circuit interface is LVDS interface; Optical fiber sending module is all directly connected with FPGA with peripheral circuit interface;
Main frame is connected by USB2.0 transmission cable with optical fiber receiving terminal; Optical fiber receiving terminal and optical fiber transmitting terminal pass through Fiber connection; Optical fiber transmitting terminal is connected by LVDS interface with Infrared Detectors.
2., based on the method based on the infrared digital image collection of optical fiber communication and the infrared digital image collection of transmission system and transmission according to claim 1, it is characterized in that comprising the following steps:
Step 1: optical fiber transmitting terminal FPGA configures optical fiber sending module clock, and stored in built-in FIFO buffer memory after the view data detected is packed;
Step 2: optical fiber transmitting terminal FPGA is read data and sent by optical fiber sending module from built-in FIFO buffer memory;
Step 3: optical fiber receiving terminal FPGA configures optic fiber transceiver module clock, receives fiber data and detects its image frame head;
Step 4: according to acquisition window order, by after the view data cutting that receives stored in built-in input FIFO buffer memory;
Step 5:SDRAM control unit determines the read-write operation to SDRAM according to priority algorithm rotation mechanism, constantly data in built-in input FIFO buffer memory are read successively and are written in SDRAM, or data in SDRAM read successively and is written in built-in output FIFO buffer memory, making SDRAM and the built-in FIFO of input buffer memory and export FIFO buffer memory to be combined into a high-capacity FIFO;
Step 6: view data sending module read data in built-in output FIFO buffer memory and be written to USB2.0 controller chip from device FIFO;
Step 7: be configured to from device FIFO, controls transfer pattern by USB2.0 control chip by Design of Firmware, sets up a DMA transmission channel and the control command that main frame sends can be issued optical fiber receiving terminal FPGA by I/O port Simulation with I IC protocol mode simultaneously;
Step 8: main frame reads the data from device FIFO of USB2.0 controller chip by USB2.0 interface, and send the control commands such as acquisition window by USB2.0 interface;
Step 9: the IIC in optical fiber receiving terminal FPGA, from device interface module, according to IIC agreement, receives the control command that USB2.0 controller chip sends, and by it stored in command register.
3. according to claim 2 a kind of based on the infrared digital image collection of the infrared digital image acquiring and transmission system based on optical fiber communication according to claim 1 and the method for transmission, it is characterized in that: priority algorithm rotation mechanism concrete steps described are in steps of 5 as follows:
(5-1): initialization is write SDRAM has high priority;
(5-2): check and read or write SDRAM whether to complete, complete and forward to (5-3);
(5-3): have more than 127 bytes if SDRAM has more than 127 byte capacities and inputs in FIFO buffer memory, then forward to (5-4), otherwise forward to (5-6);
(5-4): there is high priority or export FIFO and be cached with if write SDRAM and be less than 128 byte capacities, then forward to (5-5), otherwise forward to (5-6);
(5-5): carry out write operation to SDRAM, complete the rearmounted SDRAM of reading there is high priority and forward to (5-2);
(5-6): be cached with more than 127 byte capacities if SDRAM has more than 127 bytes and exports FIFO, then forward to (5-7), otherwise forward to (5-2);
(5-7): if read SDRAM to there is high priority or input FIFO is cached with and is less than 128 bytes, then forward to (5-8), otherwise forward to (5-2);
(5-8): carry out read operation to SDRAM, complete the rearmounted SDRAM of writing there is high priority and forward to (5-2).
CN201410748321.XA 2014-12-09 2014-12-09 Infrared digital image acquisition and transmission system and method based on optical fiber communication Pending CN104539886A (en)

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