CN104518008A - Junction field effect transistor - Google Patents

Junction field effect transistor Download PDF

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Publication number
CN104518008A
CN104518008A CN201310455231.7A CN201310455231A CN104518008A CN 104518008 A CN104518008 A CN 104518008A CN 201310455231 A CN201310455231 A CN 201310455231A CN 104518008 A CN104518008 A CN 104518008A
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China
Prior art keywords
type light
type
doping section
light doping
technotron
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CN201310455231.7A
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Chinese (zh)
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CN104518008B (en
Inventor
潘光燃
石金成
高振杰
文燕
王焜
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Shenzhen Founder Microelectronics Co Ltd
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Peking University Founder Group Co Ltd
Shenzhen Founder Microelectronics Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1066Gate region of field-effect devices with PN junction gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/80Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
    • H01L29/808Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a PN junction gate, e.g. PN homojunction gate

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

The invention belongs to the semiconductor device field and discloses a junction field effect transistor. According to the junction field effect transistor, a back grid is formed between a trench and a P substrate of the JFET (junction type field effect transistor) and is corresponding to the position of a positive grid, and as a result, when negative voltage is applied to the grids, depletion regions of a positive grid PN junction and a negative grid PN junction do not horizontally extend, but vertically extend with the increase of the negative voltage, so that small pinch-off voltage can be obtained; drain-source voltage is mainly borne by horizontal extension of the depletion regions, and P type lightly-doped regions which are adjacent to a source are formed between the trench and the P substrate of the JFET, so that the distribution of an electric field in the trench of the JFET is more uniform, and N type lightly-doped regions which are located below a drain are formed between the trench and the P substrate of the JFET, and thus, breakdown of a PN junction formed by the trench and the P substrate of the JFET, which occurs at the bottom of a drain end, can be avoided, and as a result, high drain-source breakdown voltage can be obtained. With the junction field effect transistor adopted, contradictions among three parameters, namely, the pinch-off voltage, the drain-source breakdown voltage and current conduction capacity, can be alleviated.

Description

A kind of technotron
Technical field
The present invention relates to field of semiconductor devices, particularly a kind of technotron.
Background technology
Technotron (Junction Field Effect Transistor, be abbreviated as JFET) be one of modal semiconductor device, comprise N channel junction field-effect pipe and P channel junction field-effect pipe, in practical application, conventional is that N raceway groove JFET(JFET hereinafter refers to N raceway groove JFET).
The basic structure of N raceway groove JFET diffuses to form two P type doped regions, form two PN junctions, the grid of these two P type doped regions and JFET, N type semiconductor district between two P type doped regions and the raceway groove of JFET, the two ends of N type semiconductor are respectively source electrode and the drain electrode of JFET.It is common JFET structure shown in Fig. 1, as shown in Figure 1, N-type light doping section 10 is formed in the upper epidermis of P type substrate 15, P type doped region 14 is formed in the upper epidermis of N-type light doping section 10, drain electrode and the source electrode that N-type heavily doped region (N+) 11 and 12,11 and 12 is respectively JFET is formed at the two ends of N-type light doping section 10; P type doped region 14 in the upper epidermis of N-type light doping section 10 and the P type substrate 15 i.e. grid of JFET bottom N-type light doping section 10, be referred to as positive grid and backgate; The effect of P type heavily doped region (P+) 13 is only to reduce contact resistance when P type substrate 15 is drawn from upper surface.Between source-drain electrode, and be also formed with field oxide 16 between source electrode 12 and P type heavily doped region (P+) 13.
The key property parameter of JFET device comprises: pinch-off voltage, drain-source breakdown voltage, current capacity.Be summarized as follows:
For Fig. 1, N-type light doping section 10 and P type doped region 14 form a positive grid PN junction, N-type light doping section 10 and P type substrate 15 form a backgate PN junction, negative voltage is applied at grid, the depletion region of PN junction is broadening with the increase of negative pressure, time together with the depletion region of positive grid PN junction is encountered with the depletion region of backgate PN junction, corresponding grid negative pressure value and the pinch-off voltage of JFET.The absolute value of pinch-off voltage is less, also simpler to the control of JFET.Therefore, the absolute value of pinch-off voltage is the smaller the better.
When high voltage is born in drain electrode 11, the electric field in N-type light doping section 10 increases, and finally causes the electric field strength of certain position to reach the critical electric field of avalanche breakdown, causes drain current sharply to increase, corresponding drain voltage and the drain-source breakdown voltage of JFET.Drain-source breakdown voltage is larger, and the admissible operating voltage range of JFET is also larger.Therefore, drain-source breakdown voltage is the bigger the better.Electric Field Distribution in N-type light doping section 10 is more even, and obtainable drain-source breakdown voltage is also larger.
The current capacity of JFET is the bigger the better, and it depends primarily on the impurity concentration of N-type light doping section 10.
When device architecture is constant, the doping content of N-type light doping section 10 is larger, and its current capacity is also larger, but simultaneously its pinch-off voltage also larger, drain-source breakdown voltage is less, that is, there is contradictory relation between three's parameter.
Summary of the invention
The invention provides a kind of technotron, in order to solve existing JFET structure by increasing the doping content of raceway groove, when improving current capacity, the pinch-off voltage of device is also larger, drain-source breakdown voltage is less, can not ensure that JFET has the problem of higher current capacity and drain-source breakdown voltage, less pinch-off voltage simultaneously.
For solving the problems of the technologies described above, the invention provides described technotron and comprising:
P type substrate;
Be arranged in the first N-type light doping section of described P type substrate upper epidermis, be arranged in the first N-type heavily doped region and the second N-type heavily doped region of the upper epidermis at described first two ends, N-type light doping section, described first N-type heavily doped region and described second N-type heavily doped region are respectively as the drain electrode of described technotron and source electrode;
The first field oxide between described drain electrode and described source electrode;
Near the positive grid of described source electrode;
Be positioned at bottom described first N-type light doping section and the second N-type light doping section be positioned at below described drain electrode;
Be positioned at bottom described first N-type light doping section and the P type light doping section be positioned at below described positive grid, a described P type light doping section is as the backgate of described technotron;
Between described second N-type light doping section and a P type light doping section and near the 2nd P type light doping section of described second N-type light doping section.
The beneficial effect of technique scheme of the present invention is as follows:
In technique scheme, the backgate of JFET is formed between the raceway groove of JFET and P type substrate, and it is corresponding with the position of positive grid, thus when grid applies negative voltage, the depletion region of positive grid PN junction and the depletion region of backgate PN junction be longitudinal extension with the increase of negative pressure, and non-transverse broadening, less pinch-off voltage can be obtained.Meanwhile, owing to bearing drain-source voltage primarily of the extending transversely of depletion region, instead of directly high voltage is born by the PN junction of routine; And by forming P type light doping section near drain electrode between the raceway groove and P type substrate of JFET, make Electric Field Distribution in JFET raceway groove evenly; And be positioned at drain electrode below and form N-type light doping section between the raceway groove and P type substrate of JFET, the PN junction preventing the raceway groove of JFET and P type substrate to form punctures in the bottom of drain electrode end, therefore can obtain higher drain-source breakdown voltage.Thus the contradiction greatly alleviated between pinch-off voltage, drain-source breakdown voltage and current capacity three parameters.
Accompanying drawing explanation
Fig. 1 represents the structural representation of existing JFET;
Fig. 2 represents the structural representation of JFET in the present invention.
Embodiment
Below in conjunction with drawings and Examples, the specific embodiment of the present invention is described in further detail.Following examples for illustration of the present invention, but are not used for limiting the scope of the invention.
As shown in Figure 2, in the embodiment of the present invention, provide a kind of technotron, it the first N-type light doping section 201 comprising P type substrate 601 and be arranged in P type substrate 601 upper epidermis.First N-type light doping section 201 is as the raceway groove of technotron.The doping content that specifically can arrange the first N-type light doping section 201 is greater than the doping content of P type substrate 601.The first N-type heavily doped region 301 and the second N-type heavily doped region 302 is formed, respectively as drain electrode and the source electrode of technotron in the upper epidermis at the first two ends, N-type light doping section 201.Also be formed with the first field oxide 701 at the upper surface of the first N-type light doping section 201, wherein, the first field oxide 701 is between drain electrode 301 and source electrode 302.
The positive grid 501 of technotron are formed in the side of the first N-type light doping section 201 away from P type substrate 601, and arrange near source electrode 302.And the backgate 100 of technotron is for being positioned at the bottom of the first N-type light doping section 201, and the P type light doping section be positioned at below positive grid 501, thus when positive grid 501 and backgate 100 apply negative voltage, the depletion region of positive grid PN junction and the depletion region of backgate PN be longitudinal extension with the increase of negative pressure, can obtain less pinch-off voltage.Meanwhile, such structure also makes the JFET in the present invention bear drain-source voltage primarily of the extending transversely of depletion region, instead of directly bears drain-source voltage by the PN junction of routine, therefore can bear higher drain-source voltage, obtains higher drain-source breakdown voltage.
In order under higher drain-source voltage condition, prevent the PN junction be made up of the first N-type light doping section 201 and P type substrate 601 from puncturing in the bottom of drain electrode end, need the bottom in the first N-type light doping section 201 and be positioned at below drain electrode 301 to form the second N-type light doping section 202.The doping content that specifically can arrange the second N-type light doping section 202 is less than the doping content of the first N-type light doping section 201.
Technotron in the embodiment of the present invention also to comprise between the second N-type light doping section 202 and backgate 100 and near the 2nd P type light doping section of the second N-type light doping section 202, the arranging of 2nd P type light doping section can make Electric Field Distribution in the first N-type light doping section 201 evenly, improve drain-source breakdown voltage further.Wherein, the 2nd P type light doping section can comprise the P type light dope unit of multiple island, as 101 in Fig. 2,102,103, makes the Electric Field Distribution in the first N-type light doping section 201 more even.Thus the doping content alleviated by increasing JFET raceway groove, when improving current capacity, the contradiction between pinch-off voltage, drain-source breakdown voltage and current capacity three parameters.The length and width degree that specifically can arrange P type light dope unit is of a size of 0.5 ~ 5 micron, and spacing distance is 0.5 ~ 5 micron.
Preferably, positive grid 501 are for being formed in the first field oxide 701 upper surface and the polysilicon of close source electrode 302.When high voltage is born in drain electrode 301, the surface induction hole of the first N-type light doping section 201 below polysilicon 501 forms P type semiconductor, this P type semiconductor and the first N-type light doping section 201 form back-biased PN junction (being referred to as positive grid PN junction), its width of depletion region increases with the increase of drain electrode 301 voltage, thus can improve the drain-source breakdown voltage of technotron further.
Certainly, also can window to the first field oxide 701, and the region corresponding to window place in the upper epidermis of the first N-type light doping section 201 forms P type doped region, and using the positive grid 501 of this P type doped region as technotron.
Further, the doping content arranging backgate 100 is greater than the doping content of the first N-type light doping section 201.When high voltage is born in drain electrode 301, the width of depletion region of backgate PN junction increases with the increase of drain voltage.Along with the increase of drain voltage, together with the depletion region of positive grid PN junction will be encountered with the depletion region of backgate PN junction, raceway groove will be by pinch off.From the general knowledge of PN junction, depletion region is mainly launched to the side that doping content in PN junction is less, doping content due to a P type light doping section 100 is greater than the doping content of the first N-type light doping section 201, so the depletion region of backgate PN junction is mainly launched to the first direction, N-type light doping section 201, less pinch-off voltage can be obtained.
Technotron in the present embodiment can also comprise the P type heavily doped region 401 being arranged in P type substrate 601 upper epidermis, for backgate 100 being drawn from the upper surface of P type substrate 601 and reducing contact resistance when drawing.Correspondingly, between P type heavily doped region 401 and source electrode 302, be also formed with the second field oxide 801, for isolated p-heavily doped region 401 and source electrode 302.
In a concrete execution mode:
The resistivity of P type substrate 601 is 60 ~ 100 ohmcms (corresponding doping content is about 3E14 ~ 6E14 atom/cubic centimetre), and doped chemical is boron;
The doping content of the first N-type light doping section 201 is 3E15 ~ 6E15 atom/cubic centimetre, and doped chemical is phosphorus;
The doping content of the second N-type light doping section 202 is 1E15 ~ 3E15 atom/cubic centimetre, and doped chemical is phosphorus;
The doping content of the one P type light doping section 100 and the 2nd P type light doping section (comprising 101 in Fig. 2,102,103) is 8E15 ~ 1.5E16 atom/cubic centimetre, and doped chemical is boron.
In technical scheme of the present invention, the backgate of JFET is formed between the raceway groove of JFET and P type substrate, and it is corresponding with the position of positive grid, thus when grid applies negative voltage, the depletion region of positive grid PN junction and the depletion region of backgate PN junction be longitudinal extension with the increase of negative pressure, and non-transverse broadening, less pinch-off voltage can be obtained.Meanwhile, owing to bearing drain-source voltage primarily of the extending transversely of depletion region, instead of directly high voltage is born by the PN junction of routine; And by forming P type light doping section near drain electrode between the raceway groove and P type substrate of JFET, make Electric Field Distribution in JFET raceway groove evenly; And be positioned at drain electrode below and form N-type light doping section between the raceway groove and P type substrate of JFET, the PN junction preventing the raceway groove of JFET and P type substrate to form punctures in the bottom of drain electrode end, therefore can obtain higher drain-source breakdown voltage.Thus the doping content alleviated by increasing JFET raceway groove, when improving current capacity, the contradiction between pinch-off voltage, drain-source breakdown voltage and current capacity three parameters.
The above is only the preferred embodiment of the present invention; it should be pointed out that for those skilled in the art, under the prerequisite not departing from the technology of the present invention principle; can also make some improvement and replacement, these improve and replace and also should be considered as protection scope of the present invention.

Claims (9)

1. a technotron, is characterized in that, described technotron comprises:
P type substrate;
Be arranged in the first N-type light doping section of described P type substrate upper epidermis, be arranged in the first N-type heavily doped region and the second N-type heavily doped region of the upper epidermis at described first two ends, N-type light doping section, described first N-type heavily doped region and described second N-type heavily doped region are respectively as the drain electrode of described technotron and source electrode;
The first field oxide between described drain electrode and described source electrode;
Near the positive grid of described source electrode;
Be positioned at bottom described first N-type light doping section and the second N-type light doping section be positioned at below described drain electrode;
Be positioned at bottom described first N-type light doping section and the P type light doping section be positioned at below described positive grid, a described P type light doping section is as the backgate of described technotron;
Between described second N-type light doping section and a P type light doping section and near the 2nd P type light doping section of described second N-type light doping section.
2. technotron as claimed in claim 1, it is characterized in that, described technotron also comprises:
Be arranged in the P type heavily doped region of described P type substrate upper epidermis, for described backgate being drawn from the upper surface of described P type substrate and reducing contact resistance when drawing;
The second field oxide between described P type heavily doped region and described source electrode, for isolating described P type heavily doped region and described source electrode.
3. technotron as claimed in claim 1, is characterized in that, described positive grid are be positioned at described first field oxide upper surface and the polysilicon of close described source electrode.
4. technotron as claimed in claim 1, it is characterized in that, the doping content of described first N-type light doping section is greater than the doping content of described P type substrate.
5. technotron as claimed in claim 1, it is characterized in that, the doping content of described second N-type light doping section is less than the doping content of described first N-type light doping section.
6. technotron as claimed in claim 1, it is characterized in that, the doping content of a described P type light doping section is greater than the doping content of described first N-type light doping section.
7. technotron as claimed in claim 1, it is characterized in that, the doping content of described 2nd P type light doping section is greater than the doping content of described first N-type light doping section.
8. technotron as claimed in claim 1, it is characterized in that, described 2nd P type light doping section comprises several islands P type light dope unit.
9. technotron as claimed in claim 8, it is characterized in that, the spacing distance between described P type light dope unit is 0.5-5 micron.
CN201310455231.7A 2013-09-29 2013-09-29 A kind of technotron Active CN104518008B (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105609568A (en) * 2016-02-16 2016-05-25 上海华虹宏力半导体制造有限公司 Junction field effect transistor
CN106549037A (en) * 2016-11-25 2017-03-29 东莞市联洲知识产权运营管理有限公司 A kind of high voltage bearing technotron
CN109728100A (en) * 2017-10-30 2019-05-07 亚德诺半导体无限责任公司 Low grid current junction field effect transistor device architectures

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0316988A1 (en) * 1987-11-09 1989-05-24 Koninklijke Philips Electronics N.V. Lateral high-voltage transistor
US20100032731A1 (en) * 2008-07-14 2010-02-11 Babcock Jeffrey A Schottky junction-field-effect-transistor (jfet) structures and methods of forming jfet structures
CN102751330A (en) * 2011-08-17 2012-10-24 成都芯源系统有限公司 Lateral high-voltage device and manufacturing method thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0316988A1 (en) * 1987-11-09 1989-05-24 Koninklijke Philips Electronics N.V. Lateral high-voltage transistor
US20100032731A1 (en) * 2008-07-14 2010-02-11 Babcock Jeffrey A Schottky junction-field-effect-transistor (jfet) structures and methods of forming jfet structures
CN102751330A (en) * 2011-08-17 2012-10-24 成都芯源系统有限公司 Lateral high-voltage device and manufacturing method thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105609568A (en) * 2016-02-16 2016-05-25 上海华虹宏力半导体制造有限公司 Junction field effect transistor
CN106549037A (en) * 2016-11-25 2017-03-29 东莞市联洲知识产权运营管理有限公司 A kind of high voltage bearing technotron
CN109728100A (en) * 2017-10-30 2019-05-07 亚德诺半导体无限责任公司 Low grid current junction field effect transistor device architectures

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