CN104506303A - Parallel circulation shift register PRR - Google Patents
Parallel circulation shift register PRR Download PDFInfo
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- CN104506303A CN104506303A CN201410809169.1A CN201410809169A CN104506303A CN 104506303 A CN104506303 A CN 104506303A CN 201410809169 A CN201410809169 A CN 201410809169A CN 104506303 A CN104506303 A CN 104506303A
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- shift register
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Abstract
A shift register is a code part for generating a pseudo random sequence in the field of secret communication. The code parts comprise a linear feedback shift register LFSR, a nonlinear feedback shift register NLFSR and the like; the maximum period T of the code part is less than or equal to 2n. When a word length is m bits, an initial value of a parallel circulation shift register PRR is a0 to an minus 1 and next n words are subjected to recursion from first n words in the following mode. Firstly, summing is carried out according to the following formula: akn is equal to akn minus 1 plus ... plus akn minus nmod 2m, wherein k is greater than or equal to 1 and modulo operation mod represents remainder obtaining. Then next n minus 1 words are computed in parallel according to the following formula: For i is equal to 1 to n minus 1{j is equal to kn plus I; aj is equal to [akn is less than, is less than, is less than (j mod m)] plus aj minus n plus i mod 2m, wherein n is greater than or equal to 2; m adopts a digit of a platform; is less than, is less than, is less than j represents ring shift left for j bits; the initial value is not limited in the range of a0 to an minus 1. When the word length is m bits, the period of the n-grade PRR is greater than (2m)n, i.e. safety is higher than (N)LFSR; efficiency of the PRR is also higher than (N)LFSR. The parallel circulation shift register has the main purposes that a stream cipher algorithm is designed; a key schedule algorithm in the block cipher is designed; a message extension algorithm in the Hash function is designed; the parallel circulation shift register PRR is used for improving reliability in SSC (Spread Spectrum Communication).
Description
Technical field
Cardiopulmonary bypass in beating heart shift register PRR is the password part of secure communication field for generation of nonlinear pseudorandom sequence, main application: design flow cryptographic algorithm; Key schedule algorithm in design block cipher; Extension of message algorithm in design hash (Hash) function; For improving reliability in spread spectrum communication.
Background technology
The linear feedback shift register LFSR of conventional password part of pseudo random sequence is produced in cipher coding
[1]with nonlinear feedback shift register NLFSR
[2]deng, be below collectively referred to as (N) LFSR.Such as, the encryption standard A5 algorithm of 2nd generation mobile communication system GSM
[3,4], Bluetooth encryption standard E0 algorithm
[4]with stream cipher international standard SNOW2 algorithm
[3]all have employed LFSR; The extension of message algorithm of Hash functional standard SHA1 and SHA2
[3]and the 3rd multiple candidate algorithm of generation standard SHA3 have employed (N) LFSR or other generator.
The current output bit of n level (N) LFSR is all the logical function of front n-bit, and such logical function has
individual, its neutral line have 2
nindividual, nonlinear have
individual.LFSR adopts following feedback model by front n-bit a
,~ a
n+i-1linear Recurrence following bit a
n+i:
a
n+i=a
i^c
n-1a
i+1^…^c
1a
n+i-1
Wherein, constant c
k=0 or 1,1≤k≤n-1, ^ are XOR and nodulo-2 addition.If the initial n-bit a of input
0~ a
n-1be 0 entirely, then LFSR exports perseverance is 0, and therefore, the maximum cycle of n level LFSR is 2
n-1.When the feedback polynomial of and if only if LFSR is primitive polynomial, the cycle of LFSR just reaches maximum.Produce a primitive polynomial and be not easy, need by mathematical software bag.The extension of message algorithm of SHA1 adopts following pattern by front 16 word w
t-16~ w
t..1the next word w of recursion
t:
w
t=(w
t-3^w
t-8^w
t-14^w
t-16)<<<1
Wherein, < < < 1 represents ring shift left 1, and word length m is 32 bits.This is equivalent to 16 grades of generators that word length m is 32b (bit), if initial 16 word w of input
0~ w
15be 0 entirely, then exporting perseverance is 0, and therefore, its maximum cycle is less than or equal to (2
32)
16-1.The maximum cycle of n level NLFSR is 2
n.When word length is m bit, the cycle of n level cardiopulmonary bypass in beating heart shift register PRR is greater than (2
m)
n.(N) LFSR software simulating is slow, and solution is parallel m (N) LFSR, and being equivalent to word length is m bit, but maximum cycle is still less than or equal to 2
nunless, as SNOW2, adopt mould 2
mprimitive polynomial, maximum cycle is just less than or equal to (2
m)
n.That is, for different word length m and different progression n, (N) LFSR will find different feedback models.No matter word length m and progression n is much, and NRSR exists unified feedback model, need not find the feedback model reaching maximum cycle, can directly adapt to various platform, comprises the platform of more than 128 in the future.Under 32 bit platforms (2.4GHz double-core CPU, 2GB internal memory, Windows XP, C language), the LFSR speed of SNOW2 is 630MB/s.The extension of message algorithm speed of SHA1 and SHA256 is all less than 400MB/s.The speed of PRR is 700MB/s.For the LFSR that A5 and E0 algorithm adopts, except parallel 32 LFSR of non-concurrent, efficiency is just suitable with PRR.Reach maximum (N) LFSR for the cycle, its output is absolute uniform, has traveled through all states and just can repeat.Test shows, the output that PRR produces is that pseudorandom is uniform, can travel through all states again.
[1] (U.S.) Schneier B. Applied cryptography---agreement, algorithm and C source program. Wu Shizhong etc. translate. China Machine Press, 2000-1.264 ~ 269
[2] (in) Wang Yumin, Liu Jianwei. the safety of communication network---Theory and technology. publishing house of Xian Electronics Science and Technology University, 1999-04.81 ~ 82
[3] (in) paddy Lize, Zheng Shihui, Yang Yixian. contemporary cryptology study course. publishing house of Beijing University of Post & Telecommunication, 2009-08.169 ~ 175,189 ~ 204
[4] (in) Xu Shengbo, Marvin's is put down, Wang Xinmei. the safe practice in wireless communication networks. and People's Telecon Publishing House, 2003-07.149 ~ 150,183 ~ 187
Summary of the invention
[goal of the invention]
In order to produce the better output sequence of pseudo-randomness fast, for the efficient symmetric cryptographic algorithm of design safety and hash Hash function, cardiopulmonary bypass in beating heart shift register PRR compares (N) LFSR, expand the cycle of output sequence, improve the pseudo-randomness of output, enhance multi-platform adaptability, improve efficiency.
[technical scheme]
Cardiopulmonary bypass in beating heart shift register PRR is a kind of novel shift register, and its technical scheme adopted is: when word length is m bit, makes the initial value of n level PRR be a
0~ a
n-1, then PRR adopts following pattern by n word after front n word recursion.
(1) first to front n word summation: a
kn=(a
kn-1+ ... + a
kn-n) mod2
m; Wherein k>=1, modular arithmetic mod represents and rems.
(2) n-1 word after parallel computation: Fori=1to n-1{j=kn+i; a
j=[a
kn< < < (j mod m)]+a
j-n+ i mod2
m}
Wherein, n>=2, word length m makes even the figure place of platform: < < < j represents ring shift left j position: initial n word a of input
0~ a
n-1value is not limit, and each word of input is the number of any m bit long.
PRR and (N) LFSR difference are: (1) cyclic shift number j circulation change; (2) counting adds i; (3) register initial value is not limited.
[beneficial effect]
Compare (N) LFSR, non-linear circulating register (NRSR) has following advantage:
(1) cycle is larger, fail safe is higher.Because cyclic shift number L does not fix, when word length is m bit, the cycle of n level PRR is greater than (2
m)
n.For parallel schema a
j=[a
kn< < < (j mod m)]+a
j-n+ i mod2
m, when word length is 8b (bit), test cycle of 2 grades of PRR is 227560 > 2
16b (byte); The cycle of 3 grades of PRR is 331,573248 > 2
24(16MB).For parallel schema a
j=[a
kn< < < (j mod m)]+a
j-n+ j mod2
m, when word length is 8b, test cycle of 2 grades of PRR is 8569856 > 2
16b; The cycle of 3 grades of PRR is 2639,364096 > 2
24b.Test shows, the initial value of cycle and register, the initial value of cyclic shift number L are irrelevant.
Maximum LFSR is reached for the cycle, its output state 1 ~ 2
n-1 is absolute uniform; Maximum NLFSR is reached for the cycle, its output state 0 ~ 2
n-1 is absolute uniform, has traveled through all states and just can repeat.Test shows, the output that PRR produces is that pseudorandom is uniform, does not travel through all states and also may duplicate.Buffer status repeats not necessarily cycle repetition, repeats when the state of register and the state of cyclic shift number L repeat the cycle that is only simultaneously.Therefore, the unpredictability of PRR and fail safe are better than (N) LFSR.
Initial n word a of PRR input
0~ a
n-1value is not limit.For the extension of message algorithm of Hash functional standard SHA1 and SHA2, if initial message is 0 entirely, then extended message is also 0 entirely.There is not this problem in PRR.
(2) efficiency is higher.For 32 bit platforms, 2GHz monokaryon CPU (512MB internal memory, Windows XP, C language), PRR speed is 760MB/s.For 32 bit platforms, 2.4GHz double-core CPU (2GB internal memory, Windows XP, C language), PRR speed is 1GB/s.Conventional (N) LFSR speed is no more than 630MB/s.
(3) multi-platform adaptability is more flexible.(N) LFSR software simulating is slow, and solution is, when the figure place of platform is m, parallel m (N) LFSR, being equivalent to word length is m bit, but maximum cycle is still less than or equal to 2
nunless, as SNOW2, adopt mould 2
mprimitive polynomial, maximum cycle is just less than or equal to (2
m)
n.That is, for different word length m and different progression n, (N) LFSR will find different feedback models.No matter word length m and progression n is much, and NRSR exists fixing feedback model a
j=[a
kn< < < (j modm)]+a
j-n+ i mod2
mand a
j=[a
kn< < < (j mod m)]+a
j-n+ j mod2
m, the feedback model reaching maximum cycle need not be found, can directly adapt to various platform, comprise the platform of more than 128 in the future.
Accompanying drawing explanation
Fig. 1 cardiopulmonary bypass in beating heart shift register PRR
Illustrate: n >=2, k >=1,1≤i≤n-1, j=kn+i; < < < j represents ring shift left j position, and modular arithmetic mod represents and rems, and word length m makes even the figure place of platform.
Embodiment
Cardiopulmonary bypass in beating heart shift register PRR is a kind of novel shift register, and its embodiment is: when word length is m bit, makes the initial value of n level PRR be a
0~ a
n-1, then PRR adopts following pattern by n word after front n word recursion.
(1) first to front n word summation: a
kn=(a
kn-1+ ... + a
kn-n) mod2
m; Wherein k>=1, modular arithmetic mod represents and rems.
(2) n-1 word after parallel computation: Fori=1to n-1{j=kn+i; a
j=[a
kn< < < (j mod m)]+a
j-n+ i mod2
m}
Wherein,>=2, the word length m figure places of making even platform; < < < j represents ring shift left j position; Initial n word a of input
0~ a
n-1value is not limit, and each word of input is the number of any m bit long.
During application, for concrete platform, by expanding the progression of PRR to raise the efficiency.Such as, for four core platforms, if n mod4 ≠ 1, then n level PRR is extended to 4I+1 level, parallel computation so simultaneously produces 4 words.
Claims (3)
1. cardiopulmonary bypass in beating heart shift register PRR, its general characteristic is: when word length is m bit, makes the initial value of n level PRR be a
0~ a
n-1, then first to front n word summation, i.e. a
kn=(a
kn-1+ ... + a
kn-n) mod 2
m, wherein k>=1, modular arithmetic mod represents and rems; Then parallel computation goes out a rear n-1 word.
2. cardiopulmonary bypass in beating heart shift register PRR according to claim 1, after its parallel computation, the pattern of n-1 word is:
For i=1to n-1{j=kn+i;a
j=[a
kn<<<(j mod m)]+a
j-n+i mod 2
m}
Wherein, n>=2, word length m makes even the figure place of platform; < < < j represents ring shift left j position; Initial n word a of input
0~ a
n-1value is not limit, and each word of input is the number of any m bit long.
3. cardiopulmonary bypass in beating heart shift register PRR according to claim 1, after its parallel computation, the pattern of n-1 word is:
For i=1to n-1{j=kn+i;a
j=[a
kn<<<(j mod m)]+a
j-n+j mod 2
m}
Wherein, n>=2, word length m makes even the figure place of platform; < < < j represents ring shift left j position; Initial n word a of input
0~ a
n-1value is not limit, and each word of input is the number of any m bit long.
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105162579A (en) * | 2015-06-18 | 2015-12-16 | 南京航空航天大学 | Lightweight stream cipher LSNRR based on non-linear cyclic shift register |
CN105897403A (en) * | 2016-04-01 | 2016-08-24 | 苏州中科启慧软件技术有限公司 | Stream cipher technology SPRR based on parallel cyclic shift register |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102176693A (en) * | 2011-03-04 | 2011-09-07 | 南京航空航天大学 | NRSR (nonlinear ring shifting register) |
-
2014
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Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102176693A (en) * | 2011-03-04 | 2011-09-07 | 南京航空航天大学 | NRSR (nonlinear ring shifting register) |
Non-Patent Citations (2)
Title |
---|
李伟: "《面向序列密码的反馈移位寄存器可重构并行化设计技术研究》", 《中国优秀硕士学位论文全文数据库 信息科技辑》 * |
蒋安平: "《循环冗余校验码(CRC)的硬件并行实现》", 《微电子学与计算机》 * |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105162579A (en) * | 2015-06-18 | 2015-12-16 | 南京航空航天大学 | Lightweight stream cipher LSNRR based on non-linear cyclic shift register |
CN105897403A (en) * | 2016-04-01 | 2016-08-24 | 苏州中科启慧软件技术有限公司 | Stream cipher technology SPRR based on parallel cyclic shift register |
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Application publication date: 20150408 |