CN104506197A - Method for positioning position of high-speed parallel data flow trigger point - Google Patents
Method for positioning position of high-speed parallel data flow trigger point Download PDFInfo
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- CN104506197A CN104506197A CN201410782032.1A CN201410782032A CN104506197A CN 104506197 A CN104506197 A CN 104506197A CN 201410782032 A CN201410782032 A CN 201410782032A CN 104506197 A CN104506197 A CN 104506197A
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Abstract
The invention provides a method for positioning the position of a high-speed parallel data flow trigger point; the position of the trigger point can be directly used, so that a digital three-dimensional oscilloscope is realized. The method comprises the following steps of (1) comparing parallel data with the upper limit and the lower limit of a trigger zone to obtain two paths of parallel comparison results; (2) dividing LData into a plurality of groups, implementing bitwise OR on first-order grouped data, determining whether a first bit of which the value is one occurs or not in the group, and determining the position of the first bit of which the value is one; (3) grouping data which are obtained after the implementation of bitwise OR on the first-order grouped data, and finding the position of the first bit of which the value is one by using the method of the step two till the position of the first bit of which the value is one in the LData can be determined; (4) after finding the positions of the bit of which the value is one, generating a corresponding data mask LDataMask; (5) implementing AND operation on the data mask LDataMask and HData to obtain a data mask HDataMask; (6) finding the position of the first bit of which the value is one about the data mask HDataMask, i.e. the position of the trigger point in the data flow, according to the methods of the step two and the step three.
Description
Technical field
The present invention relates to digital storage oscilloscope data sampling and trigger field, particularly relating to a kind of method of locating position, high-speed parallel data stream trigger point, for improving waveform exhibit stabilization.
Background technology
High speed digital oscilloscope carries out quantised samples by high-speed AD converter (ADC) to analog signal, data being sent into after field programmable gate array (FPGA) processes is stored in memory, reads data and send into display display during display from memory.Along with the development of electronic technology, oscillographic sample rate requires to reach several GHz to tens of GHz, but FPGA does not far reach so high processing speed, therefore needs the data after to sampling to carry out parallel processing.Multidiameter delay data flow brings challenges to high-speed data acquisition triggering system, and especially for digital three-dimensional oscilloscope, the realization of high capture rate requires fast and accurately finds trigger position.
One of traditional trigger point localization method is based on time interval measurement.If notification number is CN101719768B, name is called the time interval of " in a kind of multi-ADC parallel high-speed data acquisition system the pinpoint method in trigger point " measurement triggering signal rising edge and first synchronised clock rising edge after triggering, and then determines the position of trigger point.The method needs outside test module to assist, and adds complexity and the cost of circuit, and when surveying the required time can not meet the oscillographic requirement of digital three-dimensional of current high capture rate.
Other trigger point localization method comprises the position by determining trigger point after parallel triggering signal and data syn-chronization.If notification number is CN103199870A, name is called that " a kind of trigger point fast-positioning device " divides a two-way to deliver to ADC and trigger port after carrying out conditioning by analogue data, the parallel sampling data obtained and parallel trigger signal are sent into FPGA simultaneously and are synchronously processed, and then determine the position of trigger point.The method needs trigger port circuit, adds complexity and the cost of circuit, and needs synchronously to process data flow and triggering stream, increases FPGA design complexities, and there is the probability of error.Notification number is CN103558434A, and name is called " a kind of quick position digital oscilloscope trigger point system ", the parallel processing of triggering signal is placed on FPGA inside and realizes, then run simultaneously sampled data stream and parallel trigger signal, and then determines position, trigger point.Although this kind of method simplifies trigger port circuit, still need extra voltage comparator circuit, and do not simplify complicated synchronous processing logic, still there is error.
To sum up, one is found quick and precisely can to locate position, high-speed parallel data stream trigger point particularly important.
Summary of the invention
The invention provides a kind of method of locating position, high-speed parallel data stream trigger point for above problem, directly can use this position, trigger point, for realizing digital three-dimensional oscilloscope.
The present invention is realized by following technical scheme:
Locate a method for position, high-speed parallel data stream trigger point, comprise the following steps:
Step one, simultaneously by parallel data with trigger lower limit and the upper limit and compare, obtain the comparative result that two-way walks abreast, be designated as LData and HData; Wherein LData each represent sampled point data flow and trigger the result that lower limit compares, be less than when triggering lower limit and put 1, otherwise set to 0; HData each represent sampled point data flow and trigger the band upper limit and limit the result compared, be greater than to bring in triggering and put 1 in limited time, otherwise set to 0;
Step 2, described LData is divided into some groups, first by first order grouped data step-by-step "or", determine this group whether have value be 1 bit, to determine in this group that first value is the position of the bit of 1 simultaneously;
The data obtained after step 3, step-by-step "or" of the first order being divided into groups are divided into groups again, adopt the method for step 2 to find first value to be the position of the bit of 1, until can to determine in LData that first value is the position of the bit of 1;
Step 4, find first value in described LData to be after the bit of 1, generate data mask LDataMask corresponding with it;
Step 5, described data mask LDataMask and above-mentioned HData carry out AND-operation, obtain data mask HDataMask;
Step 6, find first value to be the position of the bit of 1 to data mask HDataMask according to the method for step 2 and step 3, be the position of trigger point in this data flow.
In step 3 the progression every grade of classification often group be no more than 5bit.
Beneficial effect of the present invention:
The method that the present invention quick and precisely locates position, high-speed parallel data trigger point solves the problem of conventional trigger point location cost plenty of time when surveying, and need the problem of trigger port analog circuit, synchronous data flow and Trig control signal introduce the problem of error.Digital storage oscilloscope data sampling triggers field, especially need to realize in the oscillographic field of digital three-dimensional very practical by high capture rate, and cost is low.
Accompanying drawing explanation
Fig. 1 is the structured flowchart of position, quick position high-speed parallel data stream trigger point of the present invention;
Fig. 2 is the triggering band schematic diagram of position, quick position high-speed parallel data stream trigger point of the present invention;
Fig. 3 is the streamline schematic diagram of position, quick position high-speed parallel data stream trigger point of the present invention.
Embodiment
Below in conjunction with accompanying drawing, the invention will be described further.
A kind of method of locating position, high-speed parallel data stream trigger point of the present invention, specific implementation comprises digitized voltage comparator, streamline triggers addressed module, all completes in FPGA inside.
As shown in Figure 1, analog signal becomes digital signal after ADC transforms, digital signal does serioparallel exchange after sending into FPGA, become parallel data stream, under digital dock, each cycle all has some sampled points to need process, quick and precisely finds trigger position to comprise two aspects, one is determine that the data point occurring to trigger is positioned at some cycles of parallel data stream, and another determines that the data point occurring to trigger is which point under this cycle in parallel data stream.
Digitized voltage comparator parallel data is flowed through the parallel trigger signal that digitized voltage comparator judges to meet triggering level requirement.For reducing trigger jitter, adopt the activation pattern triggering band, the triggering level by user's setting is changing into and triggers band, comprises and triggers the upper limit and triggering lower limit.Parallel data stream obtains two groups of triggering signals by comparing with the triggering upper limit and triggering lower limit respectively.As shown in Figure 2.Trigger upper prescribing a time limit when data are greater than, be designated as 1, otherwise be designated as 0 (HData); Trigger lower prescribing a time limit when data are less than, be designated as 1, otherwise be designated as 0 (LData).
Streamline triggers addressed module and two-way triggering signal is respectively divided into N group, as shown in Figure 3, first with N level flowing water to find in LData first be 1 point, namely current point is less than triggering lower limit; Then the result obtained is generated a mask and HData carries out AND-operation, obtains HData_Mask, then with N level flowing water find first of HData_Mask be 1 point, namely current point is greater than the triggering upper limit, and this point is trigger point.If the point do not met the demands in the HData_Mask data of current period, then in the next cycle, directly 1 operation is looked for HData.
After sampled data is postponed the beat identical with pipeline series, sampled data and trigger position can one_to_one corresponding, operate for realizing follow-up high capture rate.
The ADC of a 5GHz sample rate is to an analog signal sampling (each sampled point 8), sampled data is sent into FPGA process, FPGA directly can not process with the clock of 5GHz, therefore data flow dredging collateral low-voltage differential module reduction of speed is processed under 250M clock, obtain the high-speed parallel data stream of each cycle 20 sampled points (160).Data flow is sent into voltage comparator module.Supposing that triggering level is 0V, is 01111111 with binary representation, triggering level is transformed to and triggers band, then triggering the upper limit is 10000001, and triggering lower limit is 01111101.Data flow is compared with the triggering upper limit and triggering lower limit respectively, obtains HData and LData of 20 bit wides.
Then LData (supposing 0000_0011_1111_1111_1000) is divided into 3 groups, 2 × 2 × 5.LData is divided into 10 groups by first order flowing water, often organize 2, to find in every group the point of whether promising 1, the result obtained is (Grouped_Ldata1) 00_0111_1110, to record in this group the position (Mask_Interim1) that first is 1 simultaneously.Grouped_Ldata1 is divided into 5 groups by second level flowing water, often organize 2, to find in every group the point of whether promising 1, the result obtained is (Grouped_Ldata2) 0_1111, to record in this group the position (Mask_Interim2) that first is 1 simultaneously.Third level flowing water to find in Grouped_Ldata2 the position of whether promising 1, record the position (Mask_Interim3) that this group first is 1 simultaneously, by Mask_Interim1, Mask_Interim2, Mask_Interim3 can to obtain in LData first be 1 position be 6.And data mask (HData_Masked) 0000_0011_1111_1111_1111 obtained for the treatment of HData.After HData and HData_Masked is carried out "AND", the data obtained according to the processing method of LData after 3 grades of flowing water to final position, trigger point.
When in LData not being the position of 1, illustrate that current period does not have trigger point.When in the data after HData and HData_Masked "AND" not being the position of 1, illustrate that current period does not have trigger point, in the next cycle, HData_Masked is complete 1, i.e. direct addressing HData being carried out to position, trigger point.After sampled data is postponed the beat identical with pipeline series, sampled data and trigger position can one_to_one corresponding, operate for realizing follow-up high capture rate.
The foregoing is only the preferred embodiments of the present invention, be not restricted to the present invention, for a person skilled in the art, the present invention can have various modifications and variations.Within the spirit and principles in the present invention all, any amendment done, equivalent replacement, improvement etc., all should be included within right of the present invention.
Claims (4)
1. locate a method for position, high-speed parallel data stream trigger point, it is characterized in that, comprise the following steps:
Step one, simultaneously by parallel data with trigger lower limit and the upper limit and compare, obtain the comparative result that two-way walks abreast, be designated as LData and HData; Wherein LData each represent sampled point data flow and trigger the result that lower limit compares, be less than when triggering lower limit and put 1, otherwise set to 0; HData each represent sampled point data flow and trigger the band upper limit and limit the result compared, be greater than to bring in triggering and put 1 in limited time, otherwise set to 0;
Step 2, described LData is divided into some groups, first by first order grouped data step-by-step "or", determine this group whether have value be 1 bit, to determine in this group that first value is the position of the bit of 1 simultaneously;
The data obtained after step 3, step-by-step "or" of the first order being divided into groups are divided into groups again, adopt the method for step 2 to find first value to be the position of the bit of 1, until can to determine in LData that first value is the position of the bit of 1;
Step 4, find first value in described LData to be after the bit of 1, generate data mask LDataMask corresponding with it;
Step 5, described data mask LDataMask and above-mentioned HData carry out AND-operation, obtain data mask HDataMask;
Step 6, find first value to be the position of the bit of 1 to data mask HDataMask according to the method for step 2 and step 3, be the position of trigger point in this data flow.
2. a kind of method of locating position, high-speed parallel data stream trigger point as claimed in claim 1, is characterized in that, in step 3 the progression every grade of classification often group be no more than 5bit.
3. a kind of method of locating position, high-speed parallel data stream trigger point as claimed in claim 1 or 2, is characterized in that, described method adopts digitized voltage comparator and streamline to trigger addressed module and realizes, and all completes in FPGA inside.
4. a kind of method of locating position, high-speed parallel data stream trigger point as claimed in claim 3, it is characterized in that, parallel data stream is judged the parallel trigger signal meeting triggering level requirement by described digitized voltage comparator, the triggering level arranged by user is changing into triggering band, comprise the triggering upper limit and trigger lower limit, parallel data stream obtains two groups of triggering signals by comparing with the triggering upper limit and triggering lower limit respectively.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116227392B (en) * | 2023-05-09 | 2023-08-11 | 国仪量子(合肥)技术有限公司 | Bit feature position searching method, storage medium and electronic device |
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| US5212485A (en) * | 1990-09-27 | 1993-05-18 | Tektronix, Inc. | Analog oscilloscope digitizer |
| CN101719768A (en) * | 2009-11-20 | 2010-06-02 | 电子科技大学 | Method for positioning trigger point accurately in multi-ADC parallel high-speed data acquisition system |
| CN103199870A (en) * | 2013-02-28 | 2013-07-10 | 电子科技大学 | Quick positioning device for trigger point |
| CN103558434A (en) * | 2013-11-04 | 2014-02-05 | 南京国睿安泰信科技股份有限公司 | Quick-positioning digital oscilloscope trigger point system |
| CN104077492A (en) * | 2014-07-08 | 2014-10-01 | 中国电子科技集团公司第四十一研究所 | Sample data interpolation method based on FPGA |
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| CN116227392B (en) * | 2023-05-09 | 2023-08-11 | 国仪量子(合肥)技术有限公司 | Bit feature position searching method, storage medium and electronic device |
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