CN104503524A - Circuit structure capable of selecting between external power supply and parasite power supply - Google Patents

Abstract

The invention discloses a circuit structure (figure 1) capable of selecting between external power supply and parasite power supply. The circuit structure mainly comprises a parasite power supply link, an external power supply link, a logic selecting circuit and an energy accumulation unit, wherein the parasite power supply link comprises a DATA input port, a diode D1, an MOS transistor and an output line; the external power supply link comprises an external power supply VDD input port, an MOS transistor, a diode D21 and an output end; the logic selecting module comprises a detecting VDD input port, an INVOKE control signal end determined by internal circuit working states and two output control ports; the energy accumulation unit comprises a large capacitor shared by the external power supply link and the parasite power supply link. The circuit structure has the advantages the circuit structure is convenient to use, a customer can select to use the external power supply and the communication line parasite power supply according to self needs, a power line can be omitted under the parasite power supply mode, large-scale network layout can be facilitated, and cost can be saved.

Description

A kind of external power source or the optional circuit structure of parasitic power supply

Technical field

The present invention relates to integrated circuit field, especially a kind of external power source or parasitic optional circuit structure and its implementation method of powering.

Background technology

Chip can by outside power supply directly to power supply, also can adopt from data line, to draw the method for energy storage on electric capacity power.A kind of external power source or the optional circuit structure of parasitic power supply combine traditional external power source and directly to power two kinds of powering modes of powering with parasitism, allow client can be choice for use external power source according to oneself demand, or select the parasitic power supply mode of order wire, a power lead can be saved under parasitic powering mode, can facilitate and to arrange net on a large scale and cost-saving, in circuit structure storage capacitor large less, the parasitic size for the pressure reduction of electric consumption and the diode type of employing and chip internal power consumption decides.

Summary of the invention

(1) technical matters that will solve:

1) according to the automatic identification chip of the connection of chip exterior VDD be adopt external power source directly power, or adopt parasitic method power.

2) in modulus circuit, digital circuit need operating voltage low, low in energy consumption, generally want continuous firing; Mimic channel required voltage wants high, power consumption is high, generally can discontinuous operation, how to realize powering in the difference of different operating state.

(2) the technical solution adopted in the present invention is:

As shown in Figure 1, when VDD 105 connects power supply height, 103 output ports of LOGIC 102 circuit export high level always, and metal-oxide-semiconductor 110 is closed always, 104 output ports of LOGIC 102 circuit select the switch of metal-oxide-semiconductor 106 according to the excitation that INVOKE101 holds, and are now external power source.When VDD 105 ground connection, 104 output ports of LOGIC 102 circuit export high level always, metal-oxide-semiconductor 106 is closed always, 103 output ports of LOGIC 102 circuit select the switch of metal-oxide-semiconductor 110 according to the excitation of INVOKE 101 end, now powering mode is parasitic power supply, this mode of operation can save a power lead, reduces costs.So just can realize the automatic identification of chip exterior Power supply or parasitic power supply.

When chip is standby, only have digital circuit work, now need that the electric current that provides is little, voltage is also lower, now, no matter be external power source pattern or parasitic powering mode, metal-oxide-semiconductor 106110 all can not be opened, equivalent circuit diagram is as Fig. 2, VIN 201 can VDD 105 in representative graph 1, also can DATA111, diode D 202 can D1109 in representative graph 1 in representative graph 1, also can D2107 in representative graph 1,203,204 with in Fig. 1 108,112 consistent; This circuit has following relation:

VDD IN CHIP203＝VIN 201-VTH(D 202) (1-1)

VTH: the cut-in voltage being diode

The duty of foregoing circuit is out of question when giving power digital logic circuitry, but when to the larger mimic channel of power dissipation ratio or digital circuit, its power supply capacity just may be not enough to support needs power consumption large, the power supply of the analog or digital circuit that voltage is high, in order to address this problem, the unlatching of control metal-oxide-semiconductor (106 or 110) is selected together with detection VDD 105 end by INVOK in Fig. 1 101 port, add a soaking link, as the VIN 301 → Requ 303 → CAP 305 → VDD IN CHIP 304 in Fig. 3, have after increasing this path:

VDD IN CHIP 304≈VIN 301 (1-2)

$\mathrm{Requ}303=\frac{1}{C_{\mathrm{OX}}{U}_P\frac{W}{L}(\mathrm{VDDINCHIP}304-{\mathrm{VTH}}_P)}---(1-3)$

Accompanying drawing explanation

The overall schematic diagram of Fig. 1;

The equivalent schematic diagram of Fig. 2 chip low-power consumption mode

The equivalent schematic diagram of the large power consumption mode of Fig. 3 chip

Fig. 4 invention description figure

Embodiment

Below in conjunction with accompanying drawing, the invention will be further described.

Refer to Fig. 4, a kind of external power source of the present invention or the optional circuit structure of parasitic power supply are primarily of logic selection circuit 7000, externally fed link 7001, parasitic power supply link 7002 and energy-storage units 7,003 four part composition;

Logic selection circuit 7000 comprises control signal INVOKE 701, power end VDD705, internal logic circuit 702, output control terminal 703 and output control terminal 704; Externally fed link 7001 comprises power input VDD705, PMOS 706, triode diode connect 707 and be connected to the port of VDDINCHIP; Parasitic power supply link 7002 comprises data input pin DATA711, PMOS 710, triode diode connect 709 and be connected to the port of VDDINCHIP; Energy-storage units 7003 is the mode energy storage adopting electric capacity here.

In logic selection circuit 7000, control signal INVOKE 701 is the control of chip internal, power end VDD705 is the external power source input port of chip, according to the pattern of powering, it can be external power source height is external power source, also can be externally parasitic powering mode, output terminal 703 connects the grid of the PMOS 710 in parasitic power supply link 7002, and output terminal 704 connects the grid of the PMOS 706 in externally fed link 7001;

Externally fed link 7001 power input VDD705 is connected with VDD705 in logic selection circuit 7000 and the drain terminal being connected to PMOS 706 is connected with base stage with the collector of triode 707, the grid of PMOS 706 is connected with 704 of logic selection circuit 7000, and the source electrode of PMOS 706 is connected with lining and is connected on VDDINCHIP708 together with the emitter-base bandgap grading of triode 707;

Parasitic power supply link 7002 data input pin DATA711 is connected with base stage with the collector of triode 709 with the drain terminal of PMOS 710, the grid of PMOS 710 is connected with 703 of logic selection circuit 7000, and the source electrode of PMOS 710 is connected with lining and is connected on VDDINCHIP708 together with the emitter-base bandgap grading of triode 709;

Electric capacity one end in energy-storage units 7003 is connected to ground, and the other end is connected on VDDINCHIP708;

In example of the present invention, achieve external power source and parasitic power supply alternative, achieve when chip internal big current works simultaneously and the brute force of storage capacitor is charged, do not affect builtin voltage and power.

The technology of the present invention content and technical characteristic disclose as above, but those of ordinary skill in the art may do based on the present invention the change and modification that do not deviate from spirit of the present invention.Therefore invention can not be limited to these embodiments shown in this article, but will meet consistent with principle disclosed herein and features of novelty most wide region.

Claims (5)

1. external power source or the optional circuit structure of parasitic power supply, this circuit structure to be powered link 1002, externally fed link 1001, logic selection circuit 1000 and capacitor storage unit 1,003 four part composition primarily of parasitism.

2. external power source according to claim 1 or the optional circuit structure of parasitic power supply, its feature is, when parasitic power supply link is powered, during low-power consumption standby state, metal-oxide-semiconductor 110 is not opened, AC signal now on DATA signal wire 111 or other can signal maintained the power supply of chip internal to capacitor charging by diode 109 rectification, when chip internal consumption is larger, when diode 109 charging can not maintain its builtin voltage, at this moment INVOKE 101 and VDD 105 acting in conjunction generation control signal 103 make metal-oxide-semiconductor 110 open and rush electricity by force to storage capacitor, now traffic operation can not be carried out.

3. external power source according to claim 1 or the optional circuit structure of parasitic power supply, its feature is, when external power source link is powered, during low-power consumption standby state, metal-oxide-semiconductor 106 is not opened, now external power source VDD 105 crosses diode 107 rectification maintains chip internal power supply to capacitor charging, when chip internal consumption is larger, when diode 107 charging can not maintain its builtin voltage, at this moment INVOKE101 and VDD 105 acting in conjunction generation control signal 104 makes metal-oxide-semiconductor 106 open and hales power supply to storage capacitor, now communication function is unaffected.

4. external power source according to claim 1 or the optional circuit structure of parasitic power supply, its feature is, in logic selection circuit, INVOKE 101 also can be able to be outside from chip internal, it can be single wire control mouth, also can be Multi-thread control mouth, VDD detects the height of mouth identification VDD 105, when VDD105 is high, is now defaulted as external power source; When VDD 105 is low, be now defaulted as parasitic power supply.

5. external power source according to claim 1 or the optional circuit structure of parasitic power supply, its feature is, energy-storage units has a bulky capacitor to form, and this electric capacity can be placed on chip internal, also can be placed on chip exterior, it is shared by externally fed and parasitic power supply station.