CN104502835A - Serial link in-chip signal quality oscilloscope circuit and method - Google Patents
Serial link in-chip signal quality oscilloscope circuit and method Download PDFInfo
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Abstract
The invention provides a serial link in-chip signal quality oscilloscope circuit and method. The circuit comprises a code pattern generating circuit, a sampling circuit, a serial-to-parallel circuit, a data detection circuit, an alternating-current coupling capacitor, a differential DAC (Digital to Analog Conversion) circuit and a phase difference circuit, wherein the phase of the sampling circuit can be manually controlled through the phase difference circuit. The phase of a sampling clock is scanned through a phase interpolation circuit; meanwhile, scanning on an input differential signal common-mode voltage is performed; the eye pattern of a serial signal input into a system is depicted by taking the bit error rate as a standard through two-dimensional scanning of two variables including time and voltage, so that the quality is evaluated. The circuit is implemented through a digital-analog hybrid circuit, is integrated into a chip, and can be applied to testing of various signal links. By adopting the circuit, the interference of external factors such as channels and encapsulation can be eliminated, and quality information of an input signal in the chip can be truly restored.
Description
Technical field
The invention belongs to as integrated circuit (IC) design technology, relate to a kind of signal quality oscillography circuit and method in serial link sheet.
Background technology
In high-speed serial signals link test process, the signal to being sent to terminal and receiving end is needed to assess.Namely conventional means adopt oscillograph to observe the signal being sent to receiving end, but due to the impact of encapsulation etc., the signal that oscillograph is observed also is only the signal before entering receiver encapsulation.Due to the impact that chip package has pin, wiring, substrate cabling, press welding block etc. parasitic, also there is certain decay in the signal of sampling to chip receiving end from the pin of encapsulation, therefore, the signal that the signal that oscillograph is observed really are sampled at receiving end, this brings certain difficulty to the assessment of signal quality and the location of failure of chip.
Summary of the invention
The invention provides a kind of production method shaking serial signal source, this circuit is based on the serial link receiving device of phase difference value circuit and data detection circuit.By the two-dimensional scan of sampling clock phase and minimum input difference amplitude Two Variables, be standard with the bit error rate, depict the eye pattern of the serial signal in the system of being input to, thus assess its quality.
Concrete technical solution of the present invention is as follows:
Signal quality oscillography circuit in a kind of serial link sheet, its special character is:
Comprise that the pattern that connects successively produces circuit I 1, sample circuit I2, string turn and circuit I 3, data detection circuit I4, also comprise ac coupling capacitor (C1, C2), difference DAC-circuit I5, phase difference value circuit I 6;
Described pattern is produced circuit I 1 and generates specific periodically serial differential signals and exported by differential channel Ch1 and Ch2;
Described ac coupling capacitor C1 and C2 lays respectively on differential channel Ch1 and Ch2 between pattern generation circuit I 1 and sample circuit I2, for removing the DC information in serial differential signals;
Described difference DAC-circuit I5, according to DAC control code, exports the output direct current signal that differential amplitude does not wait, respectively access differential channel Ch1 and Ch2;
Described phase difference value circuit I 6 is according to the phase place of phase difference value control circui code scanning sample clock, and output clock outputs on the clock of sample circuit;
The serial signal of described sample circuit I2 to input is sampled;
String turns by described data detection circuit and the parallel data that exports of circuit and pattern produce the serial data that circuit produces contrasts, and calculates the corresponding bit error rate.
Signal quality oscillometric method in a kind of serial link sheet, its special character is, comprises the following steps:
1] specific pattern is produced:
Pattern produces circuit and directly generates specific periodically parallel signal, by output difference sub-signal (Dinp, Dinn) after the transmitter string of serial link, or generates specific periodically serial signal, is exported by driver;
2] DC information is removed:
Serial differential signals removes DC information wherein through ac coupling capacitor C1 and C2;
3] control of signal sampling:
3.1] input data minimum differential amplitude to control:
The direct current signal that difference DAC is not waited by the change output differential amplitude of control routine, is connected on the serial signal after AC coupling, makes the common mode voltage of the differential serial signals inputted equal the differential voltage of DAC output; The control bit increased by each unidirectional polarity or reduce DAC changes the common mode deviation of input difference serial signal, thus changes the minimum differential amplitude of input data;
3.2] clock phase scanning:
An one sampling period is divided into some parts by phase difference value circuit by the sampling clock of sample circuit, the minimum control bit of every a its control routine corresponding, when receiving serial signal, open or close the control routine of phase difference value circuit according to unidirectional polarity, increase progressively the phase place that a minimum control bit carrys out scanning sample clock at every turn;
4] signal sampling, the data after sampling turn through string and export parallel data after circuit; The concrete steps of signal sampling are wherein as follows:
4.1] data minimum differential amplitude traversal is inputted:
When data received by sample circuit, often change a sampling clock phase, complete the once traversal of difference DAC control code according to step 3.1, each change minimum control bit, by the reversing of same direction, detect corresponding bit error rate when DAC control code often changes a time and record;
4.2] sampling clock phase traversal:
After the control code of DAC traversal terminates by step 4.1, according to the minimum control bit of a step 4.1 same direction reversing phase difference value circuit, then by step 4.1, the control code of DAC is traveled through, so continue, until phase difference value control circui code traversal terminates;
5] error rate analyzer:
Parallel data enters in data detection circuit, contrasting, by data accumulation, thus calculating the corresponding bit error rate by producing with pattern the serial data that circuit produces;
Parallel data and pattern produce the serial data that circuit produces and contrast by turn in data detection circuit, if comparing result is consistent, error number is zero;
If comparing result is inconsistent, then error number adds one, until contrast is to last position, obtains total error number;
The bit error rate=total error number/total amount of data (total bit of parallel data).
6] signal quality oscillography in sheet:
At the end of step 5, by minimum differential amplitude corresponding for DAC control code and phase difference value circuit corresponding phase place composition two-dimensional coordinate depict, and read the corresponding bit error rate in each coordinate points, can complete with the bit error rate be reference sheet in the oscillography of signal.
Advantage of the present invention is as follows:
1, by phase-interpolation circuit, carry out the scanning of input differential signal common mode voltage thus the minimum differential amplitude of change differential signal simultaneously.By the two-dimensional scan of time and voltage Two Variables, be standard with the bit error rate, depict the eye pattern of the serial signal in the system of being input to, thus assess its quality.
2, circuit is realized by Digital Analog Hybrid Circuits, is integrated in sheet, gets rid of the interference of the extraneous factor such as channel, encapsulation, truly can go back the quality information of original input signal at chip internal, can be used in multi-signal link test.
Accompanying drawing explanation
Fig. 1 is the circuit realiration figure of method of the present invention;
Fig. 2 is method flow diagram of the present invention;
Description of reference numerals: I1-pattern produces circuit, I2-sample circuit, I3-string turns and circuit, I4-data detection circuit, I5-difference DAC-circuit, I6-phase difference value circuit, Ch1, Ch2-differential channel; C1, C2-ac coupling capacitor.
Embodiment
Below in conjunction with the drawings and specific embodiments, technical scheme of the present invention is stated clearly and completely.Obviously; the embodiment stated is only the present invention's part embodiment, instead of whole embodiments, based on the embodiment in the present invention; the every other embodiment that those skilled in the art are not making creative work prerequisite and obtain, all belongs to protection scope of the present invention.
As shown in Figure 1, signal quality oscillography circuit in a kind of serial link sheet, comprise that the pattern that connects successively produces circuit I 1, sample circuit I2, string turn and circuit I 3, data detection circuit I4, also comprise ac coupling capacitor (C1, C2), difference DAC-circuit I5, phase difference value circuit I 6; Pattern is produced circuit I 1 and generates specific periodically serial differential signals and exported by differential channel Ch1 and Ch2;
Ac coupling capacitor C1 and C2 lays respectively on differential channel Ch1 and Ch2 between pattern generation circuit I 1 and sample circuit I2, for removing the DC information in serial differential signals; Difference DAC-circuit I5, according to DAC control code, exports the output direct current signal that differential amplitude does not wait, respectively access differential channel Ch1 and Ch2; Phase difference value circuit I 6 is according to the phase place of phase difference value control circui code scanning sample clock, and output clock outputs on the clock of sample circuit; The serial signal of sample circuit I2 to input is sampled; String turns by data detection circuit and the parallel data that exports of circuit and pattern produce the serial data that circuit produces contrasts, and calculates the corresponding bit error rate.
As shown in Figure 2, signal quality oscillometric method in a kind of serial link sheet, comprises the following steps:
1] specific pattern is produced:
Pattern produces circuit and directly generates specific periodically parallel signal, by output difference sub-signal (Dinp, Dinn) after the transmitter string of serial link, or generates specific periodically serial signal, is exported by driver;
2] DC information is removed:
Serial differential signals removes DC information wherein through ac coupling capacitor C1 and C2;
3] control of signal sampling:
3.1] input data minimum differential amplitude to control:
The direct current signal that difference DAC is not waited by the change output differential amplitude of control routine, is connected on the serial signal after AC coupling, makes the common mode voltage of the differential serial signals inputted equal the differential voltage of DAC output; The control bit increased by each unidirectional polarity or reduce DAC changes the common mode deviation of input difference serial signal, thus changes the minimum differential amplitude of input data;
3.2] clock phase scanning:
An one sampling period is divided into some parts by phase difference value circuit by the sampling clock of sample circuit, the minimum control bit of every a its control routine corresponding, when receiving serial signal, open or close the control routine of phase difference value circuit according to unidirectional polarity, increase progressively the phase place that a minimum control bit carrys out scanning sample clock at every turn;
4] signal sampling, the data after sampling turn through string and export parallel data after circuit; The concrete steps of signal sampling are wherein as follows:
4.1] data minimum differential amplitude traversal is inputted:
When data received by sample circuit, often change a sampling clock phase, complete the once traversal of difference DAC control code according to step 3.1, each change minimum control bit, by the reversing of same direction, detect corresponding bit error rate when DAC control code often changes a time and record;
4.2] sampling clock phase traversal:
After the control code of DAC traversal terminates by step 4.1, according to the minimum control bit of a step 4.1 same direction reversing phase difference value circuit, then by step 4.1, the control code of DAC is traveled through, so continue, until phase difference value control circui code traversal terminates;
5] error rate analyzer:
Parallel data enters in data detection circuit, contrasting, by data accumulation, thus calculating the corresponding bit error rate by producing with pattern the serial data that circuit produces;
Parallel data and pattern produce the serial data that circuit produces and contrast by turn in data detection circuit, if comparing result is consistent, error number is zero;
If comparing result is inconsistent, then error number adds one, until contrast is to last position, obtains total error number;
The bit error rate=total error number/total amount of data (total bit of parallel data).
6] signal quality oscillography in sheet:
When step 5] at the end of, by minimum differential amplitude corresponding for DAC control code and phase difference value circuit corresponding phase place composition two-dimensional coordinate depict, and read the corresponding bit error rate in each coordinate points, can complete with the bit error rate be reference sheet in the oscillography of signal.
The invention provides signal quality oscillometric method in a kind of serial link sheet, the method comprises the following steps:
1] signal sends specific pattern
The pattern of data detection circuit produces circuit I 1 and sends specific cyclical signal, parallel signal can be sent, by exporting Dinp and Dinn after the transmitter string of serial link, also can send serial signal, directly exporting (representing with Dinp and Dinn equally in figure) by driver;
2] receiver Received signal strength and the bit error rate detect
Serial differential signals Dinp and Dinn sent by step 1 is sent in serial link receiving device Receiver through channel, the sample circuit I2 sampled signal of receiver, turns and export parallel data after circuit I 3 through string.Parallel data enters in the data detection circuit I4 in data detection circuit, contrasting, by the accumulation of a certain amount of data, thus calculating the corresponding bit error rate by producing with pattern the data that circuit produces;
3] clock phase scanning
An one sampling period is divided into some parts by phase difference value circuit I 6 by the sampling clock of sample circuit, the minimum control bit of every a its control routine Pctrl corresponding, when receiving data, open or close the control routine of phase difference value circuit according to same direction polarity, increase progressively the phase place that (or successively decreasing) minimum control bit carrys out scanning sample clock at every turn;
4] input data minimum differential amplitude to control
The output direct current signal that difference DAC I5 is not waited by the change output differential amplitude of control routine Dctrl, its common mode voltage keeps immobilizing.The serial differential data of serial link receiving device removes the DC information of its signal after ac coupling capacitor C1 and C2, the output of difference DAC is connected on the signal after AC coupling, the differential voltage making the common mode voltage of the differential serial data inputted equal DAC to export.The control bit increased by each same direction or reduce DAC changes the common mode deviation of input difference serial signal, thus changes the minimum differential amplitude of input data.
5] data minimum differential amplitude traversal and error rate analyzer is inputted
When step 2 receives data, often change a sampling clock phase, the once traversal of difference DAC control code is completed according to step 4, each change minimum control bit, by the reversing of same direction, now go out corresponding bit error rate when DAC control code often changes a time and record according to the bit error rate detection computations of step 2.
6] sampling clock phase traversal and error rate analyzer
After the control code of DAC traversal terminates by step 5, according to the minimum control bit of a step 3 same direction reversing phase difference value circuit, by step 5, the control code of DAC is traveled through again, calculate the corresponding bit error rate simultaneously and store, continuation like this, until phase difference value control circui code traversal terminates.
7] signal quality oscillography in sheet
At the end of step 6, by minimum differential amplitude corresponding for DAC control code and phase difference value circuit corresponding phase place composition two-dimensional coordinate depict, and read the corresponding bit error rate in each coordinate points, can complete with the bit error rate be reference sheet in the oscillography of signal.
Above embodiment only in order to technical scheme of the present invention to be described, is not intended to limit; Although with reference to previous embodiment to invention has been detailed description, those of ordinary skill in the art is to be understood that: it still can be modified to the technical scheme described in foregoing embodiments, or carries out equivalent replacement to wherein portion of techniques feature; And these amendments or replacement, do not make the essence of appropriate technical solution depart from the spirit and scope of various embodiments of the present invention technical scheme.
Claims (2)
1. a signal quality oscillography circuit in serial link sheet, is characterized in that:
Comprise that the pattern that connects successively produces circuit I 1, sample circuit I2, string turn and circuit I 3, data detection circuit I4, also comprise ac coupling capacitor (C1, C2), difference DAC-circuit I5, phase difference value circuit I 6;
Described pattern is produced circuit I 1 and generates specific periodically serial differential signals and exported by differential channel Ch1 and Ch2;
Described ac coupling capacitor C1 and C2 lays respectively on differential channel Ch1 and Ch2 between pattern generation circuit I 1 and sample circuit I2, for removing the DC information in serial differential signals;
Described difference DAC-circuit I5, according to DAC control code, exports the output direct current signal that differential amplitude does not wait, respectively access differential channel Ch1 and Ch2;
Described phase difference value circuit I 6 is according to the phase place of phase difference value control circui code scanning sample clock, and output clock outputs on the clock of sample circuit;
The serial signal of described sample circuit I2 to input is sampled;
String turns by described data detection circuit and the parallel data that exports of circuit and pattern produce the serial data that circuit produces contrasts, and calculates the corresponding bit error rate.
2. a signal quality oscillometric method in serial link sheet, is characterized in that, comprise the following steps:
1] specific pattern is produced:
Pattern produces circuit and directly generates specific periodically parallel signal, by output difference sub-signal (Dinp, Dinn) after the transmitter string of serial link, or generates specific periodically serial signal, is exported by driver;
2] DC information is removed:
Serial differential signals removes DC information wherein through ac coupling capacitor C1 and C2;
3] control of signal sampling:
3.1] input data minimum differential amplitude to control:
The direct current signal that difference DAC is not waited by the change output differential amplitude of control routine, is connected on the serial signal after AC coupling, makes the common mode voltage of the differential serial signals inputted equal the differential voltage of DAC output; The control bit increased by each unidirectional polarity or reduce DAC changes the common mode deviation of input difference serial signal, thus changes the minimum differential amplitude of input data;
3.2] clock phase scanning:
An one sampling period is divided into some parts by phase difference value circuit by the sampling clock of sample circuit, the minimum control bit of every a its control routine corresponding, when receiving serial signal, open or close the control routine of phase difference value circuit according to unidirectional polarity, increase progressively the phase place that a minimum control bit carrys out scanning sample clock at every turn;
4] signal sampling, the data after sampling turn through string and export parallel data after circuit; The concrete steps of signal sampling are wherein as follows:
4.1] data minimum differential amplitude traversal is inputted:
When data received by sample circuit, often change a sampling clock phase, complete the once traversal of difference DAC control code according to step 3.1, each change minimum control bit, by the reversing of same direction, detect corresponding bit error rate when DAC control code often changes a time and record;
4.2] sampling clock phase traversal:
After the control code of DAC traversal terminates by step 4.1, according to the minimum control bit of a step 4.1 same direction reversing phase difference value circuit, then by step 4.1, the control code of DAC is traveled through, so continue, until phase difference value control circui code traversal terminates;
5] error rate analyzer:
Parallel data enters in data detection circuit, contrasting, by data accumulation, thus calculating the corresponding bit error rate by producing with pattern the serial data that circuit produces;
Parallel data and pattern produce the serial data that circuit produces and contrast by turn in data detection circuit, if comparing result is consistent, error number is zero;
If comparing result is inconsistent, then error number adds one, until contrast is to last position, obtains total error number;
The bit error rate=total error number/total amount of data;
6] signal quality oscillography in sheet:
At the end of step 5, by minimum differential amplitude corresponding for DAC control code and phase difference value circuit corresponding phase place composition two-dimensional coordinate depict, and read the corresponding bit error rate in each coordinate points, can complete with the bit error rate be reference sheet in the oscillography of signal.
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| CN104502835B (en) | 2017-05-17 |
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